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[mirror_ubuntu-artful-kernel.git] / drivers / infiniband / hw / ipath / ipath_rc.c
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97f9efbc 1/*
e7eacd36 2 * Copyright (c) 2006, 2007, 2008 QLogic Corporation. All rights reserved.
97f9efbc
BS
3 * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
d98b1937
RC
34#include <linux/io.h>
35
97f9efbc 36#include "ipath_verbs.h"
34b2aafe 37#include "ipath_kernel.h"
97f9efbc
BS
38
39/* cut down ridiculously long IB macro names */
40#define OP(x) IB_OPCODE_RC_##x
41
3859e39d
RC
42static u32 restart_sge(struct ipath_sge_state *ss, struct ipath_swqe *wqe,
43 u32 psn, u32 pmtu)
44{
45 u32 len;
46
47 len = ((psn - wqe->psn) & IPATH_PSN_MASK) * pmtu;
48 ss->sge = wqe->sg_list[0];
49 ss->sg_list = wqe->sg_list + 1;
50 ss->num_sge = wqe->wr.num_sge;
51 ipath_skip_sge(ss, len);
52 return wqe->length - len;
53}
54
97f9efbc
BS
55/**
56 * ipath_init_restart- initialize the qp->s_sge after a restart
57 * @qp: the QP who's SGE we're restarting
58 * @wqe: the work queue to initialize the QP's SGE from
59 *
12eef41f 60 * The QP s_lock should be held and interrupts disabled.
97f9efbc
BS
61 */
62static void ipath_init_restart(struct ipath_qp *qp, struct ipath_swqe *wqe)
63{
64 struct ipath_ibdev *dev;
97f9efbc 65
3859e39d
RC
66 qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn,
67 ib_mtu_enum_to_int(qp->path_mtu));
97f9efbc
BS
68 dev = to_idev(qp->ibqp.device);
69 spin_lock(&dev->pending_lock);
94b8d9f9 70 if (list_empty(&qp->timerwait))
97f9efbc
BS
71 list_add_tail(&qp->timerwait,
72 &dev->pending[dev->pending_index]);
73 spin_unlock(&dev->pending_lock);
74}
75
76/**
77 * ipath_make_rc_ack - construct a response packet (ACK, NAK, or RDMA read)
78 * @qp: a pointer to the QP
79 * @ohdr: a pointer to the IB header being constructed
80 * @pmtu: the path MTU
81 *
3859e39d
RC
82 * Return 1 if constructed; otherwise, return 0.
83 * Note that we are in the responder's side of the QP context.
97f9efbc
BS
84 * Note the QP s_lock must be held.
85 */
4ee97180
RC
86static int ipath_make_rc_ack(struct ipath_ibdev *dev, struct ipath_qp *qp,
87 struct ipath_other_headers *ohdr, u32 pmtu)
97f9efbc 88{
3859e39d 89 struct ipath_ack_entry *e;
97f9efbc
BS
90 u32 hwords;
91 u32 len;
92 u32 bth0;
3859e39d 93 u32 bth2;
97f9efbc
BS
94
95 /* header size in 32-bit words LRH+BTH = (8+12)/4. */
96 hwords = 5;
97
97f9efbc 98 switch (qp->s_ack_state) {
3859e39d
RC
99 case OP(RDMA_READ_RESPONSE_LAST):
100 case OP(RDMA_READ_RESPONSE_ONLY):
101 case OP(ATOMIC_ACKNOWLEDGE):
154257f3
RC
102 /*
103 * We can increment the tail pointer now that the last
104 * response has been sent instead of only being
105 * constructed.
106 */
107 if (++qp->s_tail_ack_queue > IPATH_MAX_RDMA_ATOMIC)
108 qp->s_tail_ack_queue = 0;
3859e39d 109 /* FALLTHROUGH */
154257f3 110 case OP(SEND_ONLY):
3859e39d
RC
111 case OP(ACKNOWLEDGE):
112 /* Check for no next entry in the queue. */
113 if (qp->r_head_ack_queue == qp->s_tail_ack_queue) {
114 if (qp->s_flags & IPATH_S_ACK_PENDING)
115 goto normal;
154257f3 116 qp->s_ack_state = OP(ACKNOWLEDGE);
3859e39d
RC
117 goto bail;
118 }
119
120 e = &qp->s_ack_queue[qp->s_tail_ack_queue];
121 if (e->opcode == OP(RDMA_READ_REQUEST)) {
122 /* Copy SGE state in case we need to resend */
123 qp->s_ack_rdma_sge = e->rdma_sge;
124 qp->s_cur_sge = &qp->s_ack_rdma_sge;
125 len = e->rdma_sge.sge.sge_length;
126 if (len > pmtu) {
127 len = pmtu;
128 qp->s_ack_state = OP(RDMA_READ_RESPONSE_FIRST);
d781b129 129 } else {
3859e39d 130 qp->s_ack_state = OP(RDMA_READ_RESPONSE_ONLY);
d781b129
RC
131 e->sent = 1;
132 }
3859e39d
RC
133 ohdr->u.aeth = ipath_compute_aeth(qp);
134 hwords++;
135 qp->s_ack_rdma_psn = e->psn;
136 bth2 = qp->s_ack_rdma_psn++ & IPATH_PSN_MASK;
137 } else {
138 /* COMPARE_SWAP or FETCH_ADD */
139 qp->s_cur_sge = NULL;
140 len = 0;
141 qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE);
142 ohdr->u.at.aeth = ipath_compute_aeth(qp);
143 ohdr->u.at.atomic_ack_eth[0] =
144 cpu_to_be32(e->atomic_data >> 32);
145 ohdr->u.at.atomic_ack_eth[1] =
146 cpu_to_be32(e->atomic_data);
147 hwords += sizeof(ohdr->u.at) / sizeof(u32);
148 bth2 = e->psn;
d781b129 149 e->sent = 1;
3859e39d 150 }
97f9efbc 151 bth0 = qp->s_ack_state << 24;
97f9efbc
BS
152 break;
153
154 case OP(RDMA_READ_RESPONSE_FIRST):
155 qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE);
156 /* FALLTHROUGH */
157 case OP(RDMA_READ_RESPONSE_MIDDLE):
3859e39d 158 len = qp->s_ack_rdma_sge.sge.sge_length;
97f9efbc
BS
159 if (len > pmtu)
160 len = pmtu;
161 else {
162 ohdr->u.aeth = ipath_compute_aeth(qp);
163 hwords++;
164 qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST);
d781b129 165 qp->s_ack_queue[qp->s_tail_ack_queue].sent = 1;
97f9efbc 166 }
97f9efbc 167 bth0 = qp->s_ack_state << 24;
3859e39d 168 bth2 = qp->s_ack_rdma_psn++ & IPATH_PSN_MASK;
97f9efbc
BS
169 break;
170
171 default:
3859e39d 172 normal:
12eef41f 173 /*
3859e39d
RC
174 * Send a regular ACK.
175 * Set the s_ack_state so we wait until after sending
176 * the ACK before setting s_ack_state to ACKNOWLEDGE
177 * (see above).
12eef41f 178 */
154257f3 179 qp->s_ack_state = OP(SEND_ONLY);
3859e39d
RC
180 qp->s_flags &= ~IPATH_S_ACK_PENDING;
181 qp->s_cur_sge = NULL;
12eef41f 182 if (qp->s_nak_state)
3859e39d
RC
183 ohdr->u.aeth =
184 cpu_to_be32((qp->r_msn & IPATH_MSN_MASK) |
185 (qp->s_nak_state <<
186 IPATH_AETH_CREDIT_SHIFT));
12eef41f
BS
187 else
188 ohdr->u.aeth = ipath_compute_aeth(qp);
97f9efbc 189 hwords++;
3859e39d
RC
190 len = 0;
191 bth0 = OP(ACKNOWLEDGE) << 24;
192 bth2 = qp->s_ack_psn & IPATH_PSN_MASK;
97f9efbc
BS
193 }
194 qp->s_hdrwords = hwords;
97f9efbc 195 qp->s_cur_size = len;
4ee97180 196 ipath_make_ruc_header(dev, qp, ohdr, bth0, bth2);
3859e39d 197 return 1;
97f9efbc 198
12eef41f 199bail:
3859e39d 200 return 0;
97f9efbc
BS
201}
202
203/**
204 * ipath_make_rc_req - construct a request packet (SEND, RDMA r/w, ATOMIC)
205 * @qp: a pointer to the QP
97f9efbc
BS
206 *
207 * Return 1 if constructed; otherwise, return 0.
97f9efbc 208 */
4ee97180 209int ipath_make_rc_req(struct ipath_qp *qp)
97f9efbc
BS
210{
211 struct ipath_ibdev *dev = to_idev(qp->ibqp.device);
4ee97180 212 struct ipath_other_headers *ohdr;
97f9efbc
BS
213 struct ipath_sge_state *ss;
214 struct ipath_swqe *wqe;
215 u32 hwords;
216 u32 len;
217 u32 bth0;
218 u32 bth2;
4ee97180 219 u32 pmtu = ib_mtu_enum_to_int(qp->path_mtu);
97f9efbc 220 char newreq;
4ee97180
RC
221 unsigned long flags;
222 int ret = 0;
223
224 ohdr = &qp->s_hdr.u.oth;
225 if (qp->remote_ah_attr.ah_flags & IB_AH_GRH)
226 ohdr = &qp->s_hdr.u.l.oth;
227
228 /*
229 * The lock is needed to synchronize between the sending tasklet,
230 * the receive interrupt handler, and timeout resends.
231 */
232 spin_lock_irqsave(&qp->s_lock, flags);
97f9efbc 233
3859e39d
RC
234 /* Sending responses has higher priority over sending requests. */
235 if ((qp->r_head_ack_queue != qp->s_tail_ack_queue ||
236 (qp->s_flags & IPATH_S_ACK_PENDING) ||
154257f3 237 qp->s_ack_state != OP(ACKNOWLEDGE)) &&
4ee97180 238 ipath_make_rc_ack(dev, qp, ohdr, pmtu))
3859e39d
RC
239 goto done;
240
97f9efbc 241 if (!(ib_ipath_state_ops[qp->state] & IPATH_PROCESS_SEND_OK) ||
c3af664a 242 qp->s_rnr_timeout || qp->s_wait_credit)
3859e39d 243 goto bail;
97f9efbc 244
6022943e
BS
245 /* Limit the number of packets sent without an ACK. */
246 if (ipath_cmp24(qp->s_psn, qp->s_last_psn + IPATH_PSN_CREDIT) > 0) {
247 qp->s_wait_credit = 1;
248 dev->n_rc_stalls++;
3859e39d 249 goto bail;
6022943e
BS
250 }
251
97f9efbc
BS
252 /* header size in 32-bit words LRH+BTH = (8+12)/4. */
253 hwords = 5;
1dd6a1be 254 bth0 = 1 << 22; /* Set M bit */
97f9efbc
BS
255
256 /* Send a request. */
257 wqe = get_swqe_ptr(qp, qp->s_cur);
258 switch (qp->s_state) {
259 default:
260 /*
261 * Resend an old request or start a new one.
262 *
263 * We keep track of the current SWQE so that
264 * we don't reset the "furthest progress" state
265 * if we need to back up.
266 */
267 newreq = 0;
268 if (qp->s_cur == qp->s_tail) {
269 /* Check if send work queue is empty. */
270 if (qp->s_tail == qp->s_head)
3859e39d
RC
271 goto bail;
272 /*
273 * If a fence is requested, wait for previous
274 * RDMA read and atomic operations to finish.
275 */
276 if ((wqe->wr.send_flags & IB_SEND_FENCE) &&
277 qp->s_num_rd_atomic) {
278 qp->s_flags |= IPATH_S_FENCE_PENDING;
279 goto bail;
280 }
6022943e 281 wqe->psn = qp->s_next_psn;
97f9efbc
BS
282 newreq = 1;
283 }
284 /*
285 * Note that we have to be careful not to modify the
286 * original work request since we may need to resend
287 * it.
288 */
13b18c86 289 len = wqe->length;
97f9efbc
BS
290 ss = &qp->s_sge;
291 bth2 = 0;
292 switch (wqe->wr.opcode) {
293 case IB_WR_SEND:
294 case IB_WR_SEND_WITH_IMM:
295 /* If no credit, return. */
296 if (qp->s_lsn != (u32) -1 &&
297 ipath_cmp24(wqe->ssn, qp->s_lsn + 1) > 0)
3859e39d 298 goto bail;
97f9efbc
BS
299 wqe->lpsn = wqe->psn;
300 if (len > pmtu) {
301 wqe->lpsn += (len - 1) / pmtu;
302 qp->s_state = OP(SEND_FIRST);
303 len = pmtu;
304 break;
305 }
306 if (wqe->wr.opcode == IB_WR_SEND)
307 qp->s_state = OP(SEND_ONLY);
308 else {
309 qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE);
310 /* Immediate data comes after the BTH */
0f39cf3d 311 ohdr->u.imm_data = wqe->wr.ex.imm_data;
97f9efbc
BS
312 hwords += 1;
313 }
314 if (wqe->wr.send_flags & IB_SEND_SOLICITED)
315 bth0 |= 1 << 23;
316 bth2 = 1 << 31; /* Request ACK. */
317 if (++qp->s_cur == qp->s_size)
318 qp->s_cur = 0;
319 break;
320
321 case IB_WR_RDMA_WRITE:
6700efdf 322 if (newreq && qp->s_lsn != (u32) -1)
97f9efbc
BS
323 qp->s_lsn++;
324 /* FALLTHROUGH */
325 case IB_WR_RDMA_WRITE_WITH_IMM:
326 /* If no credit, return. */
327 if (qp->s_lsn != (u32) -1 &&
328 ipath_cmp24(wqe->ssn, qp->s_lsn + 1) > 0)
3859e39d 329 goto bail;
97f9efbc
BS
330 ohdr->u.rc.reth.vaddr =
331 cpu_to_be64(wqe->wr.wr.rdma.remote_addr);
332 ohdr->u.rc.reth.rkey =
333 cpu_to_be32(wqe->wr.wr.rdma.rkey);
334 ohdr->u.rc.reth.length = cpu_to_be32(len);
3859e39d 335 hwords += sizeof(struct ib_reth) / sizeof(u32);
97f9efbc
BS
336 wqe->lpsn = wqe->psn;
337 if (len > pmtu) {
338 wqe->lpsn += (len - 1) / pmtu;
339 qp->s_state = OP(RDMA_WRITE_FIRST);
340 len = pmtu;
341 break;
342 }
343 if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
344 qp->s_state = OP(RDMA_WRITE_ONLY);
345 else {
346 qp->s_state =
347 OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
6700efdf 348 /* Immediate data comes after RETH */
0f39cf3d 349 ohdr->u.rc.imm_data = wqe->wr.ex.imm_data;
97f9efbc
BS
350 hwords += 1;
351 if (wqe->wr.send_flags & IB_SEND_SOLICITED)
352 bth0 |= 1 << 23;
353 }
354 bth2 = 1 << 31; /* Request ACK. */
355 if (++qp->s_cur == qp->s_size)
356 qp->s_cur = 0;
357 break;
358
359 case IB_WR_RDMA_READ:
3859e39d
RC
360 /*
361 * Don't allow more operations to be started
362 * than the QP limits allow.
363 */
97f9efbc 364 if (newreq) {
3859e39d
RC
365 if (qp->s_num_rd_atomic >=
366 qp->s_max_rd_atomic) {
367 qp->s_flags |= IPATH_S_RDMAR_PENDING;
368 goto bail;
369 }
370 qp->s_num_rd_atomic++;
6700efdf
BS
371 if (qp->s_lsn != (u32) -1)
372 qp->s_lsn++;
97f9efbc
BS
373 /*
374 * Adjust s_next_psn to count the
375 * expected number of responses.
376 */
377 if (len > pmtu)
378 qp->s_next_psn += (len - 1) / pmtu;
379 wqe->lpsn = qp->s_next_psn++;
380 }
3859e39d
RC
381 ohdr->u.rc.reth.vaddr =
382 cpu_to_be64(wqe->wr.wr.rdma.remote_addr);
383 ohdr->u.rc.reth.rkey =
384 cpu_to_be32(wqe->wr.wr.rdma.rkey);
385 ohdr->u.rc.reth.length = cpu_to_be32(len);
386 qp->s_state = OP(RDMA_READ_REQUEST);
387 hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
97f9efbc
BS
388 ss = NULL;
389 len = 0;
390 if (++qp->s_cur == qp->s_size)
391 qp->s_cur = 0;
392 break;
393
394 case IB_WR_ATOMIC_CMP_AND_SWP:
395 case IB_WR_ATOMIC_FETCH_AND_ADD:
3859e39d
RC
396 /*
397 * Don't allow more operations to be started
398 * than the QP limits allow.
399 */
97f9efbc 400 if (newreq) {
3859e39d
RC
401 if (qp->s_num_rd_atomic >=
402 qp->s_max_rd_atomic) {
403 qp->s_flags |= IPATH_S_RDMAR_PENDING;
404 goto bail;
405 }
406 qp->s_num_rd_atomic++;
6700efdf
BS
407 if (qp->s_lsn != (u32) -1)
408 qp->s_lsn++;
97f9efbc
BS
409 wqe->lpsn = wqe->psn;
410 }
3859e39d
RC
411 if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP) {
412 qp->s_state = OP(COMPARE_SWAP);
413 ohdr->u.atomic_eth.swap_data = cpu_to_be64(
414 wqe->wr.wr.atomic.swap);
415 ohdr->u.atomic_eth.compare_data = cpu_to_be64(
416 wqe->wr.wr.atomic.compare_add);
417 } else {
418 qp->s_state = OP(FETCH_ADD);
419 ohdr->u.atomic_eth.swap_data = cpu_to_be64(
420 wqe->wr.wr.atomic.compare_add);
421 ohdr->u.atomic_eth.compare_data = 0;
422 }
423 ohdr->u.atomic_eth.vaddr[0] = cpu_to_be32(
424 wqe->wr.wr.atomic.remote_addr >> 32);
425 ohdr->u.atomic_eth.vaddr[1] = cpu_to_be32(
426 wqe->wr.wr.atomic.remote_addr);
427 ohdr->u.atomic_eth.rkey = cpu_to_be32(
428 wqe->wr.wr.atomic.rkey);
429 hwords += sizeof(struct ib_atomic_eth) / sizeof(u32);
97f9efbc
BS
430 ss = NULL;
431 len = 0;
3859e39d
RC
432 if (++qp->s_cur == qp->s_size)
433 qp->s_cur = 0;
97f9efbc
BS
434 break;
435
436 default:
3859e39d 437 goto bail;
97f9efbc 438 }
13b18c86
RC
439 qp->s_sge.sge = wqe->sg_list[0];
440 qp->s_sge.sg_list = wqe->sg_list + 1;
441 qp->s_sge.num_sge = wqe->wr.num_sge;
442 qp->s_len = wqe->length;
97f9efbc
BS
443 if (newreq) {
444 qp->s_tail++;
445 if (qp->s_tail >= qp->s_size)
446 qp->s_tail = 0;
447 }
13b18c86
RC
448 bth2 |= qp->s_psn & IPATH_PSN_MASK;
449 if (wqe->wr.opcode == IB_WR_RDMA_READ)
450 qp->s_psn = wqe->lpsn + 1;
451 else {
452 qp->s_psn++;
6f5c4074 453 if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
13b18c86
RC
454 qp->s_next_psn = qp->s_psn;
455 }
12eef41f
BS
456 /*
457 * Put the QP on the pending list so lost ACKs will cause
458 * a retry. More than one request can be pending so the
459 * QP may already be on the dev->pending list.
460 */
97f9efbc 461 spin_lock(&dev->pending_lock);
94b8d9f9 462 if (list_empty(&qp->timerwait))
97f9efbc
BS
463 list_add_tail(&qp->timerwait,
464 &dev->pending[dev->pending_index]);
465 spin_unlock(&dev->pending_lock);
466 break;
467
468 case OP(RDMA_READ_RESPONSE_FIRST):
469 /*
12eef41f
BS
470 * This case can only happen if a send is restarted.
471 * See ipath_restart_rc().
97f9efbc
BS
472 */
473 ipath_init_restart(qp, wqe);
474 /* FALLTHROUGH */
475 case OP(SEND_FIRST):
476 qp->s_state = OP(SEND_MIDDLE);
477 /* FALLTHROUGH */
478 case OP(SEND_MIDDLE):
27b678dd 479 bth2 = qp->s_psn++ & IPATH_PSN_MASK;
6f5c4074 480 if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
97f9efbc
BS
481 qp->s_next_psn = qp->s_psn;
482 ss = &qp->s_sge;
483 len = qp->s_len;
484 if (len > pmtu) {
97f9efbc
BS
485 len = pmtu;
486 break;
487 }
488 if (wqe->wr.opcode == IB_WR_SEND)
489 qp->s_state = OP(SEND_LAST);
490 else {
491 qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
492 /* Immediate data comes after the BTH */
0f39cf3d 493 ohdr->u.imm_data = wqe->wr.ex.imm_data;
97f9efbc
BS
494 hwords += 1;
495 }
496 if (wqe->wr.send_flags & IB_SEND_SOLICITED)
497 bth0 |= 1 << 23;
498 bth2 |= 1 << 31; /* Request ACK. */
499 qp->s_cur++;
500 if (qp->s_cur >= qp->s_size)
501 qp->s_cur = 0;
502 break;
503
504 case OP(RDMA_READ_RESPONSE_LAST):
505 /*
506 * This case can only happen if a RDMA write is restarted.
507 * See ipath_restart_rc().
508 */
509 ipath_init_restart(qp, wqe);
510 /* FALLTHROUGH */
511 case OP(RDMA_WRITE_FIRST):
512 qp->s_state = OP(RDMA_WRITE_MIDDLE);
513 /* FALLTHROUGH */
514 case OP(RDMA_WRITE_MIDDLE):
27b678dd 515 bth2 = qp->s_psn++ & IPATH_PSN_MASK;
6f5c4074 516 if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
97f9efbc
BS
517 qp->s_next_psn = qp->s_psn;
518 ss = &qp->s_sge;
519 len = qp->s_len;
520 if (len > pmtu) {
97f9efbc
BS
521 len = pmtu;
522 break;
523 }
524 if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
525 qp->s_state = OP(RDMA_WRITE_LAST);
526 else {
527 qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
528 /* Immediate data comes after the BTH */
0f39cf3d 529 ohdr->u.imm_data = wqe->wr.ex.imm_data;
97f9efbc
BS
530 hwords += 1;
531 if (wqe->wr.send_flags & IB_SEND_SOLICITED)
532 bth0 |= 1 << 23;
533 }
534 bth2 |= 1 << 31; /* Request ACK. */
535 qp->s_cur++;
536 if (qp->s_cur >= qp->s_size)
537 qp->s_cur = 0;
538 break;
539
540 case OP(RDMA_READ_RESPONSE_MIDDLE):
541 /*
542 * This case can only happen if a RDMA read is restarted.
543 * See ipath_restart_rc().
544 */
545 ipath_init_restart(qp, wqe);
27b678dd 546 len = ((qp->s_psn - wqe->psn) & IPATH_PSN_MASK) * pmtu;
97f9efbc
BS
547 ohdr->u.rc.reth.vaddr =
548 cpu_to_be64(wqe->wr.wr.rdma.remote_addr + len);
549 ohdr->u.rc.reth.rkey =
550 cpu_to_be32(wqe->wr.wr.rdma.rkey);
551 ohdr->u.rc.reth.length = cpu_to_be32(qp->s_len);
552 qp->s_state = OP(RDMA_READ_REQUEST);
3859e39d 553 hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
27b678dd 554 bth2 = qp->s_psn++ & IPATH_PSN_MASK;
6f5c4074 555 if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
97f9efbc
BS
556 qp->s_next_psn = qp->s_psn;
557 ss = NULL;
558 len = 0;
559 qp->s_cur++;
560 if (qp->s_cur == qp->s_size)
561 qp->s_cur = 0;
562 break;
97f9efbc 563 }
6022943e
BS
564 if (ipath_cmp24(qp->s_psn, qp->s_last_psn + IPATH_PSN_CREDIT - 1) >= 0)
565 bth2 |= 1 << 31; /* Request ACK. */
97f9efbc
BS
566 qp->s_len -= len;
567 qp->s_hdrwords = hwords;
568 qp->s_cur_sge = ss;
569 qp->s_cur_size = len;
4ee97180 570 ipath_make_ruc_header(dev, qp, ohdr, bth0 | (qp->s_state << 24), bth2);
3859e39d 571done:
4ee97180 572 ret = 1;
3859e39d 573bail:
4ee97180
RC
574 spin_unlock_irqrestore(&qp->s_lock, flags);
575 return ret;
97f9efbc
BS
576}
577
97f9efbc 578/**
ddd4bb22
BS
579 * send_rc_ack - Construct an ACK packet and send it
580 * @qp: a pointer to the QP
97f9efbc 581 *
ddd4bb22
BS
582 * This is called from ipath_rc_rcv() and only uses the receive
583 * side QP state.
3859e39d
RC
584 * Note that RDMA reads and atomics are handled in the
585 * send side QP state and tasklet.
97f9efbc 586 */
97f9efbc
BS
587static void send_rc_ack(struct ipath_qp *qp)
588{
589 struct ipath_ibdev *dev = to_idev(qp->ibqp.device);
d98b1937 590 struct ipath_devdata *dd;
97f9efbc
BS
591 u16 lrh0;
592 u32 bth0;
ddd4bb22 593 u32 hwords;
d98b1937 594 u32 __iomem *piobuf;
ddd4bb22 595 struct ipath_ib_header hdr;
97f9efbc 596 struct ipath_other_headers *ohdr;
35ff032e 597 unsigned long flags;
97f9efbc 598
d98b1937
RC
599 spin_lock_irqsave(&qp->s_lock, flags);
600
3859e39d 601 /* Don't send ACK or NAK if a RDMA read or atomic is pending. */
154257f3
RC
602 if (qp->r_head_ack_queue != qp->s_tail_ack_queue ||
603 (qp->s_flags & IPATH_S_ACK_PENDING) ||
604 qp->s_ack_state != OP(ACKNOWLEDGE))
3859e39d
RC
605 goto queue_ack;
606
d98b1937
RC
607 spin_unlock_irqrestore(&qp->s_lock, flags);
608
609 dd = dev->dd;
610 piobuf = ipath_getpiobuf(dd, 0, NULL);
611 if (!piobuf) {
612 /*
613 * We are out of PIO buffers at the moment.
614 * Pass responsibility for sending the ACK to the
615 * send tasklet so that when a PIO buffer becomes
616 * available, the ACK is sent ahead of other outgoing
617 * packets.
618 */
619 spin_lock_irqsave(&qp->s_lock, flags);
620 goto queue_ack;
621 }
622
97f9efbc 623 /* Construct the header. */
ddd4bb22 624 ohdr = &hdr.u.oth;
27b678dd 625 lrh0 = IPATH_LRH_BTH;
97f9efbc 626 /* header size in 32-bit words LRH+BTH+AETH = (8+12+4)/4. */
ddd4bb22 627 hwords = 6;
97f9efbc 628 if (unlikely(qp->remote_ah_attr.ah_flags & IB_AH_GRH)) {
ddd4bb22
BS
629 hwords += ipath_make_grh(dev, &hdr.u.l.grh,
630 &qp->remote_ah_attr.grh,
631 hwords, 0);
632 ohdr = &hdr.u.l.oth;
27b678dd 633 lrh0 = IPATH_LRH_GRH;
97f9efbc 634 }
12eef41f 635 /* read pkey_index w/o lock (its atomic) */
d98b1937 636 bth0 = ipath_get_pkey(dd, qp->s_pkey_index) |
1dd6a1be 637 (OP(ACKNOWLEDGE) << 24) | (1 << 22);
12eef41f 638 if (qp->r_nak_state)
27b678dd 639 ohdr->u.aeth = cpu_to_be32((qp->r_msn & IPATH_MSN_MASK) |
12eef41f 640 (qp->r_nak_state <<
27b678dd 641 IPATH_AETH_CREDIT_SHIFT));
12eef41f
BS
642 else
643 ohdr->u.aeth = ipath_compute_aeth(qp);
97f9efbc 644 lrh0 |= qp->remote_ah_attr.sl << 4;
ddd4bb22
BS
645 hdr.lrh[0] = cpu_to_be16(lrh0);
646 hdr.lrh[1] = cpu_to_be16(qp->remote_ah_attr.dlid);
647 hdr.lrh[2] = cpu_to_be16(hwords + SIZE_OF_CRC);
d98b1937 648 hdr.lrh[3] = cpu_to_be16(dd->ipath_lid);
97f9efbc
BS
649 ohdr->bth[0] = cpu_to_be32(bth0);
650 ohdr->bth[1] = cpu_to_be32(qp->remote_qpn);
27b678dd 651 ohdr->bth[2] = cpu_to_be32(qp->r_ack_psn & IPATH_PSN_MASK);
97f9efbc 652
d98b1937 653 writeq(hwords + 1, piobuf);
3859e39d 654
d98b1937
RC
655 if (dd->ipath_flags & IPATH_PIO_FLUSH_WC) {
656 u32 *hdrp = (u32 *) &hdr;
657
658 ipath_flush_wc();
659 __iowrite32_copy(piobuf + 2, hdrp, hwords - 1);
660 ipath_flush_wc();
661 __raw_writel(hdrp[hwords - 1], piobuf + hwords + 1);
662 } else
663 __iowrite32_copy(piobuf + 2, (u32 *) &hdr, hwords);
664
665 ipath_flush_wc();
666
667 dev->n_unicast_xmit++;
668 goto done;
3859e39d
RC
669
670queue_ack:
cc65edcf 671 dev->n_rc_qacks++;
3859e39d
RC
672 qp->s_flags |= IPATH_S_ACK_PENDING;
673 qp->s_nak_state = qp->r_nak_state;
674 qp->s_ack_psn = qp->r_ack_psn;
35ff032e 675 spin_unlock_irqrestore(&qp->s_lock, flags);
3859e39d
RC
676
677 /* Call ipath_do_rc_send() in another thread. */
678 tasklet_hi_schedule(&qp->s_task);
679
680done:
681 return;
97f9efbc
BS
682}
683
6700efdf
BS
684/**
685 * reset_psn - reset the QP state to send starting from PSN
686 * @qp: the QP
687 * @psn: the packet sequence number to restart at
688 *
689 * This is called from ipath_rc_rcv() to process an incoming RC ACK
690 * for the given QP.
691 * Called at interrupt level with the QP s_lock held.
692 */
693static void reset_psn(struct ipath_qp *qp, u32 psn)
694{
695 u32 n = qp->s_last;
696 struct ipath_swqe *wqe = get_swqe_ptr(qp, n);
697 u32 opcode;
698
699 qp->s_cur = n;
700
701 /*
702 * If we are starting the request from the beginning,
703 * let the normal send code handle initialization.
704 */
705 if (ipath_cmp24(psn, wqe->psn) <= 0) {
706 qp->s_state = OP(SEND_LAST);
707 goto done;
708 }
709
710 /* Find the work request opcode corresponding to the given PSN. */
711 opcode = wqe->wr.opcode;
712 for (;;) {
713 int diff;
714
715 if (++n == qp->s_size)
716 n = 0;
717 if (n == qp->s_tail)
718 break;
719 wqe = get_swqe_ptr(qp, n);
720 diff = ipath_cmp24(psn, wqe->psn);
721 if (diff < 0)
722 break;
723 qp->s_cur = n;
724 /*
725 * If we are starting the request from the beginning,
726 * let the normal send code handle initialization.
727 */
728 if (diff == 0) {
729 qp->s_state = OP(SEND_LAST);
730 goto done;
731 }
732 opcode = wqe->wr.opcode;
733 }
734
735 /*
736 * Set the state to restart in the middle of a request.
737 * Don't change the s_sge, s_cur_sge, or s_cur_size.
738 * See ipath_do_rc_send().
739 */
740 switch (opcode) {
741 case IB_WR_SEND:
742 case IB_WR_SEND_WITH_IMM:
743 qp->s_state = OP(RDMA_READ_RESPONSE_FIRST);
744 break;
745
746 case IB_WR_RDMA_WRITE:
747 case IB_WR_RDMA_WRITE_WITH_IMM:
748 qp->s_state = OP(RDMA_READ_RESPONSE_LAST);
749 break;
750
751 case IB_WR_RDMA_READ:
752 qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE);
753 break;
754
755 default:
756 /*
757 * This case shouldn't happen since its only
758 * one PSN per req.
759 */
760 qp->s_state = OP(SEND_LAST);
761 }
762done:
763 qp->s_psn = psn;
764}
765
97f9efbc
BS
766/**
767 * ipath_restart_rc - back up requester to resend the last un-ACKed request
768 * @qp: the QP to restart
769 * @psn: packet sequence number for the request
770 * @wc: the work completion request
771 *
12eef41f 772 * The QP s_lock should be held and interrupts disabled.
97f9efbc
BS
773 */
774void ipath_restart_rc(struct ipath_qp *qp, u32 psn, struct ib_wc *wc)
775{
776 struct ipath_swqe *wqe = get_swqe_ptr(qp, qp->s_last);
777 struct ipath_ibdev *dev;
97f9efbc 778
97f9efbc
BS
779 if (qp->s_retry == 0) {
780 wc->wr_id = wqe->wr.wr_id;
781 wc->status = IB_WC_RETRY_EXC_ERR;
782 wc->opcode = ib_ipath_wc_opcode[wqe->wr.opcode];
783 wc->vendor_err = 0;
784 wc->byte_len = 0;
062dbb69 785 wc->qp = &qp->ibqp;
4ee97180 786 wc->imm_data = 0;
97f9efbc 787 wc->src_qp = qp->remote_qpn;
4ee97180 788 wc->wc_flags = 0;
97f9efbc
BS
789 wc->pkey_index = 0;
790 wc->slid = qp->remote_ah_attr.dlid;
791 wc->sl = qp->remote_ah_attr.sl;
792 wc->dlid_path_bits = 0;
793 wc->port_num = 0;
794 ipath_sqerror_qp(qp, wc);
795 goto bail;
796 }
797 qp->s_retry--;
798
799 /*
800 * Remove the QP from the timeout queue.
801 * Note: it may already have been removed by ipath_ib_timer().
802 */
803 dev = to_idev(qp->ibqp.device);
804 spin_lock(&dev->pending_lock);
94b8d9f9
BS
805 if (!list_empty(&qp->timerwait))
806 list_del_init(&qp->timerwait);
97f9efbc
BS
807 spin_unlock(&dev->pending_lock);
808
809 if (wqe->wr.opcode == IB_WR_RDMA_READ)
810 dev->n_rc_resends++;
811 else
6f5c4074 812 dev->n_rc_resends += (qp->s_psn - psn) & IPATH_PSN_MASK;
97f9efbc 813
6700efdf 814 reset_psn(qp, psn);
97f9efbc
BS
815 tasklet_hi_schedule(&qp->s_task);
816
817bail:
818 return;
819}
820
6022943e
BS
821static inline void update_last_psn(struct ipath_qp *qp, u32 psn)
822{
cc65edcf
RC
823 if (qp->s_last_psn != psn) {
824 qp->s_last_psn = psn;
825 if (qp->s_wait_credit) {
826 qp->s_wait_credit = 0;
827 tasklet_hi_schedule(&qp->s_task);
828 }
6022943e 829 }
6022943e
BS
830}
831
97f9efbc
BS
832/**
833 * do_rc_ack - process an incoming RC ACK
834 * @qp: the QP the ACK came in on
835 * @psn: the packet sequence number of the ACK
836 * @opcode: the opcode of the request that resulted in the ACK
837 *
6700efdf 838 * This is called from ipath_rc_rcv_resp() to process an incoming RC ACK
97f9efbc 839 * for the given QP.
12eef41f 840 * Called at interrupt level with the QP s_lock held and interrupts disabled.
97f9efbc
BS
841 * Returns 1 if OK, 0 if current operation should be aborted (NAK).
842 */
06ee1090
RC
843static int do_rc_ack(struct ipath_qp *qp, u32 aeth, u32 psn, int opcode,
844 u64 val)
97f9efbc
BS
845{
846 struct ipath_ibdev *dev = to_idev(qp->ibqp.device);
847 struct ib_wc wc;
848 struct ipath_swqe *wqe;
849 int ret = 0;
13b18c86 850 u32 ack_psn;
06ee1090 851 int diff;
97f9efbc
BS
852
853 /*
854 * Remove the QP from the timeout queue (or RNR timeout queue).
855 * If ipath_ib_timer() has already removed it,
856 * it's OK since we hold the QP s_lock and ipath_restart_rc()
857 * just won't find anything to restart if we ACK everything.
858 */
859 spin_lock(&dev->pending_lock);
94b8d9f9
BS
860 if (!list_empty(&qp->timerwait))
861 list_del_init(&qp->timerwait);
97f9efbc
BS
862 spin_unlock(&dev->pending_lock);
863
864 /*
865 * Note that NAKs implicitly ACK outstanding SEND and RDMA write
866 * requests and implicitly NAK RDMA read and atomic requests issued
867 * before the NAK'ed request. The MSN won't include the NAK'ed
868 * request but will include an ACK'ed request(s).
869 */
13b18c86
RC
870 ack_psn = psn;
871 if (aeth >> 29)
872 ack_psn--;
97f9efbc
BS
873 wqe = get_swqe_ptr(qp, qp->s_last);
874
97f9efbc
BS
875 /*
876 * The MSN might be for a later WQE than the PSN indicates so
877 * only complete WQEs that the PSN finishes.
878 */
06ee1090
RC
879 while ((diff = ipath_cmp24(ack_psn, wqe->lpsn)) >= 0) {
880 /*
881 * RDMA_READ_RESPONSE_ONLY is a special case since
882 * we want to generate completion events for everything
883 * before the RDMA read, copy the data, then generate
884 * the completion for the read.
885 */
886 if (wqe->wr.opcode == IB_WR_RDMA_READ &&
887 opcode == OP(RDMA_READ_RESPONSE_ONLY) &&
888 diff == 0) {
889 ret = 1;
890 goto bail;
891 }
97f9efbc
BS
892 /*
893 * If this request is a RDMA read or atomic, and the ACK is
894 * for a later operation, this ACK NAKs the RDMA read or
895 * atomic. In other words, only a RDMA_READ_LAST or ONLY
896 * can ACK a RDMA read and likewise for atomic ops. Note
897 * that the NAK case can only happen if relaxed ordering is
898 * used and requests are sent after an RDMA read or atomic
899 * is sent but before the response is received.
900 */
901 if ((wqe->wr.opcode == IB_WR_RDMA_READ &&
06ee1090 902 (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) ||
97f9efbc
BS
903 ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
904 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) &&
06ee1090 905 (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0))) {
97f9efbc
BS
906 /*
907 * The last valid PSN seen is the previous
908 * request's.
909 */
6022943e 910 update_last_psn(qp, wqe->psn - 1);
97f9efbc
BS
911 /* Retry this request. */
912 ipath_restart_rc(qp, wqe->psn, &wc);
913 /*
914 * No need to process the ACK/NAK since we are
915 * restarting an earlier request.
916 */
917 goto bail;
918 }
06ee1090
RC
919 if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
920 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)
921 *(u64 *) wqe->sg_list[0].vaddr = val;
3859e39d
RC
922 if (qp->s_num_rd_atomic &&
923 (wqe->wr.opcode == IB_WR_RDMA_READ ||
924 wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
925 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) {
926 qp->s_num_rd_atomic--;
927 /* Restart sending task if fence is complete */
928 if ((qp->s_flags & IPATH_S_FENCE_PENDING) &&
929 !qp->s_num_rd_atomic) {
930 qp->s_flags &= ~IPATH_S_FENCE_PENDING;
931 tasklet_hi_schedule(&qp->s_task);
932 } else if (qp->s_flags & IPATH_S_RDMAR_PENDING) {
933 qp->s_flags &= ~IPATH_S_RDMAR_PENDING;
934 tasklet_hi_schedule(&qp->s_task);
935 }
936 }
97f9efbc 937 /* Post a send completion queue entry if requested. */
3859e39d 938 if (!(qp->s_flags & IPATH_S_SIGNAL_REQ_WR) ||
97f9efbc
BS
939 (wqe->wr.send_flags & IB_SEND_SIGNALED)) {
940 wc.wr_id = wqe->wr.wr_id;
941 wc.status = IB_WC_SUCCESS;
942 wc.opcode = ib_ipath_wc_opcode[wqe->wr.opcode];
943 wc.vendor_err = 0;
944 wc.byte_len = wqe->length;
0434d271 945 wc.imm_data = 0;
062dbb69 946 wc.qp = &qp->ibqp;
97f9efbc 947 wc.src_qp = qp->remote_qpn;
0434d271 948 wc.wc_flags = 0;
97f9efbc
BS
949 wc.pkey_index = 0;
950 wc.slid = qp->remote_ah_attr.dlid;
951 wc.sl = qp->remote_ah_attr.sl;
952 wc.dlid_path_bits = 0;
953 wc.port_num = 0;
954 ipath_cq_enter(to_icq(qp->ibqp.send_cq), &wc, 0);
955 }
956 qp->s_retry = qp->s_retry_cnt;
957 /*
958 * If we are completing a request which is in the process of
959 * being resent, we can stop resending it since we know the
960 * responder has already seen it.
961 */
962 if (qp->s_last == qp->s_cur) {
963 if (++qp->s_cur >= qp->s_size)
964 qp->s_cur = 0;
6f5c4074
RC
965 qp->s_last = qp->s_cur;
966 if (qp->s_last == qp->s_tail)
967 break;
97f9efbc
BS
968 wqe = get_swqe_ptr(qp, qp->s_cur);
969 qp->s_state = OP(SEND_LAST);
970 qp->s_psn = wqe->psn;
6f5c4074
RC
971 } else {
972 if (++qp->s_last >= qp->s_size)
973 qp->s_last = 0;
974 if (qp->s_last == qp->s_tail)
975 break;
976 wqe = get_swqe_ptr(qp, qp->s_last);
97f9efbc 977 }
97f9efbc
BS
978 }
979
980 switch (aeth >> 29) {
981 case 0: /* ACK */
982 dev->n_rc_acks++;
983 /* If this is a partial ACK, reset the retransmit timer. */
984 if (qp->s_last != qp->s_tail) {
985 spin_lock(&dev->pending_lock);
f4ad1bcc
RC
986 if (list_empty(&qp->timerwait))
987 list_add_tail(&qp->timerwait,
988 &dev->pending[dev->pending_index]);
97f9efbc 989 spin_unlock(&dev->pending_lock);
6f5c4074
RC
990 /*
991 * If we get a partial ACK for a resent operation,
992 * we can stop resending the earlier packets and
993 * continue with the next packet the receiver wants.
994 */
995 if (ipath_cmp24(qp->s_psn, psn) <= 0) {
996 reset_psn(qp, psn + 1);
997 tasklet_hi_schedule(&qp->s_task);
998 }
999 } else if (ipath_cmp24(qp->s_psn, psn) <= 0) {
1000 qp->s_state = OP(SEND_LAST);
1001 qp->s_psn = psn + 1;
97f9efbc
BS
1002 }
1003 ipath_get_credit(qp, aeth);
1004 qp->s_rnr_retry = qp->s_rnr_retry_cnt;
1005 qp->s_retry = qp->s_retry_cnt;
6022943e 1006 update_last_psn(qp, psn);
97f9efbc
BS
1007 ret = 1;
1008 goto bail;
1009
1010 case 1: /* RNR NAK */
1011 dev->n_rnr_naks++;
6f5c4074
RC
1012 if (qp->s_last == qp->s_tail)
1013 goto bail;
97f9efbc 1014 if (qp->s_rnr_retry == 0) {
97f9efbc
BS
1015 wc.status = IB_WC_RNR_RETRY_EXC_ERR;
1016 goto class_b;
1017 }
1018 if (qp->s_rnr_retry_cnt < 7)
1019 qp->s_rnr_retry--;
97f9efbc 1020
6700efdf 1021 /* The last valid PSN is the previous PSN. */
6022943e 1022 update_last_psn(qp, psn - 1);
97f9efbc 1023
6f5c4074
RC
1024 if (wqe->wr.opcode == IB_WR_RDMA_READ)
1025 dev->n_rc_resends++;
1026 else
1027 dev->n_rc_resends +=
1028 (qp->s_psn - psn) & IPATH_PSN_MASK;
97f9efbc 1029
6700efdf 1030 reset_psn(qp, psn);
97f9efbc
BS
1031
1032 qp->s_rnr_timeout =
27b678dd
BS
1033 ib_ipath_rnr_table[(aeth >> IPATH_AETH_CREDIT_SHIFT) &
1034 IPATH_AETH_CREDIT_MASK];
97f9efbc
BS
1035 ipath_insert_rnr_queue(qp);
1036 goto bail;
1037
1038 case 3: /* NAK */
6f5c4074
RC
1039 if (qp->s_last == qp->s_tail)
1040 goto bail;
1041 /* The last valid PSN is the previous PSN. */
1042 update_last_psn(qp, psn - 1);
27b678dd
BS
1043 switch ((aeth >> IPATH_AETH_CREDIT_SHIFT) &
1044 IPATH_AETH_CREDIT_MASK) {
97f9efbc
BS
1045 case 0: /* PSN sequence error */
1046 dev->n_seq_naks++;
1047 /*
6f5c4074 1048 * Back up to the responder's expected PSN.
97f9efbc
BS
1049 * Note that we might get a NAK in the middle of an
1050 * RDMA READ response which terminates the RDMA
1051 * READ.
1052 */
97f9efbc
BS
1053 ipath_restart_rc(qp, psn, &wc);
1054 break;
1055
1056 case 1: /* Invalid Request */
1057 wc.status = IB_WC_REM_INV_REQ_ERR;
1058 dev->n_other_naks++;
1059 goto class_b;
1060
1061 case 2: /* Remote Access Error */
1062 wc.status = IB_WC_REM_ACCESS_ERR;
1063 dev->n_other_naks++;
1064 goto class_b;
1065
1066 case 3: /* Remote Operation Error */
1067 wc.status = IB_WC_REM_OP_ERR;
1068 dev->n_other_naks++;
1069 class_b:
1070 wc.wr_id = wqe->wr.wr_id;
1071 wc.opcode = ib_ipath_wc_opcode[wqe->wr.opcode];
1072 wc.vendor_err = 0;
1073 wc.byte_len = 0;
062dbb69 1074 wc.qp = &qp->ibqp;
4ee97180 1075 wc.imm_data = 0;
97f9efbc 1076 wc.src_qp = qp->remote_qpn;
4ee97180 1077 wc.wc_flags = 0;
97f9efbc
BS
1078 wc.pkey_index = 0;
1079 wc.slid = qp->remote_ah_attr.dlid;
1080 wc.sl = qp->remote_ah_attr.sl;
1081 wc.dlid_path_bits = 0;
1082 wc.port_num = 0;
1083 ipath_sqerror_qp(qp, &wc);
1084 break;
1085
1086 default:
1087 /* Ignore other reserved NAK error codes */
1088 goto reserved;
1089 }
1090 qp->s_rnr_retry = qp->s_rnr_retry_cnt;
1091 goto bail;
1092
1093 default: /* 2: reserved */
1094 reserved:
1095 /* Ignore reserved NAK codes. */
1096 goto bail;
1097 }
1098
1099bail:
1100 return ret;
1101}
1102
1103/**
1104 * ipath_rc_rcv_resp - process an incoming RC response packet
1105 * @dev: the device this packet came in on
1106 * @ohdr: the other headers for this packet
1107 * @data: the packet data
1108 * @tlen: the packet length
1109 * @qp: the QP for this packet
1110 * @opcode: the opcode for this packet
1111 * @psn: the packet sequence number for this packet
1112 * @hdrsize: the header length
1113 * @pmtu: the path MTU
1114 * @header_in_data: true if part of the header data is in the data buffer
1115 *
1116 * This is called from ipath_rc_rcv() to process an incoming RC response
1117 * packet for the given QP.
1118 * Called at interrupt level.
1119 */
1120static inline void ipath_rc_rcv_resp(struct ipath_ibdev *dev,
1121 struct ipath_other_headers *ohdr,
1122 void *data, u32 tlen,
1123 struct ipath_qp *qp,
1124 u32 opcode,
1125 u32 psn, u32 hdrsize, u32 pmtu,
1126 int header_in_data)
1127{
3859e39d 1128 struct ipath_swqe *wqe;
97f9efbc
BS
1129 unsigned long flags;
1130 struct ib_wc wc;
1131 int diff;
1132 u32 pad;
1133 u32 aeth;
06ee1090 1134 u64 val;
97f9efbc
BS
1135
1136 spin_lock_irqsave(&qp->s_lock, flags);
1137
1138 /* Ignore invalid responses. */
1139 if (ipath_cmp24(psn, qp->s_next_psn) >= 0)
1140 goto ack_done;
1141
1142 /* Ignore duplicate responses. */
1143 diff = ipath_cmp24(psn, qp->s_last_psn);
1144 if (unlikely(diff <= 0)) {
1145 /* Update credits for "ghost" ACKs */
1146 if (diff == 0 && opcode == OP(ACKNOWLEDGE)) {
1147 if (!header_in_data)
1148 aeth = be32_to_cpu(ohdr->u.aeth);
1149 else {
1150 aeth = be32_to_cpu(((__be32 *) data)[0]);
1151 data += sizeof(__be32);
1152 }
1153 if ((aeth >> 29) == 0)
1154 ipath_get_credit(qp, aeth);
1155 }
1156 goto ack_done;
1157 }
1158
3859e39d
RC
1159 if (unlikely(qp->s_last == qp->s_tail))
1160 goto ack_done;
1161 wqe = get_swqe_ptr(qp, qp->s_last);
1162
97f9efbc
BS
1163 switch (opcode) {
1164 case OP(ACKNOWLEDGE):
1165 case OP(ATOMIC_ACKNOWLEDGE):
1166 case OP(RDMA_READ_RESPONSE_FIRST):
1167 if (!header_in_data)
1168 aeth = be32_to_cpu(ohdr->u.aeth);
1169 else {
1170 aeth = be32_to_cpu(((__be32 *) data)[0]);
1171 data += sizeof(__be32);
1172 }
3859e39d 1173 if (opcode == OP(ATOMIC_ACKNOWLEDGE)) {
3859e39d
RC
1174 if (!header_in_data) {
1175 __be32 *p = ohdr->u.at.atomic_ack_eth;
1176
1177 val = ((u64) be32_to_cpu(p[0]) << 32) |
1178 be32_to_cpu(p[1]);
1179 } else
1180 val = be64_to_cpu(((__be64 *) data)[0]);
06ee1090
RC
1181 } else
1182 val = 0;
1183 if (!do_rc_ack(qp, aeth, psn, opcode, val) ||
97f9efbc
BS
1184 opcode != OP(RDMA_READ_RESPONSE_FIRST))
1185 goto ack_done;
1186 hdrsize += 4;
06ee1090 1187 wqe = get_swqe_ptr(qp, qp->s_last);
3859e39d 1188 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
dd5190b6 1189 goto ack_op_err;
97f9efbc 1190 /*
3859e39d
RC
1191 * If this is a response to a resent RDMA read, we
1192 * have to be careful to copy the data to the right
1193 * location.
97f9efbc 1194 */
3859e39d
RC
1195 qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
1196 wqe, psn, pmtu);
1197 goto read_middle;
97f9efbc
BS
1198
1199 case OP(RDMA_READ_RESPONSE_MIDDLE):
1200 /* no AETH, no ACK */
1201 if (unlikely(ipath_cmp24(psn, qp->s_last_psn + 1))) {
1202 dev->n_rdma_seq++;
3859e39d 1203 ipath_restart_rc(qp, qp->s_last_psn + 1, &wc);
97f9efbc
BS
1204 goto ack_done;
1205 }
3859e39d 1206 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
dd5190b6 1207 goto ack_op_err;
3859e39d 1208 read_middle:
7bbb15ea 1209 if (unlikely(tlen != (hdrsize + pmtu + 4)))
dd5190b6 1210 goto ack_len_err;
3859e39d 1211 if (unlikely(pmtu >= qp->s_rdma_read_len))
dd5190b6 1212 goto ack_len_err;
3859e39d 1213
7bbb15ea 1214 /* We got a response so update the timeout. */
7bbb15ea
BS
1215 spin_lock(&dev->pending_lock);
1216 if (qp->s_rnr_timeout == 0 && !list_empty(&qp->timerwait))
1217 list_move_tail(&qp->timerwait,
1218 &dev->pending[dev->pending_index]);
1219 spin_unlock(&dev->pending_lock);
450bb387
PML
1220
1221 if (opcode == OP(RDMA_READ_RESPONSE_MIDDLE))
1222 qp->s_retry = qp->s_retry_cnt;
1223
7bbb15ea 1224 /*
6700efdf
BS
1225 * Update the RDMA receive state but do the copy w/o
1226 * holding the locks and blocking interrupts.
7bbb15ea 1227 */
3859e39d 1228 qp->s_rdma_read_len -= pmtu;
6022943e 1229 update_last_psn(qp, psn);
7bbb15ea 1230 spin_unlock_irqrestore(&qp->s_lock, flags);
3859e39d 1231 ipath_copy_sge(&qp->s_rdma_read_sge, data, pmtu);
7bbb15ea 1232 goto bail;
97f9efbc 1233
3859e39d 1234 case OP(RDMA_READ_RESPONSE_ONLY):
06ee1090
RC
1235 if (!header_in_data)
1236 aeth = be32_to_cpu(ohdr->u.aeth);
1237 else
1238 aeth = be32_to_cpu(((__be32 *) data)[0]);
1239 if (!do_rc_ack(qp, aeth, psn, opcode, 0))
3859e39d 1240 goto ack_done;
dd5190b6
RC
1241 /* Get the number of bytes the message was padded by. */
1242 pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
1243 /*
1244 * Check that the data size is >= 0 && <= pmtu.
1245 * Remember to account for the AETH header (4) and
1246 * ICRC (4).
1247 */
1248 if (unlikely(tlen < (hdrsize + pad + 8)))
1249 goto ack_len_err;
3859e39d
RC
1250 /*
1251 * If this is a response to a resent RDMA read, we
1252 * have to be careful to copy the data to the right
1253 * location.
3859e39d 1254 */
06ee1090 1255 wqe = get_swqe_ptr(qp, qp->s_last);
3859e39d
RC
1256 qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
1257 wqe, psn, pmtu);
1258 goto read_last;
1259
97f9efbc
BS
1260 case OP(RDMA_READ_RESPONSE_LAST):
1261 /* ACKs READ req. */
1262 if (unlikely(ipath_cmp24(psn, qp->s_last_psn + 1))) {
1263 dev->n_rdma_seq++;
3859e39d 1264 ipath_restart_rc(qp, qp->s_last_psn + 1, &wc);
97f9efbc
BS
1265 goto ack_done;
1266 }
3859e39d 1267 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
dd5190b6
RC
1268 goto ack_op_err;
1269 /* Get the number of bytes the message was padded by. */
97f9efbc
BS
1270 pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
1271 /*
1272 * Check that the data size is >= 1 && <= pmtu.
1273 * Remember to account for the AETH header (4) and
1274 * ICRC (4).
1275 */
dd5190b6
RC
1276 if (unlikely(tlen <= (hdrsize + pad + 8)))
1277 goto ack_len_err;
1278 read_last:
97f9efbc 1279 tlen -= hdrsize + pad + 8;
dd5190b6
RC
1280 if (unlikely(tlen != qp->s_rdma_read_len))
1281 goto ack_len_err;
97f9efbc
BS
1282 if (!header_in_data)
1283 aeth = be32_to_cpu(ohdr->u.aeth);
1284 else {
1285 aeth = be32_to_cpu(((__be32 *) data)[0]);
1286 data += sizeof(__be32);
1287 }
3859e39d 1288 ipath_copy_sge(&qp->s_rdma_read_sge, data, tlen);
06ee1090
RC
1289 (void) do_rc_ack(qp, aeth, psn,
1290 OP(RDMA_READ_RESPONSE_LAST), 0);
97f9efbc
BS
1291 goto ack_done;
1292 }
1293
1294ack_done:
1295 spin_unlock_irqrestore(&qp->s_lock, flags);
dd5190b6
RC
1296 goto bail;
1297
1298ack_op_err:
1299 wc.status = IB_WC_LOC_QP_OP_ERR;
1300 goto ack_err;
1301
1302ack_len_err:
1303 wc.status = IB_WC_LOC_LEN_ERR;
1304ack_err:
1305 wc.wr_id = wqe->wr.wr_id;
1306 wc.opcode = ib_ipath_wc_opcode[wqe->wr.opcode];
1307 wc.vendor_err = 0;
1308 wc.byte_len = 0;
1309 wc.imm_data = 0;
1310 wc.qp = &qp->ibqp;
1311 wc.src_qp = qp->remote_qpn;
1312 wc.wc_flags = 0;
1313 wc.pkey_index = 0;
1314 wc.slid = qp->remote_ah_attr.dlid;
1315 wc.sl = qp->remote_ah_attr.sl;
1316 wc.dlid_path_bits = 0;
1317 wc.port_num = 0;
1318 ipath_sqerror_qp(qp, &wc);
6ed89b95 1319 spin_unlock_irqrestore(&qp->s_lock, flags);
97f9efbc
BS
1320bail:
1321 return;
1322}
1323
1324/**
1325 * ipath_rc_rcv_error - process an incoming duplicate or error RC packet
1326 * @dev: the device this packet came in on
1327 * @ohdr: the other headers for this packet
1328 * @data: the packet data
1329 * @qp: the QP for this packet
1330 * @opcode: the opcode for this packet
1331 * @psn: the packet sequence number for this packet
1332 * @diff: the difference between the PSN and the expected PSN
1333 * @header_in_data: true if part of the header data is in the data buffer
1334 *
1335 * This is called from ipath_rc_rcv() to process an unexpected
1336 * incoming RC packet for the given QP.
1337 * Called at interrupt level.
1338 * Return 1 if no more processing is needed; otherwise return 0 to
3859e39d 1339 * schedule a response to be sent.
97f9efbc
BS
1340 */
1341static inline int ipath_rc_rcv_error(struct ipath_ibdev *dev,
1342 struct ipath_other_headers *ohdr,
1343 void *data,
1344 struct ipath_qp *qp,
1345 u32 opcode,
1346 u32 psn,
1347 int diff,
1348 int header_in_data)
1349{
3859e39d
RC
1350 struct ipath_ack_entry *e;
1351 u8 i, prev;
1352 int old_req;
35ff032e 1353 unsigned long flags;
97f9efbc
BS
1354
1355 if (diff > 0) {
1356 /*
1357 * Packet sequence error.
1358 * A NAK will ACK earlier sends and RDMA writes.
3859e39d 1359 * Don't queue the NAK if we already sent one.
97f9efbc 1360 */
3859e39d 1361 if (!qp->r_nak_state) {
12eef41f
BS
1362 qp->r_nak_state = IB_NAK_PSN_ERROR;
1363 /* Use the expected PSN. */
1364 qp->r_ack_psn = qp->r_psn;
3859e39d 1365 goto send_ack;
97f9efbc 1366 }
3859e39d 1367 goto done;
97f9efbc
BS
1368 }
1369
1370 /*
1371 * Handle a duplicate request. Don't re-execute SEND, RDMA
1372 * write or atomic op. Don't NAK errors, just silently drop
1373 * the duplicate request. Note that r_sge, r_len, and
1374 * r_rcv_len may be in use so don't modify them.
1375 *
1376 * We are supposed to ACK the earliest duplicate PSN but we
1377 * can coalesce an outstanding duplicate ACK. We have to
1378 * send the earliest so that RDMA reads can be restarted at
1379 * the requester's expected PSN.
3859e39d
RC
1380 *
1381 * First, find where this duplicate PSN falls within the
1382 * ACKs previously sent.
97f9efbc 1383 */
3859e39d
RC
1384 psn &= IPATH_PSN_MASK;
1385 e = NULL;
1386 old_req = 1;
35ff032e 1387 spin_lock_irqsave(&qp->s_lock, flags);
3859e39d
RC
1388 for (i = qp->r_head_ack_queue; ; i = prev) {
1389 if (i == qp->s_tail_ack_queue)
1390 old_req = 0;
1391 if (i)
1392 prev = i - 1;
1393 else
1394 prev = IPATH_MAX_RDMA_ATOMIC;
1395 if (prev == qp->r_head_ack_queue) {
1396 e = NULL;
1397 break;
1398 }
1399 e = &qp->s_ack_queue[prev];
1400 if (!e->opcode) {
1401 e = NULL;
1402 break;
1403 }
06ee1090
RC
1404 if (ipath_cmp24(psn, e->psn) >= 0) {
1405 if (prev == qp->s_tail_ack_queue)
1406 old_req = 0;
3859e39d 1407 break;
06ee1090 1408 }
3859e39d
RC
1409 }
1410 switch (opcode) {
1411 case OP(RDMA_READ_REQUEST): {
1412 struct ib_reth *reth;
1413 u32 offset;
1414 u32 len;
1415
1416 /*
1417 * If we didn't find the RDMA read request in the ack queue,
1418 * or the send tasklet is already backed up to send an
1419 * earlier entry, we can ignore this request.
1420 */
1421 if (!e || e->opcode != OP(RDMA_READ_REQUEST) || old_req)
1422 goto unlock_done;
97f9efbc
BS
1423 /* RETH comes after BTH */
1424 if (!header_in_data)
1425 reth = &ohdr->u.rc.reth;
1426 else {
1427 reth = (struct ib_reth *)data;
1428 data += sizeof(*reth);
1429 }
12eef41f 1430 /*
3859e39d
RC
1431 * Address range must be a subset of the original
1432 * request and start on pmtu boundaries.
1433 * We reuse the old ack_queue slot since the requester
1434 * should not back up and request an earlier PSN for the
1435 * same request.
12eef41f 1436 */
3859e39d
RC
1437 offset = ((psn - e->psn) & IPATH_PSN_MASK) *
1438 ib_mtu_enum_to_int(qp->path_mtu);
1439 len = be32_to_cpu(reth->length);
1440 if (unlikely(offset + len > e->rdma_sge.sge.sge_length))
1441 goto unlock_done;
1442 if (len != 0) {
97f9efbc
BS
1443 u32 rkey = be32_to_cpu(reth->rkey);
1444 u64 vaddr = be64_to_cpu(reth->vaddr);
1445 int ok;
1446
3859e39d
RC
1447 ok = ipath_rkey_ok(qp, &e->rdma_sge,
1448 len, vaddr, rkey,
97f9efbc 1449 IB_ACCESS_REMOTE_READ);
3859e39d
RC
1450 if (unlikely(!ok))
1451 goto unlock_done;
97f9efbc 1452 } else {
3859e39d
RC
1453 e->rdma_sge.sg_list = NULL;
1454 e->rdma_sge.num_sge = 0;
1455 e->rdma_sge.sge.mr = NULL;
1456 e->rdma_sge.sge.vaddr = NULL;
1457 e->rdma_sge.sge.length = 0;
1458 e->rdma_sge.sge.sge_length = 0;
97f9efbc 1459 }
3859e39d
RC
1460 e->psn = psn;
1461 qp->s_ack_state = OP(ACKNOWLEDGE);
1462 qp->s_tail_ack_queue = prev;
1463 break;
12eef41f
BS
1464 }
1465
97f9efbc 1466 case OP(COMPARE_SWAP):
3859e39d 1467 case OP(FETCH_ADD): {
97f9efbc 1468 /*
3859e39d
RC
1469 * If we didn't find the atomic request in the ack queue
1470 * or the send tasklet is already backed up to send an
1471 * earlier entry, we can ignore this request.
97f9efbc 1472 */
3859e39d
RC
1473 if (!e || e->opcode != (u8) opcode || old_req)
1474 goto unlock_done;
1475 qp->s_ack_state = OP(ACKNOWLEDGE);
1476 qp->s_tail_ack_queue = prev;
1477 break;
1478 }
1479
1480 default:
1481 if (old_req)
1482 goto unlock_done;
1483 /*
1484 * Resend the most recent ACK if this request is
1485 * after all the previous RDMA reads and atomics.
1486 */
1487 if (i == qp->r_head_ack_queue) {
35ff032e 1488 spin_unlock_irqrestore(&qp->s_lock, flags);
3859e39d
RC
1489 qp->r_nak_state = 0;
1490 qp->r_ack_psn = qp->r_psn - 1;
1491 goto send_ack;
1492 }
4ee97180
RC
1493 /*
1494 * Try to send a simple ACK to work around a Mellanox bug
1495 * which doesn't accept a RDMA read response or atomic
1496 * response as an ACK for earlier SENDs or RDMA writes.
1497 */
1498 if (qp->r_head_ack_queue == qp->s_tail_ack_queue &&
1499 !(qp->s_flags & IPATH_S_ACK_PENDING) &&
1500 qp->s_ack_state == OP(ACKNOWLEDGE)) {
1501 spin_unlock_irqrestore(&qp->s_lock, flags);
1502 qp->r_nak_state = 0;
1503 qp->r_ack_psn = qp->s_ack_queue[i].psn - 1;
1504 goto send_ack;
1505 }
3859e39d
RC
1506 /*
1507 * Resend the RDMA read or atomic op which
1508 * ACKs this duplicate request.
1509 */
1510 qp->s_ack_state = OP(ACKNOWLEDGE);
1511 qp->s_tail_ack_queue = i;
97f9efbc
BS
1512 break;
1513 }
12eef41f 1514 qp->r_nak_state = 0;
3859e39d 1515 tasklet_hi_schedule(&qp->s_task);
97f9efbc 1516
3859e39d 1517unlock_done:
35ff032e 1518 spin_unlock_irqrestore(&qp->s_lock, flags);
97f9efbc
BS
1519done:
1520 return 1;
3859e39d
RC
1521
1522send_ack:
1523 return 0;
97f9efbc
BS
1524}
1525
8d0208cb
BS
1526static void ipath_rc_error(struct ipath_qp *qp, enum ib_wc_status err)
1527{
35ff032e 1528 unsigned long flags;
d42b01b5 1529 int lastwqe;
35ff032e
RC
1530
1531 spin_lock_irqsave(&qp->s_lock, flags);
8d0208cb 1532 qp->state = IB_QPS_ERR;
d42b01b5 1533 lastwqe = ipath_error_qp(qp, err);
35ff032e 1534 spin_unlock_irqrestore(&qp->s_lock, flags);
d42b01b5
RC
1535
1536 if (lastwqe) {
1537 struct ib_event ev;
1538
1539 ev.device = qp->ibqp.device;
1540 ev.element.qp = &qp->ibqp;
1541 ev.event = IB_EVENT_QP_LAST_WQE_REACHED;
1542 qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
1543 }
8d0208cb
BS
1544}
1545
d781b129
RC
1546static inline void ipath_update_ack_queue(struct ipath_qp *qp, unsigned n)
1547{
1548 unsigned long flags;
1549 unsigned next;
1550
1551 next = n + 1;
1552 if (next > IPATH_MAX_RDMA_ATOMIC)
1553 next = 0;
1554 spin_lock_irqsave(&qp->s_lock, flags);
1555 if (n == qp->s_tail_ack_queue) {
1556 qp->s_tail_ack_queue = next;
1557 qp->s_ack_state = OP(ACKNOWLEDGE);
1558 }
1559 spin_unlock_irqrestore(&qp->s_lock, flags);
1560}
1561
97f9efbc
BS
1562/**
1563 * ipath_rc_rcv - process an incoming RC packet
1564 * @dev: the device this packet came in on
1565 * @hdr: the header of this packet
1566 * @has_grh: true if the header has a GRH
1567 * @data: the packet data
1568 * @tlen: the packet length
1569 * @qp: the QP for this packet
1570 *
1571 * This is called from ipath_qp_rcv() to process an incoming RC packet
1572 * for the given QP.
1573 * Called at interrupt level.
1574 */
1575void ipath_rc_rcv(struct ipath_ibdev *dev, struct ipath_ib_header *hdr,
1576 int has_grh, void *data, u32 tlen, struct ipath_qp *qp)
1577{
1578 struct ipath_other_headers *ohdr;
1579 u32 opcode;
1580 u32 hdrsize;
1581 u32 psn;
1582 u32 pad;
97f9efbc
BS
1583 struct ib_wc wc;
1584 u32 pmtu = ib_mtu_enum_to_int(qp->path_mtu);
1585 int diff;
1586 struct ib_reth *reth;
1587 int header_in_data;
1588
10aeb0e6
BS
1589 /* Validate the SLID. See Ch. 9.6.1.5 */
1590 if (unlikely(be16_to_cpu(hdr->lrh[3]) != qp->remote_ah_attr.dlid))
1591 goto done;
1592
97f9efbc
BS
1593 /* Check for GRH */
1594 if (!has_grh) {
1595 ohdr = &hdr->u.oth;
1596 hdrsize = 8 + 12; /* LRH + BTH */
1597 psn = be32_to_cpu(ohdr->bth[2]);
1598 header_in_data = 0;
1599 } else {
1600 ohdr = &hdr->u.l.oth;
1601 hdrsize = 8 + 40 + 12; /* LRH + GRH + BTH */
1602 /*
1603 * The header with GRH is 60 bytes and the core driver sets
1604 * the eager header buffer size to 56 bytes so the last 4
1605 * bytes of the BTH header (PSN) is in the data buffer.
1606 */
34b2aafe 1607 header_in_data = dev->dd->ipath_rcvhdrentsize == 16;
97f9efbc
BS
1608 if (header_in_data) {
1609 psn = be32_to_cpu(((__be32 *) data)[0]);
1610 data += sizeof(__be32);
1611 } else
1612 psn = be32_to_cpu(ohdr->bth[2]);
1613 }
97f9efbc
BS
1614
1615 /*
1616 * Process responses (ACKs) before anything else. Note that the
1617 * packet sequence number will be for something in the send work
1618 * queue rather than the expected receive packet sequence number.
1619 * In other words, this QP is the requester.
1620 */
ddd4bb22 1621 opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
97f9efbc
BS
1622 if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
1623 opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
1624 ipath_rc_rcv_resp(dev, ohdr, data, tlen, qp, opcode, psn,
1625 hdrsize, pmtu, header_in_data);
12eef41f 1626 goto done;
97f9efbc
BS
1627 }
1628
97f9efbc
BS
1629 /* Compute 24 bits worth of difference. */
1630 diff = ipath_cmp24(psn, qp->r_psn);
1631 if (unlikely(diff)) {
1632 if (ipath_rc_rcv_error(dev, ohdr, data, qp, opcode,
1633 psn, diff, header_in_data))
1634 goto done;
12eef41f 1635 goto send_ack;
97f9efbc
BS
1636 }
1637
1638 /* Check for opcode sequence errors. */
1639 switch (qp->r_state) {
1640 case OP(SEND_FIRST):
1641 case OP(SEND_MIDDLE):
1642 if (opcode == OP(SEND_MIDDLE) ||
1643 opcode == OP(SEND_LAST) ||
1644 opcode == OP(SEND_LAST_WITH_IMMEDIATE))
1645 break;
1646 nack_inv:
8d0208cb 1647 ipath_rc_error(qp, IB_WC_REM_INV_REQ_ERR);
12eef41f
BS
1648 qp->r_nak_state = IB_NAK_INVALID_REQUEST;
1649 qp->r_ack_psn = qp->r_psn;
1650 goto send_ack;
97f9efbc
BS
1651
1652 case OP(RDMA_WRITE_FIRST):
1653 case OP(RDMA_WRITE_MIDDLE):
1654 if (opcode == OP(RDMA_WRITE_MIDDLE) ||
1655 opcode == OP(RDMA_WRITE_LAST) ||
1656 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
1657 break;
1658 goto nack_inv;
1659
97f9efbc
BS
1660 default:
1661 if (opcode == OP(SEND_MIDDLE) ||
1662 opcode == OP(SEND_LAST) ||
1663 opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
1664 opcode == OP(RDMA_WRITE_MIDDLE) ||
1665 opcode == OP(RDMA_WRITE_LAST) ||
1666 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
1667 goto nack_inv;
12eef41f
BS
1668 /*
1669 * Note that it is up to the requester to not send a new
1670 * RDMA read or atomic operation before receiving an ACK
1671 * for the previous operation.
1672 */
97f9efbc
BS
1673 break;
1674 }
1675
1676 wc.imm_data = 0;
1677 wc.wc_flags = 0;
1678
1679 /* OK, process the packet. */
1680 switch (opcode) {
1681 case OP(SEND_FIRST):
1682 if (!ipath_get_rwqe(qp, 0)) {
1683 rnr_nak:
12eef41f
BS
1684 qp->r_nak_state = IB_RNR_NAK | qp->r_min_rnr_timer;
1685 qp->r_ack_psn = qp->r_psn;
1686 goto send_ack;
97f9efbc
BS
1687 }
1688 qp->r_rcv_len = 0;
1689 /* FALLTHROUGH */
1690 case OP(SEND_MIDDLE):
1691 case OP(RDMA_WRITE_MIDDLE):
1692 send_middle:
1693 /* Check for invalid length PMTU or posted rwqe len. */
1694 if (unlikely(tlen != (hdrsize + pmtu + 4)))
1695 goto nack_inv;
1696 qp->r_rcv_len += pmtu;
1697 if (unlikely(qp->r_rcv_len > qp->r_len))
1698 goto nack_inv;
1699 ipath_copy_sge(&qp->r_sge, data, pmtu);
1700 break;
1701
1702 case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE):
1703 /* consume RWQE */
1704 if (!ipath_get_rwqe(qp, 1))
1705 goto rnr_nak;
1706 goto send_last_imm;
1707
1708 case OP(SEND_ONLY):
1709 case OP(SEND_ONLY_WITH_IMMEDIATE):
1710 if (!ipath_get_rwqe(qp, 0))
1711 goto rnr_nak;
1712 qp->r_rcv_len = 0;
1713 if (opcode == OP(SEND_ONLY))
1714 goto send_last;
1715 /* FALLTHROUGH */
1716 case OP(SEND_LAST_WITH_IMMEDIATE):
1717 send_last_imm:
1718 if (header_in_data) {
1719 wc.imm_data = *(__be32 *) data;
1720 data += sizeof(__be32);
1721 } else {
1722 /* Immediate data comes after BTH */
1723 wc.imm_data = ohdr->u.imm_data;
1724 }
1725 hdrsize += 4;
1726 wc.wc_flags = IB_WC_WITH_IMM;
1727 /* FALLTHROUGH */
1728 case OP(SEND_LAST):
1729 case OP(RDMA_WRITE_LAST):
1730 send_last:
1731 /* Get the number of bytes the message was padded by. */
1732 pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
1733 /* Check for invalid length. */
1734 /* XXX LAST len should be >= 1 */
1735 if (unlikely(tlen < (hdrsize + pad + 4)))
1736 goto nack_inv;
1737 /* Don't count the CRC. */
1738 tlen -= (hdrsize + pad + 4);
1739 wc.byte_len = tlen + qp->r_rcv_len;
1740 if (unlikely(wc.byte_len > qp->r_len))
1741 goto nack_inv;
1742 ipath_copy_sge(&qp->r_sge, data, tlen);
12eef41f 1743 qp->r_msn++;
8d0208cb 1744 if (!qp->r_wrid_valid)
97f9efbc 1745 break;
8d0208cb 1746 qp->r_wrid_valid = 0;
97f9efbc
BS
1747 wc.wr_id = qp->r_wr_id;
1748 wc.status = IB_WC_SUCCESS;
1749 wc.opcode = IB_WC_RECV;
1750 wc.vendor_err = 0;
062dbb69 1751 wc.qp = &qp->ibqp;
97f9efbc
BS
1752 wc.src_qp = qp->remote_qpn;
1753 wc.pkey_index = 0;
1754 wc.slid = qp->remote_ah_attr.dlid;
1755 wc.sl = qp->remote_ah_attr.sl;
1756 wc.dlid_path_bits = 0;
1757 wc.port_num = 0;
1758 /* Signal completion event if the solicited bit is set. */
1759 ipath_cq_enter(to_icq(qp->ibqp.recv_cq), &wc,
1760 (ohdr->bth[0] &
1761 __constant_cpu_to_be32(1 << 23)) != 0);
1762 break;
1763
1764 case OP(RDMA_WRITE_FIRST):
1765 case OP(RDMA_WRITE_ONLY):
1766 case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE):
b506e1dc
RW
1767 if (unlikely(!(qp->qp_access_flags &
1768 IB_ACCESS_REMOTE_WRITE)))
1769 goto nack_inv;
97f9efbc
BS
1770 /* consume RWQE */
1771 /* RETH comes after BTH */
1772 if (!header_in_data)
1773 reth = &ohdr->u.rc.reth;
1774 else {
1775 reth = (struct ib_reth *)data;
1776 data += sizeof(*reth);
1777 }
1778 hdrsize += sizeof(*reth);
1779 qp->r_len = be32_to_cpu(reth->length);
1780 qp->r_rcv_len = 0;
1781 if (qp->r_len != 0) {
1782 u32 rkey = be32_to_cpu(reth->rkey);
1783 u64 vaddr = be64_to_cpu(reth->vaddr);
1784 int ok;
1785
1786 /* Check rkey & NAK */
6a553af2 1787 ok = ipath_rkey_ok(qp, &qp->r_sge,
97f9efbc
BS
1788 qp->r_len, vaddr, rkey,
1789 IB_ACCESS_REMOTE_WRITE);
12eef41f
BS
1790 if (unlikely(!ok))
1791 goto nack_acc;
97f9efbc
BS
1792 } else {
1793 qp->r_sge.sg_list = NULL;
1794 qp->r_sge.sge.mr = NULL;
1795 qp->r_sge.sge.vaddr = NULL;
1796 qp->r_sge.sge.length = 0;
1797 qp->r_sge.sge.sge_length = 0;
1798 }
97f9efbc
BS
1799 if (opcode == OP(RDMA_WRITE_FIRST))
1800 goto send_middle;
1801 else if (opcode == OP(RDMA_WRITE_ONLY))
1802 goto send_last;
1803 if (!ipath_get_rwqe(qp, 1))
1804 goto rnr_nak;
1805 goto send_last_imm;
1806
3859e39d
RC
1807 case OP(RDMA_READ_REQUEST): {
1808 struct ipath_ack_entry *e;
1809 u32 len;
1810 u8 next;
1811
b506e1dc
RW
1812 if (unlikely(!(qp->qp_access_flags &
1813 IB_ACCESS_REMOTE_READ)))
1814 goto nack_inv;
3859e39d
RC
1815 next = qp->r_head_ack_queue + 1;
1816 if (next > IPATH_MAX_RDMA_ATOMIC)
1817 next = 0;
d781b129
RC
1818 if (unlikely(next == qp->s_tail_ack_queue)) {
1819 if (!qp->s_ack_queue[next].sent)
1820 goto nack_inv;
1821 ipath_update_ack_queue(qp, next);
1822 }
3859e39d 1823 e = &qp->s_ack_queue[qp->r_head_ack_queue];
97f9efbc
BS
1824 /* RETH comes after BTH */
1825 if (!header_in_data)
1826 reth = &ohdr->u.rc.reth;
1827 else {
1828 reth = (struct ib_reth *)data;
1829 data += sizeof(*reth);
1830 }
3859e39d
RC
1831 len = be32_to_cpu(reth->length);
1832 if (len) {
97f9efbc
BS
1833 u32 rkey = be32_to_cpu(reth->rkey);
1834 u64 vaddr = be64_to_cpu(reth->vaddr);
1835 int ok;
1836
1837 /* Check rkey & NAK */
3859e39d
RC
1838 ok = ipath_rkey_ok(qp, &e->rdma_sge, len, vaddr,
1839 rkey, IB_ACCESS_REMOTE_READ);
1840 if (unlikely(!ok))
97f9efbc 1841 goto nack_acc;
97f9efbc
BS
1842 /*
1843 * Update the next expected PSN. We add 1 later
1844 * below, so only add the remainder here.
1845 */
3859e39d
RC
1846 if (len > pmtu)
1847 qp->r_psn += (len - 1) / pmtu;
97f9efbc 1848 } else {
3859e39d
RC
1849 e->rdma_sge.sg_list = NULL;
1850 e->rdma_sge.num_sge = 0;
1851 e->rdma_sge.sge.mr = NULL;
1852 e->rdma_sge.sge.vaddr = NULL;
1853 e->rdma_sge.sge.length = 0;
1854 e->rdma_sge.sge.sge_length = 0;
97f9efbc 1855 }
3859e39d 1856 e->opcode = opcode;
d781b129 1857 e->sent = 0;
3859e39d 1858 e->psn = psn;
97f9efbc
BS
1859 /*
1860 * We need to increment the MSN here instead of when we
1861 * finish sending the result since a duplicate request would
1862 * increment it more than once.
1863 */
12eef41f 1864 qp->r_msn++;
97f9efbc
BS
1865 qp->r_psn++;
1866 qp->r_state = opcode;
12eef41f 1867 qp->r_nak_state = 0;
3859e39d
RC
1868 barrier();
1869 qp->r_head_ack_queue = next;
12eef41f
BS
1870
1871 /* Call ipath_do_rc_send() in another thread. */
1872 tasklet_hi_schedule(&qp->s_task);
1873
1874 goto done;
3859e39d 1875 }
97f9efbc
BS
1876
1877 case OP(COMPARE_SWAP):
1878 case OP(FETCH_ADD): {
1879 struct ib_atomic_eth *ateth;
3859e39d 1880 struct ipath_ack_entry *e;
97f9efbc 1881 u64 vaddr;
3859e39d 1882 atomic64_t *maddr;
97f9efbc
BS
1883 u64 sdata;
1884 u32 rkey;
3859e39d 1885 u8 next;
97f9efbc 1886
3859e39d
RC
1887 if (unlikely(!(qp->qp_access_flags &
1888 IB_ACCESS_REMOTE_ATOMIC)))
b506e1dc 1889 goto nack_inv;
3859e39d
RC
1890 next = qp->r_head_ack_queue + 1;
1891 if (next > IPATH_MAX_RDMA_ATOMIC)
1892 next = 0;
d781b129
RC
1893 if (unlikely(next == qp->s_tail_ack_queue)) {
1894 if (!qp->s_ack_queue[next].sent)
1895 goto nack_inv;
1896 ipath_update_ack_queue(qp, next);
1897 }
97f9efbc
BS
1898 if (!header_in_data)
1899 ateth = &ohdr->u.atomic_eth;
3859e39d 1900 else
97f9efbc 1901 ateth = (struct ib_atomic_eth *)data;
3859e39d
RC
1902 vaddr = ((u64) be32_to_cpu(ateth->vaddr[0]) << 32) |
1903 be32_to_cpu(ateth->vaddr[1]);
97f9efbc
BS
1904 if (unlikely(vaddr & (sizeof(u64) - 1)))
1905 goto nack_inv;
1906 rkey = be32_to_cpu(ateth->rkey);
1907 /* Check rkey & NAK */
6a553af2 1908 if (unlikely(!ipath_rkey_ok(qp, &qp->r_sge,
97f9efbc
BS
1909 sizeof(u64), vaddr, rkey,
1910 IB_ACCESS_REMOTE_ATOMIC)))
1911 goto nack_acc;
97f9efbc 1912 /* Perform atomic OP and save result. */
3859e39d 1913 maddr = (atomic64_t *) qp->r_sge.sge.vaddr;
97f9efbc 1914 sdata = be64_to_cpu(ateth->swap_data);
3859e39d
RC
1915 e = &qp->s_ack_queue[qp->r_head_ack_queue];
1916 e->atomic_data = (opcode == OP(FETCH_ADD)) ?
1917 (u64) atomic64_add_return(sdata, maddr) - sdata :
1918 (u64) cmpxchg((u64 *) qp->r_sge.sge.vaddr,
1919 be64_to_cpu(ateth->compare_data),
1920 sdata);
1921 e->opcode = opcode;
d781b129 1922 e->sent = 0;
3859e39d 1923 e->psn = psn & IPATH_PSN_MASK;
12eef41f 1924 qp->r_msn++;
3859e39d
RC
1925 qp->r_psn++;
1926 qp->r_state = opcode;
1927 qp->r_nak_state = 0;
1928 barrier();
1929 qp->r_head_ack_queue = next;
1930
1931 /* Call ipath_do_rc_send() in another thread. */
1932 tasklet_hi_schedule(&qp->s_task);
1933
1934 goto done;
97f9efbc
BS
1935 }
1936
1937 default:
3859e39d
RC
1938 /* NAK unknown opcodes. */
1939 goto nack_inv;
97f9efbc
BS
1940 }
1941 qp->r_psn++;
1942 qp->r_state = opcode;
3859e39d 1943 qp->r_ack_psn = psn;
12eef41f 1944 qp->r_nak_state = 0;
97f9efbc 1945 /* Send an ACK if requested or required. */
3859e39d 1946 if (psn & (1 << 31))
12eef41f 1947 goto send_ack;
12eef41f 1948 goto done;
97f9efbc 1949
12eef41f 1950nack_acc:
3859e39d
RC
1951 ipath_rc_error(qp, IB_WC_REM_ACCESS_ERR);
1952 qp->r_nak_state = IB_NAK_REMOTE_ACCESS_ERROR;
1953 qp->r_ack_psn = qp->r_psn;
1954
12eef41f 1955send_ack:
3859e39d 1956 send_rc_ack(qp);
97f9efbc 1957
12eef41f 1958done:
97f9efbc
BS
1959 return;
1960}