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RDMA: Globally allocate and release QP memory
[mirror_ubuntu-jammy-kernel.git] / drivers / infiniband / hw / irdma / verbs.c
CommitLineData
b48c24c2
MI		 1// SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB
2/* Copyright (c) 2015 - 2021 Intel Corporation */
3#include "main.h"
4
5/**
6 * irdma_query_device - get device attributes
7 * @ibdev: device pointer from stack
8 * @props: returning device attributes
9 * @udata: user data
10 */
11static int irdma_query_device(struct ib_device *ibdev,
12 struct ib_device_attr *props,
13 struct ib_udata *udata)
14{
15 struct irdma_device *iwdev = to_iwdev(ibdev);
16 struct irdma_pci_f *rf = iwdev->rf;
17 struct pci_dev *pcidev = iwdev->rf->pcidev;
18 struct irdma_hw_attrs *hw_attrs = &rf->sc_dev.hw_attrs;
19
20 if (udata->inlen || udata->outlen)
21 return -EINVAL;
22
23 memset(props, 0, sizeof(*props));
24 ether_addr_copy((u8 *)&props->sys_image_guid, iwdev->netdev->dev_addr);
25 props->fw_ver = (u64)irdma_fw_major_ver(&rf->sc_dev) << 32 |
26 irdma_fw_minor_ver(&rf->sc_dev);
27 props->device_cap_flags = iwdev->device_cap_flags;
28 props->vendor_id = pcidev->vendor;
29 props->vendor_part_id = pcidev->device;
30
31 props->hw_ver = rf->pcidev->revision;
32 props->page_size_cap = SZ_4K | SZ_2M | SZ_1G;
33 props->max_mr_size = hw_attrs->max_mr_size;
34 props->max_qp = rf->max_qp - rf->used_qps;
35 props->max_qp_wr = hw_attrs->max_qp_wr;
36 props->max_send_sge = hw_attrs->uk_attrs.max_hw_wq_frags;
37 props->max_recv_sge = hw_attrs->uk_attrs.max_hw_wq_frags;
38 props->max_cq = rf->max_cq - rf->used_cqs;
39 props->max_cqe = rf->max_cqe;
40 props->max_mr = rf->max_mr - rf->used_mrs;
41 props->max_mw = props->max_mr;
42 props->max_pd = rf->max_pd - rf->used_pds;
43 props->max_sge_rd = hw_attrs->uk_attrs.max_hw_read_sges;
44 props->max_qp_rd_atom = hw_attrs->max_hw_ird;
45 props->max_qp_init_rd_atom = hw_attrs->max_hw_ord;
46 if (rdma_protocol_roce(ibdev, 1))
47 props->max_pkeys = IRDMA_PKEY_TBL_SZ;
48 props->max_ah = rf->max_ah;
49 props->max_mcast_grp = rf->max_mcg;
50 props->max_mcast_qp_attach = IRDMA_MAX_MGS_PER_CTX;
51 props->max_total_mcast_qp_attach = rf->max_qp * IRDMA_MAX_MGS_PER_CTX;
52 props->max_fast_reg_page_list_len = IRDMA_MAX_PAGES_PER_FMR;
53#define HCA_CLOCK_TIMESTAMP_MASK 0x1ffff
54 if (hw_attrs->uk_attrs.hw_rev >= IRDMA_GEN_2)
55 props->timestamp_mask = HCA_CLOCK_TIMESTAMP_MASK;
56
57 return 0;
58}
59
60/**
61 * irdma_get_eth_speed_and_width - Get IB port speed and width from netdev speed
62 * @link_speed: netdev phy link speed
63 * @active_speed: IB port speed
64 * @active_width: IB port width
65 */
66static void irdma_get_eth_speed_and_width(u32 link_speed, u16 *active_speed,
67 u8 *active_width)
68{
69 if (link_speed <= SPEED_1000) {
70 *active_width = IB_WIDTH_1X;
71 *active_speed = IB_SPEED_SDR;
72 } else if (link_speed <= SPEED_10000) {
73 *active_width = IB_WIDTH_1X;
74 *active_speed = IB_SPEED_FDR10;
75 } else if (link_speed <= SPEED_20000) {
76 *active_width = IB_WIDTH_4X;
77 *active_speed = IB_SPEED_DDR;
78 } else if (link_speed <= SPEED_25000) {
79 *active_width = IB_WIDTH_1X;
80 *active_speed = IB_SPEED_EDR;
81 } else if (link_speed <= SPEED_40000) {
82 *active_width = IB_WIDTH_4X;
83 *active_speed = IB_SPEED_FDR10;
84 } else {
85 *active_width = IB_WIDTH_4X;
86 *active_speed = IB_SPEED_EDR;
87 }
88}
89
90/**
91 * irdma_query_port - get port attributes
92 * @ibdev: device pointer from stack
93 * @port: port number for query
94 * @props: returning device attributes
95 */
96static int irdma_query_port(struct ib_device *ibdev, u32 port,
97 struct ib_port_attr *props)
98{
99 struct irdma_device *iwdev = to_iwdev(ibdev);
100 struct net_device *netdev = iwdev->netdev;
101
102 /* no need to zero out pros here. done by caller */
103
104 props->max_mtu = IB_MTU_4096;
105 props->active_mtu = ib_mtu_int_to_enum(netdev->mtu);
106 props->lid = 1;
107 props->lmc = 0;
108 props->sm_lid = 0;
109 props->sm_sl = 0;
110 if (netif_carrier_ok(netdev) && netif_running(netdev)) {
111 props->state = IB_PORT_ACTIVE;
112 props->phys_state = IB_PORT_PHYS_STATE_LINK_UP;
113 } else {
114 props->state = IB_PORT_DOWN;
115 props->phys_state = IB_PORT_PHYS_STATE_DISABLED;
116 }
117 irdma_get_eth_speed_and_width(SPEED_100000, &props->active_speed,
118 &props->active_width);
119
120 if (rdma_protocol_roce(ibdev, 1)) {
121 props->gid_tbl_len = 32;
122 props->ip_gids = true;
123 props->pkey_tbl_len = IRDMA_PKEY_TBL_SZ;
124 } else {
125 props->gid_tbl_len = 1;
126 }
127 props->qkey_viol_cntr = 0;
128 props->port_cap_flags |= IB_PORT_CM_SUP | IB_PORT_REINIT_SUP;
129 props->max_msg_sz = iwdev->rf->sc_dev.hw_attrs.max_hw_outbound_msg_size;
130
131 return 0;
132}
133
134/**
135 * irdma_disassociate_ucontext - Disassociate user context
136 * @context: ib user context
137 */
138static void irdma_disassociate_ucontext(struct ib_ucontext *context)
139{
140}
141
142static int irdma_mmap_legacy(struct irdma_ucontext *ucontext,
143 struct vm_area_struct *vma)
144{
145 u64 pfn;
146
147 if (vma->vm_pgoff || vma->vm_end - vma->vm_start != PAGE_SIZE)
148 return -EINVAL;
149
150 vma->vm_private_data = ucontext;
151 pfn = ((uintptr_t)ucontext->iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET] +
152 pci_resource_start(ucontext->iwdev->rf->pcidev, 0)) >> PAGE_SHIFT;
153
154 return rdma_user_mmap_io(&ucontext->ibucontext, vma, pfn, PAGE_SIZE,
155 pgprot_noncached(vma->vm_page_prot), NULL);
156}
157
158static void irdma_mmap_free(struct rdma_user_mmap_entry *rdma_entry)
159{
160 struct irdma_user_mmap_entry *entry = to_irdma_mmap_entry(rdma_entry);
161
162 kfree(entry);
163}
164
165static struct rdma_user_mmap_entry*
166irdma_user_mmap_entry_insert(struct irdma_ucontext *ucontext, u64 bar_offset,
167 enum irdma_mmap_flag mmap_flag, u64 *mmap_offset)
168{
169 struct irdma_user_mmap_entry *entry = kzalloc(sizeof(*entry), GFP_KERNEL);
170 int ret;
171
172 if (!entry)
173 return NULL;
174
175 entry->bar_offset = bar_offset;
176 entry->mmap_flag = mmap_flag;
177
178 ret = rdma_user_mmap_entry_insert(&ucontext->ibucontext,
179 &entry->rdma_entry, PAGE_SIZE);
180 if (ret) {
181 kfree(entry);
182 return NULL;
183 }
184 *mmap_offset = rdma_user_mmap_get_offset(&entry->rdma_entry);
185
186 return &entry->rdma_entry;
187}
188
189/**
190 * irdma_mmap - user memory map
191 * @context: context created during alloc
192 * @vma: kernel info for user memory map
193 */
194static int irdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
195{
196 struct rdma_user_mmap_entry *rdma_entry;
197 struct irdma_user_mmap_entry *entry;
198 struct irdma_ucontext *ucontext;
199 u64 pfn;
200 int ret;
201
202 ucontext = to_ucontext(context);
203
204 /* Legacy support for libi40iw with hard-coded mmap key */
205 if (ucontext->legacy_mode)
206 return irdma_mmap_legacy(ucontext, vma);
207
208 rdma_entry = rdma_user_mmap_entry_get(&ucontext->ibucontext, vma);
209 if (!rdma_entry) {
210 ibdev_dbg(&ucontext->iwdev->ibdev,
211 "VERBS: pgoff[0x%lx] does not have valid entry\n",
212 vma->vm_pgoff);
213 return -EINVAL;
214 }
215
216 entry = to_irdma_mmap_entry(rdma_entry);
217 ibdev_dbg(&ucontext->iwdev->ibdev,
218 "VERBS: bar_offset [0x%llx] mmap_flag [%d]\n",
219 entry->bar_offset, entry->mmap_flag);
220
221 pfn = (entry->bar_offset +
222 pci_resource_start(ucontext->iwdev->rf->pcidev, 0)) >> PAGE_SHIFT;
223
224 switch (entry->mmap_flag) {
225 case IRDMA_MMAP_IO_NC:
226 ret = rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE,
227 pgprot_noncached(vma->vm_page_prot),
228 rdma_entry);
229 break;
230 case IRDMA_MMAP_IO_WC:
231 ret = rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE,
232 pgprot_writecombine(vma->vm_page_prot),
233 rdma_entry);
234 break;
235 default:
236 ret = -EINVAL;
237 }
238
239 if (ret)
240 ibdev_dbg(&ucontext->iwdev->ibdev,
241 "VERBS: bar_offset [0x%llx] mmap_flag[%d] err[%d]\n",
242 entry->bar_offset, entry->mmap_flag, ret);
243 rdma_user_mmap_entry_put(rdma_entry);
244
245 return ret;
246}
247
248/**
249 * irdma_alloc_push_page - allocate a push page for qp
250 * @iwqp: qp pointer
251 */
252static void irdma_alloc_push_page(struct irdma_qp *iwqp)
253{
254 struct irdma_cqp_request *cqp_request;
255 struct cqp_cmds_info *cqp_info;
256 struct irdma_device *iwdev = iwqp->iwdev;
257 struct irdma_sc_qp *qp = &iwqp->sc_qp;
258 enum irdma_status_code status;
259
260 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
261 if (!cqp_request)
262 return;
263
264 cqp_info = &cqp_request->info;
265 cqp_info->cqp_cmd = IRDMA_OP_MANAGE_PUSH_PAGE;
266 cqp_info->post_sq = 1;
267 cqp_info->in.u.manage_push_page.info.push_idx = 0;
268 cqp_info->in.u.manage_push_page.info.qs_handle =
269 qp->vsi->qos[qp->user_pri].qs_handle;
270 cqp_info->in.u.manage_push_page.info.free_page = 0;
271 cqp_info->in.u.manage_push_page.info.push_page_type = 0;
272 cqp_info->in.u.manage_push_page.cqp = &iwdev->rf->cqp.sc_cqp;
273 cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
274
275 status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
276 if (!status && cqp_request->compl_info.op_ret_val <
277 iwdev->rf->sc_dev.hw_attrs.max_hw_device_pages) {
278 qp->push_idx = cqp_request->compl_info.op_ret_val;
279 qp->push_offset = 0;
280 }
281
282 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
283}
284
285/**
286 * irdma_alloc_ucontext - Allocate the user context data structure
287 * @uctx: uverbs context pointer
288 * @udata: user data
289 *
290 * This keeps track of all objects associated with a particular
291 * user-mode client.
292 */
293static int irdma_alloc_ucontext(struct ib_ucontext *uctx,
294 struct ib_udata *udata)
295{
296 struct ib_device *ibdev = uctx->device;
297 struct irdma_device *iwdev = to_iwdev(ibdev);
298 struct irdma_alloc_ucontext_req req;
299 struct irdma_alloc_ucontext_resp uresp = {};
300 struct irdma_ucontext *ucontext = to_ucontext(uctx);
301 struct irdma_uk_attrs *uk_attrs;
302
303 if (ib_copy_from_udata(&req, udata, min(sizeof(req), udata->inlen)))
304 return -EINVAL;
305
306 if (req.userspace_ver < 4 || req.userspace_ver > IRDMA_ABI_VER)
307 goto ver_error;
308
309 ucontext->iwdev = iwdev;
310 ucontext->abi_ver = req.userspace_ver;
311
312 uk_attrs = &iwdev->rf->sc_dev.hw_attrs.uk_attrs;
313 /* GEN_1 legacy support with libi40iw */
314 if (udata->outlen < sizeof(uresp)) {
315 if (uk_attrs->hw_rev != IRDMA_GEN_1)
316 return -EOPNOTSUPP;
317
318 ucontext->legacy_mode = true;
319 uresp.max_qps = iwdev->rf->max_qp;
320 uresp.max_pds = iwdev->rf->sc_dev.hw_attrs.max_hw_pds;
321 uresp.wq_size = iwdev->rf->sc_dev.hw_attrs.max_qp_wr * 2;
322 uresp.kernel_ver = req.userspace_ver;
323 if (ib_copy_to_udata(udata, &uresp,
324 min(sizeof(uresp), udata->outlen)))
325 return -EFAULT;
326 } else {
327 u64 bar_off = (uintptr_t)iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET];
328
329 ucontext->db_mmap_entry =
330 irdma_user_mmap_entry_insert(ucontext, bar_off,
331 IRDMA_MMAP_IO_NC,
332 &uresp.db_mmap_key);
333 if (!ucontext->db_mmap_entry)
334 return -ENOMEM;
335
336 uresp.kernel_ver = IRDMA_ABI_VER;
337 uresp.feature_flags = uk_attrs->feature_flags;
338 uresp.max_hw_wq_frags = uk_attrs->max_hw_wq_frags;
339 uresp.max_hw_read_sges = uk_attrs->max_hw_read_sges;
340 uresp.max_hw_inline = uk_attrs->max_hw_inline;
341 uresp.max_hw_rq_quanta = uk_attrs->max_hw_rq_quanta;
342 uresp.max_hw_wq_quanta = uk_attrs->max_hw_wq_quanta;
343 uresp.max_hw_sq_chunk = uk_attrs->max_hw_sq_chunk;
344 uresp.max_hw_cq_size = uk_attrs->max_hw_cq_size;
345 uresp.min_hw_cq_size = uk_attrs->min_hw_cq_size;
346 uresp.hw_rev = uk_attrs->hw_rev;
347 if (ib_copy_to_udata(udata, &uresp,
348 min(sizeof(uresp), udata->outlen))) {
349 rdma_user_mmap_entry_remove(ucontext->db_mmap_entry);
350 return -EFAULT;
351 }
352 }
353
354 INIT_LIST_HEAD(&ucontext->cq_reg_mem_list);
355 spin_lock_init(&ucontext->cq_reg_mem_list_lock);
356 INIT_LIST_HEAD(&ucontext->qp_reg_mem_list);
357 spin_lock_init(&ucontext->qp_reg_mem_list_lock);
358
359 return 0;
360
361ver_error:
362 ibdev_err(&iwdev->ibdev,
363 "Invalid userspace driver version detected. Detected version %d, should be %d\n",
364 req.userspace_ver, IRDMA_ABI_VER);
365 return -EINVAL;
366}
367
368/**
369 * irdma_dealloc_ucontext - deallocate the user context data structure
370 * @context: user context created during alloc
371 */
372static void irdma_dealloc_ucontext(struct ib_ucontext *context)
373{
374 struct irdma_ucontext *ucontext = to_ucontext(context);
375
376 rdma_user_mmap_entry_remove(ucontext->db_mmap_entry);
377}
378
379/**
380 * irdma_alloc_pd - allocate protection domain
381 * @pd: PD pointer
382 * @udata: user data
383 */
384static int irdma_alloc_pd(struct ib_pd *pd, struct ib_udata *udata)
385{
386 struct irdma_pd *iwpd = to_iwpd(pd);
387 struct irdma_device *iwdev = to_iwdev(pd->device);
388 struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
389 struct irdma_pci_f *rf = iwdev->rf;
390 struct irdma_alloc_pd_resp uresp = {};
391 struct irdma_sc_pd *sc_pd;
392 u32 pd_id = 0;
393 int err;
394
395 err = irdma_alloc_rsrc(rf, rf->allocated_pds, rf->max_pd, &pd_id,
396 &rf->next_pd);
397 if (err)
398 return err;
399
400 sc_pd = &iwpd->sc_pd;
401 if (udata) {
402 struct irdma_ucontext *ucontext =
403 rdma_udata_to_drv_context(udata, struct irdma_ucontext,
404 ibucontext);
405 irdma_sc_pd_init(dev, sc_pd, pd_id, ucontext->abi_ver);
406 uresp.pd_id = pd_id;
407 if (ib_copy_to_udata(udata, &uresp,
408 min(sizeof(uresp), udata->outlen))) {
409 err = -EFAULT;
410 goto error;
411 }
412 } else {
413 irdma_sc_pd_init(dev, sc_pd, pd_id, IRDMA_ABI_VER);
414 }
415
416 return 0;
417error:
418 irdma_free_rsrc(rf, rf->allocated_pds, pd_id);
419
420 return err;
421}
422
423/**
424 * irdma_dealloc_pd - deallocate pd
425 * @ibpd: ptr of pd to be deallocated
426 * @udata: user data
427 */
428static int irdma_dealloc_pd(struct ib_pd *ibpd, struct ib_udata *udata)
429{
430 struct irdma_pd *iwpd = to_iwpd(ibpd);
431 struct irdma_device *iwdev = to_iwdev(ibpd->device);
432
433 irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_pds, iwpd->sc_pd.pd_id);
434
435 return 0;
436}
437
438/**
439 * irdma_get_pbl - Retrieve pbl from a list given a virtual
440 * address
441 * @va: user virtual address
442 * @pbl_list: pbl list to search in (QP's or CQ's)
443 */
444static struct irdma_pbl *irdma_get_pbl(unsigned long va,
445 struct list_head *pbl_list)
446{
447 struct irdma_pbl *iwpbl;
448
449 list_for_each_entry (iwpbl, pbl_list, list) {
450 if (iwpbl->user_base == va) {
451 list_del(&iwpbl->list);
452 iwpbl->on_list = false;
453 return iwpbl;
454 }
455 }
456
457 return NULL;
458}
459
460/**
461 * irdma_clean_cqes - clean cq entries for qp
462 * @iwqp: qp ptr (user or kernel)
463 * @iwcq: cq ptr
464 */
465static void irdma_clean_cqes(struct irdma_qp *iwqp, struct irdma_cq *iwcq)
466{
467 struct irdma_cq_uk *ukcq = &iwcq->sc_cq.cq_uk;
468 unsigned long flags;
469
470 spin_lock_irqsave(&iwcq->lock, flags);
471 irdma_uk_clean_cq(&iwqp->sc_qp.qp_uk, ukcq);
472 spin_unlock_irqrestore(&iwcq->lock, flags);
473}
474
475static void irdma_remove_push_mmap_entries(struct irdma_qp *iwqp)
476{
477 if (iwqp->push_db_mmap_entry) {
478 rdma_user_mmap_entry_remove(iwqp->push_db_mmap_entry);
479 iwqp->push_db_mmap_entry = NULL;
480 }
481 if (iwqp->push_wqe_mmap_entry) {
482 rdma_user_mmap_entry_remove(iwqp->push_wqe_mmap_entry);
483 iwqp->push_wqe_mmap_entry = NULL;
484 }
485}
486
487static int irdma_setup_push_mmap_entries(struct irdma_ucontext *ucontext,
488 struct irdma_qp *iwqp,
489 u64 *push_wqe_mmap_key,
490 u64 *push_db_mmap_key)
491{
492 struct irdma_device *iwdev = ucontext->iwdev;
493 u64 rsvd, bar_off;
494
495 rsvd = IRDMA_PF_BAR_RSVD;
496 bar_off = (uintptr_t)iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET];
497 /* skip over db page */
498 bar_off += IRDMA_HW_PAGE_SIZE;
499 /* push wqe page */
500 bar_off += rsvd + iwqp->sc_qp.push_idx * IRDMA_HW_PAGE_SIZE;
501 iwqp->push_wqe_mmap_entry = irdma_user_mmap_entry_insert(ucontext,
502 bar_off, IRDMA_MMAP_IO_WC,
503 push_wqe_mmap_key);
504 if (!iwqp->push_wqe_mmap_entry)
505 return -ENOMEM;
506
507 /* push doorbell page */
508 bar_off += IRDMA_HW_PAGE_SIZE;
509 iwqp->push_db_mmap_entry = irdma_user_mmap_entry_insert(ucontext,
510 bar_off, IRDMA_MMAP_IO_NC,
511 push_db_mmap_key);
512 if (!iwqp->push_db_mmap_entry) {
513 rdma_user_mmap_entry_remove(iwqp->push_wqe_mmap_entry);
514 return -ENOMEM;
515 }
516
517 return 0;
518}
519
520/**
521 * irdma_destroy_qp - destroy qp
522 * @ibqp: qp's ib pointer also to get to device's qp address
523 * @udata: user data
524 */
525static int irdma_destroy_qp(struct ib_qp *ibqp, struct ib_udata *udata)
526{
527 struct irdma_qp *iwqp = to_iwqp(ibqp);
528 struct irdma_device *iwdev = iwqp->iwdev;
529
530 iwqp->sc_qp.qp_uk.destroy_pending = true;
531
532 if (iwqp->iwarp_state == IRDMA_QP_STATE_RTS)
533 irdma_modify_qp_to_err(&iwqp->sc_qp);
534
535 irdma_qp_rem_ref(&iwqp->ibqp);
536 wait_for_completion(&iwqp->free_qp);
537 irdma_free_lsmm_rsrc(iwqp);
538 if (!iwdev->reset)
539 irdma_cqp_qp_destroy_cmd(&iwdev->rf->sc_dev, &iwqp->sc_qp);
540
541 if (!iwqp->user_mode) {
542 if (iwqp->iwscq) {
543 irdma_clean_cqes(iwqp, iwqp->iwscq);
544 if (iwqp->iwrcq != iwqp->iwscq)
545 irdma_clean_cqes(iwqp, iwqp->iwrcq);
546 }
547 }
548 irdma_remove_push_mmap_entries(iwqp);
549 irdma_free_qp_rsrc(iwqp);
550
551 return 0;
552}
553
554/**
555 * irdma_setup_virt_qp - setup for allocation of virtual qp
556 * @iwdev: irdma device
557 * @iwqp: qp ptr
558 * @init_info: initialize info to return
559 */
560static int irdma_setup_virt_qp(struct irdma_device *iwdev,
561 struct irdma_qp *iwqp,
562 struct irdma_qp_init_info *init_info)
563{
564 struct irdma_pbl *iwpbl = iwqp->iwpbl;
565 struct irdma_qp_mr *qpmr = &iwpbl->qp_mr;
566
567 iwqp->page = qpmr->sq_page;
568 init_info->shadow_area_pa = qpmr->shadow;
569 if (iwpbl->pbl_allocated) {
570 init_info->virtual_map = true;
571 init_info->sq_pa = qpmr->sq_pbl.idx;
572 init_info->rq_pa = qpmr->rq_pbl.idx;
573 } else {
574 init_info->sq_pa = qpmr->sq_pbl.addr;
575 init_info->rq_pa = qpmr->rq_pbl.addr;
576 }
577
578 return 0;
579}
580
581/**
582 * irdma_setup_kmode_qp - setup initialization for kernel mode qp
583 * @iwdev: iwarp device
584 * @iwqp: qp ptr (user or kernel)
585 * @info: initialize info to return
586 * @init_attr: Initial QP create attributes
587 */
588static int irdma_setup_kmode_qp(struct irdma_device *iwdev,
589 struct irdma_qp *iwqp,
590 struct irdma_qp_init_info *info,
591 struct ib_qp_init_attr *init_attr)
592{
593 struct irdma_dma_mem *mem = &iwqp->kqp.dma_mem;
594 u32 sqdepth, rqdepth;
595 u8 sqshift, rqshift;
596 u32 size;
597 enum irdma_status_code status;
598 struct irdma_qp_uk_init_info *ukinfo = &info->qp_uk_init_info;
599 struct irdma_uk_attrs *uk_attrs = &iwdev->rf->sc_dev.hw_attrs.uk_attrs;
600
601 irdma_get_wqe_shift(uk_attrs,
602 uk_attrs->hw_rev >= IRDMA_GEN_2 ? ukinfo->max_sq_frag_cnt + 1 :
603 ukinfo->max_sq_frag_cnt,
604 ukinfo->max_inline_data, &sqshift);
605 status = irdma_get_sqdepth(uk_attrs, ukinfo->sq_size, sqshift,
606 &sqdepth);
607 if (status)
608 return -ENOMEM;
609
610 if (uk_attrs->hw_rev == IRDMA_GEN_1)
611 rqshift = IRDMA_MAX_RQ_WQE_SHIFT_GEN1;
612 else
613 irdma_get_wqe_shift(uk_attrs, ukinfo->max_rq_frag_cnt, 0,
614 &rqshift);
615
616 status = irdma_get_rqdepth(uk_attrs, ukinfo->rq_size, rqshift,
617 &rqdepth);
618 if (status)
619 return -ENOMEM;
620
621 iwqp->kqp.sq_wrid_mem =
622 kcalloc(sqdepth, sizeof(*iwqp->kqp.sq_wrid_mem), GFP_KERNEL);
623 if (!iwqp->kqp.sq_wrid_mem)
624 return -ENOMEM;
625
626 iwqp->kqp.rq_wrid_mem =
627 kcalloc(rqdepth, sizeof(*iwqp->kqp.rq_wrid_mem), GFP_KERNEL);
628 if (!iwqp->kqp.rq_wrid_mem) {
629 kfree(iwqp->kqp.sq_wrid_mem);
630 iwqp->kqp.sq_wrid_mem = NULL;
631 return -ENOMEM;
632 }
633
634 ukinfo->sq_wrtrk_array = iwqp->kqp.sq_wrid_mem;
635 ukinfo->rq_wrid_array = iwqp->kqp.rq_wrid_mem;
636
637 size = (sqdepth + rqdepth) * IRDMA_QP_WQE_MIN_SIZE;
638 size += (IRDMA_SHADOW_AREA_SIZE << 3);
639
640 mem->size = ALIGN(size, 256);
641 mem->va = dma_alloc_coherent(iwdev->rf->hw.device, mem->size,
642 &mem->pa, GFP_KERNEL);
643 if (!mem->va) {
644 kfree(iwqp->kqp.sq_wrid_mem);
645 iwqp->kqp.sq_wrid_mem = NULL;
646 kfree(iwqp->kqp.rq_wrid_mem);
647 iwqp->kqp.rq_wrid_mem = NULL;
648 return -ENOMEM;
649 }
650
651 ukinfo->sq = mem->va;
652 info->sq_pa = mem->pa;
653 ukinfo->rq = &ukinfo->sq[sqdepth];
654 info->rq_pa = info->sq_pa + (sqdepth * IRDMA_QP_WQE_MIN_SIZE);
655 ukinfo->shadow_area = ukinfo->rq[rqdepth].elem;
656 info->shadow_area_pa = info->rq_pa + (rqdepth * IRDMA_QP_WQE_MIN_SIZE);
657 ukinfo->sq_size = sqdepth >> sqshift;
658 ukinfo->rq_size = rqdepth >> rqshift;
659 ukinfo->qp_id = iwqp->ibqp.qp_num;
660
661 init_attr->cap.max_send_wr = (sqdepth - IRDMA_SQ_RSVD) >> sqshift;
662 init_attr->cap.max_recv_wr = (rqdepth - IRDMA_RQ_RSVD) >> rqshift;
663
664 return 0;
665}
666
667static int irdma_cqp_create_qp_cmd(struct irdma_qp *iwqp)
668{
669 struct irdma_pci_f *rf = iwqp->iwdev->rf;
670 struct irdma_cqp_request *cqp_request;
671 struct cqp_cmds_info *cqp_info;
672 struct irdma_create_qp_info *qp_info;
673 enum irdma_status_code status;
674
675 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
676 if (!cqp_request)
677 return -ENOMEM;
678
679 cqp_info = &cqp_request->info;
680 qp_info = &cqp_request->info.in.u.qp_create.info;
681 memset(qp_info, 0, sizeof(*qp_info));
682 qp_info->mac_valid = true;
683 qp_info->cq_num_valid = true;
684 qp_info->next_iwarp_state = IRDMA_QP_STATE_IDLE;
685
686 cqp_info->cqp_cmd = IRDMA_OP_QP_CREATE;
687 cqp_info->post_sq = 1;
688 cqp_info->in.u.qp_create.qp = &iwqp->sc_qp;
689 cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request;
690 status = irdma_handle_cqp_op(rf, cqp_request);
691 irdma_put_cqp_request(&rf->cqp, cqp_request);
692
693 return status ? -ENOMEM : 0;
694}
695
696static void irdma_roce_fill_and_set_qpctx_info(struct irdma_qp *iwqp,
697 struct irdma_qp_host_ctx_info *ctx_info)
698{
699 struct irdma_device *iwdev = iwqp->iwdev;
700 struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
701 struct irdma_roce_offload_info *roce_info;
702 struct irdma_udp_offload_info *udp_info;
703
704 udp_info = &iwqp->udp_info;
705 udp_info->snd_mss = ib_mtu_enum_to_int(ib_mtu_int_to_enum(iwdev->vsi.mtu));
706 udp_info->cwnd = iwdev->roce_cwnd;
707 udp_info->rexmit_thresh = 2;
708 udp_info->rnr_nak_thresh = 2;
709 udp_info->src_port = 0xc000;
710 udp_info->dst_port = ROCE_V2_UDP_DPORT;
711 roce_info = &iwqp->roce_info;
712 ether_addr_copy(roce_info->mac_addr, iwdev->netdev->dev_addr);
713
714 roce_info->rd_en = true;
715 roce_info->wr_rdresp_en = true;
716 roce_info->bind_en = true;
717 roce_info->dcqcn_en = false;
718 roce_info->rtomin = 5;
719
720 roce_info->ack_credits = iwdev->roce_ackcreds;
721 roce_info->ird_size = dev->hw_attrs.max_hw_ird;
722 roce_info->ord_size = dev->hw_attrs.max_hw_ord;
723
724 if (!iwqp->user_mode) {
725 roce_info->priv_mode_en = true;
726 roce_info->fast_reg_en = true;
727 roce_info->udprivcq_en = true;
728 }
729 roce_info->roce_tver = 0;
730
731 ctx_info->roce_info = &iwqp->roce_info;
732 ctx_info->udp_info = &iwqp->udp_info;
733 irdma_sc_qp_setctx_roce(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
734}
735
736static void irdma_iw_fill_and_set_qpctx_info(struct irdma_qp *iwqp,
737 struct irdma_qp_host_ctx_info *ctx_info)
738{
739 struct irdma_device *iwdev = iwqp->iwdev;
740 struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
741 struct irdma_iwarp_offload_info *iwarp_info;
742
743 iwarp_info = &iwqp->iwarp_info;
744 ether_addr_copy(iwarp_info->mac_addr, iwdev->netdev->dev_addr);
745 iwarp_info->rd_en = true;
746 iwarp_info->wr_rdresp_en = true;
747 iwarp_info->bind_en = true;
748 iwarp_info->ecn_en = true;
749 iwarp_info->rtomin = 5;
750
751 if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
752 iwarp_info->ib_rd_en = true;
753 if (!iwqp->user_mode) {
754 iwarp_info->priv_mode_en = true;
755 iwarp_info->fast_reg_en = true;
756 }
757 iwarp_info->ddp_ver = 1;
758 iwarp_info->rdmap_ver = 1;
759
760 ctx_info->iwarp_info = &iwqp->iwarp_info;
761 ctx_info->iwarp_info_valid = true;
762 irdma_sc_qp_setctx(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
763 ctx_info->iwarp_info_valid = false;
764}
765
766static int irdma_validate_qp_attrs(struct ib_qp_init_attr *init_attr,
767 struct irdma_device *iwdev)
768{
769 struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
770 struct irdma_uk_attrs *uk_attrs = &dev->hw_attrs.uk_attrs;
771
772 if (init_attr->create_flags)
773 return -EOPNOTSUPP;
774
775 if (init_attr->cap.max_inline_data > uk_attrs->max_hw_inline ||
776 init_attr->cap.max_send_sge > uk_attrs->max_hw_wq_frags ||
777 init_attr->cap.max_recv_sge > uk_attrs->max_hw_wq_frags)
778 return -EINVAL;
779
780 if (rdma_protocol_roce(&iwdev->ibdev, 1)) {
781 if (init_attr->qp_type != IB_QPT_RC &&
782 init_attr->qp_type != IB_QPT_UD &&
783 init_attr->qp_type != IB_QPT_GSI)
784 return -EOPNOTSUPP;
785 } else {
786 if (init_attr->qp_type != IB_QPT_RC)
787 return -EOPNOTSUPP;
788 }
789
790 return 0;
791}
792
793/**
794 * irdma_create_qp - create qp
514aee66 795 * @ibqp: ptr of qp
b48c24c2
MI		 796 * @init_attr: attributes for qp
797 * @udata: user data for create qp
798 */
514aee66
LR		 799static int irdma_create_qp(struct ib_qp *ibqp,
800 struct ib_qp_init_attr *init_attr,
801 struct ib_udata *udata)
b48c24c2 802{
514aee66 803 struct ib_pd *ibpd = ibqp->pd;
b48c24c2
MI		 804 struct irdma_pd *iwpd = to_iwpd(ibpd);
805 struct irdma_device *iwdev = to_iwdev(ibpd->device);
806 struct irdma_pci_f *rf = iwdev->rf;
514aee66 807 struct irdma_qp *iwqp = to_iwqp(ibqp);
b48c24c2
MI		 808 struct irdma_create_qp_req req;
809 struct irdma_create_qp_resp uresp = {};
810 u32 qp_num = 0;
811 enum irdma_status_code ret;
812 int err_code;
813 int sq_size;
814 int rq_size;
815 struct irdma_sc_qp *qp;
816 struct irdma_sc_dev *dev = &rf->sc_dev;
817 struct irdma_uk_attrs *uk_attrs = &dev->hw_attrs.uk_attrs;
818 struct irdma_qp_init_info init_info = {};
819 struct irdma_qp_host_ctx_info *ctx_info;
820 unsigned long flags;
821
822 err_code = irdma_validate_qp_attrs(init_attr, iwdev);
823 if (err_code)
514aee66 824 return err_code;
b48c24c2
MI		 825
826 sq_size = init_attr->cap.max_send_wr;
827 rq_size = init_attr->cap.max_recv_wr;
828
829 init_info.vsi = &iwdev->vsi;
830 init_info.qp_uk_init_info.uk_attrs = uk_attrs;
831 init_info.qp_uk_init_info.sq_size = sq_size;
832 init_info.qp_uk_init_info.rq_size = rq_size;
833 init_info.qp_uk_init_info.max_sq_frag_cnt = init_attr->cap.max_send_sge;
834 init_info.qp_uk_init_info.max_rq_frag_cnt = init_attr->cap.max_recv_sge;
835 init_info.qp_uk_init_info.max_inline_data = init_attr->cap.max_inline_data;
836
b48c24c2
MI		 837 qp = &iwqp->sc_qp;
838 qp->qp_uk.back_qp = iwqp;
839 qp->qp_uk.lock = &iwqp->lock;
840 qp->push_idx = IRDMA_INVALID_PUSH_PAGE_INDEX;
841
842 iwqp->iwdev = iwdev;
843 iwqp->q2_ctx_mem.size = ALIGN(IRDMA_Q2_BUF_SIZE + IRDMA_QP_CTX_SIZE,
844 256);
845 iwqp->q2_ctx_mem.va = dma_alloc_coherent(dev->hw->device,
846 iwqp->q2_ctx_mem.size,
847 &iwqp->q2_ctx_mem.pa,
848 GFP_KERNEL);
514aee66
LR		 849 if (!iwqp->q2_ctx_mem.va)
850 return -ENOMEM;
b48c24c2
MI		 851
852 init_info.q2 = iwqp->q2_ctx_mem.va;
853 init_info.q2_pa = iwqp->q2_ctx_mem.pa;
854 init_info.host_ctx = (__le64 *)(init_info.q2 + IRDMA_Q2_BUF_SIZE);
855 init_info.host_ctx_pa = init_info.q2_pa + IRDMA_Q2_BUF_SIZE;
856
857 if (init_attr->qp_type == IB_QPT_GSI)
858 qp_num = 1;
859 else
860 err_code = irdma_alloc_rsrc(rf, rf->allocated_qps, rf->max_qp,
861 &qp_num, &rf->next_qp);
862 if (err_code)
863 goto error;
864
865 iwqp->iwpd = iwpd;
866 iwqp->ibqp.qp_num = qp_num;
867 qp = &iwqp->sc_qp;
868 iwqp->iwscq = to_iwcq(init_attr->send_cq);
869 iwqp->iwrcq = to_iwcq(init_attr->recv_cq);
870 iwqp->host_ctx.va = init_info.host_ctx;
871 iwqp->host_ctx.pa = init_info.host_ctx_pa;
872 iwqp->host_ctx.size = IRDMA_QP_CTX_SIZE;
873
874 init_info.pd = &iwpd->sc_pd;
875 init_info.qp_uk_init_info.qp_id = iwqp->ibqp.qp_num;
876 if (!rdma_protocol_roce(&iwdev->ibdev, 1))
877 init_info.qp_uk_init_info.first_sq_wq = 1;
878 iwqp->ctx_info.qp_compl_ctx = (uintptr_t)qp;
879 init_waitqueue_head(&iwqp->waitq);
880 init_waitqueue_head(&iwqp->mod_qp_waitq);
881
882 if (udata) {
883 err_code = ib_copy_from_udata(&req, udata,
884 min(sizeof(req), udata->inlen));
885 if (err_code) {
886 ibdev_dbg(&iwdev->ibdev,
887 "VERBS: ib_copy_from_data fail\n");
888 goto error;
889 }
890
891 iwqp->ctx_info.qp_compl_ctx = req.user_compl_ctx;
892 iwqp->user_mode = 1;
893 if (req.user_wqe_bufs) {
894 struct irdma_ucontext *ucontext =
895 rdma_udata_to_drv_context(udata,
896 struct irdma_ucontext,
897 ibucontext);
898
899 init_info.qp_uk_init_info.legacy_mode = ucontext->legacy_mode;
900 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
901 iwqp->iwpbl = irdma_get_pbl((unsigned long)req.user_wqe_bufs,
902 &ucontext->qp_reg_mem_list);
903 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
904
905 if (!iwqp->iwpbl) {
906 err_code = -ENODATA;
907 ibdev_dbg(&iwdev->ibdev, "VERBS: no pbl info\n");
908 goto error;
909 }
910 }
911 init_info.qp_uk_init_info.abi_ver = iwpd->sc_pd.abi_ver;
912 err_code = irdma_setup_virt_qp(iwdev, iwqp, &init_info);
913 } else {
914 init_info.qp_uk_init_info.abi_ver = IRDMA_ABI_VER;
915 err_code = irdma_setup_kmode_qp(iwdev, iwqp, &init_info, init_attr);
916 }
917
918 if (err_code) {
919 ibdev_dbg(&iwdev->ibdev, "VERBS: setup qp failed\n");
920 goto error;
921 }
922
923 if (rdma_protocol_roce(&iwdev->ibdev, 1)) {
924 if (init_attr->qp_type == IB_QPT_RC) {
925 init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_ROCE_RC;
926 init_info.qp_uk_init_info.qp_caps = IRDMA_SEND_WITH_IMM |
927 IRDMA_WRITE_WITH_IMM |
928 IRDMA_ROCE;
929 } else {
930 init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_ROCE_UD;
931 init_info.qp_uk_init_info.qp_caps = IRDMA_SEND_WITH_IMM |
932 IRDMA_ROCE;
933 }
934 } else {
935 init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_IWARP;
936 init_info.qp_uk_init_info.qp_caps = IRDMA_WRITE_WITH_IMM;
937 }
938
939 if (dev->hw_attrs.uk_attrs.hw_rev > IRDMA_GEN_1)
940 init_info.qp_uk_init_info.qp_caps |= IRDMA_PUSH_MODE;
941
942 ret = irdma_sc_qp_init(qp, &init_info);
943 if (ret) {
944 err_code = -EPROTO;
945 ibdev_dbg(&iwdev->ibdev, "VERBS: qp_init fail\n");
946 goto error;
947 }
948
949 ctx_info = &iwqp->ctx_info;
950 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
951 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
952
953 if (rdma_protocol_roce(&iwdev->ibdev, 1))
954 irdma_roce_fill_and_set_qpctx_info(iwqp, ctx_info);
955 else
956 irdma_iw_fill_and_set_qpctx_info(iwqp, ctx_info);
957
958 err_code = irdma_cqp_create_qp_cmd(iwqp);
959 if (err_code)
960 goto error;
961
962 refcount_set(&iwqp->refcnt, 1);
963 spin_lock_init(&iwqp->lock);
964 spin_lock_init(&iwqp->sc_qp.pfpdu.lock);
965 iwqp->sig_all = (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) ? 1 : 0;
966 rf->qp_table[qp_num] = iwqp;
967 iwqp->max_send_wr = sq_size;
968 iwqp->max_recv_wr = rq_size;
969
970 if (rdma_protocol_roce(&iwdev->ibdev, 1)) {
971 if (dev->ws_add(&iwdev->vsi, 0)) {
972 irdma_cqp_qp_destroy_cmd(&rf->sc_dev, &iwqp->sc_qp);
973 err_code = -EINVAL;
974 goto error;
975 }
976
977 irdma_qp_add_qos(&iwqp->sc_qp);
978 }
979
980 if (udata) {
981 /* GEN_1 legacy support with libi40iw does not have expanded uresp struct */
982 if (udata->outlen < sizeof(uresp)) {
983 uresp.lsmm = 1;
984 uresp.push_idx = IRDMA_INVALID_PUSH_PAGE_INDEX_GEN_1;
985 } else {
986 if (rdma_protocol_iwarp(&iwdev->ibdev, 1))
987 uresp.lsmm = 1;
988 }
989 uresp.actual_sq_size = sq_size;
990 uresp.actual_rq_size = rq_size;
991 uresp.qp_id = qp_num;
992 uresp.qp_caps = qp->qp_uk.qp_caps;
993
994 err_code = ib_copy_to_udata(udata, &uresp,
995 min(sizeof(uresp), udata->outlen));
996 if (err_code) {
997 ibdev_dbg(&iwdev->ibdev, "VERBS: copy_to_udata failed\n");
998 irdma_destroy_qp(&iwqp->ibqp, udata);
514aee66 999 return err_code;
b48c24c2
MI		 1000 }
1001 }
1002
1003 init_completion(&iwqp->free_qp);
514aee66 1004 return 0;
b48c24c2
MI		 1005
1006error:
1007 irdma_free_qp_rsrc(iwqp);
514aee66 1008 return err_code;
b48c24c2
MI		 1009}
1010
1011static int irdma_get_ib_acc_flags(struct irdma_qp *iwqp)
1012{
1013 int acc_flags = 0;
1014
1015 if (rdma_protocol_roce(iwqp->ibqp.device, 1)) {
1016 if (iwqp->roce_info.wr_rdresp_en) {
1017 acc_flags |= IB_ACCESS_LOCAL_WRITE;
1018 acc_flags |= IB_ACCESS_REMOTE_WRITE;
1019 }
1020 if (iwqp->roce_info.rd_en)
1021 acc_flags |= IB_ACCESS_REMOTE_READ;
1022 if (iwqp->roce_info.bind_en)
1023 acc_flags |= IB_ACCESS_MW_BIND;
1024 } else {
1025 if (iwqp->iwarp_info.wr_rdresp_en) {
1026 acc_flags |= IB_ACCESS_LOCAL_WRITE;
1027 acc_flags |= IB_ACCESS_REMOTE_WRITE;
1028 }
1029 if (iwqp->iwarp_info.rd_en)
1030 acc_flags |= IB_ACCESS_REMOTE_READ;
1031 if (iwqp->iwarp_info.bind_en)
1032 acc_flags |= IB_ACCESS_MW_BIND;
1033 }
1034 return acc_flags;
1035}
1036
1037/**
1038 * irdma_query_qp - query qp attributes
1039 * @ibqp: qp pointer
1040 * @attr: attributes pointer
1041 * @attr_mask: Not used
1042 * @init_attr: qp attributes to return
1043 */
1044static int irdma_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1045 int attr_mask, struct ib_qp_init_attr *init_attr)
1046{
1047 struct irdma_qp *iwqp = to_iwqp(ibqp);
1048 struct irdma_sc_qp *qp = &iwqp->sc_qp;
1049
1050 memset(attr, 0, sizeof(*attr));
1051 memset(init_attr, 0, sizeof(*init_attr));
1052
1053 attr->qp_state = iwqp->ibqp_state;
1054 attr->cur_qp_state = iwqp->ibqp_state;
1055 attr->cap.max_send_wr = iwqp->max_send_wr;
1056 attr->cap.max_recv_wr = iwqp->max_recv_wr;
1057 attr->cap.max_inline_data = qp->qp_uk.max_inline_data;
1058 attr->cap.max_send_sge = qp->qp_uk.max_sq_frag_cnt;
1059 attr->cap.max_recv_sge = qp->qp_uk.max_rq_frag_cnt;
1060 attr->qp_access_flags = irdma_get_ib_acc_flags(iwqp);
1061 attr->port_num = 1;
1062 if (rdma_protocol_roce(ibqp->device, 1)) {
1063 attr->path_mtu = ib_mtu_int_to_enum(iwqp->udp_info.snd_mss);
1064 attr->qkey = iwqp->roce_info.qkey;
1065 attr->rq_psn = iwqp->udp_info.epsn;
1066 attr->sq_psn = iwqp->udp_info.psn_nxt;
1067 attr->dest_qp_num = iwqp->roce_info.dest_qp;
1068 attr->pkey_index = iwqp->roce_info.p_key;
1069 attr->retry_cnt = iwqp->udp_info.rexmit_thresh;
1070 attr->rnr_retry = iwqp->udp_info.rnr_nak_thresh;
1071 attr->max_rd_atomic = iwqp->roce_info.ord_size;
1072 attr->max_dest_rd_atomic = iwqp->roce_info.ird_size;
1073 }
1074
1075 init_attr->event_handler = iwqp->ibqp.event_handler;
1076 init_attr->qp_context = iwqp->ibqp.qp_context;
1077 init_attr->send_cq = iwqp->ibqp.send_cq;
1078 init_attr->recv_cq = iwqp->ibqp.recv_cq;
1079 init_attr->cap = attr->cap;
1080
1081 return 0;
1082}
1083
1084/**
1085 * irdma_query_pkey - Query partition key
1086 * @ibdev: device pointer from stack
1087 * @port: port number
1088 * @index: index of pkey
1089 * @pkey: pointer to store the pkey
1090 */
1091static int irdma_query_pkey(struct ib_device *ibdev, u32 port, u16 index,
1092 u16 *pkey)
1093{
1094 if (index >= IRDMA_PKEY_TBL_SZ)
1095 return -EINVAL;
1096
1097 *pkey = IRDMA_DEFAULT_PKEY;
1098 return 0;
1099}
1100
1101/**
1102 * irdma_modify_qp_roce - modify qp request
1103 * @ibqp: qp's pointer for modify
1104 * @attr: access attributes
1105 * @attr_mask: state mask
1106 * @udata: user data
1107 */
1108int irdma_modify_qp_roce(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1109 int attr_mask, struct ib_udata *udata)
1110{
1111 struct irdma_pd *iwpd = to_iwpd(ibqp->pd);
1112 struct irdma_qp *iwqp = to_iwqp(ibqp);
1113 struct irdma_device *iwdev = iwqp->iwdev;
1114 struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
1115 struct irdma_qp_host_ctx_info *ctx_info;
1116 struct irdma_roce_offload_info *roce_info;
1117 struct irdma_udp_offload_info *udp_info;
1118 struct irdma_modify_qp_info info = {};
1119 struct irdma_modify_qp_resp uresp = {};
1120 struct irdma_modify_qp_req ureq = {};
1121 unsigned long flags;
1122 u8 issue_modify_qp = 0;
1123 int ret = 0;
1124
1125 ctx_info = &iwqp->ctx_info;
1126 roce_info = &iwqp->roce_info;
1127 udp_info = &iwqp->udp_info;
1128
1129 if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
1130 return -EOPNOTSUPP;
1131
1132 if (attr_mask & IB_QP_DEST_QPN)
1133 roce_info->dest_qp = attr->dest_qp_num;
1134
1135 if (attr_mask & IB_QP_PKEY_INDEX) {
1136 ret = irdma_query_pkey(ibqp->device, 0, attr->pkey_index,
1137 &roce_info->p_key);
1138 if (ret)
1139 return ret;
1140 }
1141
1142 if (attr_mask & IB_QP_QKEY)
1143 roce_info->qkey = attr->qkey;
1144
1145 if (attr_mask & IB_QP_PATH_MTU)
1146 udp_info->snd_mss = ib_mtu_enum_to_int(attr->path_mtu);
1147
1148 if (attr_mask & IB_QP_SQ_PSN) {
1149 udp_info->psn_nxt = attr->sq_psn;
1150 udp_info->lsn = 0xffff;
1151 udp_info->psn_una = attr->sq_psn;
1152 udp_info->psn_max = attr->sq_psn;
1153 }
1154
1155 if (attr_mask & IB_QP_RQ_PSN)
1156 udp_info->epsn = attr->rq_psn;
1157
1158 if (attr_mask & IB_QP_RNR_RETRY)
1159 udp_info->rnr_nak_thresh = attr->rnr_retry;
1160
1161 if (attr_mask & IB_QP_RETRY_CNT)
1162 udp_info->rexmit_thresh = attr->retry_cnt;
1163
1164 ctx_info->roce_info->pd_id = iwpd->sc_pd.pd_id;
1165
1166 if (attr_mask & IB_QP_AV) {
1167 struct irdma_av *av = &iwqp->roce_ah.av;
1168 const struct ib_gid_attr *sgid_attr;
1169 u16 vlan_id = VLAN_N_VID;
1170 u32 local_ip[4];
1171
1172 memset(&iwqp->roce_ah, 0, sizeof(iwqp->roce_ah));
1173 if (attr->ah_attr.ah_flags & IB_AH_GRH) {
1174 udp_info->ttl = attr->ah_attr.grh.hop_limit;
1175 udp_info->flow_label = attr->ah_attr.grh.flow_label;
1176 udp_info->tos = attr->ah_attr.grh.traffic_class;
1177 irdma_qp_rem_qos(&iwqp->sc_qp);
1178 dev->ws_remove(iwqp->sc_qp.vsi, ctx_info->user_pri);
1179 ctx_info->user_pri = rt_tos2priority(udp_info->tos);
1180 iwqp->sc_qp.user_pri = ctx_info->user_pri;
1181 if (dev->ws_add(iwqp->sc_qp.vsi, ctx_info->user_pri))
1182 return -ENOMEM;
1183 irdma_qp_add_qos(&iwqp->sc_qp);
1184 }
1185 sgid_attr = attr->ah_attr.grh.sgid_attr;
1186 ret = rdma_read_gid_l2_fields(sgid_attr, &vlan_id,
1187 ctx_info->roce_info->mac_addr);
1188 if (ret)
1189 return ret;
1190
1191 if (vlan_id >= VLAN_N_VID && iwdev->dcb)
1192 vlan_id = 0;
1193 if (vlan_id < VLAN_N_VID) {
1194 udp_info->insert_vlan_tag = true;
1195 udp_info->vlan_tag = vlan_id |
1196 ctx_info->user_pri << VLAN_PRIO_SHIFT;
1197 } else {
1198 udp_info->insert_vlan_tag = false;
1199 }
1200
1201 av->attrs = attr->ah_attr;
1202 rdma_gid2ip((struct sockaddr *)&av->sgid_addr, &sgid_attr->gid);
1203 rdma_gid2ip((struct sockaddr *)&av->dgid_addr, &attr->ah_attr.grh.dgid);
1204 roce_info->local_qp = ibqp->qp_num;
1205 if (av->sgid_addr.saddr.sa_family == AF_INET6) {
1206 __be32 *daddr =
1207 av->dgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32;
1208 __be32 *saddr =
1209 av->sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32;
1210
1211 irdma_copy_ip_ntohl(&udp_info->dest_ip_addr[0], daddr);
1212 irdma_copy_ip_ntohl(&udp_info->local_ipaddr[0], saddr);
1213
1214 udp_info->ipv4 = false;
1215 irdma_copy_ip_ntohl(local_ip, daddr);
1216
1217 udp_info->arp_idx = irdma_arp_table(iwdev->rf,
1218 &local_ip[0],
1219 false, NULL,
1220 IRDMA_ARP_RESOLVE);
1221 } else {
1222 __be32 saddr = av->sgid_addr.saddr_in.sin_addr.s_addr;
1223 __be32 daddr = av->dgid_addr.saddr_in.sin_addr.s_addr;
1224
1225 local_ip[0] = ntohl(daddr);
1226
1227 udp_info->ipv4 = true;
1228 udp_info->dest_ip_addr[0] = 0;
1229 udp_info->dest_ip_addr[1] = 0;
1230 udp_info->dest_ip_addr[2] = 0;
1231 udp_info->dest_ip_addr[3] = local_ip[0];
1232
1233 udp_info->local_ipaddr[0] = 0;
1234 udp_info->local_ipaddr[1] = 0;
1235 udp_info->local_ipaddr[2] = 0;
1236 udp_info->local_ipaddr[3] = ntohl(saddr);
1237 }
1238 udp_info->arp_idx =
1239 irdma_add_arp(iwdev->rf, local_ip, udp_info->ipv4,
1240 attr->ah_attr.roce.dmac);
1241 }
1242
1243 if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
1244 if (attr->max_rd_atomic > dev->hw_attrs.max_hw_ord) {
1245 ibdev_err(&iwdev->ibdev,
1246 "rd_atomic = %d, above max_hw_ord=%d\n",
1247 attr->max_rd_atomic,
1248 dev->hw_attrs.max_hw_ord);
1249 return -EINVAL;
1250 }
1251 if (attr->max_rd_atomic)
1252 roce_info->ord_size = attr->max_rd_atomic;
1253 info.ord_valid = true;
1254 }
1255
1256 if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) {
1257 if (attr->max_dest_rd_atomic > dev->hw_attrs.max_hw_ird) {
1258 ibdev_err(&iwdev->ibdev,
1259 "rd_atomic = %d, above max_hw_ird=%d\n",
1260 attr->max_rd_atomic,
1261 dev->hw_attrs.max_hw_ird);
1262 return -EINVAL;
1263 }
1264 if (attr->max_dest_rd_atomic)
1265 roce_info->ird_size = attr->max_dest_rd_atomic;
1266 }
1267
1268 if (attr_mask & IB_QP_ACCESS_FLAGS) {
1269 if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
1270 roce_info->wr_rdresp_en = true;
1271 if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
1272 roce_info->wr_rdresp_en = true;
1273 if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
1274 roce_info->rd_en = true;
1275 }
1276
1277 wait_event(iwqp->mod_qp_waitq, !atomic_read(&iwqp->hw_mod_qp_pend));
1278
1279 ibdev_dbg(&iwdev->ibdev,
1280 "VERBS: caller: %pS qp_id=%d to_ibqpstate=%d ibqpstate=%d irdma_qpstate=%d attr_mask=0x%x\n",
1281 __builtin_return_address(0), ibqp->qp_num, attr->qp_state,
1282 iwqp->ibqp_state, iwqp->iwarp_state, attr_mask);
1283
1284 spin_lock_irqsave(&iwqp->lock, flags);
1285 if (attr_mask & IB_QP_STATE) {
1286 if (!ib_modify_qp_is_ok(iwqp->ibqp_state, attr->qp_state,
1287 iwqp->ibqp.qp_type, attr_mask)) {
1288 ibdev_warn(&iwdev->ibdev, "modify_qp invalid for qp_id=%d, old_state=0x%x, new_state=0x%x\n",
1289 iwqp->ibqp.qp_num, iwqp->ibqp_state,
1290 attr->qp_state);
1291 ret = -EINVAL;
1292 goto exit;
1293 }
1294 info.curr_iwarp_state = iwqp->iwarp_state;
1295
1296 switch (attr->qp_state) {
1297 case IB_QPS_INIT:
1298 if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) {
1299 ret = -EINVAL;
1300 goto exit;
1301 }
1302
1303 if (iwqp->iwarp_state == IRDMA_QP_STATE_INVALID) {
1304 info.next_iwarp_state = IRDMA_QP_STATE_IDLE;
1305 issue_modify_qp = 1;
1306 }
1307 break;
1308 case IB_QPS_RTR:
1309 if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) {
1310 ret = -EINVAL;
1311 goto exit;
1312 }
1313 info.arp_cache_idx_valid = true;
1314 info.cq_num_valid = true;
1315 info.next_iwarp_state = IRDMA_QP_STATE_RTR;
1316 issue_modify_qp = 1;
1317 break;
1318 case IB_QPS_RTS:
1319 if (iwqp->ibqp_state < IB_QPS_RTR ||
1320 iwqp->ibqp_state == IB_QPS_ERR) {
1321 ret = -EINVAL;
1322 goto exit;
1323 }
1324
1325 info.arp_cache_idx_valid = true;
1326 info.cq_num_valid = true;
1327 info.ord_valid = true;
1328 info.next_iwarp_state = IRDMA_QP_STATE_RTS;
1329 issue_modify_qp = 1;
1330 if (iwdev->push_mode && udata &&
1331 iwqp->sc_qp.push_idx == IRDMA_INVALID_PUSH_PAGE_INDEX &&
1332 dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1333 spin_unlock_irqrestore(&iwqp->lock, flags);
1334 irdma_alloc_push_page(iwqp);
1335 spin_lock_irqsave(&iwqp->lock, flags);
1336 }
1337 break;
1338 case IB_QPS_SQD:
1339 if (iwqp->iwarp_state == IRDMA_QP_STATE_SQD)
1340 goto exit;
1341
1342 if (iwqp->iwarp_state != IRDMA_QP_STATE_RTS) {
1343 ret = -EINVAL;
1344 goto exit;
1345 }
1346
1347 info.next_iwarp_state = IRDMA_QP_STATE_SQD;
1348 issue_modify_qp = 1;
1349 break;
1350 case IB_QPS_SQE:
1351 case IB_QPS_ERR:
1352 case IB_QPS_RESET:
1353 if (iwqp->iwarp_state == IRDMA_QP_STATE_RTS) {
1354 spin_unlock_irqrestore(&iwqp->lock, flags);
1355 info.next_iwarp_state = IRDMA_QP_STATE_SQD;
1356 irdma_hw_modify_qp(iwdev, iwqp, &info, true);
1357 spin_lock_irqsave(&iwqp->lock, flags);
1358 }
1359
1360 if (iwqp->iwarp_state == IRDMA_QP_STATE_ERROR) {
1361 spin_unlock_irqrestore(&iwqp->lock, flags);
1362 if (udata) {
1363 if (ib_copy_from_udata(&ureq, udata,
1364 min(sizeof(ureq), udata->inlen)))
1365 return -EINVAL;
1366
1367 irdma_flush_wqes(iwqp,
1368 (ureq.sq_flush ? IRDMA_FLUSH_SQ : 0) |
1369 (ureq.rq_flush ? IRDMA_FLUSH_RQ : 0) |
1370 IRDMA_REFLUSH);
1371 }
1372 return 0;
1373 }
1374
1375 info.next_iwarp_state = IRDMA_QP_STATE_ERROR;
1376 issue_modify_qp = 1;
1377 break;
1378 default:
1379 ret = -EINVAL;
1380 goto exit;
1381 }
1382
1383 iwqp->ibqp_state = attr->qp_state;
1384 }
1385
1386 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
1387 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
1388 irdma_sc_qp_setctx_roce(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
1389 spin_unlock_irqrestore(&iwqp->lock, flags);
1390
1391 if (attr_mask & IB_QP_STATE) {
1392 if (issue_modify_qp) {
1393 ctx_info->rem_endpoint_idx = udp_info->arp_idx;
1394 if (irdma_hw_modify_qp(iwdev, iwqp, &info, true))
1395 return -EINVAL;
1396 spin_lock_irqsave(&iwqp->lock, flags);
1397 if (iwqp->iwarp_state == info.curr_iwarp_state) {
1398 iwqp->iwarp_state = info.next_iwarp_state;
1399 iwqp->ibqp_state = attr->qp_state;
1400 }
1401 if (iwqp->ibqp_state > IB_QPS_RTS &&
1402 !iwqp->flush_issued) {
1403 iwqp->flush_issued = 1;
1404 spin_unlock_irqrestore(&iwqp->lock, flags);
1405 irdma_flush_wqes(iwqp, IRDMA_FLUSH_SQ |
1406 IRDMA_FLUSH_RQ |
1407 IRDMA_FLUSH_WAIT);
1408 } else {
1409 spin_unlock_irqrestore(&iwqp->lock, flags);
1410 }
1411 } else {
1412 iwqp->ibqp_state = attr->qp_state;
1413 }
1414 if (udata && dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1415 struct irdma_ucontext *ucontext;
1416
1417 ucontext = rdma_udata_to_drv_context(udata,
1418 struct irdma_ucontext, ibucontext);
1419 if (iwqp->sc_qp.push_idx != IRDMA_INVALID_PUSH_PAGE_INDEX &&
1420 !iwqp->push_wqe_mmap_entry &&
1421 !irdma_setup_push_mmap_entries(ucontext, iwqp,
1422 &uresp.push_wqe_mmap_key, &uresp.push_db_mmap_key)) {
1423 uresp.push_valid = 1;
1424 uresp.push_offset = iwqp->sc_qp.push_offset;
1425 }
1426 ret = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp),
1427 udata->outlen));
1428 if (ret) {
1429 irdma_remove_push_mmap_entries(iwqp);
1430 ibdev_dbg(&iwdev->ibdev,
1431 "VERBS: copy_to_udata failed\n");
1432 return ret;
1433 }
1434 }
1435 }
1436
1437 return 0;
1438exit:
1439 spin_unlock_irqrestore(&iwqp->lock, flags);
1440
1441 return ret;
1442}
1443
1444/**
1445 * irdma_modify_qp - modify qp request
1446 * @ibqp: qp's pointer for modify
1447 * @attr: access attributes
1448 * @attr_mask: state mask
1449 * @udata: user data
1450 */
1451int irdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
1452 struct ib_udata *udata)
1453{
1454 struct irdma_qp *iwqp = to_iwqp(ibqp);
1455 struct irdma_device *iwdev = iwqp->iwdev;
1456 struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
1457 struct irdma_qp_host_ctx_info *ctx_info;
1458 struct irdma_tcp_offload_info *tcp_info;
1459 struct irdma_iwarp_offload_info *offload_info;
1460 struct irdma_modify_qp_info info = {};
1461 struct irdma_modify_qp_resp uresp = {};
1462 struct irdma_modify_qp_req ureq = {};
1463 u8 issue_modify_qp = 0;
1464 u8 dont_wait = 0;
1465 int err;
1466 unsigned long flags;
1467
1468 if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
61c7d826 1469 return -EOPNOTSUPP;
b48c24c2
MI		 1470
1471 ctx_info = &iwqp->ctx_info;
1472 offload_info = &iwqp->iwarp_info;
1473 tcp_info = &iwqp->tcp_info;
1474 wait_event(iwqp->mod_qp_waitq, !atomic_read(&iwqp->hw_mod_qp_pend));
1475 ibdev_dbg(&iwdev->ibdev,
1476 "VERBS: caller: %pS qp_id=%d to_ibqpstate=%d ibqpstate=%d irdma_qpstate=%d last_aeq=%d hw_tcp_state=%d hw_iwarp_state=%d attr_mask=0x%x\n",
1477 __builtin_return_address(0), ibqp->qp_num, attr->qp_state,
1478 iwqp->ibqp_state, iwqp->iwarp_state, iwqp->last_aeq,
1479 iwqp->hw_tcp_state, iwqp->hw_iwarp_state, attr_mask);
1480
1481 spin_lock_irqsave(&iwqp->lock, flags);
1482 if (attr_mask & IB_QP_STATE) {
1483 info.curr_iwarp_state = iwqp->iwarp_state;
1484 switch (attr->qp_state) {
1485 case IB_QPS_INIT:
1486 case IB_QPS_RTR:
1487 if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) {
1488 err = -EINVAL;
1489 goto exit;
1490 }
1491
1492 if (iwqp->iwarp_state == IRDMA_QP_STATE_INVALID) {
1493 info.next_iwarp_state = IRDMA_QP_STATE_IDLE;
1494 issue_modify_qp = 1;
1495 }
1496 if (iwdev->push_mode && udata &&
1497 iwqp->sc_qp.push_idx == IRDMA_INVALID_PUSH_PAGE_INDEX &&
1498 dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1499 spin_unlock_irqrestore(&iwqp->lock, flags);
1500 irdma_alloc_push_page(iwqp);
1501 spin_lock_irqsave(&iwqp->lock, flags);
1502 }
1503 break;
1504 case IB_QPS_RTS:
1505 if (iwqp->iwarp_state > IRDMA_QP_STATE_RTS ||
1506 !iwqp->cm_id) {
1507 err = -EINVAL;
1508 goto exit;
1509 }
1510
1511 issue_modify_qp = 1;
1512 iwqp->hw_tcp_state = IRDMA_TCP_STATE_ESTABLISHED;
1513 iwqp->hte_added = 1;
1514 info.next_iwarp_state = IRDMA_QP_STATE_RTS;
1515 info.tcp_ctx_valid = true;
1516 info.ord_valid = true;
1517 info.arp_cache_idx_valid = true;
1518 info.cq_num_valid = true;
1519 break;
1520 case IB_QPS_SQD:
1521 if (iwqp->hw_iwarp_state > IRDMA_QP_STATE_RTS) {
1522 err = 0;
1523 goto exit;
1524 }
1525
1526 if (iwqp->iwarp_state == IRDMA_QP_STATE_CLOSING ||
1527 iwqp->iwarp_state < IRDMA_QP_STATE_RTS) {
1528 err = 0;
1529 goto exit;
1530 }
1531
1532 if (iwqp->iwarp_state > IRDMA_QP_STATE_CLOSING) {
1533 err = -EINVAL;
1534 goto exit;
1535 }
1536
1537 info.next_iwarp_state = IRDMA_QP_STATE_CLOSING;
1538 issue_modify_qp = 1;
1539 break;
1540 case IB_QPS_SQE:
1541 if (iwqp->iwarp_state >= IRDMA_QP_STATE_TERMINATE) {
1542 err = -EINVAL;
1543 goto exit;
1544 }
1545
1546 info.next_iwarp_state = IRDMA_QP_STATE_TERMINATE;
1547 issue_modify_qp = 1;
1548 break;
1549 case IB_QPS_ERR:
1550 case IB_QPS_RESET:
1551 if (iwqp->iwarp_state == IRDMA_QP_STATE_ERROR) {
1552 spin_unlock_irqrestore(&iwqp->lock, flags);
1553 if (udata) {
1554 if (ib_copy_from_udata(&ureq, udata,
1555 min(sizeof(ureq), udata->inlen)))
1556 return -EINVAL;
1557
1558 irdma_flush_wqes(iwqp,
1559 (ureq.sq_flush ? IRDMA_FLUSH_SQ : 0) |
1560 (ureq.rq_flush ? IRDMA_FLUSH_RQ : 0) |
1561 IRDMA_REFLUSH);
1562 }
1563 return 0;
1564 }
1565
1566 if (iwqp->sc_qp.term_flags) {
1567 spin_unlock_irqrestore(&iwqp->lock, flags);
1568 irdma_terminate_del_timer(&iwqp->sc_qp);
1569 spin_lock_irqsave(&iwqp->lock, flags);
1570 }
1571 info.next_iwarp_state = IRDMA_QP_STATE_ERROR;
1572 if (iwqp->hw_tcp_state > IRDMA_TCP_STATE_CLOSED &&
1573 iwdev->iw_status &&
1574 iwqp->hw_tcp_state != IRDMA_TCP_STATE_TIME_WAIT)
1575 info.reset_tcp_conn = true;
1576 else
1577 dont_wait = 1;
1578
1579 issue_modify_qp = 1;
1580 info.next_iwarp_state = IRDMA_QP_STATE_ERROR;
1581 break;
1582 default:
1583 err = -EINVAL;
1584 goto exit;
1585 }
1586
1587 iwqp->ibqp_state = attr->qp_state;
1588 }
1589 if (attr_mask & IB_QP_ACCESS_FLAGS) {
1590 ctx_info->iwarp_info_valid = true;
1591 if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
1592 offload_info->wr_rdresp_en = true;
1593 if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
1594 offload_info->wr_rdresp_en = true;
1595 if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
1596 offload_info->rd_en = true;
1597 }
1598
1599 if (ctx_info->iwarp_info_valid) {
1600 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
1601 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
1602 irdma_sc_qp_setctx(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
1603 }
1604 spin_unlock_irqrestore(&iwqp->lock, flags);
1605
1606 if (attr_mask & IB_QP_STATE) {
1607 if (issue_modify_qp) {
1608 ctx_info->rem_endpoint_idx = tcp_info->arp_idx;
1609 if (irdma_hw_modify_qp(iwdev, iwqp, &info, true))
1610 return -EINVAL;
1611 }
1612
1613 spin_lock_irqsave(&iwqp->lock, flags);
1614 if (iwqp->iwarp_state == info.curr_iwarp_state) {
1615 iwqp->iwarp_state = info.next_iwarp_state;
1616 iwqp->ibqp_state = attr->qp_state;
1617 }
1618 spin_unlock_irqrestore(&iwqp->lock, flags);
1619 }
1620
1621 if (issue_modify_qp && iwqp->ibqp_state > IB_QPS_RTS) {
1622 if (dont_wait) {
1623 if (iwqp->cm_id && iwqp->hw_tcp_state) {
1624 spin_lock_irqsave(&iwqp->lock, flags);
1625 iwqp->hw_tcp_state = IRDMA_TCP_STATE_CLOSED;
1626 iwqp->last_aeq = IRDMA_AE_RESET_SENT;
1627 spin_unlock_irqrestore(&iwqp->lock, flags);
1628 irdma_cm_disconn(iwqp);
1629 }
1630 } else {
1631 int close_timer_started;
1632
1633 spin_lock_irqsave(&iwdev->cm_core.ht_lock, flags);
1634
1635 if (iwqp->cm_node) {
1636 refcount_inc(&iwqp->cm_node->refcnt);
1637 spin_unlock_irqrestore(&iwdev->cm_core.ht_lock, flags);
1638 close_timer_started = atomic_inc_return(&iwqp->close_timer_started);
1639 if (iwqp->cm_id && close_timer_started == 1)
1640 irdma_schedule_cm_timer(iwqp->cm_node,
1641 (struct irdma_puda_buf *)iwqp,
1642 IRDMA_TIMER_TYPE_CLOSE, 1, 0);
1643
1644 irdma_rem_ref_cm_node(iwqp->cm_node);
1645 } else {
1646 spin_unlock_irqrestore(&iwdev->cm_core.ht_lock, flags);
1647 }
1648 }
1649 }
1650 if (attr_mask & IB_QP_STATE && udata &&
1651 dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1652 struct irdma_ucontext *ucontext;
1653
1654 ucontext = rdma_udata_to_drv_context(udata,
1655 struct irdma_ucontext, ibucontext);
1656 if (iwqp->sc_qp.push_idx != IRDMA_INVALID_PUSH_PAGE_INDEX &&
1657 !iwqp->push_wqe_mmap_entry &&
1658 !irdma_setup_push_mmap_entries(ucontext, iwqp,
1659 &uresp.push_wqe_mmap_key, &uresp.push_db_mmap_key)) {
1660 uresp.push_valid = 1;
1661 uresp.push_offset = iwqp->sc_qp.push_offset;
1662 }
1663
1664 err = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp),
1665 udata->outlen));
1666 if (err) {
1667 irdma_remove_push_mmap_entries(iwqp);
1668 ibdev_dbg(&iwdev->ibdev,
1669 "VERBS: copy_to_udata failed\n");
1670 return err;
1671 }
1672 }
1673
1674 return 0;
1675exit:
1676 spin_unlock_irqrestore(&iwqp->lock, flags);
1677
1678 return err;
1679}
1680
1681/**
1682 * irdma_cq_free_rsrc - free up resources for cq
1683 * @rf: RDMA PCI function
1684 * @iwcq: cq ptr
1685 */
1686static void irdma_cq_free_rsrc(struct irdma_pci_f *rf, struct irdma_cq *iwcq)
1687{
1688 struct irdma_sc_cq *cq = &iwcq->sc_cq;
1689
1690 if (!iwcq->user_mode) {
1691 dma_free_coherent(rf->sc_dev.hw->device, iwcq->kmem.size,
1692 iwcq->kmem.va, iwcq->kmem.pa);
1693 iwcq->kmem.va = NULL;
1694 dma_free_coherent(rf->sc_dev.hw->device,
1695 iwcq->kmem_shadow.size,
1696 iwcq->kmem_shadow.va, iwcq->kmem_shadow.pa);
1697 iwcq->kmem_shadow.va = NULL;
1698 }
1699
1700 irdma_free_rsrc(rf, rf->allocated_cqs, cq->cq_uk.cq_id);
1701}
1702
1703/**
1704 * irdma_free_cqbuf - worker to free a cq buffer
1705 * @work: provides access to the cq buffer to free
1706 */
1707static void irdma_free_cqbuf(struct work_struct *work)
1708{
1709 struct irdma_cq_buf *cq_buf = container_of(work, struct irdma_cq_buf, work);
1710
1711 dma_free_coherent(cq_buf->hw->device, cq_buf->kmem_buf.size,
1712 cq_buf->kmem_buf.va, cq_buf->kmem_buf.pa);
1713 cq_buf->kmem_buf.va = NULL;
1714 kfree(cq_buf);
1715}
1716
1717/**
1718 * irdma_process_resize_list - remove resized cq buffers from the resize_list
1719 * @iwcq: cq which owns the resize_list
1720 * @iwdev: irdma device
1721 * @lcqe_buf: the buffer where the last cqe is received
1722 */
1723static int irdma_process_resize_list(struct irdma_cq *iwcq,
1724 struct irdma_device *iwdev,
1725 struct irdma_cq_buf *lcqe_buf)
1726{
1727 struct list_head *tmp_node, *list_node;
1728 struct irdma_cq_buf *cq_buf;
1729 int cnt = 0;
1730
1731 list_for_each_safe(list_node, tmp_node, &iwcq->resize_list) {
1732 cq_buf = list_entry(list_node, struct irdma_cq_buf, list);
1733 if (cq_buf == lcqe_buf)
1734 return cnt;
1735
1736 list_del(&cq_buf->list);
1737 queue_work(iwdev->cleanup_wq, &cq_buf->work);
1738 cnt++;
1739 }
1740
1741 return cnt;
1742}
1743
1744/**
1745 * irdma_destroy_cq - destroy cq
1746 * @ib_cq: cq pointer
1747 * @udata: user data
1748 */
1749static int irdma_destroy_cq(struct ib_cq *ib_cq, struct ib_udata *udata)
1750{
1751 struct irdma_device *iwdev = to_iwdev(ib_cq->device);
1752 struct irdma_cq *iwcq = to_iwcq(ib_cq);
1753 struct irdma_sc_cq *cq = &iwcq->sc_cq;
1754 struct irdma_sc_dev *dev = cq->dev;
1755 struct irdma_sc_ceq *ceq = dev->ceq[cq->ceq_id];
1756 struct irdma_ceq *iwceq = container_of(ceq, struct irdma_ceq, sc_ceq);
1757 unsigned long flags;
1758
1759 spin_lock_irqsave(&iwcq->lock, flags);
1760 if (!list_empty(&iwcq->resize_list))
1761 irdma_process_resize_list(iwcq, iwdev, NULL);
1762 spin_unlock_irqrestore(&iwcq->lock, flags);
1763
1764 irdma_cq_wq_destroy(iwdev->rf, cq);
1765 irdma_cq_free_rsrc(iwdev->rf, iwcq);
1766
1767 spin_lock_irqsave(&iwceq->ce_lock, flags);
1768 irdma_sc_cleanup_ceqes(cq, ceq);
1769 spin_unlock_irqrestore(&iwceq->ce_lock, flags);
1770
1771 return 0;
1772}
1773
1774/**
1775 * irdma_resize_cq - resize cq
1776 * @ibcq: cq to be resized
1777 * @entries: desired cq size
1778 * @udata: user data
1779 */
1780static int irdma_resize_cq(struct ib_cq *ibcq, int entries,
1781 struct ib_udata *udata)
1782{
1783 struct irdma_cq *iwcq = to_iwcq(ibcq);
1784 struct irdma_sc_dev *dev = iwcq->sc_cq.dev;
1785 struct irdma_cqp_request *cqp_request;
1786 struct cqp_cmds_info *cqp_info;
1787 struct irdma_modify_cq_info *m_info;
1788 struct irdma_modify_cq_info info = {};
1789 struct irdma_dma_mem kmem_buf;
1790 struct irdma_cq_mr *cqmr_buf;
1791 struct irdma_pbl *iwpbl_buf;
1792 struct irdma_device *iwdev;
1793 struct irdma_pci_f *rf;
1794 struct irdma_cq_buf *cq_buf = NULL;
1795 enum irdma_status_code status = 0;
1796 unsigned long flags;
1797 int ret;
1798
1799 iwdev = to_iwdev(ibcq->device);
1800 rf = iwdev->rf;
1801
1802 if (!(rf->sc_dev.hw_attrs.uk_attrs.feature_flags &
1803 IRDMA_FEATURE_CQ_RESIZE))
1804 return -EOPNOTSUPP;
1805
1806 if (entries > rf->max_cqe)
1807 return -EINVAL;
1808
1809 if (!iwcq->user_mode) {
1810 entries++;
1811 if (rf->sc_dev.hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
1812 entries *= 2;
1813 }
1814
1815 info.cq_size = max(entries, 4);
1816
1817 if (info.cq_size == iwcq->sc_cq.cq_uk.cq_size - 1)
1818 return 0;
1819
1820 if (udata) {
1821 struct irdma_resize_cq_req req = {};
1822 struct irdma_ucontext *ucontext =
1823 rdma_udata_to_drv_context(udata, struct irdma_ucontext,
1824 ibucontext);
1825
1826 /* CQ resize not supported with legacy GEN_1 libi40iw */
1827 if (ucontext->legacy_mode)
1828 return -EOPNOTSUPP;
1829
1830 if (ib_copy_from_udata(&req, udata,
1831 min(sizeof(req), udata->inlen)))
1832 return -EINVAL;
1833
1834 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1835 iwpbl_buf = irdma_get_pbl((unsigned long)req.user_cq_buffer,
1836 &ucontext->cq_reg_mem_list);
1837 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1838
1839 if (!iwpbl_buf)
1840 return -ENOMEM;
1841
1842 cqmr_buf = &iwpbl_buf->cq_mr;
1843 if (iwpbl_buf->pbl_allocated) {
1844 info.virtual_map = true;
1845 info.pbl_chunk_size = 1;
1846 info.first_pm_pbl_idx = cqmr_buf->cq_pbl.idx;
1847 } else {
1848 info.cq_pa = cqmr_buf->cq_pbl.addr;
1849 }
1850 } else {
1851 /* Kmode CQ resize */
1852 int rsize;
1853
1854 rsize = info.cq_size * sizeof(struct irdma_cqe);
1855 kmem_buf.size = ALIGN(round_up(rsize, 256), 256);
1856 kmem_buf.va = dma_alloc_coherent(dev->hw->device,
1857 kmem_buf.size, &kmem_buf.pa,
1858 GFP_KERNEL);
1859 if (!kmem_buf.va)
1860 return -ENOMEM;
1861
1862 info.cq_base = kmem_buf.va;
1863 info.cq_pa = kmem_buf.pa;
1864 cq_buf = kzalloc(sizeof(*cq_buf), GFP_KERNEL);
1865 if (!cq_buf) {
1866 ret = -ENOMEM;
1867 goto error;
1868 }
1869 }
1870
1871 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
1872 if (!cqp_request) {
1873 ret = -ENOMEM;
1874 goto error;
1875 }
1876
1877 info.shadow_read_threshold = iwcq->sc_cq.shadow_read_threshold;
1878 info.cq_resize = true;
1879
1880 cqp_info = &cqp_request->info;
1881 m_info = &cqp_info->in.u.cq_modify.info;
1882 memcpy(m_info, &info, sizeof(*m_info));
1883
1884 cqp_info->cqp_cmd = IRDMA_OP_CQ_MODIFY;
1885 cqp_info->in.u.cq_modify.cq = &iwcq->sc_cq;
1886 cqp_info->in.u.cq_modify.scratch = (uintptr_t)cqp_request;
1887 cqp_info->post_sq = 1;
1888 status = irdma_handle_cqp_op(rf, cqp_request);
1889 irdma_put_cqp_request(&rf->cqp, cqp_request);
1890 if (status) {
1891 ret = -EPROTO;
1892 goto error;
1893 }
1894
1895 spin_lock_irqsave(&iwcq->lock, flags);
1896 if (cq_buf) {
1897 cq_buf->kmem_buf = iwcq->kmem;
1898 cq_buf->hw = dev->hw;
1899 memcpy(&cq_buf->cq_uk, &iwcq->sc_cq.cq_uk, sizeof(cq_buf->cq_uk));
1900 INIT_WORK(&cq_buf->work, irdma_free_cqbuf);
1901 list_add_tail(&cq_buf->list, &iwcq->resize_list);
1902 iwcq->kmem = kmem_buf;
1903 }
1904
1905 irdma_sc_cq_resize(&iwcq->sc_cq, &info);
1906 ibcq->cqe = info.cq_size - 1;
1907 spin_unlock_irqrestore(&iwcq->lock, flags);
1908
1909 return 0;
1910error:
1911 if (!udata) {
1912 dma_free_coherent(dev->hw->device, kmem_buf.size, kmem_buf.va,
1913 kmem_buf.pa);
1914 kmem_buf.va = NULL;
1915 }
1916 kfree(cq_buf);
1917
1918 return ret;
1919}
1920
1921static inline int cq_validate_flags(u32 flags, u8 hw_rev)
1922{
1923 /* GEN1 does not support CQ create flags */
1924 if (hw_rev == IRDMA_GEN_1)
1925 return flags ? -EOPNOTSUPP : 0;
1926
1927 return flags & ~IB_UVERBS_CQ_FLAGS_TIMESTAMP_COMPLETION ? -EOPNOTSUPP : 0;
1928}
1929
1930/**
1931 * irdma_create_cq - create cq
1932 * @ibcq: CQ allocated
1933 * @attr: attributes for cq
1934 * @udata: user data
1935 */
1936static int irdma_create_cq(struct ib_cq *ibcq,
1937 const struct ib_cq_init_attr *attr,
1938 struct ib_udata *udata)
1939{
1940 struct ib_device *ibdev = ibcq->device;
1941 struct irdma_device *iwdev = to_iwdev(ibdev);
1942 struct irdma_pci_f *rf = iwdev->rf;
1943 struct irdma_cq *iwcq = to_iwcq(ibcq);
1944 u32 cq_num = 0;
1945 struct irdma_sc_cq *cq;
1946 struct irdma_sc_dev *dev = &rf->sc_dev;
1947 struct irdma_cq_init_info info = {};
1948 enum irdma_status_code status;
1949 struct irdma_cqp_request *cqp_request;
1950 struct cqp_cmds_info *cqp_info;
1951 struct irdma_cq_uk_init_info *ukinfo = &info.cq_uk_init_info;
1952 unsigned long flags;
1953 int err_code;
1954 int entries = attr->cqe;
1955
1956 err_code = cq_validate_flags(attr->flags, dev->hw_attrs.uk_attrs.hw_rev);
1957 if (err_code)
1958 return err_code;
1959 err_code = irdma_alloc_rsrc(rf, rf->allocated_cqs, rf->max_cq, &cq_num,
1960 &rf->next_cq);
1961 if (err_code)
1962 return err_code;
1963
1964 cq = &iwcq->sc_cq;
1965 cq->back_cq = iwcq;
1966 spin_lock_init(&iwcq->lock);
1967 INIT_LIST_HEAD(&iwcq->resize_list);
1968 info.dev = dev;
1969 ukinfo->cq_size = max(entries, 4);
1970 ukinfo->cq_id = cq_num;
1971 iwcq->ibcq.cqe = info.cq_uk_init_info.cq_size;
1972 if (attr->comp_vector < rf->ceqs_count)
1973 info.ceq_id = attr->comp_vector;
1974 info.ceq_id_valid = true;
1975 info.ceqe_mask = 1;
1976 info.type = IRDMA_CQ_TYPE_IWARP;
1977 info.vsi = &iwdev->vsi;
1978
1979 if (udata) {
1980 struct irdma_ucontext *ucontext;
1981 struct irdma_create_cq_req req = {};
1982 struct irdma_cq_mr *cqmr;
1983 struct irdma_pbl *iwpbl;
1984 struct irdma_pbl *iwpbl_shadow;
1985 struct irdma_cq_mr *cqmr_shadow;
1986
1987 iwcq->user_mode = true;
1988 ucontext =
1989 rdma_udata_to_drv_context(udata, struct irdma_ucontext,
1990 ibucontext);
1991 if (ib_copy_from_udata(&req, udata,
1992 min(sizeof(req), udata->inlen))) {
1993 err_code = -EFAULT;
1994 goto cq_free_rsrc;
1995 }
1996
1997 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1998 iwpbl = irdma_get_pbl((unsigned long)req.user_cq_buf,
1999 &ucontext->cq_reg_mem_list);
2000 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2001 if (!iwpbl) {
2002 err_code = -EPROTO;
2003 goto cq_free_rsrc;
2004 }
2005
2006 iwcq->iwpbl = iwpbl;
2007 iwcq->cq_mem_size = 0;
2008 cqmr = &iwpbl->cq_mr;
2009
2010 if (rf->sc_dev.hw_attrs.uk_attrs.feature_flags &
2011 IRDMA_FEATURE_CQ_RESIZE && !ucontext->legacy_mode) {
2012 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2013 iwpbl_shadow = irdma_get_pbl(
2014 (unsigned long)req.user_shadow_area,
2015 &ucontext->cq_reg_mem_list);
2016 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2017
2018 if (!iwpbl_shadow) {
2019 err_code = -EPROTO;
2020 goto cq_free_rsrc;
2021 }
2022 iwcq->iwpbl_shadow = iwpbl_shadow;
2023 cqmr_shadow = &iwpbl_shadow->cq_mr;
2024 info.shadow_area_pa = cqmr_shadow->cq_pbl.addr;
2025 cqmr->split = true;
2026 } else {
2027 info.shadow_area_pa = cqmr->shadow;
2028 }
2029 if (iwpbl->pbl_allocated) {
2030 info.virtual_map = true;
2031 info.pbl_chunk_size = 1;
2032 info.first_pm_pbl_idx = cqmr->cq_pbl.idx;
2033 } else {
2034 info.cq_base_pa = cqmr->cq_pbl.addr;
2035 }
2036 } else {
2037 /* Kmode allocations */
2038 int rsize;
2039
2040 if (entries > rf->max_cqe) {
2041 err_code = -EINVAL;
2042 goto cq_free_rsrc;
2043 }
2044
2045 entries++;
2046 if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
2047 entries *= 2;
2048 ukinfo->cq_size = entries;
2049
2050 rsize = info.cq_uk_init_info.cq_size * sizeof(struct irdma_cqe);
2051 iwcq->kmem.size = ALIGN(round_up(rsize, 256), 256);
2052 iwcq->kmem.va = dma_alloc_coherent(dev->hw->device,
2053 iwcq->kmem.size,
2054 &iwcq->kmem.pa, GFP_KERNEL);
2055 if (!iwcq->kmem.va) {
2056 err_code = -ENOMEM;
2057 goto cq_free_rsrc;
2058 }
2059
2060 iwcq->kmem_shadow.size = ALIGN(IRDMA_SHADOW_AREA_SIZE << 3,
2061 64);
2062 iwcq->kmem_shadow.va = dma_alloc_coherent(dev->hw->device,
2063 iwcq->kmem_shadow.size,
2064 &iwcq->kmem_shadow.pa,
2065 GFP_KERNEL);
2066 if (!iwcq->kmem_shadow.va) {
2067 err_code = -ENOMEM;
2068 goto cq_free_rsrc;
2069 }
2070 info.shadow_area_pa = iwcq->kmem_shadow.pa;
2071 ukinfo->shadow_area = iwcq->kmem_shadow.va;
2072 ukinfo->cq_base = iwcq->kmem.va;
2073 info.cq_base_pa = iwcq->kmem.pa;
2074 }
2075
2076 if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
2077 info.shadow_read_threshold = min(info.cq_uk_init_info.cq_size / 2,
2078 (u32)IRDMA_MAX_CQ_READ_THRESH);
2079
2080 if (irdma_sc_cq_init(cq, &info)) {
2081 ibdev_dbg(&iwdev->ibdev, "VERBS: init cq fail\n");
2082 err_code = -EPROTO;
2083 goto cq_free_rsrc;
2084 }
2085
2086 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
2087 if (!cqp_request) {
2088 err_code = -ENOMEM;
2089 goto cq_free_rsrc;
2090 }
2091
2092 cqp_info = &cqp_request->info;
2093 cqp_info->cqp_cmd = IRDMA_OP_CQ_CREATE;
2094 cqp_info->post_sq = 1;
2095 cqp_info->in.u.cq_create.cq = cq;
2096 cqp_info->in.u.cq_create.check_overflow = true;
2097 cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request;
2098 status = irdma_handle_cqp_op(rf, cqp_request);
2099 irdma_put_cqp_request(&rf->cqp, cqp_request);
2100 if (status) {
2101 err_code = -ENOMEM;
2102 goto cq_free_rsrc;
2103 }
2104
2105 if (udata) {
2106 struct irdma_create_cq_resp resp = {};
2107
2108 resp.cq_id = info.cq_uk_init_info.cq_id;
2109 resp.cq_size = info.cq_uk_init_info.cq_size;
2110 if (ib_copy_to_udata(udata, &resp,
2111 min(sizeof(resp), udata->outlen))) {
2112 ibdev_dbg(&iwdev->ibdev,
2113 "VERBS: copy to user data\n");
2114 err_code = -EPROTO;
2115 goto cq_destroy;
2116 }
2117 }
2118 return 0;
2119cq_destroy:
2120 irdma_cq_wq_destroy(rf, cq);
2121cq_free_rsrc:
2122 irdma_cq_free_rsrc(rf, iwcq);
2123
2124 return err_code;
2125}
2126
2127/**
2128 * irdma_get_mr_access - get hw MR access permissions from IB access flags
2129 * @access: IB access flags
2130 */
2131static inline u16 irdma_get_mr_access(int access)
2132{
2133 u16 hw_access = 0;
2134
2135 hw_access |= (access & IB_ACCESS_LOCAL_WRITE) ?
2136 IRDMA_ACCESS_FLAGS_LOCALWRITE : 0;
2137 hw_access |= (access & IB_ACCESS_REMOTE_WRITE) ?
2138 IRDMA_ACCESS_FLAGS_REMOTEWRITE : 0;
2139 hw_access |= (access & IB_ACCESS_REMOTE_READ) ?
2140 IRDMA_ACCESS_FLAGS_REMOTEREAD : 0;
2141 hw_access |= (access & IB_ACCESS_MW_BIND) ?
2142 IRDMA_ACCESS_FLAGS_BIND_WINDOW : 0;
2143 hw_access |= (access & IB_ZERO_BASED) ?
2144 IRDMA_ACCESS_FLAGS_ZERO_BASED : 0;
2145 hw_access |= IRDMA_ACCESS_FLAGS_LOCALREAD;
2146
2147 return hw_access;
2148}
2149
2150/**
2151 * irdma_free_stag - free stag resource
2152 * @iwdev: irdma device
2153 * @stag: stag to free
2154 */
2155static void irdma_free_stag(struct irdma_device *iwdev, u32 stag)
2156{
2157 u32 stag_idx;
2158
2159 stag_idx = (stag & iwdev->rf->mr_stagmask) >> IRDMA_CQPSQ_STAG_IDX_S;
2160 irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_mrs, stag_idx);
2161}
2162
2163/**
2164 * irdma_create_stag - create random stag
2165 * @iwdev: irdma device
2166 */
2167static u32 irdma_create_stag(struct irdma_device *iwdev)
2168{
2169 u32 stag = 0;
2170 u32 stag_index = 0;
2171 u32 next_stag_index;
2172 u32 driver_key;
2173 u32 random;
2174 u8 consumer_key;
2175 int ret;
2176
2177 get_random_bytes(&random, sizeof(random));
2178 consumer_key = (u8)random;
2179
2180 driver_key = random & ~iwdev->rf->mr_stagmask;
2181 next_stag_index = (random & iwdev->rf->mr_stagmask) >> 8;
2182 next_stag_index %= iwdev->rf->max_mr;
2183
2184 ret = irdma_alloc_rsrc(iwdev->rf, iwdev->rf->allocated_mrs,
2185 iwdev->rf->max_mr, &stag_index,
2186 &next_stag_index);
2187 if (ret)
2188 return stag;
2189 stag = stag_index << IRDMA_CQPSQ_STAG_IDX_S;
2190 stag |= driver_key;
2191 stag += (u32)consumer_key;
2192
2193 return stag;
2194}
2195
2196/**
2197 * irdma_next_pbl_addr - Get next pbl address
2198 * @pbl: pointer to a pble
2199 * @pinfo: info pointer
2200 * @idx: index
2201 */
2202static inline u64 *irdma_next_pbl_addr(u64 *pbl, struct irdma_pble_info **pinfo,
2203 u32 *idx)
2204{
2205 *idx += 1;
2206 if (!(*pinfo) || *idx != (*pinfo)->cnt)
2207 return ++pbl;
2208 *idx = 0;
2209 (*pinfo)++;
2210
2db7b2ea 2211 return (*pinfo)->addr;
b48c24c2
MI		 2212}
2213
2214/**
2215 * irdma_copy_user_pgaddrs - copy user page address to pble's os locally
2216 * @iwmr: iwmr for IB's user page addresses
2217 * @pbl: ple pointer to save 1 level or 0 level pble
2218 * @level: indicated level 0, 1 or 2
2219 */
2220static void irdma_copy_user_pgaddrs(struct irdma_mr *iwmr, u64 *pbl,
2221 enum irdma_pble_level level)
2222{
2223 struct ib_umem *region = iwmr->region;
2224 struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2225 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2226 struct irdma_pble_info *pinfo;
2227 struct ib_block_iter biter;
2228 u32 idx = 0;
2229 u32 pbl_cnt = 0;
2230
2231 pinfo = (level == PBLE_LEVEL_1) ? NULL : palloc->level2.leaf;
2232
2233 if (iwmr->type == IRDMA_MEMREG_TYPE_QP)
2234 iwpbl->qp_mr.sq_page = sg_page(region->sg_head.sgl);
2235
2236 rdma_umem_for_each_dma_block(region, &biter, iwmr->page_size) {
2237 *pbl = rdma_block_iter_dma_address(&biter);
2238 if (++pbl_cnt == palloc->total_cnt)
2239 break;
2240 pbl = irdma_next_pbl_addr(pbl, &pinfo, &idx);
2241 }
2242}
2243
2244/**
2245 * irdma_check_mem_contiguous - check if pbls stored in arr are contiguous
2246 * @arr: lvl1 pbl array
2247 * @npages: page count
2248 * @pg_size: page size
2249 *
2250 */
2251static bool irdma_check_mem_contiguous(u64 *arr, u32 npages, u32 pg_size)
2252{
2253 u32 pg_idx;
2254
2255 for (pg_idx = 0; pg_idx < npages; pg_idx++) {
2256 if ((*arr + (pg_size * pg_idx)) != arr[pg_idx])
2257 return false;
2258 }
2259
2260 return true;
2261}
2262
2263/**
2264 * irdma_check_mr_contiguous - check if MR is physically contiguous
2265 * @palloc: pbl allocation struct
2266 * @pg_size: page size
2267 */
2268static bool irdma_check_mr_contiguous(struct irdma_pble_alloc *palloc,
2269 u32 pg_size)
2270{
2271 struct irdma_pble_level2 *lvl2 = &palloc->level2;
2272 struct irdma_pble_info *leaf = lvl2->leaf;
2273 u64 *arr = NULL;
2274 u64 *start_addr = NULL;
2275 int i;
2276 bool ret;
2277
2278 if (palloc->level == PBLE_LEVEL_1) {
2db7b2ea 2279 arr = palloc->level1.addr;
b48c24c2
MI		 2280 ret = irdma_check_mem_contiguous(arr, palloc->total_cnt,
2281 pg_size);
2282 return ret;
2283 }
2284
2db7b2ea 2285 start_addr = leaf->addr;
b48c24c2
MI		 2286
2287 for (i = 0; i < lvl2->leaf_cnt; i++, leaf++) {
2db7b2ea 2288 arr = leaf->addr;
b48c24c2
MI		 2289 if ((*start_addr + (i * pg_size * PBLE_PER_PAGE)) != *arr)
2290 return false;
2291 ret = irdma_check_mem_contiguous(arr, leaf->cnt, pg_size);
2292 if (!ret)
2293 return false;
2294 }
2295
2296 return true;
2297}
2298
2299/**
2300 * irdma_setup_pbles - copy user pg address to pble's
2301 * @rf: RDMA PCI function
2302 * @iwmr: mr pointer for this memory registration
2303 * @use_pbles: flag if to use pble's
2304 */
2305static int irdma_setup_pbles(struct irdma_pci_f *rf, struct irdma_mr *iwmr,
2306 bool use_pbles)
2307{
2308 struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2309 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2310 struct irdma_pble_info *pinfo;
2311 u64 *pbl;
2312 enum irdma_status_code status;
2313 enum irdma_pble_level level = PBLE_LEVEL_1;
2314
2315 if (use_pbles) {
2316 status = irdma_get_pble(rf->pble_rsrc, palloc, iwmr->page_cnt,
2317 false);
2318 if (status)
2319 return -ENOMEM;
2320
2321 iwpbl->pbl_allocated = true;
2322 level = palloc->level;
2323 pinfo = (level == PBLE_LEVEL_1) ? &palloc->level1 :
2324 palloc->level2.leaf;
2db7b2ea 2325 pbl = pinfo->addr;
b48c24c2
MI		 2326 } else {
2327 pbl = iwmr->pgaddrmem;
2328 }
2329
2330 irdma_copy_user_pgaddrs(iwmr, pbl, level);
2331
2332 if (use_pbles)
2333 iwmr->pgaddrmem[0] = *pbl;
2334
2335 return 0;
2336}
2337
2338/**
2339 * irdma_handle_q_mem - handle memory for qp and cq
2340 * @iwdev: irdma device
2341 * @req: information for q memory management
2342 * @iwpbl: pble struct
2343 * @use_pbles: flag to use pble
2344 */
2345static int irdma_handle_q_mem(struct irdma_device *iwdev,
2346 struct irdma_mem_reg_req *req,
2347 struct irdma_pbl *iwpbl, bool use_pbles)
2348{
2349 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2350 struct irdma_mr *iwmr = iwpbl->iwmr;
2351 struct irdma_qp_mr *qpmr = &iwpbl->qp_mr;
2352 struct irdma_cq_mr *cqmr = &iwpbl->cq_mr;
2353 struct irdma_hmc_pble *hmc_p;
2354 u64 *arr = iwmr->pgaddrmem;
46308965 2355 u32 pg_size, total;
b48c24c2 2356 int err = 0;
b48c24c2
MI		 2357 bool ret = true;
2358
b48c24c2
MI		 2359 pg_size = iwmr->page_size;
2360 err = irdma_setup_pbles(iwdev->rf, iwmr, use_pbles);
2361 if (err)
2362 return err;
2363
2364 if (use_pbles && palloc->level != PBLE_LEVEL_1) {
2365 irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
2366 iwpbl->pbl_allocated = false;
2367 return -ENOMEM;
2368 }
2369
2370 if (use_pbles)
2db7b2ea 2371 arr = palloc->level1.addr;
b48c24c2
MI		 2372
2373 switch (iwmr->type) {
2374 case IRDMA_MEMREG_TYPE_QP:
46308965 2375 total = req->sq_pages + req->rq_pages;
b48c24c2
MI		 2376 hmc_p = &qpmr->sq_pbl;
2377 qpmr->shadow = (dma_addr_t)arr[total];
2378
2379 if (use_pbles) {
2380 ret = irdma_check_mem_contiguous(arr, req->sq_pages,
2381 pg_size);
2382 if (ret)
2383 ret = irdma_check_mem_contiguous(&arr[req->sq_pages],
2384 req->rq_pages,
2385 pg_size);
2386 }
2387
2388 if (!ret) {
2389 hmc_p->idx = palloc->level1.idx;
2390 hmc_p = &qpmr->rq_pbl;
2391 hmc_p->idx = palloc->level1.idx + req->sq_pages;
2392 } else {
2393 hmc_p->addr = arr[0];
2394 hmc_p = &qpmr->rq_pbl;
2395 hmc_p->addr = arr[req->sq_pages];
2396 }
2397 break;
2398 case IRDMA_MEMREG_TYPE_CQ:
2399 hmc_p = &cqmr->cq_pbl;
2400
2401 if (!cqmr->split)
46308965 2402 cqmr->shadow = (dma_addr_t)arr[req->cq_pages];
b48c24c2
MI		 2403
2404 if (use_pbles)
2405 ret = irdma_check_mem_contiguous(arr, req->cq_pages,
2406 pg_size);
2407
2408 if (!ret)
2409 hmc_p->idx = palloc->level1.idx;
2410 else
2411 hmc_p->addr = arr[0];
2412 break;
2413 default:
2414 ibdev_dbg(&iwdev->ibdev, "VERBS: MR type error\n");
2415 err = -EINVAL;
2416 }
2417
2418 if (use_pbles && ret) {
2419 irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
2420 iwpbl->pbl_allocated = false;
2421 }
2422
2423 return err;
2424}
2425
2426/**
2427 * irdma_hw_alloc_mw - create the hw memory window
2428 * @iwdev: irdma device
2429 * @iwmr: pointer to memory window info
2430 */
2431static int irdma_hw_alloc_mw(struct irdma_device *iwdev, struct irdma_mr *iwmr)
2432{
2433 struct irdma_mw_alloc_info *info;
2434 struct irdma_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
2435 struct irdma_cqp_request *cqp_request;
2436 struct cqp_cmds_info *cqp_info;
2437 enum irdma_status_code status;
2438
2439 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
2440 if (!cqp_request)
2441 return -ENOMEM;
2442
2443 cqp_info = &cqp_request->info;
2444 info = &cqp_info->in.u.mw_alloc.info;
2445 memset(info, 0, sizeof(*info));
2446 if (iwmr->ibmw.type == IB_MW_TYPE_1)
2447 info->mw_wide = true;
2448
2449 info->page_size = PAGE_SIZE;
2450 info->mw_stag_index = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S;
2451 info->pd_id = iwpd->sc_pd.pd_id;
2452 info->remote_access = true;
2453 cqp_info->cqp_cmd = IRDMA_OP_MW_ALLOC;
2454 cqp_info->post_sq = 1;
2455 cqp_info->in.u.mw_alloc.dev = &iwdev->rf->sc_dev;
2456 cqp_info->in.u.mw_alloc.scratch = (uintptr_t)cqp_request;
2457 status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
2458 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
2459
2460 return status ? -ENOMEM : 0;
2461}
2462
2463/**
2464 * irdma_alloc_mw - Allocate memory window
2465 * @ibmw: Memory Window
2466 * @udata: user data pointer
2467 */
2468static int irdma_alloc_mw(struct ib_mw *ibmw, struct ib_udata *udata)
2469{
2470 struct irdma_device *iwdev = to_iwdev(ibmw->device);
2471 struct irdma_mr *iwmr = to_iwmw(ibmw);
2472 int err_code;
2473 u32 stag;
2474
2475 stag = irdma_create_stag(iwdev);
2476 if (!stag)
2477 return -ENOMEM;
2478
2479 iwmr->stag = stag;
2480 ibmw->rkey = stag;
2481
2482 err_code = irdma_hw_alloc_mw(iwdev, iwmr);
2483 if (err_code) {
2484 irdma_free_stag(iwdev, stag);
2485 return err_code;
2486 }
2487
2488 return 0;
2489}
2490
2491/**
2492 * irdma_dealloc_mw - Dealloc memory window
2493 * @ibmw: memory window structure.
2494 */
2495static int irdma_dealloc_mw(struct ib_mw *ibmw)
2496{
2497 struct ib_pd *ibpd = ibmw->pd;
2498 struct irdma_pd *iwpd = to_iwpd(ibpd);
2499 struct irdma_mr *iwmr = to_iwmr((struct ib_mr *)ibmw);
2500 struct irdma_device *iwdev = to_iwdev(ibmw->device);
2501 struct irdma_cqp_request *cqp_request;
2502 struct cqp_cmds_info *cqp_info;
2503 struct irdma_dealloc_stag_info *info;
2504
2505 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
2506 if (!cqp_request)
2507 return -ENOMEM;
2508
2509 cqp_info = &cqp_request->info;
2510 info = &cqp_info->in.u.dealloc_stag.info;
2511 memset(info, 0, sizeof(*info));
2512 info->pd_id = iwpd->sc_pd.pd_id & 0x00007fff;
2513 info->stag_idx = ibmw->rkey >> IRDMA_CQPSQ_STAG_IDX_S;
2514 info->mr = false;
2515 cqp_info->cqp_cmd = IRDMA_OP_DEALLOC_STAG;
2516 cqp_info->post_sq = 1;
2517 cqp_info->in.u.dealloc_stag.dev = &iwdev->rf->sc_dev;
2518 cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
2519 irdma_handle_cqp_op(iwdev->rf, cqp_request);
2520 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
2521 irdma_free_stag(iwdev, iwmr->stag);
2522
2523 return 0;
2524}
2525
2526/**
2527 * irdma_hw_alloc_stag - cqp command to allocate stag
2528 * @iwdev: irdma device
2529 * @iwmr: irdma mr pointer
2530 */
2531static int irdma_hw_alloc_stag(struct irdma_device *iwdev,
2532 struct irdma_mr *iwmr)
2533{
2534 struct irdma_allocate_stag_info *info;
2535 struct irdma_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
2536 enum irdma_status_code status;
2537 int err = 0;
2538 struct irdma_cqp_request *cqp_request;
2539 struct cqp_cmds_info *cqp_info;
2540
2541 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
2542 if (!cqp_request)
2543 return -ENOMEM;
2544
2545 cqp_info = &cqp_request->info;
2546 info = &cqp_info->in.u.alloc_stag.info;
2547 memset(info, 0, sizeof(*info));
2548 info->page_size = PAGE_SIZE;
2549 info->stag_idx = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S;
2550 info->pd_id = iwpd->sc_pd.pd_id;
2551 info->total_len = iwmr->len;
2552 info->remote_access = true;
2553 cqp_info->cqp_cmd = IRDMA_OP_ALLOC_STAG;
2554 cqp_info->post_sq = 1;
2555 cqp_info->in.u.alloc_stag.dev = &iwdev->rf->sc_dev;
2556 cqp_info->in.u.alloc_stag.scratch = (uintptr_t)cqp_request;
2557 status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
2558 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
2559 if (status)
2560 err = -ENOMEM;
2561
2562 return err;
2563}
2564
2565/**
2566 * irdma_alloc_mr - register stag for fast memory registration
2567 * @pd: ibpd pointer
2568 * @mr_type: memory for stag registrion
2569 * @max_num_sg: man number of pages
2570 */
2571static struct ib_mr *irdma_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type,
2572 u32 max_num_sg)
2573{
2574 struct irdma_device *iwdev = to_iwdev(pd->device);
2575 struct irdma_pble_alloc *palloc;
2576 struct irdma_pbl *iwpbl;
2577 struct irdma_mr *iwmr;
2578 enum irdma_status_code status;
2579 u32 stag;
2580 int err_code = -ENOMEM;
2581
2582 iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
2583 if (!iwmr)
2584 return ERR_PTR(-ENOMEM);
2585
2586 stag = irdma_create_stag(iwdev);
2587 if (!stag) {
2588 err_code = -ENOMEM;
2589 goto err;
2590 }
2591
2592 iwmr->stag = stag;
2593 iwmr->ibmr.rkey = stag;
2594 iwmr->ibmr.lkey = stag;
2595 iwmr->ibmr.pd = pd;
2596 iwmr->ibmr.device = pd->device;
2597 iwpbl = &iwmr->iwpbl;
2598 iwpbl->iwmr = iwmr;
2599 iwmr->type = IRDMA_MEMREG_TYPE_MEM;
2600 palloc = &iwpbl->pble_alloc;
2601 iwmr->page_cnt = max_num_sg;
2602 status = irdma_get_pble(iwdev->rf->pble_rsrc, palloc, iwmr->page_cnt,
2603 true);
2604 if (status)
2605 goto err_get_pble;
2606
2607 err_code = irdma_hw_alloc_stag(iwdev, iwmr);
2608 if (err_code)
2609 goto err_alloc_stag;
2610
2611 iwpbl->pbl_allocated = true;
2612
2613 return &iwmr->ibmr;
2614err_alloc_stag:
2615 irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
2616err_get_pble:
2617 irdma_free_stag(iwdev, stag);
2618err:
2619 kfree(iwmr);
2620
2621 return ERR_PTR(err_code);
2622}
2623
2624/**
2625 * irdma_set_page - populate pbl list for fmr
2626 * @ibmr: ib mem to access iwarp mr pointer
2627 * @addr: page dma address fro pbl list
2628 */
2629static int irdma_set_page(struct ib_mr *ibmr, u64 addr)
2630{
2631 struct irdma_mr *iwmr = to_iwmr(ibmr);
2632 struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2633 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2634 u64 *pbl;
2635
2636 if (unlikely(iwmr->npages == iwmr->page_cnt))
2637 return -ENOMEM;
2638
2db7b2ea 2639 pbl = palloc->level1.addr;
b48c24c2
MI		 2640 pbl[iwmr->npages++] = addr;
2641
2642 return 0;
2643}
2644
2645/**
2646 * irdma_map_mr_sg - map of sg list for fmr
2647 * @ibmr: ib mem to access iwarp mr pointer
2648 * @sg: scatter gather list
2649 * @sg_nents: number of sg pages
2650 * @sg_offset: scatter gather list for fmr
2651 */
2652static int irdma_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg,
2653 int sg_nents, unsigned int *sg_offset)
2654{
2655 struct irdma_mr *iwmr = to_iwmr(ibmr);
2656
2657 iwmr->npages = 0;
2658
2659 return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, irdma_set_page);
2660}
2661
2662/**
2663 * irdma_hwreg_mr - send cqp command for memory registration
2664 * @iwdev: irdma device
2665 * @iwmr: irdma mr pointer
2666 * @access: access for MR
2667 */
2668static int irdma_hwreg_mr(struct irdma_device *iwdev, struct irdma_mr *iwmr,
2669 u16 access)
2670{
2671 struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2672 struct irdma_reg_ns_stag_info *stag_info;
2673 struct irdma_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
2674 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2675 enum irdma_status_code status;
2676 int err = 0;
2677 struct irdma_cqp_request *cqp_request;
2678 struct cqp_cmds_info *cqp_info;
2679
2680 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
2681 if (!cqp_request)
2682 return -ENOMEM;
2683
2684 cqp_info = &cqp_request->info;
2685 stag_info = &cqp_info->in.u.mr_reg_non_shared.info;
2686 memset(stag_info, 0, sizeof(*stag_info));
2687 stag_info->va = iwpbl->user_base;
2688 stag_info->stag_idx = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S;
2689 stag_info->stag_key = (u8)iwmr->stag;
2690 stag_info->total_len = iwmr->len;
2691 stag_info->access_rights = irdma_get_mr_access(access);
2692 stag_info->pd_id = iwpd->sc_pd.pd_id;
2693 if (stag_info->access_rights & IRDMA_ACCESS_FLAGS_ZERO_BASED)
2694 stag_info->addr_type = IRDMA_ADDR_TYPE_ZERO_BASED;
2695 else
2696 stag_info->addr_type = IRDMA_ADDR_TYPE_VA_BASED;
2697 stag_info->page_size = iwmr->page_size;
2698
2699 if (iwpbl->pbl_allocated) {
2700 if (palloc->level == PBLE_LEVEL_1) {
2701 stag_info->first_pm_pbl_index = palloc->level1.idx;
2702 stag_info->chunk_size = 1;
2703 } else {
2704 stag_info->first_pm_pbl_index = palloc->level2.root.idx;
2705 stag_info->chunk_size = 3;
2706 }
2707 } else {
2708 stag_info->reg_addr_pa = iwmr->pgaddrmem[0];
2709 }
2710
2711 cqp_info->cqp_cmd = IRDMA_OP_MR_REG_NON_SHARED;
2712 cqp_info->post_sq = 1;
2713 cqp_info->in.u.mr_reg_non_shared.dev = &iwdev->rf->sc_dev;
2714 cqp_info->in.u.mr_reg_non_shared.scratch = (uintptr_t)cqp_request;
2715 status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
2716 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
2717 if (status)
2718 err = -ENOMEM;
2719
2720 return err;
2721}
2722
2723/**
2724 * irdma_reg_user_mr - Register a user memory region
2725 * @pd: ptr of pd
2726 * @start: virtual start address
2727 * @len: length of mr
2728 * @virt: virtual address
2729 * @access: access of mr
2730 * @udata: user data
2731 */
2732static struct ib_mr *irdma_reg_user_mr(struct ib_pd *pd, u64 start, u64 len,
2733 u64 virt, int access,
2734 struct ib_udata *udata)
2735{
2736 struct irdma_device *iwdev = to_iwdev(pd->device);
2737 struct irdma_ucontext *ucontext;
2738 struct irdma_pble_alloc *palloc;
2739 struct irdma_pbl *iwpbl;
2740 struct irdma_mr *iwmr;
2741 struct ib_umem *region;
2742 struct irdma_mem_reg_req req;
46308965
SS		 2743 u32 total, stag = 0;
2744 u8 shadow_pgcnt = 1;
b48c24c2
MI		 2745 bool use_pbles = false;
2746 unsigned long flags;
2747 int err = -EINVAL;
2748 int ret;
2749
2750 if (len > iwdev->rf->sc_dev.hw_attrs.max_mr_size)
2751 return ERR_PTR(-EINVAL);
2752
2753 region = ib_umem_get(pd->device, start, len, access);
2754
2755 if (IS_ERR(region)) {
2756 ibdev_dbg(&iwdev->ibdev,
2757 "VERBS: Failed to create ib_umem region\n");
2758 return (struct ib_mr *)region;
2759 }
2760
2761 if (ib_copy_from_udata(&req, udata, min(sizeof(req), udata->inlen))) {
2762 ib_umem_release(region);
2763 return ERR_PTR(-EFAULT);
2764 }
2765
2766 iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
2767 if (!iwmr) {
2768 ib_umem_release(region);
2769 return ERR_PTR(-ENOMEM);
2770 }
2771
2772 iwpbl = &iwmr->iwpbl;
2773 iwpbl->iwmr = iwmr;
2774 iwmr->region = region;
2775 iwmr->ibmr.pd = pd;
2776 iwmr->ibmr.device = pd->device;
2777 iwmr->ibmr.iova = virt;
2778 iwmr->page_size = PAGE_SIZE;
2779
c4eb44ff 2780 if (req.reg_type == IRDMA_MEMREG_TYPE_MEM) {
b48c24c2
MI		 2781 iwmr->page_size = ib_umem_find_best_pgsz(region,
2782 SZ_4K | SZ_2M | SZ_1G,
2783 virt);
c4eb44ff
SS		 2784 if (unlikely(!iwmr->page_size)) {
2785 kfree(iwmr);
2786 ib_umem_release(region);
2787 return ERR_PTR(-EOPNOTSUPP);
2788 }
2789 }
b48c24c2
MI		 2790 iwmr->len = region->length;
2791 iwpbl->user_base = virt;
2792 palloc = &iwpbl->pble_alloc;
2793 iwmr->type = req.reg_type;
2794 iwmr->page_cnt = ib_umem_num_dma_blocks(region, iwmr->page_size);
2795
2796 switch (req.reg_type) {
2797 case IRDMA_MEMREG_TYPE_QP:
46308965
SS		 2798 total = req.sq_pages + req.rq_pages + shadow_pgcnt;
2799 if (total > iwmr->page_cnt) {
2800 err = -EINVAL;
2801 goto error;
2802 }
2803 total = req.sq_pages + req.rq_pages;
2804 use_pbles = (total > 2);
b48c24c2
MI		 2805 err = irdma_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
2806 if (err)
2807 goto error;
2808
2809 ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext,
2810 ibucontext);
2811 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
2812 list_add_tail(&iwpbl->list, &ucontext->qp_reg_mem_list);
2813 iwpbl->on_list = true;
2814 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
2815 break;
2816 case IRDMA_MEMREG_TYPE_CQ:
46308965
SS		 2817 if (iwdev->rf->sc_dev.hw_attrs.uk_attrs.feature_flags & IRDMA_FEATURE_CQ_RESIZE)
2818 shadow_pgcnt = 0;
2819 total = req.cq_pages + shadow_pgcnt;
2820 if (total > iwmr->page_cnt) {
2821 err = -EINVAL;
2822 goto error;
2823 }
2824
b48c24c2
MI		 2825 use_pbles = (req.cq_pages > 1);
2826 err = irdma_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
2827 if (err)
2828 goto error;
2829
2830 ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext,
2831 ibucontext);
2832 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2833 list_add_tail(&iwpbl->list, &ucontext->cq_reg_mem_list);
2834 iwpbl->on_list = true;
2835 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2836 break;
2837 case IRDMA_MEMREG_TYPE_MEM:
2838 use_pbles = (iwmr->page_cnt != 1);
2839
2840 err = irdma_setup_pbles(iwdev->rf, iwmr, use_pbles);
2841 if (err)
2842 goto error;
2843
2844 if (use_pbles) {
2845 ret = irdma_check_mr_contiguous(palloc,
2846 iwmr->page_size);
2847 if (ret) {
2848 irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
2849 iwpbl->pbl_allocated = false;
2850 }
2851 }
2852
2853 stag = irdma_create_stag(iwdev);
2854 if (!stag) {
2855 err = -ENOMEM;
2856 goto error;
2857 }
2858
2859 iwmr->stag = stag;
2860 iwmr->ibmr.rkey = stag;
2861 iwmr->ibmr.lkey = stag;
2862 err = irdma_hwreg_mr(iwdev, iwmr, access);
2863 if (err) {
2864 irdma_free_stag(iwdev, stag);
2865 goto error;
2866 }
2867
2868 break;
2869 default:
2870 goto error;
2871 }
2872
2873 iwmr->type = req.reg_type;
2874
2875 return &iwmr->ibmr;
2876
2877error:
2878 if (palloc->level != PBLE_LEVEL_0 && iwpbl->pbl_allocated)
2879 irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
2880 ib_umem_release(region);
2881 kfree(iwmr);
2882
2883 return ERR_PTR(err);
2884}
2885
2886/**
2887 * irdma_reg_phys_mr - register kernel physical memory
2888 * @pd: ibpd pointer
2889 * @addr: physical address of memory to register
2890 * @size: size of memory to register
2891 * @access: Access rights
2892 * @iova_start: start of virtual address for physical buffers
2893 */
2894struct ib_mr *irdma_reg_phys_mr(struct ib_pd *pd, u64 addr, u64 size, int access,
2895 u64 *iova_start)
2896{
2897 struct irdma_device *iwdev = to_iwdev(pd->device);
2898 struct irdma_pbl *iwpbl;
2899 struct irdma_mr *iwmr;
2900 enum irdma_status_code status;
2901 u32 stag;
2902 int ret;
2903
2904 iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
2905 if (!iwmr)
2906 return ERR_PTR(-ENOMEM);
2907
2908 iwmr->ibmr.pd = pd;
2909 iwmr->ibmr.device = pd->device;
2910 iwpbl = &iwmr->iwpbl;
2911 iwpbl->iwmr = iwmr;
2912 iwmr->type = IRDMA_MEMREG_TYPE_MEM;
2913 iwpbl->user_base = *iova_start;
2914 stag = irdma_create_stag(iwdev);
2915 if (!stag) {
2916 ret = -ENOMEM;
2917 goto err;
2918 }
2919
2920 iwmr->stag = stag;
2921 iwmr->ibmr.iova = *iova_start;
2922 iwmr->ibmr.rkey = stag;
2923 iwmr->ibmr.lkey = stag;
2924 iwmr->page_cnt = 1;
2925 iwmr->pgaddrmem[0] = addr;
2926 iwmr->len = size;
2927 iwmr->page_size = SZ_4K;
2928 status = irdma_hwreg_mr(iwdev, iwmr, access);
2929 if (status) {
2930 irdma_free_stag(iwdev, stag);
2931 ret = -ENOMEM;
2932 goto err;
2933 }
2934
2935 return &iwmr->ibmr;
2936
2937err:
2938 kfree(iwmr);
2939
2940 return ERR_PTR(ret);
2941}
2942
2943/**
2944 * irdma_get_dma_mr - register physical mem
2945 * @pd: ptr of pd
2946 * @acc: access for memory
2947 */
2948static struct ib_mr *irdma_get_dma_mr(struct ib_pd *pd, int acc)
2949{
2950 u64 kva = 0;
2951
2952 return irdma_reg_phys_mr(pd, 0, 0, acc, &kva);
2953}
2954
2955/**
2956 * irdma_del_memlist - Deleting pbl list entries for CQ/QP
2957 * @iwmr: iwmr for IB's user page addresses
2958 * @ucontext: ptr to user context
2959 */
2960static void irdma_del_memlist(struct irdma_mr *iwmr,
2961 struct irdma_ucontext *ucontext)
2962{
2963 struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2964 unsigned long flags;
2965
2966 switch (iwmr->type) {
2967 case IRDMA_MEMREG_TYPE_CQ:
2968 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2969 if (iwpbl->on_list) {
2970 iwpbl->on_list = false;
2971 list_del(&iwpbl->list);
2972 }
2973 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2974 break;
2975 case IRDMA_MEMREG_TYPE_QP:
2976 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
2977 if (iwpbl->on_list) {
2978 iwpbl->on_list = false;
2979 list_del(&iwpbl->list);
2980 }
2981 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
2982 break;
2983 default:
2984 break;
2985 }
2986}
2987
2988/**
2989 * irdma_dereg_mr - deregister mr
2990 * @ib_mr: mr ptr for dereg
2991 * @udata: user data
2992 */
2993static int irdma_dereg_mr(struct ib_mr *ib_mr, struct ib_udata *udata)
2994{
2995 struct ib_pd *ibpd = ib_mr->pd;
2996 struct irdma_pd *iwpd = to_iwpd(ibpd);
2997 struct irdma_mr *iwmr = to_iwmr(ib_mr);
2998 struct irdma_device *iwdev = to_iwdev(ib_mr->device);
2999 struct irdma_dealloc_stag_info *info;
3000 struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3001 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
3002 struct irdma_cqp_request *cqp_request;
3003 struct cqp_cmds_info *cqp_info;
3004
3005 if (iwmr->type != IRDMA_MEMREG_TYPE_MEM) {
3006 if (iwmr->region) {
3007 struct irdma_ucontext *ucontext;
3008
3009 ucontext = rdma_udata_to_drv_context(udata,
3010 struct irdma_ucontext,
3011 ibucontext);
3012 irdma_del_memlist(iwmr, ucontext);
3013 }
3014 goto done;
3015 }
3016
3017 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
3018 if (!cqp_request)
3019 return -ENOMEM;
3020
3021 cqp_info = &cqp_request->info;
3022 info = &cqp_info->in.u.dealloc_stag.info;
3023 memset(info, 0, sizeof(*info));
3024 info->pd_id = iwpd->sc_pd.pd_id & 0x00007fff;
3025 info->stag_idx = ib_mr->rkey >> IRDMA_CQPSQ_STAG_IDX_S;
3026 info->mr = true;
3027 if (iwpbl->pbl_allocated)
3028 info->dealloc_pbl = true;
3029
3030 cqp_info->cqp_cmd = IRDMA_OP_DEALLOC_STAG;
3031 cqp_info->post_sq = 1;
3032 cqp_info->in.u.dealloc_stag.dev = &iwdev->rf->sc_dev;
3033 cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
3034 irdma_handle_cqp_op(iwdev->rf, cqp_request);
3035 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
3036 irdma_free_stag(iwdev, iwmr->stag);
3037done:
3038 if (iwpbl->pbl_allocated)
3039 irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
3040 ib_umem_release(iwmr->region);
3041 kfree(iwmr);
3042
3043 return 0;
3044}
3045
3046/**
3047 * irdma_copy_sg_list - copy sg list for qp
3048 * @sg_list: copied into sg_list
3049 * @sgl: copy from sgl
3050 * @num_sges: count of sg entries
3051 */
3052static void irdma_copy_sg_list(struct irdma_sge *sg_list, struct ib_sge *sgl,
3053 int num_sges)
3054{
3055 unsigned int i;
3056
3057 for (i = 0; (i < num_sges) && (i < IRDMA_MAX_WQ_FRAGMENT_COUNT); i++) {
3058 sg_list[i].tag_off = sgl[i].addr;
3059 sg_list[i].len = sgl[i].length;
3060 sg_list[i].stag = sgl[i].lkey;
3061 }
3062}
3063
3064/**
3065 * irdma_post_send - kernel application wr
3066 * @ibqp: qp ptr for wr
3067 * @ib_wr: work request ptr
3068 * @bad_wr: return of bad wr if err
3069 */
3070static int irdma_post_send(struct ib_qp *ibqp,
3071 const struct ib_send_wr *ib_wr,
3072 const struct ib_send_wr **bad_wr)
3073{
3074 struct irdma_qp *iwqp;
3075 struct irdma_qp_uk *ukqp;
3076 struct irdma_sc_dev *dev;
3077 struct irdma_post_sq_info info;
3078 enum irdma_status_code ret;
3079 int err = 0;
3080 unsigned long flags;
3081 bool inv_stag;
3082 struct irdma_ah *ah;
3083 bool reflush = false;
3084
3085 iwqp = to_iwqp(ibqp);
3086 ukqp = &iwqp->sc_qp.qp_uk;
3087 dev = &iwqp->iwdev->rf->sc_dev;
3088
3089 spin_lock_irqsave(&iwqp->lock, flags);
3090 if (iwqp->flush_issued && ukqp->sq_flush_complete)
3091 reflush = true;
3092 while (ib_wr) {
3093 memset(&info, 0, sizeof(info));
3094 inv_stag = false;
3095 info.wr_id = (ib_wr->wr_id);
3096 if ((ib_wr->send_flags & IB_SEND_SIGNALED) || iwqp->sig_all)
3097 info.signaled = true;
3098 if (ib_wr->send_flags & IB_SEND_FENCE)
3099 info.read_fence = true;
3100 switch (ib_wr->opcode) {
3101 case IB_WR_SEND_WITH_IMM:
3102 if (ukqp->qp_caps & IRDMA_SEND_WITH_IMM) {
3103 info.imm_data_valid = true;
3104 info.imm_data = ntohl(ib_wr->ex.imm_data);
3105 } else {
3106 err = -EINVAL;
3107 break;
3108 }
3109 fallthrough;
3110 case IB_WR_SEND:
3111 case IB_WR_SEND_WITH_INV:
3112 if (ib_wr->opcode == IB_WR_SEND ||
3113 ib_wr->opcode == IB_WR_SEND_WITH_IMM) {
3114 if (ib_wr->send_flags & IB_SEND_SOLICITED)
3115 info.op_type = IRDMA_OP_TYPE_SEND_SOL;
3116 else
3117 info.op_type = IRDMA_OP_TYPE_SEND;
3118 } else {
3119 if (ib_wr->send_flags & IB_SEND_SOLICITED)
3120 info.op_type = IRDMA_OP_TYPE_SEND_SOL_INV;
3121 else
3122 info.op_type = IRDMA_OP_TYPE_SEND_INV;
3123 info.stag_to_inv = ib_wr->ex.invalidate_rkey;
3124 }
3125
3126 if (ib_wr->send_flags & IB_SEND_INLINE) {
3127 info.op.inline_send.data = (void *)(unsigned long)
3128 ib_wr->sg_list[0].addr;
3129 info.op.inline_send.len = ib_wr->sg_list[0].length;
3130 if (iwqp->ibqp.qp_type == IB_QPT_UD ||
3131 iwqp->ibqp.qp_type == IB_QPT_GSI) {
3132 ah = to_iwah(ud_wr(ib_wr)->ah);
3133 info.op.inline_send.ah_id = ah->sc_ah.ah_info.ah_idx;
3134 info.op.inline_send.qkey = ud_wr(ib_wr)->remote_qkey;
3135 info.op.inline_send.dest_qp = ud_wr(ib_wr)->remote_qpn;
3136 }
3137 ret = irdma_uk_inline_send(ukqp, &info, false);
3138 } else {
3139 info.op.send.num_sges = ib_wr->num_sge;
3140 info.op.send.sg_list = (struct irdma_sge *)
3141 ib_wr->sg_list;
3142 if (iwqp->ibqp.qp_type == IB_QPT_UD ||
3143 iwqp->ibqp.qp_type == IB_QPT_GSI) {
3144 ah = to_iwah(ud_wr(ib_wr)->ah);
3145 info.op.send.ah_id = ah->sc_ah.ah_info.ah_idx;
3146 info.op.send.qkey = ud_wr(ib_wr)->remote_qkey;
3147 info.op.send.dest_qp = ud_wr(ib_wr)->remote_qpn;
3148 }
3149 ret = irdma_uk_send(ukqp, &info, false);
3150 }
3151
3152 if (ret) {
3153 if (ret == IRDMA_ERR_QP_TOOMANY_WRS_POSTED)
3154 err = -ENOMEM;
3155 else
3156 err = -EINVAL;
3157 }
3158 break;
3159 case IB_WR_RDMA_WRITE_WITH_IMM:
3160 if (ukqp->qp_caps & IRDMA_WRITE_WITH_IMM) {
3161 info.imm_data_valid = true;
3162 info.imm_data = ntohl(ib_wr->ex.imm_data);
3163 } else {
3164 err = -EINVAL;
3165 break;
3166 }
3167 fallthrough;
3168 case IB_WR_RDMA_WRITE:
3169 if (ib_wr->send_flags & IB_SEND_SOLICITED)
3170 info.op_type = IRDMA_OP_TYPE_RDMA_WRITE_SOL;
3171 else
3172 info.op_type = IRDMA_OP_TYPE_RDMA_WRITE;
3173
3174 if (ib_wr->send_flags & IB_SEND_INLINE) {
3175 info.op.inline_rdma_write.data = (void *)(uintptr_t)ib_wr->sg_list[0].addr;
3176 info.op.inline_rdma_write.len = ib_wr->sg_list[0].length;
3177 info.op.inline_rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
3178 info.op.inline_rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
3179 ret = irdma_uk_inline_rdma_write(ukqp, &info, false);
3180 } else {
3181 info.op.rdma_write.lo_sg_list = (void *)ib_wr->sg_list;
3182 info.op.rdma_write.num_lo_sges = ib_wr->num_sge;
3183 info.op.rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
3184 info.op.rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
3185 ret = irdma_uk_rdma_write(ukqp, &info, false);
3186 }
3187
3188 if (ret) {
3189 if (ret == IRDMA_ERR_QP_TOOMANY_WRS_POSTED)
3190 err = -ENOMEM;
3191 else
3192 err = -EINVAL;
3193 }
3194 break;
3195 case IB_WR_RDMA_READ_WITH_INV:
3196 inv_stag = true;
3197 fallthrough;
3198 case IB_WR_RDMA_READ:
3199 if (ib_wr->num_sge >
3200 dev->hw_attrs.uk_attrs.max_hw_read_sges) {
3201 err = -EINVAL;
3202 break;
3203 }
3204 info.op_type = IRDMA_OP_TYPE_RDMA_READ;
3205 info.op.rdma_read.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
3206 info.op.rdma_read.rem_addr.stag = rdma_wr(ib_wr)->rkey;
3207 info.op.rdma_read.lo_sg_list = (void *)ib_wr->sg_list;
3208 info.op.rdma_read.num_lo_sges = ib_wr->num_sge;
3209
3210 ret = irdma_uk_rdma_read(ukqp, &info, inv_stag, false);
3211 if (ret) {
3212 if (ret == IRDMA_ERR_QP_TOOMANY_WRS_POSTED)
3213 err = -ENOMEM;
3214 else
3215 err = -EINVAL;
3216 }
3217 break;
3218 case IB_WR_LOCAL_INV:
3219 info.op_type = IRDMA_OP_TYPE_INV_STAG;
3220 info.op.inv_local_stag.target_stag = ib_wr->ex.invalidate_rkey;
3221 ret = irdma_uk_stag_local_invalidate(ukqp, &info, true);
3222 if (ret)
3223 err = -ENOMEM;
3224 break;
3225 case IB_WR_REG_MR: {
3226 struct irdma_mr *iwmr = to_iwmr(reg_wr(ib_wr)->mr);
3227 struct irdma_pble_alloc *palloc = &iwmr->iwpbl.pble_alloc;
3228 struct irdma_fast_reg_stag_info stag_info = {};
3229
3230 stag_info.signaled = info.signaled;
3231 stag_info.read_fence = info.read_fence;
3232 stag_info.access_rights = irdma_get_mr_access(reg_wr(ib_wr)->access);
3233 stag_info.stag_key = reg_wr(ib_wr)->key & 0xff;
3234 stag_info.stag_idx = reg_wr(ib_wr)->key >> 8;
3235 stag_info.page_size = reg_wr(ib_wr)->mr->page_size;
3236 stag_info.wr_id = ib_wr->wr_id;
3237 stag_info.addr_type = IRDMA_ADDR_TYPE_VA_BASED;
3238 stag_info.va = (void *)(uintptr_t)iwmr->ibmr.iova;
3239 stag_info.total_len = iwmr->ibmr.length;
2db7b2ea 3240 stag_info.reg_addr_pa = *palloc->level1.addr;
b48c24c2
MI		 3241 stag_info.first_pm_pbl_index = palloc->level1.idx;
3242 stag_info.local_fence = ib_wr->send_flags & IB_SEND_FENCE;
3243 if (iwmr->npages > IRDMA_MIN_PAGES_PER_FMR)
3244 stag_info.chunk_size = 1;
3245 ret = irdma_sc_mr_fast_register(&iwqp->sc_qp, &stag_info,
3246 true);
3247 if (ret)
3248 err = -ENOMEM;
3249 break;
3250 }
3251 default:
3252 err = -EINVAL;
3253 ibdev_dbg(&iwqp->iwdev->ibdev,
3254 "VERBS: upost_send bad opcode = 0x%x\n",
3255 ib_wr->opcode);
3256 break;
3257 }
3258
3259 if (err)
3260 break;
3261 ib_wr = ib_wr->next;
3262 }
3263
3264 if (!iwqp->flush_issued && iwqp->hw_iwarp_state <= IRDMA_QP_STATE_RTS) {
3265 irdma_uk_qp_post_wr(ukqp);
3266 spin_unlock_irqrestore(&iwqp->lock, flags);
3267 } else if (reflush) {
3268 ukqp->sq_flush_complete = false;
3269 spin_unlock_irqrestore(&iwqp->lock, flags);
3270 irdma_flush_wqes(iwqp, IRDMA_FLUSH_SQ | IRDMA_REFLUSH);
3271 } else {
3272 spin_unlock_irqrestore(&iwqp->lock, flags);
3273 }
3274 if (err)
3275 *bad_wr = ib_wr;
3276
3277 return err;
3278}
3279
3280/**
3281 * irdma_post_recv - post receive wr for kernel application
3282 * @ibqp: ib qp pointer
3283 * @ib_wr: work request for receive
3284 * @bad_wr: bad wr caused an error
3285 */
3286static int irdma_post_recv(struct ib_qp *ibqp,
3287 const struct ib_recv_wr *ib_wr,
3288 const struct ib_recv_wr **bad_wr)
3289{
3290 struct irdma_qp *iwqp;
3291 struct irdma_qp_uk *ukqp;
3292 struct irdma_post_rq_info post_recv = {};
3293 struct irdma_sge sg_list[IRDMA_MAX_WQ_FRAGMENT_COUNT];
3294 enum irdma_status_code ret = 0;
3295 unsigned long flags;
3296 int err = 0;
3297 bool reflush = false;
3298
3299 iwqp = to_iwqp(ibqp);
3300 ukqp = &iwqp->sc_qp.qp_uk;
3301
3302 spin_lock_irqsave(&iwqp->lock, flags);
3303 if (iwqp->flush_issued && ukqp->rq_flush_complete)
3304 reflush = true;
3305 while (ib_wr) {
3306 post_recv.num_sges = ib_wr->num_sge;
3307 post_recv.wr_id = ib_wr->wr_id;
3308 irdma_copy_sg_list(sg_list, ib_wr->sg_list, ib_wr->num_sge);
3309 post_recv.sg_list = sg_list;
3310 ret = irdma_uk_post_receive(ukqp, &post_recv);
3311 if (ret) {
3312 ibdev_dbg(&iwqp->iwdev->ibdev,
3313 "VERBS: post_recv err %d\n", ret);
3314 if (ret == IRDMA_ERR_QP_TOOMANY_WRS_POSTED)
3315 err = -ENOMEM;
3316 else
3317 err = -EINVAL;
3318 goto out;
3319 }
3320
3321 ib_wr = ib_wr->next;
3322 }
3323
3324out:
3325 if (reflush) {
3326 ukqp->rq_flush_complete = false;
3327 spin_unlock_irqrestore(&iwqp->lock, flags);
3328 irdma_flush_wqes(iwqp, IRDMA_FLUSH_RQ | IRDMA_REFLUSH);
3329 } else {
3330 spin_unlock_irqrestore(&iwqp->lock, flags);
3331 }
3332
3333 if (err)
3334 *bad_wr = ib_wr;
3335
3336 return err;
3337}
3338
3339/**
3340 * irdma_flush_err_to_ib_wc_status - return change flush error code to IB status
3341 * @opcode: iwarp flush code
3342 */
3343static enum ib_wc_status irdma_flush_err_to_ib_wc_status(enum irdma_flush_opcode opcode)
3344{
3345 switch (opcode) {
3346 case FLUSH_PROT_ERR:
3347 return IB_WC_LOC_PROT_ERR;
3348 case FLUSH_REM_ACCESS_ERR:
3349 return IB_WC_REM_ACCESS_ERR;
3350 case FLUSH_LOC_QP_OP_ERR:
3351 return IB_WC_LOC_QP_OP_ERR;
3352 case FLUSH_REM_OP_ERR:
3353 return IB_WC_REM_OP_ERR;
3354 case FLUSH_LOC_LEN_ERR:
3355 return IB_WC_LOC_LEN_ERR;
3356 case FLUSH_GENERAL_ERR:
3357 return IB_WC_WR_FLUSH_ERR;
3358 case FLUSH_FATAL_ERR:
3359 default:
3360 return IB_WC_FATAL_ERR;
3361 }
3362}
3363
3364/**
3365 * irdma_process_cqe - process cqe info
3366 * @entry: processed cqe
3367 * @cq_poll_info: cqe info
3368 */
3369static void irdma_process_cqe(struct ib_wc *entry,
3370 struct irdma_cq_poll_info *cq_poll_info)
3371{
3372 struct irdma_qp *iwqp;
3373 struct irdma_sc_qp *qp;
3374
3375 entry->wc_flags = 0;
3376 entry->pkey_index = 0;
3377 entry->wr_id = cq_poll_info->wr_id;
3378
3379 qp = cq_poll_info->qp_handle;
3380 iwqp = qp->qp_uk.back_qp;
3381 entry->qp = qp->qp_uk.back_qp;
3382
3383 if (cq_poll_info->error) {
3384 entry->status = (cq_poll_info->comp_status == IRDMA_COMPL_STATUS_FLUSHED) ?
3385 irdma_flush_err_to_ib_wc_status(cq_poll_info->minor_err) : IB_WC_GENERAL_ERR;
3386
3387 entry->vendor_err = cq_poll_info->major_err << 16 |
3388 cq_poll_info->minor_err;
3389 } else {
3390 entry->status = IB_WC_SUCCESS;
3391 if (cq_poll_info->imm_valid) {
3392 entry->ex.imm_data = htonl(cq_poll_info->imm_data);
3393 entry->wc_flags |= IB_WC_WITH_IMM;
3394 }
3395 if (cq_poll_info->ud_smac_valid) {
3396 ether_addr_copy(entry->smac, cq_poll_info->ud_smac);
3397 entry->wc_flags |= IB_WC_WITH_SMAC;
3398 }
3399
3400 if (cq_poll_info->ud_vlan_valid) {
3401 entry->vlan_id = cq_poll_info->ud_vlan & VLAN_VID_MASK;
3402 entry->wc_flags |= IB_WC_WITH_VLAN;
3403 entry->sl = cq_poll_info->ud_vlan >> VLAN_PRIO_SHIFT;
3404 } else {
3405 entry->sl = 0;
3406 }
3407 }
3408
3409 switch (cq_poll_info->op_type) {
3410 case IRDMA_OP_TYPE_RDMA_WRITE:
3411 case IRDMA_OP_TYPE_RDMA_WRITE_SOL:
3412 entry->opcode = IB_WC_RDMA_WRITE;
3413 break;
3414 case IRDMA_OP_TYPE_RDMA_READ_INV_STAG:
3415 case IRDMA_OP_TYPE_RDMA_READ:
3416 entry->opcode = IB_WC_RDMA_READ;
3417 break;
3418 case IRDMA_OP_TYPE_SEND_INV:
3419 case IRDMA_OP_TYPE_SEND_SOL:
3420 case IRDMA_OP_TYPE_SEND_SOL_INV:
3421 case IRDMA_OP_TYPE_SEND:
3422 entry->opcode = IB_WC_SEND;
3423 break;
3424 case IRDMA_OP_TYPE_FAST_REG_NSMR:
3425 entry->opcode = IB_WC_REG_MR;
3426 break;
3427 case IRDMA_OP_TYPE_INV_STAG:
3428 entry->opcode = IB_WC_LOCAL_INV;
3429 break;
3430 case IRDMA_OP_TYPE_REC_IMM:
3431 case IRDMA_OP_TYPE_REC:
3432 entry->opcode = cq_poll_info->op_type == IRDMA_OP_TYPE_REC_IMM ?
3433 IB_WC_RECV_RDMA_WITH_IMM : IB_WC_RECV;
3434 if (qp->qp_uk.qp_type != IRDMA_QP_TYPE_ROCE_UD &&
3435 cq_poll_info->stag_invalid_set) {
3436 entry->ex.invalidate_rkey = cq_poll_info->inv_stag;
3437 entry->wc_flags |= IB_WC_WITH_INVALIDATE;
3438 }
3439 break;
3440 default:
3441 ibdev_err(&iwqp->iwdev->ibdev,
3442 "Invalid opcode = %d in CQE\n", cq_poll_info->op_type);
3443 entry->status = IB_WC_GENERAL_ERR;
3444 return;
3445 }
3446
3447 if (qp->qp_uk.qp_type == IRDMA_QP_TYPE_ROCE_UD) {
3448 entry->src_qp = cq_poll_info->ud_src_qpn;
3449 entry->slid = 0;
3450 entry->wc_flags |=
3451 (IB_WC_GRH | IB_WC_WITH_NETWORK_HDR_TYPE);
3452 entry->network_hdr_type = cq_poll_info->ipv4 ?
3453 RDMA_NETWORK_IPV4 :
3454 RDMA_NETWORK_IPV6;
3455 } else {
3456 entry->src_qp = cq_poll_info->qp_id;
3457 }
3458
1b01a42c 3459 entry->byte_len = cq_poll_info->bytes_xfered;
b48c24c2
MI		 3460}
3461
3462/**
3463 * irdma_poll_one - poll one entry of the CQ
3464 * @ukcq: ukcq to poll
3465 * @cur_cqe: current CQE info to be filled in
3466 * @entry: ibv_wc object to be filled for non-extended CQ or NULL for extended CQ
3467 *
3468 * Returns the internal irdma device error code or 0 on success
3469 */
3470static inline int irdma_poll_one(struct irdma_cq_uk *ukcq,
3471 struct irdma_cq_poll_info *cur_cqe,
3472 struct ib_wc *entry)
3473{
3474 int ret = irdma_uk_cq_poll_cmpl(ukcq, cur_cqe);
3475
3476 if (ret)
3477 return ret;
3478
3479 irdma_process_cqe(entry, cur_cqe);
3480
3481 return 0;
3482}
3483
3484/**
3485 * __irdma_poll_cq - poll cq for completion (kernel apps)
3486 * @iwcq: cq to poll
3487 * @num_entries: number of entries to poll
3488 * @entry: wr of a completed entry
3489 */
3490static int __irdma_poll_cq(struct irdma_cq *iwcq, int num_entries, struct ib_wc *entry)
3491{
3492 struct list_head *tmp_node, *list_node;
3493 struct irdma_cq_buf *last_buf = NULL;
3494 struct irdma_cq_poll_info *cur_cqe = &iwcq->cur_cqe;
3495 struct irdma_cq_buf *cq_buf;
3496 enum irdma_status_code ret;
3497 struct irdma_device *iwdev;
3498 struct irdma_cq_uk *ukcq;
3499 bool cq_new_cqe = false;
3500 int resized_bufs = 0;
3501 int npolled = 0;
3502
3503 iwdev = to_iwdev(iwcq->ibcq.device);
3504 ukcq = &iwcq->sc_cq.cq_uk;
3505
3506 /* go through the list of previously resized CQ buffers */
3507 list_for_each_safe(list_node, tmp_node, &iwcq->resize_list) {
3508 cq_buf = container_of(list_node, struct irdma_cq_buf, list);
3509 while (npolled < num_entries) {
3510 ret = irdma_poll_one(&cq_buf->cq_uk, cur_cqe, entry + npolled);
3511 if (!ret) {
3512 ++npolled;
3513 cq_new_cqe = true;
3514 continue;
3515 }
3516 if (ret == IRDMA_ERR_Q_EMPTY)
3517 break;
3518 /* QP using the CQ is destroyed. Skip reporting this CQE */
3519 if (ret == IRDMA_ERR_Q_DESTROYED) {
3520 cq_new_cqe = true;
3521 continue;
3522 }
3523 goto error;
3524 }
3525
3526 /* save the resized CQ buffer which received the last cqe */
3527 if (cq_new_cqe)
3528 last_buf = cq_buf;
3529 cq_new_cqe = false;
3530 }
3531
3532 /* check the current CQ for new cqes */
3533 while (npolled < num_entries) {
3534 ret = irdma_poll_one(ukcq, cur_cqe, entry + npolled);
3535 if (!ret) {
3536 ++npolled;
3537 cq_new_cqe = true;
3538 continue;
3539 }
3540
3541 if (ret == IRDMA_ERR_Q_EMPTY)
3542 break;
3543 /* QP using the CQ is destroyed. Skip reporting this CQE */
3544 if (ret == IRDMA_ERR_Q_DESTROYED) {
3545 cq_new_cqe = true;
3546 continue;
3547 }
3548 goto error;
3549 }
3550
3551 if (cq_new_cqe)
3552 /* all previous CQ resizes are complete */
3553 resized_bufs = irdma_process_resize_list(iwcq, iwdev, NULL);
3554 else if (last_buf)
3555 /* only CQ resizes up to the last_buf are complete */
3556 resized_bufs = irdma_process_resize_list(iwcq, iwdev, last_buf);
3557 if (resized_bufs)
3558 /* report to the HW the number of complete CQ resizes */
3559 irdma_uk_cq_set_resized_cnt(ukcq, resized_bufs);
3560
3561 return npolled;
3562error:
3563 ibdev_dbg(&iwdev->ibdev, "%s: Error polling CQ, irdma_err: %d\n",
3564 __func__, ret);
3565
3566 return -EINVAL;
3567}
3568
3569/**
3570 * irdma_poll_cq - poll cq for completion (kernel apps)
3571 * @ibcq: cq to poll
3572 * @num_entries: number of entries to poll
3573 * @entry: wr of a completed entry
3574 */
3575static int irdma_poll_cq(struct ib_cq *ibcq, int num_entries,
3576 struct ib_wc *entry)
3577{
3578 struct irdma_cq *iwcq;
3579 unsigned long flags;
3580 int ret;
3581
3582 iwcq = to_iwcq(ibcq);
3583
3584 spin_lock_irqsave(&iwcq->lock, flags);
3585 ret = __irdma_poll_cq(iwcq, num_entries, entry);
3586 spin_unlock_irqrestore(&iwcq->lock, flags);
3587
3588 return ret;
3589}
3590
3591/**
3592 * irdma_req_notify_cq - arm cq kernel application
3593 * @ibcq: cq to arm
3594 * @notify_flags: notofication flags
3595 */
3596static int irdma_req_notify_cq(struct ib_cq *ibcq,
3597 enum ib_cq_notify_flags notify_flags)
3598{
3599 struct irdma_cq *iwcq;
3600 struct irdma_cq_uk *ukcq;
3601 unsigned long flags;
3602 enum irdma_cmpl_notify cq_notify = IRDMA_CQ_COMPL_EVENT;
3603
3604 iwcq = to_iwcq(ibcq);
3605 ukcq = &iwcq->sc_cq.cq_uk;
3606 if (notify_flags == IB_CQ_SOLICITED)
3607 cq_notify = IRDMA_CQ_COMPL_SOLICITED;
3608
3609 spin_lock_irqsave(&iwcq->lock, flags);
3610 irdma_uk_cq_request_notification(ukcq, cq_notify);
3611 spin_unlock_irqrestore(&iwcq->lock, flags);
3612
3613 return 0;
3614}
3615
3616static int irdma_roce_port_immutable(struct ib_device *ibdev, u32 port_num,
3617 struct ib_port_immutable *immutable)
3618{
3619 struct ib_port_attr attr;
3620 int err;
3621
3622 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;
3623 err = ib_query_port(ibdev, port_num, &attr);
3624 if (err)
3625 return err;
3626
3627 immutable->max_mad_size = IB_MGMT_MAD_SIZE;
3628 immutable->pkey_tbl_len = attr.pkey_tbl_len;
3629 immutable->gid_tbl_len = attr.gid_tbl_len;
3630
3631 return 0;
3632}
3633
3634static int irdma_iw_port_immutable(struct ib_device *ibdev, u32 port_num,
3635 struct ib_port_immutable *immutable)
3636{
3637 struct ib_port_attr attr;
3638 int err;
3639
3640 immutable->core_cap_flags = RDMA_CORE_PORT_IWARP;
3641 err = ib_query_port(ibdev, port_num, &attr);
3642 if (err)
3643 return err;
feda49a1 3644 immutable->gid_tbl_len = attr.gid_tbl_len;
b48c24c2
MI		 3645
3646 return 0;
3647}
3648
3649static const char *const irdma_hw_stat_names[] = {
3650 /* 32bit names */
3651 [IRDMA_HW_STAT_INDEX_RXVLANERR] = "rxVlanErrors",
3652 [IRDMA_HW_STAT_INDEX_IP4RXDISCARD] = "ip4InDiscards",
3653 [IRDMA_HW_STAT_INDEX_IP4RXTRUNC] = "ip4InTruncatedPkts",
3654 [IRDMA_HW_STAT_INDEX_IP4TXNOROUTE] = "ip4OutNoRoutes",
3655 [IRDMA_HW_STAT_INDEX_IP6RXDISCARD] = "ip6InDiscards",
3656 [IRDMA_HW_STAT_INDEX_IP6RXTRUNC] = "ip6InTruncatedPkts",
3657 [IRDMA_HW_STAT_INDEX_IP6TXNOROUTE] = "ip6OutNoRoutes",
3658 [IRDMA_HW_STAT_INDEX_TCPRTXSEG] = "tcpRetransSegs",
3659 [IRDMA_HW_STAT_INDEX_TCPRXOPTERR] = "tcpInOptErrors",
3660 [IRDMA_HW_STAT_INDEX_TCPRXPROTOERR] = "tcpInProtoErrors",
3661 [IRDMA_HW_STAT_INDEX_RXRPCNPHANDLED] = "cnpHandled",
3662 [IRDMA_HW_STAT_INDEX_RXRPCNPIGNORED] = "cnpIgnored",
3663 [IRDMA_HW_STAT_INDEX_TXNPCNPSENT] = "cnpSent",
3664
3665 /* 64bit names */
3666 [IRDMA_HW_STAT_INDEX_IP4RXOCTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3667 "ip4InOctets",
3668 [IRDMA_HW_STAT_INDEX_IP4RXPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3669 "ip4InPkts",
3670 [IRDMA_HW_STAT_INDEX_IP4RXFRAGS + IRDMA_HW_STAT_INDEX_MAX_32] =
3671 "ip4InReasmRqd",
3672 [IRDMA_HW_STAT_INDEX_IP4RXMCOCTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3673 "ip4InMcastOctets",
3674 [IRDMA_HW_STAT_INDEX_IP4RXMCPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3675 "ip4InMcastPkts",
3676 [IRDMA_HW_STAT_INDEX_IP4TXOCTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3677 "ip4OutOctets",
3678 [IRDMA_HW_STAT_INDEX_IP4TXPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3679 "ip4OutPkts",
3680 [IRDMA_HW_STAT_INDEX_IP4TXFRAGS + IRDMA_HW_STAT_INDEX_MAX_32] =
3681 "ip4OutSegRqd",
3682 [IRDMA_HW_STAT_INDEX_IP4TXMCOCTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3683 "ip4OutMcastOctets",
3684 [IRDMA_HW_STAT_INDEX_IP4TXMCPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3685 "ip4OutMcastPkts",
3686 [IRDMA_HW_STAT_INDEX_IP6RXOCTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3687 "ip6InOctets",
3688 [IRDMA_HW_STAT_INDEX_IP6RXPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3689 "ip6InPkts",
3690 [IRDMA_HW_STAT_INDEX_IP6RXFRAGS + IRDMA_HW_STAT_INDEX_MAX_32] =
3691 "ip6InReasmRqd",
3692 [IRDMA_HW_STAT_INDEX_IP6RXMCOCTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3693 "ip6InMcastOctets",
3694 [IRDMA_HW_STAT_INDEX_IP6RXMCPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3695 "ip6InMcastPkts",
3696 [IRDMA_HW_STAT_INDEX_IP6TXOCTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3697 "ip6OutOctets",
3698 [IRDMA_HW_STAT_INDEX_IP6TXPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3699 "ip6OutPkts",
3700 [IRDMA_HW_STAT_INDEX_IP6TXFRAGS + IRDMA_HW_STAT_INDEX_MAX_32] =
3701 "ip6OutSegRqd",
3702 [IRDMA_HW_STAT_INDEX_IP6TXMCOCTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3703 "ip6OutMcastOctets",
3704 [IRDMA_HW_STAT_INDEX_IP6TXMCPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3705 "ip6OutMcastPkts",
3706 [IRDMA_HW_STAT_INDEX_TCPRXSEGS + IRDMA_HW_STAT_INDEX_MAX_32] =
3707 "tcpInSegs",
3708 [IRDMA_HW_STAT_INDEX_TCPTXSEG + IRDMA_HW_STAT_INDEX_MAX_32] =
3709 "tcpOutSegs",
3710 [IRDMA_HW_STAT_INDEX_RDMARXRDS + IRDMA_HW_STAT_INDEX_MAX_32] =
3711 "iwInRdmaReads",
3712 [IRDMA_HW_STAT_INDEX_RDMARXSNDS + IRDMA_HW_STAT_INDEX_MAX_32] =
3713 "iwInRdmaSends",
3714 [IRDMA_HW_STAT_INDEX_RDMARXWRS + IRDMA_HW_STAT_INDEX_MAX_32] =
3715 "iwInRdmaWrites",
3716 [IRDMA_HW_STAT_INDEX_RDMATXRDS + IRDMA_HW_STAT_INDEX_MAX_32] =
3717 "iwOutRdmaReads",
3718 [IRDMA_HW_STAT_INDEX_RDMATXSNDS + IRDMA_HW_STAT_INDEX_MAX_32] =
3719 "iwOutRdmaSends",
3720 [IRDMA_HW_STAT_INDEX_RDMATXWRS + IRDMA_HW_STAT_INDEX_MAX_32] =
3721 "iwOutRdmaWrites",
3722 [IRDMA_HW_STAT_INDEX_RDMAVBND + IRDMA_HW_STAT_INDEX_MAX_32] =
3723 "iwRdmaBnd",
3724 [IRDMA_HW_STAT_INDEX_RDMAVINV + IRDMA_HW_STAT_INDEX_MAX_32] =
3725 "iwRdmaInv",
3726 [IRDMA_HW_STAT_INDEX_UDPRXPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3727 "RxUDP",
3728 [IRDMA_HW_STAT_INDEX_UDPTXPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3729 "TxUDP",
3730 [IRDMA_HW_STAT_INDEX_RXNPECNMARKEDPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3731 "RxECNMrkd",
3732};
3733
3734static void irdma_get_dev_fw_str(struct ib_device *dev, char *str)
3735{
3736 struct irdma_device *iwdev = to_iwdev(dev);
3737
3738 snprintf(str, IB_FW_VERSION_NAME_MAX, "%u.%u",
3739 irdma_fw_major_ver(&iwdev->rf->sc_dev),
3740 irdma_fw_minor_ver(&iwdev->rf->sc_dev));
3741}
3742
3743/**
4b5f4d3f 3744 * irdma_alloc_hw_port_stats - Allocate a hw stats structure
b48c24c2
MI		 3745 * @ibdev: device pointer from stack
3746 * @port_num: port number
3747 */
4b5f4d3f
JG		 3748static struct rdma_hw_stats *irdma_alloc_hw_port_stats(struct ib_device *ibdev,
3749 u32 port_num)
b48c24c2
MI		 3750{
3751 int num_counters = IRDMA_HW_STAT_INDEX_MAX_32 +
3752 IRDMA_HW_STAT_INDEX_MAX_64;
3753 unsigned long lifespan = RDMA_HW_STATS_DEFAULT_LIFESPAN;
3754
b48c24c2
MI		 3755 BUILD_BUG_ON(ARRAY_SIZE(irdma_hw_stat_names) !=
3756 (IRDMA_HW_STAT_INDEX_MAX_32 + IRDMA_HW_STAT_INDEX_MAX_64));
3757
3758 return rdma_alloc_hw_stats_struct(irdma_hw_stat_names, num_counters,
3759 lifespan);
3760}
3761
3762/**
3763 * irdma_get_hw_stats - Populates the rdma_hw_stats structure
3764 * @ibdev: device pointer from stack
3765 * @stats: stats pointer from stack
3766 * @port_num: port number
3767 * @index: which hw counter the stack is requesting we update
3768 */
3769static int irdma_get_hw_stats(struct ib_device *ibdev,
3770 struct rdma_hw_stats *stats, u32 port_num,
3771 int index)
3772{
3773 struct irdma_device *iwdev = to_iwdev(ibdev);
3774 struct irdma_dev_hw_stats *hw_stats = &iwdev->vsi.pestat->hw_stats;
3775
3776 if (iwdev->rf->rdma_ver >= IRDMA_GEN_2)
3777 irdma_cqp_gather_stats_cmd(&iwdev->rf->sc_dev, iwdev->vsi.pestat, true);
3778 else
3779 irdma_cqp_gather_stats_gen1(&iwdev->rf->sc_dev, iwdev->vsi.pestat);
3780
3781 memcpy(&stats->value[0], hw_stats, sizeof(*hw_stats));
3782
3783 return stats->num_counters;
3784}
3785
3786/**
3787 * irdma_query_gid - Query port GID
3788 * @ibdev: device pointer from stack
3789 * @port: port number
3790 * @index: Entry index
3791 * @gid: Global ID
3792 */
3793static int irdma_query_gid(struct ib_device *ibdev, u32 port, int index,
3794 union ib_gid *gid)
3795{
3796 struct irdma_device *iwdev = to_iwdev(ibdev);
3797
3798 memset(gid->raw, 0, sizeof(gid->raw));
3799 ether_addr_copy(gid->raw, iwdev->netdev->dev_addr);
3800
3801 return 0;
3802}
3803
3804/**
3805 * mcast_list_add - Add a new mcast item to list
3806 * @rf: RDMA PCI function
3807 * @new_elem: pointer to element to add
3808 */
3809static void mcast_list_add(struct irdma_pci_f *rf,
3810 struct mc_table_list *new_elem)
3811{
3812 list_add(&new_elem->list, &rf->mc_qht_list.list);
3813}
3814
3815/**
3816 * mcast_list_del - Remove an mcast item from list
3817 * @mc_qht_elem: pointer to mcast table list element
3818 */
3819static void mcast_list_del(struct mc_table_list *mc_qht_elem)
3820{
3821 if (mc_qht_elem)
3822 list_del(&mc_qht_elem->list);
3823}
3824
3825/**
3826 * mcast_list_lookup_ip - Search mcast list for address
3827 * @rf: RDMA PCI function
3828 * @ip_mcast: pointer to mcast IP address
3829 */
3830static struct mc_table_list *mcast_list_lookup_ip(struct irdma_pci_f *rf,
3831 u32 *ip_mcast)
3832{
3833 struct mc_table_list *mc_qht_el;
3834 struct list_head *pos, *q;
3835
3836 list_for_each_safe (pos, q, &rf->mc_qht_list.list) {
3837 mc_qht_el = list_entry(pos, struct mc_table_list, list);
3838 if (!memcmp(mc_qht_el->mc_info.dest_ip, ip_mcast,
3839 sizeof(mc_qht_el->mc_info.dest_ip)))
3840 return mc_qht_el;
3841 }
3842
3843 return NULL;
3844}
3845
3846/**
3847 * irdma_mcast_cqp_op - perform a mcast cqp operation
3848 * @iwdev: irdma device
3849 * @mc_grp_ctx: mcast group info
3850 * @op: operation
3851 *
3852 * returns error status
3853 */
3854static int irdma_mcast_cqp_op(struct irdma_device *iwdev,
3855 struct irdma_mcast_grp_info *mc_grp_ctx, u8 op)
3856{
3857 struct cqp_cmds_info *cqp_info;
3858 struct irdma_cqp_request *cqp_request;
3859 enum irdma_status_code status;
3860
3861 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
3862 if (!cqp_request)
3863 return -ENOMEM;
3864
3865 cqp_request->info.in.u.mc_create.info = *mc_grp_ctx;
3866 cqp_info = &cqp_request->info;
3867 cqp_info->cqp_cmd = op;
3868 cqp_info->post_sq = 1;
3869 cqp_info->in.u.mc_create.scratch = (uintptr_t)cqp_request;
3870 cqp_info->in.u.mc_create.cqp = &iwdev->rf->cqp.sc_cqp;
3871 status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
3872 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
3873 if (status)
3874 return -ENOMEM;
3875
3876 return 0;
3877}
3878
3879/**
3880 * irdma_mcast_mac - Get the multicast MAC for an IP address
3881 * @ip_addr: IPv4 or IPv6 address
3882 * @mac: pointer to result MAC address
3883 * @ipv4: flag indicating IPv4 or IPv6
3884 *
3885 */
3886void irdma_mcast_mac(u32 *ip_addr, u8 *mac, bool ipv4)
3887{
3888 u8 *ip = (u8 *)ip_addr;
3889
3890 if (ipv4) {
3891 unsigned char mac4[ETH_ALEN] = {0x01, 0x00, 0x5E, 0x00,
3892 0x00, 0x00};
3893
3894 mac4[3] = ip[2] & 0x7F;
3895 mac4[4] = ip[1];
3896 mac4[5] = ip[0];
3897 ether_addr_copy(mac, mac4);
3898 } else {
3899 unsigned char mac6[ETH_ALEN] = {0x33, 0x33, 0x00, 0x00,
3900 0x00, 0x00};
3901
3902 mac6[2] = ip[3];
3903 mac6[3] = ip[2];
3904 mac6[4] = ip[1];
3905 mac6[5] = ip[0];
3906 ether_addr_copy(mac, mac6);
3907 }
3908}
3909
3910/**
3911 * irdma_attach_mcast - attach a qp to a multicast group
3912 * @ibqp: ptr to qp
3913 * @ibgid: pointer to global ID
3914 * @lid: local ID
3915 *
3916 * returns error status
3917 */
3918static int irdma_attach_mcast(struct ib_qp *ibqp, union ib_gid *ibgid, u16 lid)
3919{
3920 struct irdma_qp *iwqp = to_iwqp(ibqp);
3921 struct irdma_device *iwdev = iwqp->iwdev;
3922 struct irdma_pci_f *rf = iwdev->rf;
3923 struct mc_table_list *mc_qht_elem;
3924 struct irdma_mcast_grp_ctx_entry_info mcg_info = {};
3925 unsigned long flags;
3926 u32 ip_addr[4] = {};
3927 u32 mgn;
3928 u32 no_mgs;
3929 int ret = 0;
3930 bool ipv4;
3931 u16 vlan_id;
3932 union {
3933 struct sockaddr saddr;
3934 struct sockaddr_in saddr_in;
3935 struct sockaddr_in6 saddr_in6;
3936 } sgid_addr;
3937 unsigned char dmac[ETH_ALEN];
3938
3939 rdma_gid2ip((struct sockaddr *)&sgid_addr, ibgid);
3940
3941 if (!ipv6_addr_v4mapped((struct in6_addr *)ibgid)) {
3942 irdma_copy_ip_ntohl(ip_addr,
3943 sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
3944 irdma_netdev_vlan_ipv6(ip_addr, &vlan_id, NULL);
3945 ipv4 = false;
3946 ibdev_dbg(&iwdev->ibdev,
3947 "VERBS: qp_id=%d, IP6address=%pI6\n", ibqp->qp_num,
3948 ip_addr);
3949 irdma_mcast_mac(ip_addr, dmac, false);
3950 } else {
3951 ip_addr[0] = ntohl(sgid_addr.saddr_in.sin_addr.s_addr);
3952 ipv4 = true;
3953 vlan_id = irdma_get_vlan_ipv4(ip_addr);
3954 irdma_mcast_mac(ip_addr, dmac, true);
3955 ibdev_dbg(&iwdev->ibdev,
3956 "VERBS: qp_id=%d, IP4address=%pI4, MAC=%pM\n",
3957 ibqp->qp_num, ip_addr, dmac);
3958 }
3959
3960 spin_lock_irqsave(&rf->qh_list_lock, flags);
3961 mc_qht_elem = mcast_list_lookup_ip(rf, ip_addr);
3962 if (!mc_qht_elem) {
3963 struct irdma_dma_mem *dma_mem_mc;
3964
3965 spin_unlock_irqrestore(&rf->qh_list_lock, flags);
3966 mc_qht_elem = kzalloc(sizeof(*mc_qht_elem), GFP_KERNEL);
3967 if (!mc_qht_elem)
3968 return -ENOMEM;
3969
3970 mc_qht_elem->mc_info.ipv4_valid = ipv4;
3971 memcpy(mc_qht_elem->mc_info.dest_ip, ip_addr,
3972 sizeof(mc_qht_elem->mc_info.dest_ip));
3973 ret = irdma_alloc_rsrc(rf, rf->allocated_mcgs, rf->max_mcg,
3974 &mgn, &rf->next_mcg);
3975 if (ret) {
3976 kfree(mc_qht_elem);
3977 return -ENOMEM;
3978 }
3979
3980 mc_qht_elem->mc_info.mgn = mgn;
3981 dma_mem_mc = &mc_qht_elem->mc_grp_ctx.dma_mem_mc;
3982 dma_mem_mc->size = ALIGN(sizeof(u64) * IRDMA_MAX_MGS_PER_CTX,
3983 IRDMA_HW_PAGE_SIZE);
3984 dma_mem_mc->va = dma_alloc_coherent(rf->hw.device,
3985 dma_mem_mc->size,
3986 &dma_mem_mc->pa,
3987 GFP_KERNEL);
3988 if (!dma_mem_mc->va) {
3989 irdma_free_rsrc(rf, rf->allocated_mcgs, mgn);
3990 kfree(mc_qht_elem);
3991 return -ENOMEM;
3992 }
3993
3994 mc_qht_elem->mc_grp_ctx.mg_id = (u16)mgn;
3995 memcpy(mc_qht_elem->mc_grp_ctx.dest_ip_addr, ip_addr,
3996 sizeof(mc_qht_elem->mc_grp_ctx.dest_ip_addr));
3997 mc_qht_elem->mc_grp_ctx.ipv4_valid = ipv4;
3998 mc_qht_elem->mc_grp_ctx.vlan_id = vlan_id;
3999 if (vlan_id < VLAN_N_VID)
4000 mc_qht_elem->mc_grp_ctx.vlan_valid = true;
4001 mc_qht_elem->mc_grp_ctx.hmc_fcn_id = iwdev->vsi.fcn_id;
4002 mc_qht_elem->mc_grp_ctx.qs_handle =
4003 iwqp->sc_qp.vsi->qos[iwqp->sc_qp.user_pri].qs_handle;
4004 ether_addr_copy(mc_qht_elem->mc_grp_ctx.dest_mac_addr, dmac);
4005
4006 spin_lock_irqsave(&rf->qh_list_lock, flags);
4007 mcast_list_add(rf, mc_qht_elem);
4008 } else {
4009 if (mc_qht_elem->mc_grp_ctx.no_of_mgs ==
4010 IRDMA_MAX_MGS_PER_CTX) {
4011 spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4012 return -ENOMEM;
4013 }
4014 }
4015
4016 mcg_info.qp_id = iwqp->ibqp.qp_num;
4017 no_mgs = mc_qht_elem->mc_grp_ctx.no_of_mgs;
4018 irdma_sc_add_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info);
4019 spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4020
4021 /* Only if there is a change do we need to modify or create */
4022 if (!no_mgs) {
4023 ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4024 IRDMA_OP_MC_CREATE);
4025 } else if (no_mgs != mc_qht_elem->mc_grp_ctx.no_of_mgs) {
4026 ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4027 IRDMA_OP_MC_MODIFY);
4028 } else {
4029 return 0;
4030 }
4031
4032 if (ret)
4033 goto error;
4034
4035 return 0;
4036
4037error:
4038 irdma_sc_del_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info);
4039 if (!mc_qht_elem->mc_grp_ctx.no_of_mgs) {
4040 mcast_list_del(mc_qht_elem);
4041 dma_free_coherent(rf->hw.device,
4042 mc_qht_elem->mc_grp_ctx.dma_mem_mc.size,
4043 mc_qht_elem->mc_grp_ctx.dma_mem_mc.va,
4044 mc_qht_elem->mc_grp_ctx.dma_mem_mc.pa);
4045 mc_qht_elem->mc_grp_ctx.dma_mem_mc.va = NULL;
4046 irdma_free_rsrc(rf, rf->allocated_mcgs,
4047 mc_qht_elem->mc_grp_ctx.mg_id);
4048 kfree(mc_qht_elem);
4049 }
4050
4051 return ret;
4052}
4053
4054/**
4055 * irdma_detach_mcast - detach a qp from a multicast group
4056 * @ibqp: ptr to qp
4057 * @ibgid: pointer to global ID
4058 * @lid: local ID
4059 *
4060 * returns error status
4061 */
4062static int irdma_detach_mcast(struct ib_qp *ibqp, union ib_gid *ibgid, u16 lid)
4063{
4064 struct irdma_qp *iwqp = to_iwqp(ibqp);
4065 struct irdma_device *iwdev = iwqp->iwdev;
4066 struct irdma_pci_f *rf = iwdev->rf;
4067 u32 ip_addr[4] = {};
4068 struct mc_table_list *mc_qht_elem;
4069 struct irdma_mcast_grp_ctx_entry_info mcg_info = {};
4070 int ret;
4071 unsigned long flags;
4072 union {
4073 struct sockaddr saddr;
4074 struct sockaddr_in saddr_in;
4075 struct sockaddr_in6 saddr_in6;
4076 } sgid_addr;
4077
4078 rdma_gid2ip((struct sockaddr *)&sgid_addr, ibgid);
4079 if (!ipv6_addr_v4mapped((struct in6_addr *)ibgid))
4080 irdma_copy_ip_ntohl(ip_addr,
4081 sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
4082 else
4083 ip_addr[0] = ntohl(sgid_addr.saddr_in.sin_addr.s_addr);
4084
4085 spin_lock_irqsave(&rf->qh_list_lock, flags);
4086 mc_qht_elem = mcast_list_lookup_ip(rf, ip_addr);
4087 if (!mc_qht_elem) {
4088 spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4089 ibdev_dbg(&iwdev->ibdev,
4090 "VERBS: address not found MCG\n");
4091 return 0;
4092 }
4093
4094 mcg_info.qp_id = iwqp->ibqp.qp_num;
4095 irdma_sc_del_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info);
4096 if (!mc_qht_elem->mc_grp_ctx.no_of_mgs) {
4097 mcast_list_del(mc_qht_elem);
4098 spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4099 ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4100 IRDMA_OP_MC_DESTROY);
4101 if (ret) {
4102 ibdev_dbg(&iwdev->ibdev,
4103 "VERBS: failed MC_DESTROY MCG\n");
4104 spin_lock_irqsave(&rf->qh_list_lock, flags);
4105 mcast_list_add(rf, mc_qht_elem);
4106 spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4107 return -EAGAIN;
4108 }
4109
4110 dma_free_coherent(rf->hw.device,
4111 mc_qht_elem->mc_grp_ctx.dma_mem_mc.size,
4112 mc_qht_elem->mc_grp_ctx.dma_mem_mc.va,
4113 mc_qht_elem->mc_grp_ctx.dma_mem_mc.pa);
4114 mc_qht_elem->mc_grp_ctx.dma_mem_mc.va = NULL;
4115 irdma_free_rsrc(rf, rf->allocated_mcgs,
4116 mc_qht_elem->mc_grp_ctx.mg_id);
4117 kfree(mc_qht_elem);
4118 } else {
4119 spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4120 ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4121 IRDMA_OP_MC_MODIFY);
4122 if (ret) {
4123 ibdev_dbg(&iwdev->ibdev,
4124 "VERBS: failed Modify MCG\n");
4125 return ret;
4126 }
4127 }
4128
4129 return 0;
4130}
4131
4132/**
4133 * irdma_create_ah - create address handle
4134 * @ibah: address handle
4135 * @attr: address handle attributes
4136 * @udata: User data
4137 *
4138 * returns 0 on success, error otherwise
4139 */
4140static int irdma_create_ah(struct ib_ah *ibah,
4141 struct rdma_ah_init_attr *attr,
4142 struct ib_udata *udata)
4143{
4144 struct irdma_pd *pd = to_iwpd(ibah->pd);
4145 struct irdma_ah *ah = container_of(ibah, struct irdma_ah, ibah);
4146 struct rdma_ah_attr *ah_attr = attr->ah_attr;
4147 const struct ib_gid_attr *sgid_attr;
4148 struct irdma_device *iwdev = to_iwdev(ibah->pd->device);
4149 struct irdma_pci_f *rf = iwdev->rf;
4150 struct irdma_sc_ah *sc_ah;
4151 u32 ah_id = 0;
4152 struct irdma_ah_info *ah_info;
4153 struct irdma_create_ah_resp uresp;
4154 union {
4155 struct sockaddr saddr;
4156 struct sockaddr_in saddr_in;
4157 struct sockaddr_in6 saddr_in6;
4158 } sgid_addr, dgid_addr;
4159 int err;
4160 u8 dmac[ETH_ALEN];
4161
4162 err = irdma_alloc_rsrc(rf, rf->allocated_ahs, rf->max_ah, &ah_id,
4163 &rf->next_ah);
4164 if (err)
4165 return err;
4166
4167 ah->pd = pd;
4168 sc_ah = &ah->sc_ah;
4169 sc_ah->ah_info.ah_idx = ah_id;
4170 sc_ah->ah_info.vsi = &iwdev->vsi;
4171 irdma_sc_init_ah(&rf->sc_dev, sc_ah);
4172 ah->sgid_index = ah_attr->grh.sgid_index;
4173 sgid_attr = ah_attr->grh.sgid_attr;
4174 memcpy(&ah->dgid, &ah_attr->grh.dgid, sizeof(ah->dgid));
4175 rdma_gid2ip((struct sockaddr *)&sgid_addr, &sgid_attr->gid);
4176 rdma_gid2ip((struct sockaddr *)&dgid_addr, &ah_attr->grh.dgid);
4177 ah->av.attrs = *ah_attr;
4178 ah->av.net_type = rdma_gid_attr_network_type(sgid_attr);
4179 ah->av.sgid_addr.saddr = sgid_addr.saddr;
4180 ah->av.dgid_addr.saddr = dgid_addr.saddr;
4181 ah_info = &sc_ah->ah_info;
4182 ah_info->ah_idx = ah_id;
4183 ah_info->pd_idx = pd->sc_pd.pd_id;
4184 if (ah_attr->ah_flags & IB_AH_GRH) {
4185 ah_info->flow_label = ah_attr->grh.flow_label;
4186 ah_info->hop_ttl = ah_attr->grh.hop_limit;
4187 ah_info->tc_tos = ah_attr->grh.traffic_class;
4188 }
4189
4190 ether_addr_copy(dmac, ah_attr->roce.dmac);
4191 if (rdma_gid_attr_network_type(sgid_attr) == RDMA_NETWORK_IPV4) {
4192 ah_info->ipv4_valid = true;
4193 ah_info->dest_ip_addr[0] =
4194 ntohl(dgid_addr.saddr_in.sin_addr.s_addr);
4195 ah_info->src_ip_addr[0] =
4196 ntohl(sgid_addr.saddr_in.sin_addr.s_addr);
4197 ah_info->do_lpbk = irdma_ipv4_is_lpb(ah_info->src_ip_addr[0],
4198 ah_info->dest_ip_addr[0]);
4199 if (ipv4_is_multicast(dgid_addr.saddr_in.sin_addr.s_addr)) {
4200 ah_info->do_lpbk = true;
4201 irdma_mcast_mac(ah_info->dest_ip_addr, dmac, true);
4202 }
4203 } else {
4204 irdma_copy_ip_ntohl(ah_info->dest_ip_addr,
4205 dgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
4206 irdma_copy_ip_ntohl(ah_info->src_ip_addr,
4207 sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
4208 ah_info->do_lpbk = irdma_ipv6_is_lpb(ah_info->src_ip_addr,
4209 ah_info->dest_ip_addr);
4210 if (rdma_is_multicast_addr(&dgid_addr.saddr_in6.sin6_addr)) {
4211 ah_info->do_lpbk = true;
4212 irdma_mcast_mac(ah_info->dest_ip_addr, dmac, false);
4213 }
4214 }
4215
4216 err = rdma_read_gid_l2_fields(sgid_attr, &ah_info->vlan_tag,
4217 ah_info->mac_addr);
4218 if (err)
4219 goto error;
4220
4221 ah_info->dst_arpindex = irdma_add_arp(iwdev->rf, ah_info->dest_ip_addr,
4222 ah_info->ipv4_valid, dmac);
4223
4224 if (ah_info->dst_arpindex == -1) {
4225 err = -EINVAL;
4226 goto error;
4227 }
4228
4229 if (ah_info->vlan_tag >= VLAN_N_VID && iwdev->dcb)
4230 ah_info->vlan_tag = 0;
4231
4232 if (ah_info->vlan_tag < VLAN_N_VID) {
4233 ah_info->insert_vlan_tag = true;
4234 ah_info->vlan_tag |=
4235 rt_tos2priority(ah_info->tc_tos) << VLAN_PRIO_SHIFT;
4236 }
4237
4238 err = irdma_ah_cqp_op(iwdev->rf, sc_ah, IRDMA_OP_AH_CREATE,
4239 attr->flags & RDMA_CREATE_AH_SLEEPABLE,
4240 irdma_gsi_ud_qp_ah_cb, sc_ah);
4241
4242 if (err) {
4243 ibdev_dbg(&iwdev->ibdev,
4244 "VERBS: CQP-OP Create AH fail");
4245 goto error;
4246 }
4247
4248 if (!(attr->flags & RDMA_CREATE_AH_SLEEPABLE)) {
4249 int cnt = CQP_COMPL_WAIT_TIME_MS * CQP_TIMEOUT_THRESHOLD;
4250
4251 do {
4252 irdma_cqp_ce_handler(rf, &rf->ccq.sc_cq);
4253 mdelay(1);
4254 } while (!sc_ah->ah_info.ah_valid && --cnt);
4255
4256 if (!cnt) {
4257 ibdev_dbg(&iwdev->ibdev,
4258 "VERBS: CQP create AH timed out");
4259 err = -ETIMEDOUT;
4260 goto error;
4261 }
4262 }
4263
4264 if (udata) {
4265 uresp.ah_id = ah->sc_ah.ah_info.ah_idx;
4266 err = ib_copy_to_udata(udata, &uresp,
4267 min(sizeof(uresp), udata->outlen));
4268 }
4269 return 0;
4270
4271error:
4272 irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_ahs, ah_id);
4273
4274 return err;
4275}
4276
4277/**
4278 * irdma_destroy_ah - Destroy address handle
4279 * @ibah: pointer to address handle
4280 * @ah_flags: flags for sleepable
4281 */
4282static int irdma_destroy_ah(struct ib_ah *ibah, u32 ah_flags)
4283{
4284 struct irdma_device *iwdev = to_iwdev(ibah->device);
4285 struct irdma_ah *ah = to_iwah(ibah);
4286
4287 irdma_ah_cqp_op(iwdev->rf, &ah->sc_ah, IRDMA_OP_AH_DESTROY,
4288 false, NULL, ah);
4289
4290 irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_ahs,
4291 ah->sc_ah.ah_info.ah_idx);
4292
4293 return 0;
4294}
4295
4296/**
4297 * irdma_query_ah - Query address handle
4298 * @ibah: pointer to address handle
4299 * @ah_attr: address handle attributes
4300 */
4301static int irdma_query_ah(struct ib_ah *ibah, struct rdma_ah_attr *ah_attr)
4302{
4303 struct irdma_ah *ah = to_iwah(ibah);
4304
4305 memset(ah_attr, 0, sizeof(*ah_attr));
4306 if (ah->av.attrs.ah_flags & IB_AH_GRH) {
4307 ah_attr->ah_flags = IB_AH_GRH;
4308 ah_attr->grh.flow_label = ah->sc_ah.ah_info.flow_label;
4309 ah_attr->grh.traffic_class = ah->sc_ah.ah_info.tc_tos;
4310 ah_attr->grh.hop_limit = ah->sc_ah.ah_info.hop_ttl;
4311 ah_attr->grh.sgid_index = ah->sgid_index;
4312 ah_attr->grh.sgid_index = ah->sgid_index;
4313 memcpy(&ah_attr->grh.dgid, &ah->dgid,
4314 sizeof(ah_attr->grh.dgid));
4315 }
4316
4317 return 0;
4318}
4319
4320static enum rdma_link_layer irdma_get_link_layer(struct ib_device *ibdev,
4321 u32 port_num)
4322{
4323 return IB_LINK_LAYER_ETHERNET;
4324}
4325
4326static __be64 irdma_mac_to_guid(struct net_device *ndev)
4327{
4328 unsigned char *mac = ndev->dev_addr;
4329 __be64 guid;
4330 unsigned char *dst = (unsigned char *)&guid;
4331
4332 dst[0] = mac[0] ^ 2;
4333 dst[1] = mac[1];
4334 dst[2] = mac[2];
4335 dst[3] = 0xff;
4336 dst[4] = 0xfe;
4337 dst[5] = mac[3];
4338 dst[6] = mac[4];
4339 dst[7] = mac[5];
4340
4341 return guid;
4342}
4343
4344static const struct ib_device_ops irdma_roce_dev_ops = {
4345 .attach_mcast = irdma_attach_mcast,
4346 .create_ah = irdma_create_ah,
4347 .create_user_ah = irdma_create_ah,
4348 .destroy_ah = irdma_destroy_ah,
4349 .detach_mcast = irdma_detach_mcast,
4350 .get_link_layer = irdma_get_link_layer,
4351 .get_port_immutable = irdma_roce_port_immutable,
4352 .modify_qp = irdma_modify_qp_roce,
4353 .query_ah = irdma_query_ah,
4354 .query_pkey = irdma_query_pkey,
4355};
4356
4357static const struct ib_device_ops irdma_iw_dev_ops = {
4358 .modify_qp = irdma_modify_qp,
4359 .get_port_immutable = irdma_iw_port_immutable,
4360 .query_gid = irdma_query_gid,
4361};
4362
4363static const struct ib_device_ops irdma_dev_ops = {
4364 .owner = THIS_MODULE,
4365 .driver_id = RDMA_DRIVER_IRDMA,
4366 .uverbs_abi_ver = IRDMA_ABI_VER,
4367
4b5f4d3f 4368 .alloc_hw_port_stats = irdma_alloc_hw_port_stats,
b48c24c2
MI		 4369 .alloc_mr = irdma_alloc_mr,
4370 .alloc_mw = irdma_alloc_mw,
4371 .alloc_pd = irdma_alloc_pd,
4372 .alloc_ucontext = irdma_alloc_ucontext,
4373 .create_cq = irdma_create_cq,
4374 .create_qp = irdma_create_qp,
4375 .dealloc_driver = irdma_ib_dealloc_device,
4376 .dealloc_mw = irdma_dealloc_mw,
4377 .dealloc_pd = irdma_dealloc_pd,
4378 .dealloc_ucontext = irdma_dealloc_ucontext,
4379 .dereg_mr = irdma_dereg_mr,
4380 .destroy_cq = irdma_destroy_cq,
4381 .destroy_qp = irdma_destroy_qp,
4382 .disassociate_ucontext = irdma_disassociate_ucontext,
4383 .get_dev_fw_str = irdma_get_dev_fw_str,
4384 .get_dma_mr = irdma_get_dma_mr,
4385 .get_hw_stats = irdma_get_hw_stats,
4386 .map_mr_sg = irdma_map_mr_sg,
4387 .mmap = irdma_mmap,
4388 .mmap_free = irdma_mmap_free,
4389 .poll_cq = irdma_poll_cq,
4390 .post_recv = irdma_post_recv,
4391 .post_send = irdma_post_send,
4392 .query_device = irdma_query_device,
4393 .query_port = irdma_query_port,
4394 .query_qp = irdma_query_qp,
4395 .reg_user_mr = irdma_reg_user_mr,
4396 .req_notify_cq = irdma_req_notify_cq,
4397 .resize_cq = irdma_resize_cq,
4398 INIT_RDMA_OBJ_SIZE(ib_pd, irdma_pd, ibpd),
4399 INIT_RDMA_OBJ_SIZE(ib_ucontext, irdma_ucontext, ibucontext),
4400 INIT_RDMA_OBJ_SIZE(ib_ah, irdma_ah, ibah),
4401 INIT_RDMA_OBJ_SIZE(ib_cq, irdma_cq, ibcq),
4402 INIT_RDMA_OBJ_SIZE(ib_mw, irdma_mr, ibmw),
514aee66 4403 INIT_RDMA_OBJ_SIZE(ib_qp, irdma_qp, ibqp),
b48c24c2
MI		 4404};
4405
4406/**
4407 * irdma_init_roce_device - initialization of roce rdma device
4408 * @iwdev: irdma device
4409 */
4410static void irdma_init_roce_device(struct irdma_device *iwdev)
4411{
4412 iwdev->ibdev.node_type = RDMA_NODE_IB_CA;
4413 iwdev->ibdev.node_guid = irdma_mac_to_guid(iwdev->netdev);
4414 ib_set_device_ops(&iwdev->ibdev, &irdma_roce_dev_ops);
4415}
4416
4417/**
4418 * irdma_init_iw_device - initialization of iwarp rdma device
4419 * @iwdev: irdma device
4420 */
4421static int irdma_init_iw_device(struct irdma_device *iwdev)
4422{
4423 struct net_device *netdev = iwdev->netdev;
4424
4425 iwdev->ibdev.node_type = RDMA_NODE_RNIC;
4426 ether_addr_copy((u8 *)&iwdev->ibdev.node_guid, netdev->dev_addr);
4427 iwdev->ibdev.ops.iw_add_ref = irdma_qp_add_ref;
4428 iwdev->ibdev.ops.iw_rem_ref = irdma_qp_rem_ref;
4429 iwdev->ibdev.ops.iw_get_qp = irdma_get_qp;
4430 iwdev->ibdev.ops.iw_connect = irdma_connect;
4431 iwdev->ibdev.ops.iw_accept = irdma_accept;
4432 iwdev->ibdev.ops.iw_reject = irdma_reject;
4433 iwdev->ibdev.ops.iw_create_listen = irdma_create_listen;
4434 iwdev->ibdev.ops.iw_destroy_listen = irdma_destroy_listen;
4435 memcpy(iwdev->ibdev.iw_ifname, netdev->name,
4436 sizeof(iwdev->ibdev.iw_ifname));
4437 ib_set_device_ops(&iwdev->ibdev, &irdma_iw_dev_ops);
4438
4439 return 0;
4440}
4441
4442/**
4443 * irdma_init_rdma_device - initialization of rdma device
4444 * @iwdev: irdma device
4445 */
4446static int irdma_init_rdma_device(struct irdma_device *iwdev)
4447{
4448 struct pci_dev *pcidev = iwdev->rf->pcidev;
4449 int ret;
4450
4451 if (iwdev->roce_mode) {
4452 irdma_init_roce_device(iwdev);
4453 } else {
4454 ret = irdma_init_iw_device(iwdev);
4455 if (ret)
4456 return ret;
4457 }
4458 iwdev->ibdev.phys_port_cnt = 1;
4459 iwdev->ibdev.num_comp_vectors = iwdev->rf->ceqs_count;
4460 iwdev->ibdev.dev.parent = &pcidev->dev;
4461 ib_set_device_ops(&iwdev->ibdev, &irdma_dev_ops);
4462
4463 return 0;
4464}
4465
4466/**
4467 * irdma_port_ibevent - indicate port event
4468 * @iwdev: irdma device
4469 */
4470void irdma_port_ibevent(struct irdma_device *iwdev)
4471{
4472 struct ib_event event;
4473
4474 event.device = &iwdev->ibdev;
4475 event.element.port_num = 1;
4476 event.event =
4477 iwdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
4478 ib_dispatch_event(&event);
4479}
4480
4481/**
4482 * irdma_ib_unregister_device - unregister rdma device from IB
4483 * core
4484 * @iwdev: irdma device
4485 */
4486void irdma_ib_unregister_device(struct irdma_device *iwdev)
4487{
4488 iwdev->iw_status = 0;
4489 irdma_port_ibevent(iwdev);
4490 ib_unregister_device(&iwdev->ibdev);
4491}
4492
4493/**
4494 * irdma_ib_register_device - register irdma device to IB core
4495 * @iwdev: irdma device
4496 */
4497int irdma_ib_register_device(struct irdma_device *iwdev)
4498{
4499 int ret;
4500
4501 ret = irdma_init_rdma_device(iwdev);
4502 if (ret)
4503 return ret;
4504
4505 ret = ib_device_set_netdev(&iwdev->ibdev, iwdev->netdev, 1);
4506 if (ret)
4507 goto error;
4508 dma_set_max_seg_size(iwdev->rf->hw.device, UINT_MAX);
4509 ret = ib_register_device(&iwdev->ibdev, "irdma%d", iwdev->rf->hw.device);
4510 if (ret)
4511 goto error;
4512
4513 iwdev->iw_status = 1;
4514 irdma_port_ibevent(iwdev);
4515
4516 return 0;
4517
4518error:
4519 if (ret)
4520 ibdev_dbg(&iwdev->ibdev, "VERBS: Register RDMA device fail\n");
4521
4522 return ret;
4523}
4524
4525/**
4526 * irdma_ib_dealloc_device
4527 * @ibdev: ib device
4528 *
4529 * callback from ibdev dealloc_driver to deallocate resources
4530 * unber irdma device
4531 */
4532void irdma_ib_dealloc_device(struct ib_device *ibdev)
4533{
4534 struct irdma_device *iwdev = to_iwdev(ibdev);
4535
4536 irdma_rt_deinit_hw(iwdev);
4537 irdma_ctrl_deinit_hw(iwdev->rf);
4538 kfree(iwdev->rf);
4539}
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