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Merge tag 'for-4.2' of git://git.infradead.org/battery-2.6
[mirror_ubuntu-focal-kernel.git] / drivers / infiniband / hw / mlx4 / main.c
CommitLineData
225c7b1f
RD		 1/*
2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
51a379d0 3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
225c7b1f
RD		 4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34#include <linux/module.h>
35#include <linux/init.h>
5a0e3ad6 36#include <linux/slab.h>
225c7b1f 37#include <linux/errno.h>
fa417f7b
EC		 38#include <linux/netdevice.h>
39#include <linux/inetdevice.h>
40#include <linux/rtnetlink.h>
4c3eb3ca 41#include <linux/if_vlan.h>
d487ee77
MS		 42#include <net/ipv6.h>
43#include <net/addrconf.h>
225c7b1f
RD		 44
45#include <rdma/ib_smi.h>
46#include <rdma/ib_user_verbs.h>
fa417f7b 47#include <rdma/ib_addr.h>
225c7b1f
RD		 48
49#include <linux/mlx4/driver.h>
50#include <linux/mlx4/cmd.h>
9433c188 51#include <linux/mlx4/qp.h>
225c7b1f
RD		 52
53#include "mlx4_ib.h"
54#include "user.h"
55
b1d8eb5a 56#define DRV_NAME MLX4_IB_DRV_NAME
169a1d85
AV		 57#define DRV_VERSION "2.2-1"
58#define DRV_RELDATE "Feb 2014"
225c7b1f 59
f77c0162 60#define MLX4_IB_FLOW_MAX_PRIO 0xFFF
a37a1a42 61#define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF
50e2ec91 62#define MLX4_IB_CARD_REV_A0 0xA0
f77c0162 63
225c7b1f
RD		 64MODULE_AUTHOR("Roland Dreier");
65MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
66MODULE_LICENSE("Dual BSD/GPL");
67MODULE_VERSION(DRV_VERSION);
68
56c1d233 69int mlx4_ib_sm_guid_assign = 0;
a0c64a17 70module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444);
56c1d233 71MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 0)");
a0c64a17 72
68f3948d 73static const char mlx4_ib_version[] =
225c7b1f
RD		 74 DRV_NAME ": Mellanox ConnectX InfiniBand driver v"
75 DRV_VERSION " (" DRV_RELDATE ")\n";
76
fa417f7b
EC		 77struct update_gid_work {
78 struct work_struct work;
79 union ib_gid gids[128];
80 struct mlx4_ib_dev *dev;
81 int port;
82};
83
3806d08c
JM		 84static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init);
85
fa417f7b
EC		 86static struct workqueue_struct *wq;
87
225c7b1f
RD		 88static void init_query_mad(struct ib_smp *mad)
89{
90 mad->base_version = 1;
91 mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
92 mad->class_version = 1;
93 mad->method = IB_MGMT_METHOD_GET;
94}
95
4c3eb3ca
EC		 96static union ib_gid zgid;
97
f77c0162
HHZ		 98static int check_flow_steering_support(struct mlx4_dev *dev)
99{
0a9b7d59 100 int eth_num_ports = 0;
f77c0162 101 int ib_num_ports = 0;
f77c0162 102
0a9b7d59
MB		 103 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED;
104
105 if (dmfs) {
106 int i;
107 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
108 eth_num_ports++;
109 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
110 ib_num_ports++;
111 dmfs &= (!ib_num_ports ||
112 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) &&
113 (!eth_num_ports ||
114 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN));
115 if (ib_num_ports && mlx4_is_mfunc(dev)) {
116 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n");
117 dmfs = 0;
f77c0162 118 }
f77c0162 119 }
0a9b7d59 120 return dmfs;
f77c0162
HHZ		 121}
122
3dec4878
JM		 123static int num_ib_ports(struct mlx4_dev *dev)
124{
125 int ib_ports = 0;
126 int i;
127
128 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
129 ib_ports++;
130
131 return ib_ports;
132}
133
225c7b1f 134static int mlx4_ib_query_device(struct ib_device *ibdev,
2528e33e
MB		 135 struct ib_device_attr *props,
136 struct ib_udata *uhw)
225c7b1f
RD		 137{
138 struct mlx4_ib_dev *dev = to_mdev(ibdev);
139 struct ib_smp *in_mad = NULL;
140 struct ib_smp *out_mad = NULL;
141 int err = -ENOMEM;
3dec4878 142 int have_ib_ports;
4b664c43
MB		 143 struct mlx4_uverbs_ex_query_device cmd;
144 struct mlx4_uverbs_ex_query_device_resp resp = {.comp_mask = 0};
145 struct mlx4_clock_params clock_params;
225c7b1f 146
4b664c43
MB		 147 if (uhw->inlen) {
148 if (uhw->inlen < sizeof(cmd))
149 return -EINVAL;
150
151 err = ib_copy_from_udata(&cmd, uhw, sizeof(cmd));
152 if (err)
153 return err;
154
155 if (cmd.comp_mask)
156 return -EINVAL;
157
158 if (cmd.reserved)
159 return -EINVAL;
160 }
2528e33e 161
4b664c43
MB		 162 resp.response_length = offsetof(typeof(resp), response_length) +
163 sizeof(resp.response_length);
225c7b1f
RD		 164 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
165 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
166 if (!in_mad || !out_mad)
167 goto out;
168
169 init_query_mad(in_mad);
170 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
171
0a9a0188
JM		 172 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS,
173 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 174 if (err)
175 goto out;
176
177 memset(props, 0, sizeof *props);
178
3dec4878
JM		 179 have_ib_ports = num_ib_ports(dev->dev);
180
225c7b1f
RD		 181 props->fw_ver = dev->dev->caps.fw_ver;
182 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
183 IB_DEVICE_PORT_ACTIVE_EVENT |
184 IB_DEVICE_SYS_IMAGE_GUID |
521e575b
RL		 185 IB_DEVICE_RC_RNR_NAK_GEN |
186 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
225c7b1f
RD		 187 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR)
188 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
189 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR)
190 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
3dec4878 191 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports)
225c7b1f
RD		 192 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
193 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT)
194 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
8ff095ec
EC		 195 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
196 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
50e2ec91
MS		 197 if (dev->dev->caps.max_gso_sz &&
198 (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) &&
199 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH))
b832be1e 200 props->device_cap_flags |= IB_DEVICE_UD_TSO;
95d04f07
RD		 201 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
202 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
203 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) &&
204 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) &&
205 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR))
206 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
0a1405da
SH		 207 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)
208 props->device_cap_flags |= IB_DEVICE_XRC;
b425388d
SM		 209 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)
210 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW;
211 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
212 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B)
213 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
214 else
215 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
0a9b7d59 216 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
f77c0162 217 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
b425388d 218 }
225c7b1f
RD		 219
220 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
221 0xffffff;
872bf2fb 222 props->vendor_part_id = dev->dev->persist->pdev->device;
225c7b1f
RD		 223 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
224 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
225
226 props->max_mr_size = ~0ull;
227 props->page_size_cap = dev->dev->caps.page_size_cap;
5a0d0a61 228 props->max_qp = dev->dev->quotas.qp;
fc2d0044 229 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
225c7b1f
RD		 230 props->max_sge = min(dev->dev->caps.max_sq_sg,
231 dev->dev->caps.max_rq_sg);
5a0d0a61 232 props->max_cq = dev->dev->quotas.cq;
225c7b1f 233 props->max_cqe = dev->dev->caps.max_cqes;
5a0d0a61 234 props->max_mr = dev->dev->quotas.mpt;
225c7b1f
RD		 235 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;
236 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma;
237 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
238 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
5a0d0a61 239 props->max_srq = dev->dev->quotas.srq;
c8681f14 240 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1;
225c7b1f 241 props->max_srq_sge = dev->dev->caps.max_srq_sge;
5a0fd094 242 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
225c7b1f
RD		 243 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay;
244 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
245 IB_ATOMIC_HCA : IB_ATOMIC_NONE;
47e956b2 246 props->masked_atomic_cap = props->atomic_cap;
5ae2a7a8 247 props->max_pkeys = dev->dev->caps.pkey_table_len[1];
225c7b1f
RD		 248 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms;
249 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm;
250 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
251 props->max_mcast_grp;
a5bbe892 252 props->max_map_per_fmr = dev->dev->caps.max_fmr_maps;
4b664c43
MB		 253 props->hca_core_clock = dev->dev->caps.hca_core_clock * 1000UL;
254 props->timestamp_mask = 0xFFFFFFFFFFFFULL;
225c7b1f 255
4b664c43
MB		 256 err = mlx4_get_internal_clock_params(dev->dev, &clock_params);
257 if (err)
258 goto out;
259
260 if (uhw->outlen >= resp.response_length + sizeof(resp.hca_core_clock_offset)) {
261 resp.hca_core_clock_offset = clock_params.offset % PAGE_SIZE;
262 resp.response_length += sizeof(resp.hca_core_clock_offset);
263 resp.comp_mask |= QUERY_DEVICE_RESP_MASK_TIMESTAMP;
264 }
265
266 if (uhw->outlen) {
267 err = ib_copy_to_udata(uhw, &resp, resp.response_length);
268 if (err)
269 goto out;
270 }
225c7b1f
RD		 271out:
272 kfree(in_mad);
273 kfree(out_mad);
274
275 return err;
276}
277
fa417f7b
EC		 278static enum rdma_link_layer
279mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num)
225c7b1f 280{
fa417f7b 281 struct mlx4_dev *dev = to_mdev(device)->dev;
225c7b1f 282
65dab25d 283 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ?
fa417f7b
EC		 284 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET;
285}
225c7b1f 286
fa417f7b 287static int ib_link_query_port(struct ib_device *ibdev, u8 port,
0a9a0188 288 struct ib_port_attr *props, int netw_view)
fa417f7b 289{
a9c766bb
OG		 290 struct ib_smp *in_mad = NULL;
291 struct ib_smp *out_mad = NULL;
a5e12dff 292 int ext_active_speed;
0a9a0188 293 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
a9c766bb
OG		 294 int err = -ENOMEM;
295
296 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
297 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
298 if (!in_mad || !out_mad)
299 goto out;
300
301 init_query_mad(in_mad);
302 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
303 in_mad->attr_mod = cpu_to_be32(port);
304
0a9a0188
JM		 305 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
306 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
307
308 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
a9c766bb
OG		 309 in_mad, out_mad);
310 if (err)
311 goto out;
312
a5e12dff 313
225c7b1f
RD		 314 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
315 props->lmc = out_mad->data[34] & 0x7;
316 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
317 props->sm_sl = out_mad->data[36] & 0xf;
318 props->state = out_mad->data[32] & 0xf;
319 props->phys_state = out_mad->data[33] >> 4;
320 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
0a9a0188
JM		 321 if (netw_view)
322 props->gid_tbl_len = out_mad->data[50];
323 else
324 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
149983af 325 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz;
5ae2a7a8 326 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port];
225c7b1f
RD		 327 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
328 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
329 props->active_width = out_mad->data[31] & 0xf;
330 props->active_speed = out_mad->data[35] >> 4;
331 props->max_mtu = out_mad->data[41] & 0xf;
332 props->active_mtu = out_mad->data[36] >> 4;
333 props->subnet_timeout = out_mad->data[51] & 0x1f;
334 props->max_vl_num = out_mad->data[37] >> 4;
335 props->init_type_reply = out_mad->data[41] >> 4;
336
a5e12dff
MA		 337 /* Check if extended speeds (EDR/FDR/...) are supported */
338 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
339 ext_active_speed = out_mad->data[62] >> 4;
340
341 switch (ext_active_speed) {
342 case 1:
2e96691c 343 props->active_speed = IB_SPEED_FDR;
a5e12dff
MA		 344 break;
345 case 2:
2e96691c 346 props->active_speed = IB_SPEED_EDR;
a5e12dff
MA		 347 break;
348 }
349 }
350
351 /* If reported active speed is QDR, check if is FDR-10 */
2e96691c 352 if (props->active_speed == IB_SPEED_QDR) {
8154c07f
OG		 353 init_query_mad(in_mad);
354 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO;
355 in_mad->attr_mod = cpu_to_be32(port);
356
0a9a0188 357 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port,
8154c07f
OG		 358 NULL, NULL, in_mad, out_mad);
359 if (err)
bf6b47de 360 goto out;
8154c07f
OG		 361
362 /* Checking LinkSpeedActive for FDR-10 */
363 if (out_mad->data[15] & 0x1)
364 props->active_speed = IB_SPEED_FDR10;
a5e12dff 365 }
d2ef4068
OG		 366
367 /* Avoid wrong speed value returned by FW if the IB link is down. */
368 if (props->state == IB_PORT_DOWN)
369 props->active_speed = IB_SPEED_SDR;
370
a9c766bb
OG		 371out:
372 kfree(in_mad);
373 kfree(out_mad);
374 return err;
fa417f7b
EC		 375}
376
377static u8 state_to_phys_state(enum ib_port_state state)
378{
379 return state == IB_PORT_ACTIVE ? 5 : 3;
380}
381
382static int eth_link_query_port(struct ib_device *ibdev, u8 port,
0a9a0188 383 struct ib_port_attr *props, int netw_view)
fa417f7b 384{
a9c766bb
OG		 385
386 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
387 struct mlx4_ib_iboe *iboe = &mdev->iboe;
fa417f7b
EC		 388 struct net_device *ndev;
389 enum ib_mtu tmp;
a9c766bb
OG		 390 struct mlx4_cmd_mailbox *mailbox;
391 int err = 0;
a5750090 392 int is_bonded = mlx4_is_bonded(mdev->dev);
a9c766bb
OG		 393
394 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
395 if (IS_ERR(mailbox))
396 return PTR_ERR(mailbox);
fa417f7b 397
a9c766bb
OG		 398 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
399 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
400 MLX4_CMD_WRAPPED);
401 if (err)
402 goto out;
403
404 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ?
405 IB_WIDTH_4X : IB_WIDTH_1X;
2e96691c 406 props->active_speed = IB_SPEED_QDR;
b4a26a27 407 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_IP_BASED_GIDS;
a9c766bb
OG		 408 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
409 props->max_msg_sz = mdev->dev->caps.max_msg_sz;
fa417f7b 410 props->pkey_tbl_len = 1;
bcacb897 411 props->max_mtu = IB_MTU_4096;
a9c766bb 412 props->max_vl_num = 2;
fa417f7b
EC		 413 props->state = IB_PORT_DOWN;
414 props->phys_state = state_to_phys_state(props->state);
415 props->active_mtu = IB_MTU_256;
a5750090
MS		 416 if (is_bonded)
417 rtnl_lock(); /* required to get upper dev */
dba3ad2a 418 spin_lock_bh(&iboe->lock);
fa417f7b 419 ndev = iboe->netdevs[port - 1];
a5750090
MS		 420 if (ndev && is_bonded)
421 ndev = netdev_master_upper_dev_get(ndev);
fa417f7b 422 if (!ndev)
a9c766bb 423 goto out_unlock;
fa417f7b
EC		 424
425 tmp = iboe_get_mtu(ndev->mtu);
426 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256;
427
21d60609 428 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ?
fa417f7b
EC		 429 IB_PORT_ACTIVE : IB_PORT_DOWN;
430 props->phys_state = state_to_phys_state(props->state);
a9c766bb 431out_unlock:
dba3ad2a 432 spin_unlock_bh(&iboe->lock);
a5750090
MS		 433 if (is_bonded)
434 rtnl_unlock();
a9c766bb
OG		 435out:
436 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
437 return err;
fa417f7b
EC		 438}
439
0a9a0188
JM		 440int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
441 struct ib_port_attr *props, int netw_view)
fa417f7b 442{
a9c766bb 443 int err;
fa417f7b
EC		 444
445 memset(props, 0, sizeof *props);
446
fa417f7b 447 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ?
0a9a0188
JM		 448 ib_link_query_port(ibdev, port, props, netw_view) :
449 eth_link_query_port(ibdev, port, props, netw_view);
225c7b1f
RD		 450
451 return err;
452}
453
0a9a0188
JM		 454static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
455 struct ib_port_attr *props)
456{
457 /* returns host view */
458 return __mlx4_ib_query_port(ibdev, port, props, 0);
459}
460
a0c64a17
JM		 461int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
462 union ib_gid *gid, int netw_view)
225c7b1f
RD		 463{
464 struct ib_smp *in_mad = NULL;
465 struct ib_smp *out_mad = NULL;
466 int err = -ENOMEM;
a0c64a17
JM		 467 struct mlx4_ib_dev *dev = to_mdev(ibdev);
468 int clear = 0;
469 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 470
471 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
472 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
473 if (!in_mad || !out_mad)
474 goto out;
475
476 init_query_mad(in_mad);
477 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
478 in_mad->attr_mod = cpu_to_be32(port);
479
a0c64a17
JM		 480 if (mlx4_is_mfunc(dev->dev) && netw_view)
481 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
482
483 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 484 if (err)
485 goto out;
486
487 memcpy(gid->raw, out_mad->data + 8, 8);
488
a0c64a17
JM		 489 if (mlx4_is_mfunc(dev->dev) && !netw_view) {
490 if (index) {
491 /* For any index > 0, return the null guid */
492 err = 0;
493 clear = 1;
494 goto out;
495 }
496 }
497
225c7b1f
RD		 498 init_query_mad(in_mad);
499 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
500 in_mad->attr_mod = cpu_to_be32(index / 8);
501
a0c64a17 502 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port,
0a9a0188 503 NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 504 if (err)
505 goto out;
506
507 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
508
509out:
a0c64a17
JM		 510 if (clear)
511 memset(gid->raw + 8, 0, 8);
225c7b1f
RD		 512 kfree(in_mad);
513 kfree(out_mad);
514 return err;
515}
516
fa417f7b
EC		 517static int iboe_query_gid(struct ib_device *ibdev, u8 port, int index,
518 union ib_gid *gid)
519{
520 struct mlx4_ib_dev *dev = to_mdev(ibdev);
521
522 *gid = dev->iboe.gid_table[port - 1][index];
523
524 return 0;
525}
526
527static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
528 union ib_gid *gid)
529{
530 if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
a0c64a17 531 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0);
fa417f7b
EC		 532 else
533 return iboe_query_gid(ibdev, port, index, gid);
534}
535
0a9a0188
JM		 536int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
537 u16 *pkey, int netw_view)
225c7b1f
RD		 538{
539 struct ib_smp *in_mad = NULL;
540 struct ib_smp *out_mad = NULL;
0a9a0188 541 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 542 int err = -ENOMEM;
543
544 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
545 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
546 if (!in_mad || !out_mad)
547 goto out;
548
549 init_query_mad(in_mad);
550 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
551 in_mad->attr_mod = cpu_to_be32(index / 32);
552
0a9a0188
JM		 553 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
554 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
555
556 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
557 in_mad, out_mad);
225c7b1f
RD		 558 if (err)
559 goto out;
560
561 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
562
563out:
564 kfree(in_mad);
565 kfree(out_mad);
566 return err;
567}
568
0a9a0188
JM		 569static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
570{
571 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0);
572}
573
225c7b1f
RD		 574static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask,
575 struct ib_device_modify *props)
576{
d0d68b86 577 struct mlx4_cmd_mailbox *mailbox;
df7fba66 578 unsigned long flags;
d0d68b86 579
225c7b1f
RD		 580 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
581 return -EOPNOTSUPP;
582
d0d68b86
JM		 583 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
584 return 0;
585
992e8e6e
JM		 586 if (mlx4_is_slave(to_mdev(ibdev)->dev))
587 return -EOPNOTSUPP;
588
df7fba66 589 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags);
d0d68b86 590 memcpy(ibdev->node_desc, props->node_desc, 64);
df7fba66 591 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags);
d0d68b86
JM		 592
593 /*
594 * If possible, pass node desc to FW, so it can generate
595 * a 144 trap. If cmd fails, just ignore.
596 */
597 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev);
598 if (IS_ERR(mailbox))
599 return 0;
600
d0d68b86
JM		 601 memcpy(mailbox->buf, props->node_desc, 64);
602 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0,
992e8e6e 603 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
d0d68b86
JM		 604
605 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox);
225c7b1f
RD		 606
607 return 0;
608}
609
61565013
JM		 610static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols,
611 u32 cap_mask)
225c7b1f
RD		 612{
613 struct mlx4_cmd_mailbox *mailbox;
614 int err;
615
616 mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
617 if (IS_ERR(mailbox))
618 return PTR_ERR(mailbox);
619
5ae2a7a8
RD		 620 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
621 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6;
622 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
623 } else {
624 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols;
625 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask);
626 }
225c7b1f 627
a130b590
IS		 628 err = mlx4_cmd(dev->dev, mailbox->dma, port, MLX4_SET_PORT_IB_OPCODE,
629 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
630 MLX4_CMD_WRAPPED);
225c7b1f
RD		 631
632 mlx4_free_cmd_mailbox(dev->dev, mailbox);
633 return err;
634}
635
636static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
637 struct ib_port_modify *props)
638{
61565013
JM		 639 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
640 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
225c7b1f
RD		 641 struct ib_port_attr attr;
642 u32 cap_mask;
643 int err;
644
61565013
JM		 645 /* return OK if this is RoCE. CM calls ib_modify_port() regardless
646 * of whether port link layer is ETH or IB. For ETH ports, qkey
647 * violations and port capabilities are not meaningful.
648 */
649 if (is_eth)
650 return 0;
651
652 mutex_lock(&mdev->cap_mask_mutex);
225c7b1f
RD		 653
654 err = mlx4_ib_query_port(ibdev, port, &attr);
655 if (err)
656 goto out;
657
658 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
659 ~props->clr_port_cap_mask;
660
61565013
JM		 661 err = mlx4_ib_SET_PORT(mdev, port,
662 !!(mask & IB_PORT_RESET_QKEY_CNTR),
663 cap_mask);
225c7b1f
RD		 664
665out:
666 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
667 return err;
668}
669
670static struct ib_ucontext *mlx4_ib_alloc_ucontext(struct ib_device *ibdev,
671 struct ib_udata *udata)
672{
673 struct mlx4_ib_dev *dev = to_mdev(ibdev);
674 struct mlx4_ib_ucontext *context;
08ff3235 675 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3;
225c7b1f
RD		 676 struct mlx4_ib_alloc_ucontext_resp resp;
677 int err;
678
3b4a8cd5
JM		 679 if (!dev->ib_active)
680 return ERR_PTR(-EAGAIN);
681
08ff3235
OG		 682 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) {
683 resp_v3.qp_tab_size = dev->dev->caps.num_qps;
684 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size;
685 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
686 } else {
687 resp.dev_caps = dev->dev->caps.userspace_caps;
688 resp.qp_tab_size = dev->dev->caps.num_qps;
689 resp.bf_reg_size = dev->dev->caps.bf_reg_size;
690 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
691 resp.cqe_size = dev->dev->caps.cqe_size;
692 }
225c7b1f
RD		 693
694 context = kmalloc(sizeof *context, GFP_KERNEL);
695 if (!context)
696 return ERR_PTR(-ENOMEM);
697
698 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar);
699 if (err) {
700 kfree(context);
701 return ERR_PTR(err);
702 }
703
704 INIT_LIST_HEAD(&context->db_page_list);
705 mutex_init(&context->db_page_mutex);
706
08ff3235
OG		 707 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION)
708 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3));
709 else
710 err = ib_copy_to_udata(udata, &resp, sizeof(resp));
711
225c7b1f
RD		 712 if (err) {
713 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar);
714 kfree(context);
715 return ERR_PTR(-EFAULT);
716 }
717
718 return &context->ibucontext;
719}
720
721static int mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
722{
723 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
724
725 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar);
726 kfree(context);
727
728 return 0;
729}
730
731static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
732{
733 struct mlx4_ib_dev *dev = to_mdev(context->device);
734
735 if (vma->vm_end - vma->vm_start != PAGE_SIZE)
736 return -EINVAL;
737
738 if (vma->vm_pgoff == 0) {
739 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
740
741 if (io_remap_pfn_range(vma, vma->vm_start,
742 to_mucontext(context)->uar.pfn,
743 PAGE_SIZE, vma->vm_page_prot))
744 return -EAGAIN;
745 } else if (vma->vm_pgoff == 1 && dev->dev->caps.bf_reg_size != 0) {
e1d60ec6 746 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
225c7b1f
RD		 747
748 if (io_remap_pfn_range(vma, vma->vm_start,
749 to_mucontext(context)->uar.pfn +
750 dev->dev->caps.num_uars,
751 PAGE_SIZE, vma->vm_page_prot))
752 return -EAGAIN;
52033cfb
MB		 753 } else if (vma->vm_pgoff == 3) {
754 struct mlx4_clock_params params;
755 int ret = mlx4_get_internal_clock_params(dev->dev, &params);
756
757 if (ret)
758 return ret;
759
760 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
761 if (io_remap_pfn_range(vma, vma->vm_start,
762 (pci_resource_start(dev->dev->persist->pdev,
763 params.bar) +
764 params.offset)
765 >> PAGE_SHIFT,
766 PAGE_SIZE, vma->vm_page_prot))
767 return -EAGAIN;
768 } else {
225c7b1f 769 return -EINVAL;
52033cfb 770 }
225c7b1f
RD		 771
772 return 0;
773}
774
775static struct ib_pd *mlx4_ib_alloc_pd(struct ib_device *ibdev,
776 struct ib_ucontext *context,
777 struct ib_udata *udata)
778{
779 struct mlx4_ib_pd *pd;
780 int err;
781
782 pd = kmalloc(sizeof *pd, GFP_KERNEL);
783 if (!pd)
784 return ERR_PTR(-ENOMEM);
785
786 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn);
787 if (err) {
788 kfree(pd);
789 return ERR_PTR(err);
790 }
791
792 if (context)
793 if (ib_copy_to_udata(udata, &pd->pdn, sizeof (__u32))) {
794 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
795 kfree(pd);
796 return ERR_PTR(-EFAULT);
797 }
798
799 return &pd->ibpd;
800}
801
802static int mlx4_ib_dealloc_pd(struct ib_pd *pd)
803{
804 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
805 kfree(pd);
806
807 return 0;
808}
809
012a8ff5
SH		 810static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev,
811 struct ib_ucontext *context,
812 struct ib_udata *udata)
813{
814 struct mlx4_ib_xrcd *xrcd;
8e37210b 815 struct ib_cq_init_attr cq_attr = {};
012a8ff5
SH		 816 int err;
817
818 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
819 return ERR_PTR(-ENOSYS);
820
821 xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL);
822 if (!xrcd)
823 return ERR_PTR(-ENOMEM);
824
825 err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn);
826 if (err)
827 goto err1;
828
829 xrcd->pd = ib_alloc_pd(ibdev);
830 if (IS_ERR(xrcd->pd)) {
831 err = PTR_ERR(xrcd->pd);
832 goto err2;
833 }
834
8e37210b
MB		 835 cq_attr.cqe = 1;
836 xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, &cq_attr);
012a8ff5
SH		 837 if (IS_ERR(xrcd->cq)) {
838 err = PTR_ERR(xrcd->cq);
839 goto err3;
840 }
841
842 return &xrcd->ibxrcd;
843
844err3:
845 ib_dealloc_pd(xrcd->pd);
846err2:
847 mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn);
848err1:
849 kfree(xrcd);
850 return ERR_PTR(err);
851}
852
853static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd)
854{
855 ib_destroy_cq(to_mxrcd(xrcd)->cq);
856 ib_dealloc_pd(to_mxrcd(xrcd)->pd);
857 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
858 kfree(xrcd);
859
860 return 0;
861}
862
fa417f7b
EC		 863static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
864{
865 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
866 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
867 struct mlx4_ib_gid_entry *ge;
868
869 ge = kzalloc(sizeof *ge, GFP_KERNEL);
870 if (!ge)
871 return -ENOMEM;
872
873 ge->gid = *gid;
874 if (mlx4_ib_add_mc(mdev, mqp, gid)) {
875 ge->port = mqp->port;
876 ge->added = 1;
877 }
878
879 mutex_lock(&mqp->mutex);
880 list_add_tail(&ge->list, &mqp->gid_list);
881 mutex_unlock(&mqp->mutex);
882
883 return 0;
884}
885
886int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
887 union ib_gid *gid)
888{
fa417f7b
EC		 889 struct net_device *ndev;
890 int ret = 0;
891
892 if (!mqp->port)
893 return 0;
894
dba3ad2a 895 spin_lock_bh(&mdev->iboe.lock);
fa417f7b
EC		 896 ndev = mdev->iboe.netdevs[mqp->port - 1];
897 if (ndev)
898 dev_hold(ndev);
dba3ad2a 899 spin_unlock_bh(&mdev->iboe.lock);
fa417f7b
EC		 900
901 if (ndev) {
fa417f7b 902 ret = 1;
fa417f7b
EC		 903 dev_put(ndev);
904 }
905
906 return ret;
907}
908
0ff1fb65
HHZ		 909struct mlx4_ib_steering {
910 struct list_head list;
146d6e19 911 struct mlx4_flow_reg_id reg_id;
0ff1fb65
HHZ		 912 union ib_gid gid;
913};
914
f77c0162 915static int parse_flow_attr(struct mlx4_dev *dev,
a37a1a42 916 u32 qp_num,
f77c0162
HHZ		 917 union ib_flow_spec *ib_spec,
918 struct _rule_hw *mlx4_spec)
919{
920 enum mlx4_net_trans_rule_id type;
921
922 switch (ib_spec->type) {
923 case IB_FLOW_SPEC_ETH:
924 type = MLX4_NET_TRANS_RULE_ID_ETH;
925 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
926 ETH_ALEN);
927 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac,
928 ETH_ALEN);
929 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
930 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
931 break;
a37a1a42
MB		 932 case IB_FLOW_SPEC_IB:
933 type = MLX4_NET_TRANS_RULE_ID_IB;
934 mlx4_spec->ib.l3_qpn =
935 cpu_to_be32(qp_num);
936 mlx4_spec->ib.qpn_mask =
937 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK);
938 break;
939
f77c0162
HHZ		 940
941 case IB_FLOW_SPEC_IPV4:
942 type = MLX4_NET_TRANS_RULE_ID_IPV4;
943 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
944 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip;
945 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
946 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip;
947 break;
948
949 case IB_FLOW_SPEC_TCP:
950 case IB_FLOW_SPEC_UDP:
951 type = ib_spec->type == IB_FLOW_SPEC_TCP ?
952 MLX4_NET_TRANS_RULE_ID_TCP :
953 MLX4_NET_TRANS_RULE_ID_UDP;
954 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
955 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port;
956 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
957 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port;
958 break;
959
960 default:
961 return -EINVAL;
962 }
963 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 ||
964 mlx4_hw_rule_sz(dev, type) < 0)
965 return -EINVAL;
966 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type));
967 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2;
968 return mlx4_hw_rule_sz(dev, type);
969}
970
a37a1a42
MB		 971struct default_rules {
972 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
973 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
974 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS];
975 __u8 link_layer;
976};
977static const struct default_rules default_table[] = {
978 {
979 .mandatory_fields = {IB_FLOW_SPEC_IPV4},
980 .mandatory_not_fields = {IB_FLOW_SPEC_ETH},
981 .rules_create_list = {IB_FLOW_SPEC_IB},
982 .link_layer = IB_LINK_LAYER_INFINIBAND
983 }
984};
985
986static int __mlx4_ib_default_rules_match(struct ib_qp *qp,
987 struct ib_flow_attr *flow_attr)
988{
989 int i, j, k;
990 void *ib_flow;
991 const struct default_rules *pdefault_rules = default_table;
992 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port);
993
a57f23f6 994 for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) {
a37a1a42
MB		 995 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS];
996 memset(&field_types, 0, sizeof(field_types));
997
998 if (link_layer != pdefault_rules->link_layer)
999 continue;
1000
1001 ib_flow = flow_attr + 1;
1002 /* we assume the specs are sorted */
1003 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS &&
1004 j < flow_attr->num_of_specs; k++) {
1005 union ib_flow_spec *current_flow =
1006 (union ib_flow_spec *)ib_flow;
1007
1008 /* same layer but different type */
1009 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) ==
1010 (pdefault_rules->mandatory_fields[k] &
1011 IB_FLOW_SPEC_LAYER_MASK)) &&
1012 (current_flow->type !=
1013 pdefault_rules->mandatory_fields[k]))
1014 goto out;
1015
1016 /* same layer, try match next one */
1017 if (current_flow->type ==
1018 pdefault_rules->mandatory_fields[k]) {
1019 j++;
1020 ib_flow +=
1021 ((union ib_flow_spec *)ib_flow)->size;
1022 }
1023 }
1024
1025 ib_flow = flow_attr + 1;
1026 for (j = 0; j < flow_attr->num_of_specs;
1027 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size)
1028 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++)
1029 /* same layer and same type */
1030 if (((union ib_flow_spec *)ib_flow)->type ==
1031 pdefault_rules->mandatory_not_fields[k])
1032 goto out;
1033
1034 return i;
1035 }
1036out:
1037 return -1;
1038}
1039
1040static int __mlx4_ib_create_default_rules(
1041 struct mlx4_ib_dev *mdev,
1042 struct ib_qp *qp,
1043 const struct default_rules *pdefault_rules,
1044 struct _rule_hw *mlx4_spec) {
1045 int size = 0;
1046 int i;
1047
a57f23f6 1048 for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) {
a37a1a42
MB		 1049 int ret;
1050 union ib_flow_spec ib_spec;
1051 switch (pdefault_rules->rules_create_list[i]) {
1052 case 0:
1053 /* no rule */
1054 continue;
1055 case IB_FLOW_SPEC_IB:
1056 ib_spec.type = IB_FLOW_SPEC_IB;
1057 ib_spec.size = sizeof(struct ib_flow_spec_ib);
1058
1059 break;
1060 default:
1061 /* invalid rule */
1062 return -EINVAL;
1063 }
1064 /* We must put empty rule, qpn is being ignored */
1065 ret = parse_flow_attr(mdev->dev, 0, &ib_spec,
1066 mlx4_spec);
1067 if (ret < 0) {
1068 pr_info("invalid parsing\n");
1069 return -EINVAL;
1070 }
1071
1072 mlx4_spec = (void *)mlx4_spec + ret;
1073 size += ret;
1074 }
1075 return size;
1076}
1077
f77c0162
HHZ		 1078static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1079 int domain,
1080 enum mlx4_net_trans_promisc_mode flow_type,
1081 u64 *reg_id)
1082{
1083 int ret, i;
1084 int size = 0;
1085 void *ib_flow;
1086 struct mlx4_ib_dev *mdev = to_mdev(qp->device);
1087 struct mlx4_cmd_mailbox *mailbox;
1088 struct mlx4_net_trans_rule_hw_ctrl *ctrl;
a37a1a42 1089 int default_flow;
f77c0162
HHZ		 1090
1091 static const u16 __mlx4_domain[] = {
1092 [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS,
1093 [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL,
1094 [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS,
1095 [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC,
1096 };
1097
1098 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
1099 pr_err("Invalid priority value %d\n", flow_attr->priority);
1100 return -EINVAL;
1101 }
1102
1103 if (domain >= IB_FLOW_DOMAIN_NUM) {
1104 pr_err("Invalid domain value %d\n", domain);
1105 return -EINVAL;
1106 }
1107
1108 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
1109 return -EINVAL;
1110
1111 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
1112 if (IS_ERR(mailbox))
1113 return PTR_ERR(mailbox);
f77c0162
HHZ		 1114 ctrl = mailbox->buf;
1115
1116 ctrl->prio = cpu_to_be16(__mlx4_domain[domain] |
1117 flow_attr->priority);
1118 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
1119 ctrl->port = flow_attr->port;
1120 ctrl->qpn = cpu_to_be32(qp->qp_num);
1121
1122 ib_flow = flow_attr + 1;
1123 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
a37a1a42
MB		 1124 /* Add default flows */
1125 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr);
1126 if (default_flow >= 0) {
1127 ret = __mlx4_ib_create_default_rules(
1128 mdev, qp, default_table + default_flow,
1129 mailbox->buf + size);
1130 if (ret < 0) {
1131 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1132 return -EINVAL;
1133 }
1134 size += ret;
1135 }
f77c0162 1136 for (i = 0; i < flow_attr->num_of_specs; i++) {
a37a1a42
MB		 1137 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow,
1138 mailbox->buf + size);
f77c0162
HHZ		 1139 if (ret < 0) {
1140 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1141 return -EINVAL;
1142 }
1143 ib_flow += ((union ib_flow_spec *) ib_flow)->size;
1144 size += ret;
1145 }
1146
1147 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0,
1148 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
1149 MLX4_CMD_NATIVE);
1150 if (ret == -ENOMEM)
1151 pr_err("mcg table is full. Fail to register network rule.\n");
1152 else if (ret == -ENXIO)
1153 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n");
1154 else if (ret)
1155 pr_err("Invalid argumant. Fail to register network rule.\n");
1156
1157 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1158 return ret;
1159}
1160
1161static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id)
1162{
1163 int err;
1164 err = mlx4_cmd(dev, reg_id, 0, 0,
1165 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
1166 MLX4_CMD_NATIVE);
1167 if (err)
1168 pr_err("Fail to detach network rule. registration id = 0x%llx\n",
1169 reg_id);
1170 return err;
1171}
1172
d2fce8a9
OG		 1173static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1174 u64 *reg_id)
1175{
1176 void *ib_flow;
1177 union ib_flow_spec *ib_spec;
1178 struct mlx4_dev *dev = to_mdev(qp->device)->dev;
1179 int err = 0;
1180
5eff6dad
OG		 1181 if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
1182 dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
d2fce8a9
OG		 1183 return 0; /* do nothing */
1184
1185 ib_flow = flow_attr + 1;
1186 ib_spec = (union ib_flow_spec *)ib_flow;
1187
1188 if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1)
1189 return 0; /* do nothing */
1190
1191 err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac,
1192 flow_attr->port, qp->qp_num,
1193 MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff),
1194 reg_id);
1195 return err;
1196}
1197
f77c0162
HHZ		 1198static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
1199 struct ib_flow_attr *flow_attr,
1200 int domain)
1201{
146d6e19 1202 int err = 0, i = 0, j = 0;
f77c0162
HHZ		 1203 struct mlx4_ib_flow *mflow;
1204 enum mlx4_net_trans_promisc_mode type[2];
146d6e19
MS		 1205 struct mlx4_dev *dev = (to_mdev(qp->device))->dev;
1206 int is_bonded = mlx4_is_bonded(dev);
f77c0162
HHZ		 1207
1208 memset(type, 0, sizeof(type));
1209
1210 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL);
1211 if (!mflow) {
1212 err = -ENOMEM;
1213 goto err_free;
1214 }
1215
1216 switch (flow_attr->type) {
1217 case IB_FLOW_ATTR_NORMAL:
1218 type[0] = MLX4_FS_REGULAR;
1219 break;
1220
1221 case IB_FLOW_ATTR_ALL_DEFAULT:
1222 type[0] = MLX4_FS_ALL_DEFAULT;
1223 break;
1224
1225 case IB_FLOW_ATTR_MC_DEFAULT:
1226 type[0] = MLX4_FS_MC_DEFAULT;
1227 break;
1228
1229 case IB_FLOW_ATTR_SNIFFER:
1230 type[0] = MLX4_FS_UC_SNIFFER;
1231 type[1] = MLX4_FS_MC_SNIFFER;
1232 break;
1233
1234 default:
1235 err = -EINVAL;
1236 goto err_free;
1237 }
1238
1239 while (i < ARRAY_SIZE(type) && type[i]) {
1240 err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i],
146d6e19 1241 &mflow->reg_id[i].id);
f77c0162 1242 if (err)
571e1b2c 1243 goto err_create_flow;
146d6e19 1244 if (is_bonded) {
824c25c1
MS		 1245 /* Application always sees one port so the mirror rule
1246 * must be on port #2
1247 */
146d6e19
MS		 1248 flow_attr->port = 2;
1249 err = __mlx4_ib_create_flow(qp, flow_attr,
1250 domain, type[j],
1251 &mflow->reg_id[j].mirror);
1252 flow_attr->port = 1;
1253 if (err)
1254 goto err_create_flow;
1255 j++;
1256 }
1257
11562568 1258 i++;
f77c0162
HHZ		 1259 }
1260
d2fce8a9 1261 if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) {
146d6e19
MS		 1262 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1263 &mflow->reg_id[i].id);
d2fce8a9 1264 if (err)
571e1b2c 1265 goto err_create_flow;
11562568 1266
146d6e19
MS		 1267 if (is_bonded) {
1268 flow_attr->port = 2;
1269 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1270 &mflow->reg_id[j].mirror);
1271 flow_attr->port = 1;
1272 if (err)
1273 goto err_create_flow;
1274 j++;
1275 }
1276 /* function to create mirror rule */
11562568 1277 i++;
d2fce8a9
OG		 1278 }
1279
f77c0162
HHZ		 1280 return &mflow->ibflow;
1281
571e1b2c
OG		 1282err_create_flow:
1283 while (i) {
146d6e19
MS		 1284 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1285 mflow->reg_id[i].id);
571e1b2c
OG		 1286 i--;
1287 }
146d6e19
MS		 1288
1289 while (j) {
1290 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1291 mflow->reg_id[j].mirror);
1292 j--;
1293 }
f77c0162
HHZ		 1294err_free:
1295 kfree(mflow);
1296 return ERR_PTR(err);
1297}
1298
1299static int mlx4_ib_destroy_flow(struct ib_flow *flow_id)
1300{
1301 int err, ret = 0;
1302 int i = 0;
1303 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device);
1304 struct mlx4_ib_flow *mflow = to_mflow(flow_id);
1305
146d6e19
MS		 1306 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i].id) {
1307 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i].id);
f77c0162
HHZ		 1308 if (err)
1309 ret = err;
146d6e19
MS		 1310 if (mflow->reg_id[i].mirror) {
1311 err = __mlx4_ib_destroy_flow(mdev->dev,
1312 mflow->reg_id[i].mirror);
1313 if (err)
1314 ret = err;
1315 }
f77c0162
HHZ		 1316 i++;
1317 }
1318
1319 kfree(mflow);
1320 return ret;
1321}
1322
225c7b1f
RD		 1323static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1324{
fa417f7b
EC		 1325 int err;
1326 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
146d6e19 1327 struct mlx4_dev *dev = mdev->dev;
fa417f7b 1328 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
0ff1fb65 1329 struct mlx4_ib_steering *ib_steering = NULL;
e9a7faf1 1330 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
146d6e19 1331 struct mlx4_flow_reg_id reg_id;
0ff1fb65
HHZ		 1332
1333 if (mdev->dev->caps.steering_mode ==
1334 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1335 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL);
1336 if (!ib_steering)
1337 return -ENOMEM;
1338 }
fa417f7b 1339
0ff1fb65
HHZ		 1340 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port,
1341 !!(mqp->flags &
1342 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
146d6e19 1343 prot, &reg_id.id);
e9a7faf1
OG		 1344 if (err) {
1345 pr_err("multicast attach op failed, err %d\n", err);
0ff1fb65 1346 goto err_malloc;
e9a7faf1 1347 }
fa417f7b 1348
146d6e19
MS		 1349 reg_id.mirror = 0;
1350 if (mlx4_is_bonded(dev)) {
824c25c1
MS		 1351 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw,
1352 (mqp->port == 1) ? 2 : 1,
146d6e19
MS		 1353 !!(mqp->flags &
1354 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1355 prot, &reg_id.mirror);
1356 if (err)
1357 goto err_add;
1358 }
1359
fa417f7b
EC		 1360 err = add_gid_entry(ibqp, gid);
1361 if (err)
1362 goto err_add;
1363
0ff1fb65
HHZ		 1364 if (ib_steering) {
1365 memcpy(ib_steering->gid.raw, gid->raw, 16);
1366 ib_steering->reg_id = reg_id;
1367 mutex_lock(&mqp->mutex);
1368 list_add(&ib_steering->list, &mqp->steering_rules);
1369 mutex_unlock(&mqp->mutex);
1370 }
fa417f7b
EC		 1371 return 0;
1372
1373err_add:
0ff1fb65 1374 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
146d6e19
MS		 1375 prot, reg_id.id);
1376 if (reg_id.mirror)
1377 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1378 prot, reg_id.mirror);
0ff1fb65
HHZ		 1379err_malloc:
1380 kfree(ib_steering);
1381
fa417f7b
EC		 1382 return err;
1383}
1384
1385static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw)
1386{
1387 struct mlx4_ib_gid_entry *ge;
1388 struct mlx4_ib_gid_entry *tmp;
1389 struct mlx4_ib_gid_entry *ret = NULL;
1390
1391 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) {
1392 if (!memcmp(raw, ge->gid.raw, 16)) {
1393 ret = ge;
1394 break;
1395 }
1396 }
1397
1398 return ret;
225c7b1f
RD		 1399}
1400
1401static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1402{
fa417f7b
EC		 1403 int err;
1404 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
146d6e19 1405 struct mlx4_dev *dev = mdev->dev;
fa417f7b 1406 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
fa417f7b
EC		 1407 struct net_device *ndev;
1408 struct mlx4_ib_gid_entry *ge;
146d6e19 1409 struct mlx4_flow_reg_id reg_id = {0, 0};
e9a7faf1 1410 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
0ff1fb65
HHZ		 1411
1412 if (mdev->dev->caps.steering_mode ==
1413 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1414 struct mlx4_ib_steering *ib_steering;
1415
1416 mutex_lock(&mqp->mutex);
1417 list_for_each_entry(ib_steering, &mqp->steering_rules, list) {
1418 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) {
1419 list_del(&ib_steering->list);
1420 break;
1421 }
1422 }
1423 mutex_unlock(&mqp->mutex);
1424 if (&ib_steering->list == &mqp->steering_rules) {
1425 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n");
1426 return -EINVAL;
1427 }
1428 reg_id = ib_steering->reg_id;
1429 kfree(ib_steering);
1430 }
fa417f7b 1431
0ff1fb65 1432 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
146d6e19 1433 prot, reg_id.id);
fa417f7b
EC		 1434 if (err)
1435 return err;
1436
146d6e19
MS		 1437 if (mlx4_is_bonded(dev)) {
1438 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1439 prot, reg_id.mirror);
1440 if (err)
1441 return err;
1442 }
1443
fa417f7b
EC		 1444 mutex_lock(&mqp->mutex);
1445 ge = find_gid_entry(mqp, gid->raw);
1446 if (ge) {
dba3ad2a 1447 spin_lock_bh(&mdev->iboe.lock);
fa417f7b
EC		 1448 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL;
1449 if (ndev)
1450 dev_hold(ndev);
dba3ad2a 1451 spin_unlock_bh(&mdev->iboe.lock);
d487ee77 1452 if (ndev)
fa417f7b 1453 dev_put(ndev);
fa417f7b
EC		 1454 list_del(&ge->list);
1455 kfree(ge);
1456 } else
987c8f8f 1457 pr_warn("could not find mgid entry\n");
fa417f7b
EC		 1458
1459 mutex_unlock(&mqp->mutex);
1460
1461 return 0;
225c7b1f
RD		 1462}
1463
1464static int init_node_data(struct mlx4_ib_dev *dev)
1465{
1466 struct ib_smp *in_mad = NULL;
1467 struct ib_smp *out_mad = NULL;
0a9a0188 1468 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
225c7b1f
RD		 1469 int err = -ENOMEM;
1470
1471 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
1472 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
1473 if (!in_mad || !out_mad)
1474 goto out;
1475
1476 init_query_mad(in_mad);
1477 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
0a9a0188
JM		 1478 if (mlx4_is_master(dev->dev))
1479 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
225c7b1f 1480
0a9a0188 1481 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 1482 if (err)
1483 goto out;
1484
1485 memcpy(dev->ib_dev.node_desc, out_mad->data, 64);
1486
1487 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
1488
0a9a0188 1489 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
225c7b1f
RD		 1490 if (err)
1491 goto out;
1492
992e8e6e 1493 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
225c7b1f
RD		 1494 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
1495
1496out:
1497 kfree(in_mad);
1498 kfree(out_mad);
1499 return err;
1500}
1501
f4e91eb4
TJ		 1502static ssize_t show_hca(struct device *device, struct device_attribute *attr,
1503 char *buf)
cd9281d8 1504{
f4e91eb4
TJ		 1505 struct mlx4_ib_dev *dev =
1506 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
872bf2fb 1507 return sprintf(buf, "MT%d\n", dev->dev->persist->pdev->device);
cd9281d8
JM		 1508}
1509
f4e91eb4
TJ		 1510static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr,
1511 char *buf)
cd9281d8 1512{
f4e91eb4
TJ		 1513 struct mlx4_ib_dev *dev =
1514 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
cd9281d8
JM		 1515 return sprintf(buf, "%d.%d.%d\n", (int) (dev->dev->caps.fw_ver >> 32),
1516 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff,
1517 (int) dev->dev->caps.fw_ver & 0xffff);
1518}
1519
f4e91eb4
TJ		 1520static ssize_t show_rev(struct device *device, struct device_attribute *attr,
1521 char *buf)
cd9281d8 1522{
f4e91eb4
TJ		 1523 struct mlx4_ib_dev *dev =
1524 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
cd9281d8
JM		 1525 return sprintf(buf, "%x\n", dev->dev->rev_id);
1526}
1527
f4e91eb4
TJ		 1528static ssize_t show_board(struct device *device, struct device_attribute *attr,
1529 char *buf)
cd9281d8 1530{
f4e91eb4
TJ		 1531 struct mlx4_ib_dev *dev =
1532 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
1533 return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN,
1534 dev->dev->board_id);
cd9281d8
JM		 1535}
1536
f4e91eb4
TJ		 1537static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
1538static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
1539static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
1540static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
cd9281d8 1541
f4e91eb4
TJ		 1542static struct device_attribute *mlx4_class_attributes[] = {
1543 &dev_attr_hw_rev,
1544 &dev_attr_fw_ver,
1545 &dev_attr_hca_type,
1546 &dev_attr_board_id
cd9281d8
JM		 1547};
1548
acc4fccf
MS		 1549static void mlx4_addrconf_ifid_eui48(u8 *eui, u16 vlan_id,
1550 struct net_device *dev)
1551{
1552 memcpy(eui, dev->dev_addr, 3);
1553 memcpy(eui + 5, dev->dev_addr + 3, 3);
1554 if (vlan_id < 0x1000) {
1555 eui[3] = vlan_id >> 8;
1556 eui[4] = vlan_id & 0xff;
1557 } else {
1558 eui[3] = 0xff;
1559 eui[4] = 0xfe;
1560 }
1561 eui[0] ^= 2;
1562}
1563
fa417f7b
EC		 1564static void update_gids_task(struct work_struct *work)
1565{
1566 struct update_gid_work *gw = container_of(work, struct update_gid_work, work);
1567 struct mlx4_cmd_mailbox *mailbox;
1568 union ib_gid *gids;
1569 int err;
1570 struct mlx4_dev *dev = gw->dev->dev;
a5750090 1571 int is_bonded = mlx4_is_bonded(dev);
fa417f7b 1572
4bf9715f
MS		 1573 if (!gw->dev->ib_active)
1574 return;
1575
fa417f7b
EC		 1576 mailbox = mlx4_alloc_cmd_mailbox(dev);
1577 if (IS_ERR(mailbox)) {
987c8f8f 1578 pr_warn("update gid table failed %ld\n", PTR_ERR(mailbox));
fa417f7b
EC		 1579 return;
1580 }
1581
1582 gids = mailbox->buf;
1583 memcpy(gids, gw->gids, sizeof gw->gids);
1584
1585 err = mlx4_cmd(dev, mailbox->dma, MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
a130b590
IS		 1586 MLX4_SET_PORT_ETH_OPCODE, MLX4_CMD_SET_PORT,
1587 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
fa417f7b 1588 if (err)
987c8f8f 1589 pr_warn("set port command failed\n");
d487ee77 1590 else
a5750090
MS		 1591 if ((gw->port == 1) || !is_bonded)
1592 mlx4_ib_dispatch_event(gw->dev,
1593 is_bonded ? 1 : gw->port,
1594 IB_EVENT_GID_CHANGE);
fa417f7b
EC		 1595
1596 mlx4_free_cmd_mailbox(dev, mailbox);
1597 kfree(gw);
1598}
1599
d487ee77 1600static void reset_gids_task(struct work_struct *work)
fa417f7b 1601{
d487ee77
MS		 1602 struct update_gid_work *gw =
1603 container_of(work, struct update_gid_work, work);
1604 struct mlx4_cmd_mailbox *mailbox;
1605 union ib_gid *gids;
1606 int err;
d487ee77 1607 struct mlx4_dev *dev = gw->dev->dev;
fa417f7b 1608
4bf9715f
MS		 1609 if (!gw->dev->ib_active)
1610 return;
1611
d487ee77
MS		 1612 mailbox = mlx4_alloc_cmd_mailbox(dev);
1613 if (IS_ERR(mailbox)) {
1614 pr_warn("reset gid table failed\n");
1615 goto free;
1616 }
fa417f7b 1617
d487ee77
MS		 1618 gids = mailbox->buf;
1619 memcpy(gids, gw->gids, sizeof(gw->gids));
1620
5071456f
MS		 1621 if (mlx4_ib_port_link_layer(&gw->dev->ib_dev, gw->port) ==
1622 IB_LINK_LAYER_ETHERNET) {
1623 err = mlx4_cmd(dev, mailbox->dma,
1624 MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
a130b590 1625 MLX4_SET_PORT_ETH_OPCODE, MLX4_CMD_SET_PORT,
5071456f
MS		 1626 MLX4_CMD_TIME_CLASS_B,
1627 MLX4_CMD_WRAPPED);
1628 if (err)
f4f01b54 1629 pr_warn("set port %d command failed\n", gw->port);
4c3eb3ca
EC		 1630 }
1631
d487ee77
MS		 1632 mlx4_free_cmd_mailbox(dev, mailbox);
1633free:
1634 kfree(gw);
1635}
4c3eb3ca 1636
d487ee77 1637static int update_gid_table(struct mlx4_ib_dev *dev, int port,
acc4fccf
MS		 1638 union ib_gid *gid, int clear,
1639 int default_gid)
d487ee77
MS		 1640{
1641 struct update_gid_work *work;
1642 int i;
1643 int need_update = 0;
1644 int free = -1;
1645 int found = -1;
1646 int max_gids;
1647
acc4fccf
MS		 1648 if (default_gid) {
1649 free = 0;
1650 } else {
1651 max_gids = dev->dev->caps.gid_table_len[port];
1652 for (i = 1; i < max_gids; ++i) {
1653 if (!memcmp(&dev->iboe.gid_table[port - 1][i], gid,
d487ee77 1654 sizeof(*gid)))
acc4fccf
MS		 1655 found = i;
1656
1657 if (clear) {
1658 if (found >= 0) {
1659 need_update = 1;
1660 dev->iboe.gid_table[port - 1][found] =
1661 zgid;
1662 break;
1663 }
1664 } else {
1665 if (found >= 0)
1666 break;
1667
1668 if (free < 0 &&
1669 !memcmp(&dev->iboe.gid_table[port - 1][i],
1670 &zgid, sizeof(*gid)))
1671 free = i;
1672 }
4c3eb3ca 1673 }
fa417f7b 1674 }
4c3eb3ca 1675
d487ee77
MS		 1676 if (found == -1 && !clear && free >= 0) {
1677 dev->iboe.gid_table[port - 1][free] = *gid;
1678 need_update = 1;
1679 }
fa417f7b 1680
d487ee77
MS		 1681 if (!need_update)
1682 return 0;
1683
1684 work = kzalloc(sizeof(*work), GFP_ATOMIC);
1685 if (!work)
1686 return -ENOMEM;
1687
1688 memcpy(work->gids, dev->iboe.gid_table[port - 1], sizeof(work->gids));
1689 INIT_WORK(&work->work, update_gids_task);
1690 work->port = port;
1691 work->dev = dev;
1692 queue_work(wq, &work->work);
fa417f7b
EC		 1693
1694 return 0;
d487ee77 1695}
4c3eb3ca 1696
acc4fccf 1697static void mlx4_make_default_gid(struct net_device *dev, union ib_gid *gid)
d487ee77 1698{
acc4fccf
MS		 1699 gid->global.subnet_prefix = cpu_to_be64(0xfe80000000000000LL);
1700 mlx4_addrconf_ifid_eui48(&gid->raw[8], 0xffff, dev);
1701}
1702
d487ee77 1703
5071456f 1704static int reset_gid_table(struct mlx4_ib_dev *dev, u8 port)
d487ee77
MS		 1705{
1706 struct update_gid_work *work;
d487ee77
MS		 1707
1708 work = kzalloc(sizeof(*work), GFP_ATOMIC);
1709 if (!work)
1710 return -ENOMEM;
5071456f
MS		 1711
1712 memset(dev->iboe.gid_table[port - 1], 0, sizeof(work->gids));
d487ee77
MS		 1713 memset(work->gids, 0, sizeof(work->gids));
1714 INIT_WORK(&work->work, reset_gids_task);
1715 work->dev = dev;
5071456f 1716 work->port = port;
d487ee77
MS		 1717 queue_work(wq, &work->work);
1718 return 0;
fa417f7b
EC		 1719}
1720
d487ee77
MS		 1721static int mlx4_ib_addr_event(int event, struct net_device *event_netdev,
1722 struct mlx4_ib_dev *ibdev, union ib_gid *gid)
fa417f7b 1723{
d487ee77
MS		 1724 struct mlx4_ib_iboe *iboe;
1725 int port = 0;
1726 struct net_device *real_dev = rdma_vlan_dev_real_dev(event_netdev) ?
1727 rdma_vlan_dev_real_dev(event_netdev) :
1728 event_netdev;
acc4fccf
MS		 1729 union ib_gid default_gid;
1730
1731 mlx4_make_default_gid(real_dev, &default_gid);
1732
1733 if (!memcmp(gid, &default_gid, sizeof(*gid)))
1734 return 0;
d487ee77
MS		 1735
1736 if (event != NETDEV_DOWN && event != NETDEV_UP)
1737 return 0;
1738
1739 if ((real_dev != event_netdev) &&
1740 (event == NETDEV_DOWN) &&
1741 rdma_link_local_addr((struct in6_addr *)gid))
1742 return 0;
1743
1744 iboe = &ibdev->iboe;
dba3ad2a 1745 spin_lock_bh(&iboe->lock);
d487ee77 1746
82373701 1747 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port)
d487ee77
MS		 1748 if ((netif_is_bond_master(real_dev) &&
1749 (real_dev == iboe->masters[port - 1])) ||
1750 (!netif_is_bond_master(real_dev) &&
1751 (real_dev == iboe->netdevs[port - 1])))
1752 update_gid_table(ibdev, port, gid,
acc4fccf 1753 event == NETDEV_DOWN, 0);
d487ee77 1754
dba3ad2a 1755 spin_unlock_bh(&iboe->lock);
d487ee77 1756 return 0;
fa417f7b 1757
fa417f7b
EC		 1758}
1759
d487ee77
MS		 1760static u8 mlx4_ib_get_dev_port(struct net_device *dev,
1761 struct mlx4_ib_dev *ibdev)
fa417f7b 1762{
d487ee77
MS		 1763 u8 port = 0;
1764 struct mlx4_ib_iboe *iboe;
1765 struct net_device *real_dev = rdma_vlan_dev_real_dev(dev) ?
1766 rdma_vlan_dev_real_dev(dev) : dev;
1767
1768 iboe = &ibdev->iboe;
d487ee77 1769
82373701 1770 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port)
d487ee77
MS		 1771 if ((netif_is_bond_master(real_dev) &&
1772 (real_dev == iboe->masters[port - 1])) ||
1773 (!netif_is_bond_master(real_dev) &&
1774 (real_dev == iboe->netdevs[port - 1])))
1775 break;
1776
82373701 1777 if ((port == 0) || (port > ibdev->dev->caps.num_ports))
d487ee77
MS		 1778 return 0;
1779 else
1780 return port;
fa417f7b
EC		 1781}
1782
d487ee77
MS		 1783static int mlx4_ib_inet_event(struct notifier_block *this, unsigned long event,
1784 void *ptr)
fa417f7b 1785{
d487ee77
MS		 1786 struct mlx4_ib_dev *ibdev;
1787 struct in_ifaddr *ifa = ptr;
1788 union ib_gid gid;
1789 struct net_device *event_netdev = ifa->ifa_dev->dev;
1790
1791 ipv6_addr_set_v4mapped(ifa->ifa_address, (struct in6_addr *)&gid);
1792
1793 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet);
1794
1795 mlx4_ib_addr_event(event, event_netdev, ibdev, &gid);
1796 return NOTIFY_DONE;
fa417f7b
EC		 1797}
1798
27cdef63 1799#if IS_ENABLED(CONFIG_IPV6)
d487ee77 1800static int mlx4_ib_inet6_event(struct notifier_block *this, unsigned long event,
fa417f7b
EC		 1801 void *ptr)
1802{
fa417f7b 1803 struct mlx4_ib_dev *ibdev;
d487ee77
MS		 1804 struct inet6_ifaddr *ifa = ptr;
1805 union ib_gid *gid = (union ib_gid *)&ifa->addr;
1806 struct net_device *event_netdev = ifa->idev->dev;
1807
1808 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet6);
1809
1810 mlx4_ib_addr_event(event, event_netdev, ibdev, gid);
1811 return NOTIFY_DONE;
1812}
1813#endif
1814
9433c188
MB		 1815#define MLX4_IB_INVALID_MAC ((u64)-1)
1816static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev,
1817 struct net_device *dev,
1818 int port)
1819{
1820 u64 new_smac = 0;
1821 u64 release_mac = MLX4_IB_INVALID_MAC;
1822 struct mlx4_ib_qp *qp;
1823
1824 read_lock(&dev_base_lock);
1825 new_smac = mlx4_mac_to_u64(dev->dev_addr);
1826 read_unlock(&dev_base_lock);
1827
3e0629cb
JM		 1828 atomic64_set(&ibdev->iboe.mac[port - 1], new_smac);
1829
d24d9f43
JM		 1830 /* no need for update QP1 and mac registration in non-SRIOV */
1831 if (!mlx4_is_mfunc(ibdev->dev))
1832 return;
1833
9433c188
MB		 1834 mutex_lock(&ibdev->qp1_proxy_lock[port - 1]);
1835 qp = ibdev->qp1_proxy[port - 1];
1836 if (qp) {
1837 int new_smac_index;
25476b02 1838 u64 old_smac;
9433c188
MB		 1839 struct mlx4_update_qp_params update_params;
1840
25476b02
JM		 1841 mutex_lock(&qp->mutex);
1842 old_smac = qp->pri.smac;
9433c188
MB		 1843 if (new_smac == old_smac)
1844 goto unlock;
1845
1846 new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac);
1847
1848 if (new_smac_index < 0)
1849 goto unlock;
1850
1851 update_params.smac_index = new_smac_index;
09e05c3f 1852 if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC,
9433c188
MB		 1853 &update_params)) {
1854 release_mac = new_smac;
1855 goto unlock;
1856 }
25476b02
JM		 1857 /* if old port was zero, no mac was yet registered for this QP */
1858 if (qp->pri.smac_port)
1859 release_mac = old_smac;
9433c188 1860 qp->pri.smac = new_smac;
25476b02 1861 qp->pri.smac_port = port;
9433c188 1862 qp->pri.smac_index = new_smac_index;
9433c188
MB		 1863 }
1864
1865unlock:
9433c188
MB		 1866 if (release_mac != MLX4_IB_INVALID_MAC)
1867 mlx4_unregister_mac(ibdev->dev, port, release_mac);
25476b02
JM		 1868 if (qp)
1869 mutex_unlock(&qp->mutex);
1870 mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]);
9433c188
MB		 1871}
1872
d487ee77
MS		 1873static void mlx4_ib_get_dev_addr(struct net_device *dev,
1874 struct mlx4_ib_dev *ibdev, u8 port)
1875{
1876 struct in_device *in_dev;
27cdef63 1877#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 1878 struct inet6_dev *in6_dev;
1879 union ib_gid *pgid;
1880 struct inet6_ifaddr *ifp;
f5c4834d 1881 union ib_gid default_gid;
d487ee77
MS		 1882#endif
1883 union ib_gid gid;
1884
1885
82373701 1886 if ((port == 0) || (port > ibdev->dev->caps.num_ports))
d487ee77
MS		 1887 return;
1888
1889 /* IPv4 gids */
1890 in_dev = in_dev_get(dev);
1891 if (in_dev) {
1892 for_ifa(in_dev) {
1893 /*ifa->ifa_address;*/
1894 ipv6_addr_set_v4mapped(ifa->ifa_address,
1895 (struct in6_addr *)&gid);
acc4fccf 1896 update_gid_table(ibdev, port, &gid, 0, 0);
d487ee77
MS		 1897 }
1898 endfor_ifa(in_dev);
1899 in_dev_put(in_dev);
1900 }
27cdef63 1901#if IS_ENABLED(CONFIG_IPV6)
f5c4834d 1902 mlx4_make_default_gid(dev, &default_gid);
d487ee77
MS		 1903 /* IPv6 gids */
1904 in6_dev = in6_dev_get(dev);
1905 if (in6_dev) {
1906 read_lock_bh(&in6_dev->lock);
1907 list_for_each_entry(ifp, &in6_dev->addr_list, if_list) {
1908 pgid = (union ib_gid *)&ifp->addr;
f5c4834d
MS		 1909 if (!memcmp(pgid, &default_gid, sizeof(*pgid)))
1910 continue;
acc4fccf 1911 update_gid_table(ibdev, port, pgid, 0, 0);
d487ee77
MS		 1912 }
1913 read_unlock_bh(&in6_dev->lock);
1914 in6_dev_put(in6_dev);
1915 }
1916#endif
1917}
1918
acc4fccf
MS		 1919static void mlx4_ib_set_default_gid(struct mlx4_ib_dev *ibdev,
1920 struct net_device *dev, u8 port)
1921{
1922 union ib_gid gid;
1923 mlx4_make_default_gid(dev, &gid);
1924 update_gid_table(ibdev, port, &gid, 0, 1);
1925}
1926
d487ee77
MS		 1927static int mlx4_ib_init_gid_table(struct mlx4_ib_dev *ibdev)
1928{
1929 struct net_device *dev;
ddf8bd34 1930 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
5071456f 1931 int i;
655b2aae 1932 int err = 0;
d487ee77 1933
655b2aae
MS		 1934 for (i = 1; i <= ibdev->num_ports; ++i) {
1935 if (rdma_port_get_link_layer(&ibdev->ib_dev, i) ==
1936 IB_LINK_LAYER_ETHERNET) {
1937 err = reset_gid_table(ibdev, i);
1938 if (err)
1939 goto out;
1940 }
1941 }
d487ee77
MS		 1942
1943 read_lock(&dev_base_lock);
dba3ad2a 1944 spin_lock_bh(&iboe->lock);
d487ee77
MS		 1945
1946 for_each_netdev(&init_net, dev) {
1947 u8 port = mlx4_ib_get_dev_port(dev, ibdev);
655b2aae
MS		 1948 /* port will be non-zero only for ETH ports */
1949 if (port) {
1950 mlx4_ib_set_default_gid(ibdev, dev, port);
d487ee77 1951 mlx4_ib_get_dev_addr(dev, ibdev, port);
655b2aae 1952 }
d487ee77
MS		 1953 }
1954
dba3ad2a 1955 spin_unlock_bh(&iboe->lock);
d487ee77 1956 read_unlock(&dev_base_lock);
655b2aae
MS		 1957out:
1958 return err;
d487ee77
MS		 1959}
1960
9433c188
MB		 1961static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev,
1962 struct net_device *dev,
1963 unsigned long event)
1964
d487ee77 1965{
fa417f7b 1966 struct mlx4_ib_iboe *iboe;
9433c188 1967 int update_qps_port = -1;
fa417f7b
EC		 1968 int port;
1969
fa417f7b
EC		 1970 iboe = &ibdev->iboe;
1971
dba3ad2a 1972 spin_lock_bh(&iboe->lock);
fa417f7b 1973 mlx4_foreach_ib_transport_port(port, ibdev->dev) {
ad4885d2 1974 enum ib_port_state port_state = IB_PORT_NOP;
d487ee77 1975 struct net_device *old_master = iboe->masters[port - 1];
ad4885d2 1976 struct net_device *curr_netdev;
d487ee77 1977 struct net_device *curr_master;
ad4885d2 1978
fa417f7b 1979 iboe->netdevs[port - 1] =
0345584e 1980 mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port);
acc4fccf
MS		 1981 if (iboe->netdevs[port - 1])
1982 mlx4_ib_set_default_gid(ibdev,
1983 iboe->netdevs[port - 1], port);
ad4885d2 1984 curr_netdev = iboe->netdevs[port - 1];
d487ee77
MS		 1985
1986 if (iboe->netdevs[port - 1] &&
1987 netif_is_bond_slave(iboe->netdevs[port - 1])) {
d487ee77
MS		 1988 iboe->masters[port - 1] = netdev_master_upper_dev_get(
1989 iboe->netdevs[port - 1]);
ad4885d2
MS		 1990 } else {
1991 iboe->masters[port - 1] = NULL;
fa417f7b 1992 }
d487ee77 1993 curr_master = iboe->masters[port - 1];
fa417f7b 1994
9433c188
MB		 1995 if (dev == iboe->netdevs[port - 1] &&
1996 (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER ||
1997 event == NETDEV_UP || event == NETDEV_CHANGE))
1998 update_qps_port = port;
1999
ad4885d2
MS		 2000 if (curr_netdev) {
2001 port_state = (netif_running(curr_netdev) && netif_carrier_ok(curr_netdev)) ?
2002 IB_PORT_ACTIVE : IB_PORT_DOWN;
2003 mlx4_ib_set_default_gid(ibdev, curr_netdev, port);
bccb84f1
MS		 2004 if (curr_master) {
2005 /* if using bonding/team and a slave port is down, we
2006 * don't want the bond IP based gids in the table since
2007 * flows that select port by gid may get the down port.
2008 */
a5750090
MS		 2009 if (port_state == IB_PORT_DOWN &&
2010 !mlx4_is_bonded(ibdev->dev)) {
bccb84f1
MS		 2011 reset_gid_table(ibdev, port);
2012 mlx4_ib_set_default_gid(ibdev,
2013 curr_netdev,
2014 port);
2015 } else {
2016 /* gids from the upper dev (bond/team)
2017 * should appear in port's gid table
2018 */
2019 mlx4_ib_get_dev_addr(curr_master,
2020 ibdev, port);
2021 }
e381835c
MS		 2022 }
2023 /* if bonding is used it is possible that we add it to
2024 * masters only after IP address is assigned to the
2025 * net bonding interface.
2026 */
2027 if (curr_master && (old_master != curr_master)) {
2028 reset_gid_table(ibdev, port);
2029 mlx4_ib_set_default_gid(ibdev,
2030 curr_netdev, port);
2031 mlx4_ib_get_dev_addr(curr_master, ibdev, port);
2032 }
ad4885d2 2033
e381835c
MS		 2034 if (!curr_master && (old_master != curr_master)) {
2035 reset_gid_table(ibdev, port);
2036 mlx4_ib_set_default_gid(ibdev,
2037 curr_netdev, port);
2038 mlx4_ib_get_dev_addr(curr_netdev, ibdev, port);
2039 }
2040 } else {
ad4885d2 2041 reset_gid_table(ibdev, port);
ad4885d2 2042 }
d487ee77 2043 }
fa417f7b 2044
dba3ad2a 2045 spin_unlock_bh(&iboe->lock);
9433c188
MB		 2046
2047 if (update_qps_port > 0)
2048 mlx4_ib_update_qps(ibdev, dev, update_qps_port);
d487ee77
MS		 2049}
2050
2051static int mlx4_ib_netdev_event(struct notifier_block *this,
2052 unsigned long event, void *ptr)
2053{
2054 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
2055 struct mlx4_ib_dev *ibdev;
2056
2057 if (!net_eq(dev_net(dev), &init_net))
2058 return NOTIFY_DONE;
2059
2060 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb);
9433c188 2061 mlx4_ib_scan_netdevs(ibdev, dev, event);
fa417f7b
EC		 2062
2063 return NOTIFY_DONE;
2064}
2065
54679e14
JM		 2066static void init_pkeys(struct mlx4_ib_dev *ibdev)
2067{
2068 int port;
2069 int slave;
2070 int i;
2071
2072 if (mlx4_is_master(ibdev->dev)) {
872bf2fb
YH		 2073 for (slave = 0; slave <= ibdev->dev->persist->num_vfs;
2074 ++slave) {
54679e14
JM		 2075 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2076 for (i = 0;
2077 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2078 ++i) {
2079 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] =
2080 /* master has the identity virt2phys pkey mapping */
2081 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i :
2082 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1;
2083 mlx4_sync_pkey_table(ibdev->dev, slave, port, i,
2084 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]);
2085 }
2086 }
2087 }
2088 /* initialize pkey cache */
2089 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2090 for (i = 0;
2091 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2092 ++i)
2093 ibdev->pkeys.phys_pkey_cache[port-1][i] =
2094 (i) ? 0 : 0xFFFF;
2095 }
2096 }
2097}
2098
e605b743
SP		 2099static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2100{
4661bd79 2101 char name[80];
e605b743
SP		 2102 int eq_per_port = 0;
2103 int added_eqs = 0;
2104 int total_eqs = 0;
2105 int i, j, eq;
2106
3aac6ff1
SP		 2107 /* Legacy mode or comp_pool is not large enough */
2108 if (dev->caps.comp_pool == 0 ||
2109 dev->caps.num_ports > dev->caps.comp_pool)
e605b743
SP		 2110 return;
2111
7ae0e400 2112 eq_per_port = dev->caps.comp_pool / dev->caps.num_ports;
e605b743
SP		 2113
2114 /* Init eq table */
2115 added_eqs = 0;
2116 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2117 added_eqs += eq_per_port;
2118
2119 total_eqs = dev->caps.num_comp_vectors + added_eqs;
2120
2121 ibdev->eq_table = kzalloc(total_eqs * sizeof(int), GFP_KERNEL);
2122 if (!ibdev->eq_table)
2123 return;
2124
2125 ibdev->eq_added = added_eqs;
2126
2127 eq = 0;
2128 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) {
2129 for (j = 0; j < eq_per_port; j++) {
4661bd79 2130 snprintf(name, sizeof(name), "mlx4-ib-%d-%d@%s",
872bf2fb 2131 i, j, dev->persist->pdev->bus->name);
e605b743 2132 /* Set IRQ for specific name (per ring) */
d9236c3f
AV		 2133 if (mlx4_assign_eq(dev, name, NULL,
2134 &ibdev->eq_table[eq])) {
e605b743
SP		 2135 /* Use legacy (same as mlx4_en driver) */
2136 pr_warn("Can't allocate EQ %d; reverting to legacy\n", eq);
2137 ibdev->eq_table[eq] =
2138 (eq % dev->caps.num_comp_vectors);
2139 }
2140 eq++;
2141 }
2142 }
2143
2144 /* Fill the reset of the vector with legacy EQ */
2145 for (i = 0, eq = added_eqs; i < dev->caps.num_comp_vectors; i++)
2146 ibdev->eq_table[eq++] = i;
2147
2148 /* Advertise the new number of EQs to clients */
2149 ibdev->ib_dev.num_comp_vectors = total_eqs;
2150}
2151
2152static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2153{
2154 int i;
3aac6ff1
SP		 2155
2156 /* no additional eqs were added */
2157 if (!ibdev->eq_table)
2158 return;
e605b743
SP		 2159
2160 /* Reset the advertised EQ number */
2161 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
2162
2163 /* Free only the added eqs */
2164 for (i = 0; i < ibdev->eq_added; i++) {
2165 /* Don't free legacy eqs if used */
2166 if (ibdev->eq_table[i] <= dev->caps.num_comp_vectors)
2167 continue;
2168 mlx4_release_eq(dev, ibdev->eq_table[i]);
2169 }
2170
e605b743 2171 kfree(ibdev->eq_table);
e605b743
SP		 2172}
2173
7738613e
IW		 2174static int mlx4_port_immutable(struct ib_device *ibdev, u8 port_num,
2175 struct ib_port_immutable *immutable)
2176{
2177 struct ib_port_attr attr;
2178 int err;
2179
2180 err = mlx4_ib_query_port(ibdev, port_num, &attr);
2181 if (err)
2182 return err;
2183
2184 immutable->pkey_tbl_len = attr.pkey_tbl_len;
2185 immutable->gid_tbl_len = attr.gid_tbl_len;
2186
f9b22e35
IW		 2187 if (mlx4_ib_port_link_layer(ibdev, port_num) == IB_LINK_LAYER_INFINIBAND)
2188 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB;
2189 else
2190 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE;
2191
337877a4
IW		 2192 immutable->max_mad_size = IB_MGMT_MAD_SIZE;
2193
7738613e
IW		 2194 return 0;
2195}
2196
225c7b1f
RD		 2197static void *mlx4_ib_add(struct mlx4_dev *dev)
2198{
2199 struct mlx4_ib_dev *ibdev;
22e7ef9c 2200 int num_ports = 0;
035b1032 2201 int i, j;
fa417f7b
EC		 2202 int err;
2203 struct mlx4_ib_iboe *iboe;
4196670b 2204 int ib_num_ports = 0;
a5750090 2205 int num_req_counters;
225c7b1f 2206
987c8f8f 2207 pr_info_once("%s", mlx4_ib_version);
68f3948d 2208
026149cb 2209 num_ports = 0;
fa417f7b 2210 mlx4_foreach_ib_transport_port(i, dev)
22e7ef9c
RD		 2211 num_ports++;
2212
2213 /* No point in registering a device with no ports... */
2214 if (num_ports == 0)
2215 return NULL;
2216
225c7b1f
RD		 2217 ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev);
2218 if (!ibdev) {
872bf2fb
YH		 2219 dev_err(&dev->persist->pdev->dev,
2220 "Device struct alloc failed\n");
225c7b1f
RD		 2221 return NULL;
2222 }
2223
fa417f7b
EC		 2224 iboe = &ibdev->iboe;
2225
225c7b1f
RD		 2226 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn))
2227 goto err_dealloc;
2228
2229 if (mlx4_uar_alloc(dev, &ibdev->priv_uar))
2230 goto err_pd;
2231
4979d18f
RD		 2232 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
2233 PAGE_SIZE);
225c7b1f
RD		 2234 if (!ibdev->uar_map)
2235 goto err_uar;
26c6bc7b 2236 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock);
225c7b1f 2237
225c7b1f 2238 ibdev->dev = dev;
c6215745 2239 ibdev->bond_next_port = 0;
225c7b1f
RD		 2240
2241 strlcpy(ibdev->ib_dev.name, "mlx4_%d", IB_DEVICE_NAME_MAX);
2242 ibdev->ib_dev.owner = THIS_MODULE;
2243 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA;
95d04f07 2244 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey;
22e7ef9c 2245 ibdev->num_ports = num_ports;
a5750090
MS		 2246 ibdev->ib_dev.phys_port_cnt = mlx4_is_bonded(dev) ?
2247 1 : ibdev->num_ports;
b8dd786f 2248 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
872bf2fb 2249 ibdev->ib_dev.dma_device = &dev->persist->pdev->dev;
225c7b1f 2250
08ff3235
OG		 2251 if (dev->caps.userspace_caps)
2252 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION;
2253 else
2254 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION;
2255
225c7b1f
RD		 2256 ibdev->ib_dev.uverbs_cmd_mask =
2257 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2258 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2259 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2260 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2261 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2262 (1ull << IB_USER_VERBS_CMD_REG_MR) |
9376932d 2263 (1ull << IB_USER_VERBS_CMD_REREG_MR) |
225c7b1f
RD		 2264 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2265 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2266 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
bbf8eed1 2267 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
225c7b1f
RD		 2268 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2269 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2270 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
6a775e2b 2271 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
225c7b1f
RD		 2272 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2273 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
2274 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
2275 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
2276 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
65541cb7 2277 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
18abd5ea 2278 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
42849b26
SH		 2279 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
2280 (1ull << IB_USER_VERBS_CMD_OPEN_QP);
225c7b1f
RD		 2281
2282 ibdev->ib_dev.query_device = mlx4_ib_query_device;
2283 ibdev->ib_dev.query_port = mlx4_ib_query_port;
fa417f7b 2284 ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer;
225c7b1f
RD		 2285 ibdev->ib_dev.query_gid = mlx4_ib_query_gid;
2286 ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey;
2287 ibdev->ib_dev.modify_device = mlx4_ib_modify_device;
2288 ibdev->ib_dev.modify_port = mlx4_ib_modify_port;
2289 ibdev->ib_dev.alloc_ucontext = mlx4_ib_alloc_ucontext;
2290 ibdev->ib_dev.dealloc_ucontext = mlx4_ib_dealloc_ucontext;
2291 ibdev->ib_dev.mmap = mlx4_ib_mmap;
2292 ibdev->ib_dev.alloc_pd = mlx4_ib_alloc_pd;
2293 ibdev->ib_dev.dealloc_pd = mlx4_ib_dealloc_pd;
2294 ibdev->ib_dev.create_ah = mlx4_ib_create_ah;
2295 ibdev->ib_dev.query_ah = mlx4_ib_query_ah;
2296 ibdev->ib_dev.destroy_ah = mlx4_ib_destroy_ah;
2297 ibdev->ib_dev.create_srq = mlx4_ib_create_srq;
2298 ibdev->ib_dev.modify_srq = mlx4_ib_modify_srq;
65541cb7 2299 ibdev->ib_dev.query_srq = mlx4_ib_query_srq;
225c7b1f
RD		 2300 ibdev->ib_dev.destroy_srq = mlx4_ib_destroy_srq;
2301 ibdev->ib_dev.post_srq_recv = mlx4_ib_post_srq_recv;
2302 ibdev->ib_dev.create_qp = mlx4_ib_create_qp;
2303 ibdev->ib_dev.modify_qp = mlx4_ib_modify_qp;
6a775e2b 2304 ibdev->ib_dev.query_qp = mlx4_ib_query_qp;
225c7b1f
RD		 2305 ibdev->ib_dev.destroy_qp = mlx4_ib_destroy_qp;
2306 ibdev->ib_dev.post_send = mlx4_ib_post_send;
2307 ibdev->ib_dev.post_recv = mlx4_ib_post_recv;
2308 ibdev->ib_dev.create_cq = mlx4_ib_create_cq;
3fdcb97f 2309 ibdev->ib_dev.modify_cq = mlx4_ib_modify_cq;
bbf8eed1 2310 ibdev->ib_dev.resize_cq = mlx4_ib_resize_cq;
225c7b1f
RD		 2311 ibdev->ib_dev.destroy_cq = mlx4_ib_destroy_cq;
2312 ibdev->ib_dev.poll_cq = mlx4_ib_poll_cq;
2313 ibdev->ib_dev.req_notify_cq = mlx4_ib_arm_cq;
2314 ibdev->ib_dev.get_dma_mr = mlx4_ib_get_dma_mr;
2315 ibdev->ib_dev.reg_user_mr = mlx4_ib_reg_user_mr;
9376932d 2316 ibdev->ib_dev.rereg_user_mr = mlx4_ib_rereg_user_mr;
225c7b1f 2317 ibdev->ib_dev.dereg_mr = mlx4_ib_dereg_mr;
95d04f07
RD		 2318 ibdev->ib_dev.alloc_fast_reg_mr = mlx4_ib_alloc_fast_reg_mr;
2319 ibdev->ib_dev.alloc_fast_reg_page_list = mlx4_ib_alloc_fast_reg_page_list;
2320 ibdev->ib_dev.free_fast_reg_page_list = mlx4_ib_free_fast_reg_page_list;
225c7b1f
RD		 2321 ibdev->ib_dev.attach_mcast = mlx4_ib_mcg_attach;
2322 ibdev->ib_dev.detach_mcast = mlx4_ib_mcg_detach;
2323 ibdev->ib_dev.process_mad = mlx4_ib_process_mad;
7738613e 2324 ibdev->ib_dev.get_port_immutable = mlx4_port_immutable;
225c7b1f 2325
992e8e6e
JM		 2326 if (!mlx4_is_slave(ibdev->dev)) {
2327 ibdev->ib_dev.alloc_fmr = mlx4_ib_fmr_alloc;
2328 ibdev->ib_dev.map_phys_fmr = mlx4_ib_map_phys_fmr;
2329 ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr;
2330 ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc;
2331 }
8ad11fb6 2332
b425388d
SM		 2333 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW ||
2334 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
2335 ibdev->ib_dev.alloc_mw = mlx4_ib_alloc_mw;
2336 ibdev->ib_dev.bind_mw = mlx4_ib_bind_mw;
2337 ibdev->ib_dev.dealloc_mw = mlx4_ib_dealloc_mw;
2338
2339 ibdev->ib_dev.uverbs_cmd_mask |=
2340 (1ull << IB_USER_VERBS_CMD_ALLOC_MW) |
2341 (1ull << IB_USER_VERBS_CMD_DEALLOC_MW);
2342 }
2343
012a8ff5
SH		 2344 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {
2345 ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd;
2346 ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd;
2347 ibdev->ib_dev.uverbs_cmd_mask |=
2348 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
2349 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
2350 }
2351
f77c0162 2352 if (check_flow_steering_support(dev)) {
0a9b7d59 2353 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED;
f77c0162
HHZ		 2354 ibdev->ib_dev.create_flow = mlx4_ib_create_flow;
2355 ibdev->ib_dev.destroy_flow = mlx4_ib_destroy_flow;
2356
f21519b2
YD		 2357 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2358 (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) |
2359 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW);
f77c0162
HHZ		 2360 }
2361
4b664c43
MB		 2362 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2363 (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE) |
2364 (1ull << IB_USER_VERBS_EX_CMD_CREATE_CQ);
2365
e605b743
SP		 2366 mlx4_ib_alloc_eqs(dev, ibdev);
2367
fa417f7b
EC		 2368 spin_lock_init(&iboe->lock);
2369
225c7b1f
RD		 2370 if (init_node_data(ibdev))
2371 goto err_map;
2372
a5750090
MS		 2373 num_req_counters = mlx4_is_bonded(dev) ? 1 : ibdev->num_ports;
2374 for (i = 0; i < num_req_counters; ++i) {
9433c188 2375 mutex_init(&ibdev->qp1_proxy_lock[i]);
cfcde11c
OG		 2376 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) ==
2377 IB_LINK_LAYER_ETHERNET) {
2378 err = mlx4_counter_alloc(ibdev->dev, &ibdev->counters[i]);
2379 if (err)
2380 ibdev->counters[i] = -1;
3839d8ac
DC		 2381 } else {
2382 ibdev->counters[i] = -1;
2383 }
cfcde11c 2384 }
a5750090
MS		 2385 if (mlx4_is_bonded(dev))
2386 for (i = 1; i < ibdev->num_ports ; ++i)
2387 ibdev->counters[i] = ibdev->counters[0];
2388
cfcde11c 2389
4196670b
MB		 2390 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2391 ib_num_ports++;
2392
225c7b1f
RD		 2393 spin_lock_init(&ibdev->sm_lock);
2394 mutex_init(&ibdev->cap_mask_mutex);
35f05dab
YH		 2395 INIT_LIST_HEAD(&ibdev->qp_list);
2396 spin_lock_init(&ibdev->reset_flow_resource_lock);
225c7b1f 2397
4196670b
MB		 2398 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED &&
2399 ib_num_ports) {
c1c98501
MB		 2400 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS;
2401 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count,
2402 MLX4_IB_UC_STEER_QPN_ALIGN,
ddae0349 2403 &ibdev->steer_qpn_base, 0);
c1c98501
MB		 2404 if (err)
2405 goto err_counter;
2406
2407 ibdev->ib_uc_qpns_bitmap =
2408 kmalloc(BITS_TO_LONGS(ibdev->steer_qpn_count) *
2409 sizeof(long),
2410 GFP_KERNEL);
2411 if (!ibdev->ib_uc_qpns_bitmap) {
872bf2fb
YH		 2412 dev_err(&dev->persist->pdev->dev,
2413 "bit map alloc failed\n");
c1c98501
MB		 2414 goto err_steer_qp_release;
2415 }
2416
2417 bitmap_zero(ibdev->ib_uc_qpns_bitmap, ibdev->steer_qpn_count);
2418
2419 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE(
2420 dev, ibdev->steer_qpn_base,
2421 ibdev->steer_qpn_base +
2422 ibdev->steer_qpn_count - 1);
2423 if (err)
2424 goto err_steer_free_bitmap;
2425 }
2426
3e0629cb
JM		 2427 for (j = 1; j <= ibdev->dev->caps.num_ports; j++)
2428 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]);
2429
9a6edb60 2430 if (ib_register_device(&ibdev->ib_dev, NULL))
c1c98501 2431 goto err_steer_free_bitmap;
225c7b1f
RD		 2432
2433 if (mlx4_ib_mad_init(ibdev))
2434 goto err_reg;
2435
fc06573d
JM		 2436 if (mlx4_ib_init_sriov(ibdev))
2437 goto err_mad;
2438
d487ee77
MS		 2439 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE) {
2440 if (!iboe->nb.notifier_call) {
2441 iboe->nb.notifier_call = mlx4_ib_netdev_event;
2442 err = register_netdevice_notifier(&iboe->nb);
2443 if (err) {
2444 iboe->nb.notifier_call = NULL;
2445 goto err_notif;
2446 }
2447 }
2448 if (!iboe->nb_inet.notifier_call) {
2449 iboe->nb_inet.notifier_call = mlx4_ib_inet_event;
2450 err = register_inetaddr_notifier(&iboe->nb_inet);
2451 if (err) {
2452 iboe->nb_inet.notifier_call = NULL;
2453 goto err_notif;
2454 }
2455 }
27cdef63 2456#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 2457 if (!iboe->nb_inet6.notifier_call) {
2458 iboe->nb_inet6.notifier_call = mlx4_ib_inet6_event;
2459 err = register_inet6addr_notifier(&iboe->nb_inet6);
2460 if (err) {
2461 iboe->nb_inet6.notifier_call = NULL;
2462 goto err_notif;
2463 }
2464 }
2465#endif
655b2aae
MS		 2466 if (mlx4_ib_init_gid_table(ibdev))
2467 goto err_notif;
fa417f7b
EC		 2468 }
2469
035b1032 2470 for (j = 0; j < ARRAY_SIZE(mlx4_class_attributes); ++j) {
f4e91eb4 2471 if (device_create_file(&ibdev->ib_dev.dev,
035b1032 2472 mlx4_class_attributes[j]))
fa417f7b 2473 goto err_notif;
cd9281d8
JM		 2474 }
2475
3b4a8cd5
JM		 2476 ibdev->ib_active = true;
2477
54679e14
JM		 2478 if (mlx4_is_mfunc(ibdev->dev))
2479 init_pkeys(ibdev);
2480
3806d08c
JM		 2481 /* create paravirt contexts for any VFs which are active */
2482 if (mlx4_is_master(ibdev->dev)) {
2483 for (j = 0; j < MLX4_MFUNC_MAX; j++) {
2484 if (j == mlx4_master_func_num(ibdev->dev))
2485 continue;
2486 if (mlx4_is_slave_active(ibdev->dev, j))
2487 do_slave_init(ibdev, j, 1);
2488 }
2489 }
225c7b1f
RD		 2490 return ibdev;
2491
fa417f7b 2492err_notif:
d487ee77
MS		 2493 if (ibdev->iboe.nb.notifier_call) {
2494 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2495 pr_warn("failure unregistering notifier\n");
2496 ibdev->iboe.nb.notifier_call = NULL;
2497 }
2498 if (ibdev->iboe.nb_inet.notifier_call) {
2499 if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
2500 pr_warn("failure unregistering notifier\n");
2501 ibdev->iboe.nb_inet.notifier_call = NULL;
2502 }
27cdef63 2503#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 2504 if (ibdev->iboe.nb_inet6.notifier_call) {
2505 if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
2506 pr_warn("failure unregistering notifier\n");
2507 ibdev->iboe.nb_inet6.notifier_call = NULL;
2508 }
2509#endif
fa417f7b
EC		 2510 flush_workqueue(wq);
2511
fc06573d
JM		 2512 mlx4_ib_close_sriov(ibdev);
2513
2514err_mad:
2515 mlx4_ib_mad_cleanup(ibdev);
2516
225c7b1f
RD		 2517err_reg:
2518 ib_unregister_device(&ibdev->ib_dev);
2519
c1c98501
MB		 2520err_steer_free_bitmap:
2521 kfree(ibdev->ib_uc_qpns_bitmap);
2522
2523err_steer_qp_release:
2524 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
2525 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2526 ibdev->steer_qpn_count);
cfcde11c
OG		 2527err_counter:
2528 for (; i; --i)
4af3ce0d
RD		 2529 if (ibdev->counters[i - 1] != -1)
2530 mlx4_counter_free(ibdev->dev, ibdev->counters[i - 1]);
cfcde11c 2531
225c7b1f
RD		 2532err_map:
2533 iounmap(ibdev->uar_map);
2534
2535err_uar:
2536 mlx4_uar_free(dev, &ibdev->priv_uar);
2537
2538err_pd:
2539 mlx4_pd_free(dev, ibdev->priv_pdn);
2540
2541err_dealloc:
2542 ib_dealloc_device(&ibdev->ib_dev);
2543
2544 return NULL;
2545}
2546
c1c98501
MB		 2547int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn)
2548{
2549 int offset;
2550
2551 WARN_ON(!dev->ib_uc_qpns_bitmap);
2552
2553 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap,
2554 dev->steer_qpn_count,
2555 get_count_order(count));
2556 if (offset < 0)
2557 return offset;
2558
2559 *qpn = dev->steer_qpn_base + offset;
2560 return 0;
2561}
2562
2563void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count)
2564{
2565 if (!qpn ||
2566 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED)
2567 return;
2568
2569 BUG_ON(qpn < dev->steer_qpn_base);
2570
2571 bitmap_release_region(dev->ib_uc_qpns_bitmap,
2572 qpn - dev->steer_qpn_base,
2573 get_count_order(count));
2574}
2575
2576int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
2577 int is_attach)
2578{
2579 int err;
2580 size_t flow_size;
2581 struct ib_flow_attr *flow = NULL;
2582 struct ib_flow_spec_ib *ib_spec;
2583
2584 if (is_attach) {
2585 flow_size = sizeof(struct ib_flow_attr) +
2586 sizeof(struct ib_flow_spec_ib);
2587 flow = kzalloc(flow_size, GFP_KERNEL);
2588 if (!flow)
2589 return -ENOMEM;
2590 flow->port = mqp->port;
2591 flow->num_of_specs = 1;
2592 flow->size = flow_size;
2593 ib_spec = (struct ib_flow_spec_ib *)(flow + 1);
2594 ib_spec->type = IB_FLOW_SPEC_IB;
2595 ib_spec->size = sizeof(struct ib_flow_spec_ib);
2596 /* Add an empty rule for IB L2 */
2597 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask));
2598
2599 err = __mlx4_ib_create_flow(&mqp->ibqp, flow,
2600 IB_FLOW_DOMAIN_NIC,
2601 MLX4_FS_REGULAR,
2602 &mqp->reg_id);
2603 } else {
2604 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id);
2605 }
2606 kfree(flow);
2607 return err;
2608}
2609
225c7b1f
RD		 2610static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)
2611{
2612 struct mlx4_ib_dev *ibdev = ibdev_ptr;
2613 int p;
2614
4bf9715f
MS		 2615 ibdev->ib_active = false;
2616 flush_workqueue(wq);
2617
fc06573d 2618 mlx4_ib_close_sriov(ibdev);
a6a47771
YP		 2619 mlx4_ib_mad_cleanup(ibdev);
2620 ib_unregister_device(&ibdev->ib_dev);
fa417f7b
EC		 2621 if (ibdev->iboe.nb.notifier_call) {
2622 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
987c8f8f 2623 pr_warn("failure unregistering notifier\n");
fa417f7b
EC		 2624 ibdev->iboe.nb.notifier_call = NULL;
2625 }
c1c98501
MB		 2626
2627 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) {
2628 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2629 ibdev->steer_qpn_count);
2630 kfree(ibdev->ib_uc_qpns_bitmap);
2631 }
2632
d487ee77
MS		 2633 if (ibdev->iboe.nb_inet.notifier_call) {
2634 if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
2635 pr_warn("failure unregistering notifier\n");
2636 ibdev->iboe.nb_inet.notifier_call = NULL;
2637 }
27cdef63 2638#if IS_ENABLED(CONFIG_IPV6)
d487ee77
MS		 2639 if (ibdev->iboe.nb_inet6.notifier_call) {
2640 if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
2641 pr_warn("failure unregistering notifier\n");
2642 ibdev->iboe.nb_inet6.notifier_call = NULL;
2643 }
2644#endif
fb1b5034 2645
fa417f7b 2646 iounmap(ibdev->uar_map);
cfcde11c 2647 for (p = 0; p < ibdev->num_ports; ++p)
4af3ce0d
RD		 2648 if (ibdev->counters[p] != -1)
2649 mlx4_counter_free(ibdev->dev, ibdev->counters[p]);
fa417f7b 2650 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)
225c7b1f
RD		 2651 mlx4_CLOSE_PORT(dev, p);
2652
e605b743
SP		 2653 mlx4_ib_free_eqs(dev, ibdev);
2654
225c7b1f
RD		 2655 mlx4_uar_free(dev, &ibdev->priv_uar);
2656 mlx4_pd_free(dev, ibdev->priv_pdn);
2657 ib_dealloc_device(&ibdev->ib_dev);
2658}
2659
fc06573d
JM		 2660static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init)
2661{
2662 struct mlx4_ib_demux_work **dm = NULL;
2663 struct mlx4_dev *dev = ibdev->dev;
2664 int i;
2665 unsigned long flags;
449fc488
MB		 2666 struct mlx4_active_ports actv_ports;
2667 unsigned int ports;
2668 unsigned int first_port;
fc06573d
JM		 2669
2670 if (!mlx4_is_master(dev))
2671 return;
2672
449fc488
MB		 2673 actv_ports = mlx4_get_active_ports(dev, slave);
2674 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports);
2675 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports);
2676
2677 dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC);
fc06573d
JM		 2678 if (!dm) {
2679 pr_err("failed to allocate memory for tunneling qp update\n");
2680 goto out;
2681 }
2682
449fc488 2683 for (i = 0; i < ports; i++) {
fc06573d
JM		 2684 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC);
2685 if (!dm[i]) {
2686 pr_err("failed to allocate memory for tunneling qp update work struct\n");
2687 for (i = 0; i < dev->caps.num_ports; i++) {
2688 if (dm[i])
2689 kfree(dm[i]);
2690 }
2691 goto out;
2692 }
2693 }
2694 /* initialize or tear down tunnel QPs for the slave */
449fc488 2695 for (i = 0; i < ports; i++) {
fc06573d 2696 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work);
449fc488 2697 dm[i]->port = first_port + i + 1;
fc06573d
JM		 2698 dm[i]->slave = slave;
2699 dm[i]->do_init = do_init;
2700 dm[i]->dev = ibdev;
2701 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags);
2702 if (!ibdev->sriov.is_going_down)
2703 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work);
2704 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
2705 }
2706out:
c89d1271 2707 kfree(dm);
fc06573d
JM		 2708 return;
2709}
2710
35f05dab
YH		 2711static void mlx4_ib_handle_catas_error(struct mlx4_ib_dev *ibdev)
2712{
2713 struct mlx4_ib_qp *mqp;
2714 unsigned long flags_qp;
2715 unsigned long flags_cq;
2716 struct mlx4_ib_cq *send_mcq, *recv_mcq;
2717 struct list_head cq_notify_list;
2718 struct mlx4_cq *mcq;
2719 unsigned long flags;
2720
2721 pr_warn("mlx4_ib_handle_catas_error was started\n");
2722 INIT_LIST_HEAD(&cq_notify_list);
2723
2724 /* Go over qp list reside on that ibdev, sync with create/destroy qp.*/
2725 spin_lock_irqsave(&ibdev->reset_flow_resource_lock, flags);
2726
2727 list_for_each_entry(mqp, &ibdev->qp_list, qps_list) {
2728 spin_lock_irqsave(&mqp->sq.lock, flags_qp);
2729 if (mqp->sq.tail != mqp->sq.head) {
2730 send_mcq = to_mcq(mqp->ibqp.send_cq);
2731 spin_lock_irqsave(&send_mcq->lock, flags_cq);
2732 if (send_mcq->mcq.comp &&
2733 mqp->ibqp.send_cq->comp_handler) {
2734 if (!send_mcq->mcq.reset_notify_added) {
2735 send_mcq->mcq.reset_notify_added = 1;
2736 list_add_tail(&send_mcq->mcq.reset_notify,
2737 &cq_notify_list);
2738 }
2739 }
2740 spin_unlock_irqrestore(&send_mcq->lock, flags_cq);
2741 }
2742 spin_unlock_irqrestore(&mqp->sq.lock, flags_qp);
2743 /* Now, handle the QP's receive queue */
2744 spin_lock_irqsave(&mqp->rq.lock, flags_qp);
2745 /* no handling is needed for SRQ */
2746 if (!mqp->ibqp.srq) {
2747 if (mqp->rq.tail != mqp->rq.head) {
2748 recv_mcq = to_mcq(mqp->ibqp.recv_cq);
2749 spin_lock_irqsave(&recv_mcq->lock, flags_cq);
2750 if (recv_mcq->mcq.comp &&
2751 mqp->ibqp.recv_cq->comp_handler) {
2752 if (!recv_mcq->mcq.reset_notify_added) {
2753 recv_mcq->mcq.reset_notify_added = 1;
2754 list_add_tail(&recv_mcq->mcq.reset_notify,
2755 &cq_notify_list);
2756 }
2757 }
2758 spin_unlock_irqrestore(&recv_mcq->lock,
2759 flags_cq);
2760 }
2761 }
2762 spin_unlock_irqrestore(&mqp->rq.lock, flags_qp);
2763 }
2764
2765 list_for_each_entry(mcq, &cq_notify_list, reset_notify) {
2766 mcq->comp(mcq);
2767 }
2768 spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags);
2769 pr_warn("mlx4_ib_handle_catas_error ended\n");
2770}
2771
a5750090
MS		 2772static void handle_bonded_port_state_event(struct work_struct *work)
2773{
2774 struct ib_event_work *ew =
2775 container_of(work, struct ib_event_work, work);
2776 struct mlx4_ib_dev *ibdev = ew->ib_dev;
2777 enum ib_port_state bonded_port_state = IB_PORT_NOP;
2778 int i;
2779 struct ib_event ibev;
2780
2781 kfree(ew);
2782 spin_lock_bh(&ibdev->iboe.lock);
2783 for (i = 0; i < MLX4_MAX_PORTS; ++i) {
2784 struct net_device *curr_netdev = ibdev->iboe.netdevs[i];
217e8b16 2785 enum ib_port_state curr_port_state;
a5750090 2786
217e8b16
MS		 2787 if (!curr_netdev)
2788 continue;
2789
2790 curr_port_state =
a5750090
MS		 2791 (netif_running(curr_netdev) &&
2792 netif_carrier_ok(curr_netdev)) ?
2793 IB_PORT_ACTIVE : IB_PORT_DOWN;
2794
2795 bonded_port_state = (bonded_port_state != IB_PORT_ACTIVE) ?
2796 curr_port_state : IB_PORT_ACTIVE;
2797 }
2798 spin_unlock_bh(&ibdev->iboe.lock);
2799
2800 ibev.device = &ibdev->ib_dev;
2801 ibev.element.port_num = 1;
2802 ibev.event = (bonded_port_state == IB_PORT_ACTIVE) ?
2803 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
2804
2805 ib_dispatch_event(&ibev);
2806}
2807
225c7b1f 2808static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr,
00f5ce99 2809 enum mlx4_dev_event event, unsigned long param)
225c7b1f
RD		 2810{
2811 struct ib_event ibev;
7ff93f8b 2812 struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr);
00f5ce99
JM		 2813 struct mlx4_eqe *eqe = NULL;
2814 struct ib_event_work *ew;
fc06573d 2815 int p = 0;
00f5ce99 2816
a5750090
MS		 2817 if (mlx4_is_bonded(dev) &&
2818 ((event == MLX4_DEV_EVENT_PORT_UP) ||
2819 (event == MLX4_DEV_EVENT_PORT_DOWN))) {
2820 ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
2821 if (!ew)
2822 return;
2823 INIT_WORK(&ew->work, handle_bonded_port_state_event);
2824 ew->ib_dev = ibdev;
2825 queue_work(wq, &ew->work);
2826 return;
2827 }
2828
00f5ce99
JM		 2829 if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE)
2830 eqe = (struct mlx4_eqe *)param;
2831 else
fc06573d 2832 p = (int) param;
225c7b1f
RD		 2833
2834 switch (event) {
37608eea 2835 case MLX4_DEV_EVENT_PORT_UP:
fc06573d
JM		 2836 if (p > ibdev->num_ports)
2837 return;
a0c64a17
JM		 2838 if (mlx4_is_master(dev) &&
2839 rdma_port_get_link_layer(&ibdev->ib_dev, p) ==
2840 IB_LINK_LAYER_INFINIBAND) {
2841 mlx4_ib_invalidate_all_guid_record(ibdev, p);
2842 }
37608eea 2843 ibev.event = IB_EVENT_PORT_ACTIVE;
225c7b1f
RD		 2844 break;
2845
37608eea 2846 case MLX4_DEV_EVENT_PORT_DOWN:
fc06573d
JM		 2847 if (p > ibdev->num_ports)
2848 return;
37608eea
RD		 2849 ibev.event = IB_EVENT_PORT_ERR;
2850 break;
2851
2852 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
3b4a8cd5 2853 ibdev->ib_active = false;
225c7b1f 2854 ibev.event = IB_EVENT_DEVICE_FATAL;
35f05dab 2855 mlx4_ib_handle_catas_error(ibdev);
225c7b1f
RD		 2856 break;
2857
00f5ce99
JM		 2858 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:
2859 ew = kmalloc(sizeof *ew, GFP_ATOMIC);
2860 if (!ew) {
2861 pr_err("failed to allocate memory for events work\n");
2862 break;
2863 }
2864
2865 INIT_WORK(&ew->work, handle_port_mgmt_change_event);
2866 memcpy(&ew->ib_eqe, eqe, sizeof *eqe);
2867 ew->ib_dev = ibdev;
992e8e6e
JM		 2868 /* need to queue only for port owner, which uses GEN_EQE */
2869 if (mlx4_is_master(dev))
2870 queue_work(wq, &ew->work);
2871 else
2872 handle_port_mgmt_change_event(&ew->work);
00f5ce99
JM		 2873 return;
2874
fc06573d
JM		 2875 case MLX4_DEV_EVENT_SLAVE_INIT:
2876 /* here, p is the slave id */
2877 do_slave_init(ibdev, p, 1);
ee59fa0d
YH		 2878 if (mlx4_is_master(dev)) {
2879 int i;
2880
2881 for (i = 1; i <= ibdev->num_ports; i++) {
2882 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
2883 == IB_LINK_LAYER_INFINIBAND)
2884 mlx4_ib_slave_alias_guid_event(ibdev,
2885 p, i,
2886 1);
2887 }
2888 }
fc06573d
JM		 2889 return;
2890
2891 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN:
ee59fa0d
YH		 2892 if (mlx4_is_master(dev)) {
2893 int i;
2894
2895 for (i = 1; i <= ibdev->num_ports; i++) {
2896 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
2897 == IB_LINK_LAYER_INFINIBAND)
2898 mlx4_ib_slave_alias_guid_event(ibdev,
2899 p, i,
2900 0);
2901 }
2902 }
fc06573d
JM		 2903 /* here, p is the slave id */
2904 do_slave_init(ibdev, p, 0);
2905 return;
2906
225c7b1f
RD		 2907 default:
2908 return;
2909 }
2910
2911 ibev.device = ibdev_ptr;
a5750090 2912 ibev.element.port_num = mlx4_is_bonded(ibdev->dev) ? 1 : (u8)p;
225c7b1f
RD		 2913
2914 ib_dispatch_event(&ibev);
2915}
2916
2917static struct mlx4_interface mlx4_ib_interface = {
fa417f7b
EC		 2918 .add = mlx4_ib_add,
2919 .remove = mlx4_ib_remove,
2920 .event = mlx4_ib_event,
a5750090
MS		 2921 .protocol = MLX4_PROT_IB_IPV6,
2922 .flags = MLX4_INTFF_BONDING
225c7b1f
RD		 2923};
2924
2925static int __init mlx4_ib_init(void)
2926{
fa417f7b
EC		 2927 int err;
2928
2929 wq = create_singlethread_workqueue("mlx4_ib");
2930 if (!wq)
2931 return -ENOMEM;
2932
b9c5d6a6
OD		 2933 err = mlx4_ib_mcg_init();
2934 if (err)
2935 goto clean_wq;
2936
fa417f7b 2937 err = mlx4_register_interface(&mlx4_ib_interface);
b9c5d6a6
OD		 2938 if (err)
2939 goto clean_mcg;
fa417f7b
EC		 2940
2941 return 0;
b9c5d6a6
OD		 2942
2943clean_mcg:
2944 mlx4_ib_mcg_destroy();
2945
2946clean_wq:
2947 destroy_workqueue(wq);
2948 return err;
225c7b1f
RD		 2949}
2950
2951static void __exit mlx4_ib_cleanup(void)
2952{
2953 mlx4_unregister_interface(&mlx4_ib_interface);
b9c5d6a6 2954 mlx4_ib_mcg_destroy();
fa417f7b 2955 destroy_workqueue(wq);
225c7b1f
RD		 2956}
2957
2958module_init(mlx4_ib_init);
2959module_exit(mlx4_ib_cleanup);
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