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1/*
2 * Copyright (c) 2013, Mellanox Technologies inc. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33
34#include <linux/kref.h>
35#include <linux/random.h>
36#include <linux/debugfs.h>
37#include <linux/export.h>
38#include <rdma/ib_umem.h>
39#include "mlx5_ib.h"
40
41enum {
42 DEF_CACHE_SIZE = 10,
43};
44
45static __be64 *mr_align(__be64 *ptr, int align)
46{
47 unsigned long mask = align - 1;
48
49 return (__be64 *)(((unsigned long)ptr + mask) & ~mask);
50}
51
52static int order2idx(struct mlx5_ib_dev *dev, int order)
53{
54 struct mlx5_mr_cache *cache = &dev->cache;
55
56 if (order < cache->ent[0].order)
57 return 0;
58 else
59 return order - cache->ent[0].order;
60}
61
62static int add_keys(struct mlx5_ib_dev *dev, int c, int num)
63{
64 struct device *ddev = dev->ib_dev.dma_device;
65 struct mlx5_mr_cache *cache = &dev->cache;
66 struct mlx5_cache_ent *ent = &cache->ent[c];
67 struct mlx5_create_mkey_mbox_in *in;
68 struct mlx5_ib_mr *mr;
69 int npages = 1 << ent->order;
70 int size = sizeof(u64) * npages;
71 int err = 0;
72 int i;
73
74 in = kzalloc(sizeof(*in), GFP_KERNEL);
75 if (!in)
76 return -ENOMEM;
77
78 for (i = 0; i < num; i++) {
79 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
80 if (!mr) {
81 err = -ENOMEM;
82 goto out;
83 }
84 mr->order = ent->order;
85 mr->umred = 1;
86 mr->pas = kmalloc(size + 0x3f, GFP_KERNEL);
87 if (!mr->pas) {
88 kfree(mr);
89 err = -ENOMEM;
90 goto out;
91 }
92 mr->dma = dma_map_single(ddev, mr_align(mr->pas, 0x40), size,
93 DMA_TO_DEVICE);
94 if (dma_mapping_error(ddev, mr->dma)) {
95 kfree(mr->pas);
96 kfree(mr);
97 err = -ENOMEM;
98 goto out;
99 }
100
101 in->seg.status = 1 << 6;
102 in->seg.xlt_oct_size = cpu_to_be32((npages + 1) / 2);
103 in->seg.qpn_mkey7_0 = cpu_to_be32(0xffffff << 8);
104 in->seg.flags = MLX5_ACCESS_MODE_MTT | MLX5_PERM_UMR_EN;
105 in->seg.log2_page_size = 12;
106
107 err = mlx5_core_create_mkey(&dev->mdev, &mr->mmr, in,
108 sizeof(*in));
109 if (err) {
110 mlx5_ib_warn(dev, "create mkey failed %d\n", err);
111 dma_unmap_single(ddev, mr->dma, size, DMA_TO_DEVICE);
112 kfree(mr->pas);
113 kfree(mr);
114 goto out;
115 }
116 cache->last_add = jiffies;
117
118 spin_lock(&ent->lock);
119 list_add_tail(&mr->list, &ent->head);
120 ent->cur++;
121 ent->size++;
122 spin_unlock(&ent->lock);
123 }
124
125out:
126 kfree(in);
127 return err;
128}
129
130static void remove_keys(struct mlx5_ib_dev *dev, int c, int num)
131{
132 struct device *ddev = dev->ib_dev.dma_device;
133 struct mlx5_mr_cache *cache = &dev->cache;
134 struct mlx5_cache_ent *ent = &cache->ent[c];
135 struct mlx5_ib_mr *mr;
136 int size;
137 int err;
138 int i;
139
140 for (i = 0; i < num; i++) {
141 spin_lock(&ent->lock);
142 if (list_empty(&ent->head)) {
143 spin_unlock(&ent->lock);
144 return;
145 }
146 mr = list_first_entry(&ent->head, struct mlx5_ib_mr, list);
147 list_del(&mr->list);
148 ent->cur--;
149 ent->size--;
150 spin_unlock(&ent->lock);
151 err = mlx5_core_destroy_mkey(&dev->mdev, &mr->mmr);
152 if (err) {
153 mlx5_ib_warn(dev, "failed destroy mkey\n");
154 } else {
155 size = ALIGN(sizeof(u64) * (1 << mr->order), 0x40);
156 dma_unmap_single(ddev, mr->dma, size, DMA_TO_DEVICE);
157 kfree(mr->pas);
158 kfree(mr);
159 }
160 }
161}
162
163static ssize_t size_write(struct file *filp, const char __user *buf,
164 size_t count, loff_t *pos)
165{
166 struct mlx5_cache_ent *ent = filp->private_data;
167 struct mlx5_ib_dev *dev = ent->dev;
168 char lbuf[20];
169 u32 var;
170 int err;
171 int c;
172
173 if (copy_from_user(lbuf, buf, sizeof(lbuf)))
5e631a03 174 return -EFAULT;
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175
176 c = order2idx(dev, ent->order);
177 lbuf[sizeof(lbuf) - 1] = 0;
178
179 if (sscanf(lbuf, "%u", &var) != 1)
180 return -EINVAL;
181
182 if (var < ent->limit)
183 return -EINVAL;
184
185 if (var > ent->size) {
186 err = add_keys(dev, c, var - ent->size);
187 if (err)
188 return err;
189 } else if (var < ent->size) {
190 remove_keys(dev, c, ent->size - var);
191 }
192
193 return count;
194}
195
196static ssize_t size_read(struct file *filp, char __user *buf, size_t count,
197 loff_t *pos)
198{
199 struct mlx5_cache_ent *ent = filp->private_data;
200 char lbuf[20];
201 int err;
202
203 if (*pos)
204 return 0;
205
206 err = snprintf(lbuf, sizeof(lbuf), "%d\n", ent->size);
207 if (err < 0)
208 return err;
209
210 if (copy_to_user(buf, lbuf, err))
5e631a03 211 return -EFAULT;
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212
213 *pos += err;
214
215 return err;
216}
217
218static const struct file_operations size_fops = {
219 .owner = THIS_MODULE,
220 .open = simple_open,
221 .write = size_write,
222 .read = size_read,
223};
224
225static ssize_t limit_write(struct file *filp, const char __user *buf,
226 size_t count, loff_t *pos)
227{
228 struct mlx5_cache_ent *ent = filp->private_data;
229 struct mlx5_ib_dev *dev = ent->dev;
230 char lbuf[20];
231 u32 var;
232 int err;
233 int c;
234
235 if (copy_from_user(lbuf, buf, sizeof(lbuf)))
5e631a03 236 return -EFAULT;
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237
238 c = order2idx(dev, ent->order);
239 lbuf[sizeof(lbuf) - 1] = 0;
240
241 if (sscanf(lbuf, "%u", &var) != 1)
242 return -EINVAL;
243
244 if (var > ent->size)
245 return -EINVAL;
246
247 ent->limit = var;
248
249 if (ent->cur < ent->limit) {
250 err = add_keys(dev, c, 2 * ent->limit - ent->cur);
251 if (err)
252 return err;
253 }
254
255 return count;
256}
257
258static ssize_t limit_read(struct file *filp, char __user *buf, size_t count,
259 loff_t *pos)
260{
261 struct mlx5_cache_ent *ent = filp->private_data;
262 char lbuf[20];
263 int err;
264
265 if (*pos)
266 return 0;
267
268 err = snprintf(lbuf, sizeof(lbuf), "%d\n", ent->limit);
269 if (err < 0)
270 return err;
271
272 if (copy_to_user(buf, lbuf, err))
5e631a03 273 return -EFAULT;
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274
275 *pos += err;
276
277 return err;
278}
279
280static const struct file_operations limit_fops = {
281 .owner = THIS_MODULE,
282 .open = simple_open,
283 .write = limit_write,
284 .read = limit_read,
285};
286
287static int someone_adding(struct mlx5_mr_cache *cache)
288{
289 int i;
290
291 for (i = 0; i < MAX_MR_CACHE_ENTRIES; i++) {
292 if (cache->ent[i].cur < cache->ent[i].limit)
293 return 1;
294 }
295
296 return 0;
297}
298
299static void __cache_work_func(struct mlx5_cache_ent *ent)
300{
301 struct mlx5_ib_dev *dev = ent->dev;
302 struct mlx5_mr_cache *cache = &dev->cache;
303 int i = order2idx(dev, ent->order);
304
305 if (cache->stopped)
306 return;
307
308 ent = &dev->cache.ent[i];
309 if (ent->cur < 2 * ent->limit) {
310 add_keys(dev, i, 1);
311 if (ent->cur < 2 * ent->limit)
312 queue_work(cache->wq, &ent->work);
313 } else if (ent->cur > 2 * ent->limit) {
314 if (!someone_adding(cache) &&
315 time_after(jiffies, cache->last_add + 60 * HZ)) {
316 remove_keys(dev, i, 1);
317 if (ent->cur > ent->limit)
318 queue_work(cache->wq, &ent->work);
319 } else {
320 queue_delayed_work(cache->wq, &ent->dwork, 60 * HZ);
321 }
322 }
323}
324
325static void delayed_cache_work_func(struct work_struct *work)
326{
327 struct mlx5_cache_ent *ent;
328
329 ent = container_of(work, struct mlx5_cache_ent, dwork.work);
330 __cache_work_func(ent);
331}
332
333static void cache_work_func(struct work_struct *work)
334{
335 struct mlx5_cache_ent *ent;
336
337 ent = container_of(work, struct mlx5_cache_ent, work);
338 __cache_work_func(ent);
339}
340
341static struct mlx5_ib_mr *alloc_cached_mr(struct mlx5_ib_dev *dev, int order)
342{
343 struct mlx5_mr_cache *cache = &dev->cache;
344 struct mlx5_ib_mr *mr = NULL;
345 struct mlx5_cache_ent *ent;
346 int c;
347 int i;
348
349 c = order2idx(dev, order);
350 if (c < 0 || c >= MAX_MR_CACHE_ENTRIES) {
351 mlx5_ib_warn(dev, "order %d, cache index %d\n", order, c);
352 return NULL;
353 }
354
355 for (i = c; i < MAX_MR_CACHE_ENTRIES; i++) {
356 ent = &cache->ent[i];
357
358 mlx5_ib_dbg(dev, "order %d, cache index %d\n", ent->order, i);
359
360 spin_lock(&ent->lock);
361 if (!list_empty(&ent->head)) {
362 mr = list_first_entry(&ent->head, struct mlx5_ib_mr,
363 list);
364 list_del(&mr->list);
365 ent->cur--;
366 spin_unlock(&ent->lock);
367 if (ent->cur < ent->limit)
368 queue_work(cache->wq, &ent->work);
369 break;
370 }
371 spin_unlock(&ent->lock);
372
373 queue_work(cache->wq, &ent->work);
374
375 if (mr)
376 break;
377 }
378
379 if (!mr)
380 cache->ent[c].miss++;
381
382 return mr;
383}
384
385static void free_cached_mr(struct mlx5_ib_dev *dev, struct mlx5_ib_mr *mr)
386{
387 struct mlx5_mr_cache *cache = &dev->cache;
388 struct mlx5_cache_ent *ent;
389 int shrink = 0;
390 int c;
391
392 c = order2idx(dev, mr->order);
393 if (c < 0 || c >= MAX_MR_CACHE_ENTRIES) {
394 mlx5_ib_warn(dev, "order %d, cache index %d\n", mr->order, c);
395 return;
396 }
397 ent = &cache->ent[c];
398 spin_lock(&ent->lock);
399 list_add_tail(&mr->list, &ent->head);
400 ent->cur++;
401 if (ent->cur > 2 * ent->limit)
402 shrink = 1;
403 spin_unlock(&ent->lock);
404
405 if (shrink)
406 queue_work(cache->wq, &ent->work);
407}
408
409static void clean_keys(struct mlx5_ib_dev *dev, int c)
410{
411 struct device *ddev = dev->ib_dev.dma_device;
412 struct mlx5_mr_cache *cache = &dev->cache;
413 struct mlx5_cache_ent *ent = &cache->ent[c];
414 struct mlx5_ib_mr *mr;
415 int size;
416 int err;
417
3c461911 418 cancel_delayed_work(&ent->dwork);
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419 while (1) {
420 spin_lock(&ent->lock);
421 if (list_empty(&ent->head)) {
422 spin_unlock(&ent->lock);
423 return;
424 }
425 mr = list_first_entry(&ent->head, struct mlx5_ib_mr, list);
426 list_del(&mr->list);
427 ent->cur--;
428 ent->size--;
429 spin_unlock(&ent->lock);
430 err = mlx5_core_destroy_mkey(&dev->mdev, &mr->mmr);
431 if (err) {
432 mlx5_ib_warn(dev, "failed destroy mkey\n");
433 } else {
434 size = ALIGN(sizeof(u64) * (1 << mr->order), 0x40);
435 dma_unmap_single(ddev, mr->dma, size, DMA_TO_DEVICE);
436 kfree(mr->pas);
437 kfree(mr);
438 }
439 }
440}
441
442static int mlx5_mr_cache_debugfs_init(struct mlx5_ib_dev *dev)
443{
444 struct mlx5_mr_cache *cache = &dev->cache;
445 struct mlx5_cache_ent *ent;
446 int i;
447
448 if (!mlx5_debugfs_root)
449 return 0;
450
451 cache->root = debugfs_create_dir("mr_cache", dev->mdev.priv.dbg_root);
452 if (!cache->root)
453 return -ENOMEM;
454
455 for (i = 0; i < MAX_MR_CACHE_ENTRIES; i++) {
456 ent = &cache->ent[i];
457 sprintf(ent->name, "%d", ent->order);
458 ent->dir = debugfs_create_dir(ent->name, cache->root);
459 if (!ent->dir)
460 return -ENOMEM;
461
462 ent->fsize = debugfs_create_file("size", 0600, ent->dir, ent,
463 &size_fops);
464 if (!ent->fsize)
465 return -ENOMEM;
466
467 ent->flimit = debugfs_create_file("limit", 0600, ent->dir, ent,
468 &limit_fops);
469 if (!ent->flimit)
470 return -ENOMEM;
471
472 ent->fcur = debugfs_create_u32("cur", 0400, ent->dir,
473 &ent->cur);
474 if (!ent->fcur)
475 return -ENOMEM;
476
477 ent->fmiss = debugfs_create_u32("miss", 0600, ent->dir,
478 &ent->miss);
479 if (!ent->fmiss)
480 return -ENOMEM;
481 }
482
483 return 0;
484}
485
486static void mlx5_mr_cache_debugfs_cleanup(struct mlx5_ib_dev *dev)
487{
488 if (!mlx5_debugfs_root)
489 return;
490
491 debugfs_remove_recursive(dev->cache.root);
492}
493
494int mlx5_mr_cache_init(struct mlx5_ib_dev *dev)
495{
496 struct mlx5_mr_cache *cache = &dev->cache;
497 struct mlx5_cache_ent *ent;
498 int limit;
499 int size;
500 int err;
501 int i;
502
503 cache->wq = create_singlethread_workqueue("mkey_cache");
504 if (!cache->wq) {
505 mlx5_ib_warn(dev, "failed to create work queue\n");
506 return -ENOMEM;
507 }
508
509 for (i = 0; i < MAX_MR_CACHE_ENTRIES; i++) {
510 INIT_LIST_HEAD(&cache->ent[i].head);
511 spin_lock_init(&cache->ent[i].lock);
512
513 ent = &cache->ent[i];
514 INIT_LIST_HEAD(&ent->head);
515 spin_lock_init(&ent->lock);
516 ent->order = i + 2;
517 ent->dev = dev;
518
519 if (dev->mdev.profile->mask & MLX5_PROF_MASK_MR_CACHE) {
520 size = dev->mdev.profile->mr_cache[i].size;
521 limit = dev->mdev.profile->mr_cache[i].limit;
522 } else {
523 size = DEF_CACHE_SIZE;
524 limit = 0;
525 }
526 INIT_WORK(&ent->work, cache_work_func);
527 INIT_DELAYED_WORK(&ent->dwork, delayed_cache_work_func);
528 ent->limit = limit;
529 queue_work(cache->wq, &ent->work);
530 }
531
532 err = mlx5_mr_cache_debugfs_init(dev);
533 if (err)
534 mlx5_ib_warn(dev, "cache debugfs failure\n");
535
536 return 0;
537}
538
539int mlx5_mr_cache_cleanup(struct mlx5_ib_dev *dev)
540{
541 int i;
542
543 dev->cache.stopped = 1;
3c461911 544 flush_workqueue(dev->cache.wq);
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545
546 mlx5_mr_cache_debugfs_cleanup(dev);
547
548 for (i = 0; i < MAX_MR_CACHE_ENTRIES; i++)
549 clean_keys(dev, i);
550
3c461911
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551 destroy_workqueue(dev->cache.wq);
552
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553 return 0;
554}
555
556struct ib_mr *mlx5_ib_get_dma_mr(struct ib_pd *pd, int acc)
557{
558 struct mlx5_ib_dev *dev = to_mdev(pd->device);
559 struct mlx5_core_dev *mdev = &dev->mdev;
560 struct mlx5_create_mkey_mbox_in *in;
561 struct mlx5_mkey_seg *seg;
562 struct mlx5_ib_mr *mr;
563 int err;
564
565 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
566 if (!mr)
567 return ERR_PTR(-ENOMEM);
568
569 in = kzalloc(sizeof(*in), GFP_KERNEL);
570 if (!in) {
571 err = -ENOMEM;
572 goto err_free;
573 }
574
575 seg = &in->seg;
576 seg->flags = convert_access(acc) | MLX5_ACCESS_MODE_PA;
577 seg->flags_pd = cpu_to_be32(to_mpd(pd)->pdn | MLX5_MKEY_LEN64);
578 seg->qpn_mkey7_0 = cpu_to_be32(0xffffff << 8);
579 seg->start_addr = 0;
580
581 err = mlx5_core_create_mkey(mdev, &mr->mmr, in, sizeof(*in));
582 if (err)
583 goto err_in;
584
585 kfree(in);
586 mr->ibmr.lkey = mr->mmr.key;
587 mr->ibmr.rkey = mr->mmr.key;
588 mr->umem = NULL;
589
590 return &mr->ibmr;
591
592err_in:
593 kfree(in);
594
595err_free:
596 kfree(mr);
597
598 return ERR_PTR(err);
599}
600
601static int get_octo_len(u64 addr, u64 len, int page_size)
602{
603 u64 offset;
604 int npages;
605
606 offset = addr & (page_size - 1);
607 npages = ALIGN(len + offset, page_size) >> ilog2(page_size);
608 return (npages + 1) / 2;
609}
610
611static int use_umr(int order)
612{
613 return order <= 17;
614}
615
616static void prep_umr_reg_wqe(struct ib_pd *pd, struct ib_send_wr *wr,
617 struct ib_sge *sg, u64 dma, int n, u32 key,
618 int page_shift, u64 virt_addr, u64 len,
619 int access_flags)
620{
621 struct mlx5_ib_dev *dev = to_mdev(pd->device);
622 struct ib_mr *mr = dev->umrc.mr;
623
624 sg->addr = dma;
625 sg->length = ALIGN(sizeof(u64) * n, 64);
626 sg->lkey = mr->lkey;
627
628 wr->next = NULL;
629 wr->send_flags = 0;
630 wr->sg_list = sg;
631 if (n)
632 wr->num_sge = 1;
633 else
634 wr->num_sge = 0;
635
636 wr->opcode = MLX5_IB_WR_UMR;
637 wr->wr.fast_reg.page_list_len = n;
638 wr->wr.fast_reg.page_shift = page_shift;
639 wr->wr.fast_reg.rkey = key;
640 wr->wr.fast_reg.iova_start = virt_addr;
641 wr->wr.fast_reg.length = len;
642 wr->wr.fast_reg.access_flags = access_flags;
643 wr->wr.fast_reg.page_list = (struct ib_fast_reg_page_list *)pd;
644}
645
646static void prep_umr_unreg_wqe(struct mlx5_ib_dev *dev,
647 struct ib_send_wr *wr, u32 key)
648{
649 wr->send_flags = MLX5_IB_SEND_UMR_UNREG;
650 wr->opcode = MLX5_IB_WR_UMR;
651 wr->wr.fast_reg.rkey = key;
652}
653
654void mlx5_umr_cq_handler(struct ib_cq *cq, void *cq_context)
655{
656 struct mlx5_ib_mr *mr;
657 struct ib_wc wc;
658 int err;
659
660 while (1) {
661 err = ib_poll_cq(cq, 1, &wc);
662 if (err < 0) {
663 pr_warn("poll cq error %d\n", err);
664 return;
665 }
666 if (err == 0)
667 break;
668
669 mr = (struct mlx5_ib_mr *)(unsigned long)wc.wr_id;
670 mr->status = wc.status;
671 complete(&mr->done);
672 }
673 ib_req_notify_cq(cq, IB_CQ_NEXT_COMP);
674}
675
676static struct mlx5_ib_mr *reg_umr(struct ib_pd *pd, struct ib_umem *umem,
677 u64 virt_addr, u64 len, int npages,
678 int page_shift, int order, int access_flags)
679{
680 struct mlx5_ib_dev *dev = to_mdev(pd->device);
681 struct umr_common *umrc = &dev->umrc;
682 struct ib_send_wr wr, *bad;
683 struct mlx5_ib_mr *mr;
684 struct ib_sge sg;
685 int err;
686 int i;
687
688 for (i = 0; i < 10; i++) {
689 mr = alloc_cached_mr(dev, order);
690 if (mr)
691 break;
692
693 err = add_keys(dev, order2idx(dev, order), 1);
694 if (err) {
695 mlx5_ib_warn(dev, "add_keys failed\n");
696 break;
697 }
698 }
699
700 if (!mr)
701 return ERR_PTR(-EAGAIN);
702
703 mlx5_ib_populate_pas(dev, umem, page_shift, mr_align(mr->pas, 0x40), 1);
704
705 memset(&wr, 0, sizeof(wr));
706 wr.wr_id = (u64)(unsigned long)mr;
707 prep_umr_reg_wqe(pd, &wr, &sg, mr->dma, npages, mr->mmr.key, page_shift, virt_addr, len, access_flags);
708
709 /* We serialize polls so one process does not kidnap another's
710 * completion. This is not a problem since wr is completed in
711 * around 1 usec
712 */
713 down(&umrc->sem);
714 init_completion(&mr->done);
715 err = ib_post_send(umrc->qp, &wr, &bad);
716 if (err) {
717 mlx5_ib_warn(dev, "post send failed, err %d\n", err);
718 up(&umrc->sem);
719 goto error;
720 }
721 wait_for_completion(&mr->done);
722 up(&umrc->sem);
723
724 if (mr->status != IB_WC_SUCCESS) {
725 mlx5_ib_warn(dev, "reg umr failed\n");
726 err = -EFAULT;
727 goto error;
728 }
729
730 return mr;
731
732error:
733 free_cached_mr(dev, mr);
734 return ERR_PTR(err);
735}
736
737static struct mlx5_ib_mr *reg_create(struct ib_pd *pd, u64 virt_addr,
738 u64 length, struct ib_umem *umem,
739 int npages, int page_shift,
740 int access_flags)
741{
742 struct mlx5_ib_dev *dev = to_mdev(pd->device);
743 struct mlx5_create_mkey_mbox_in *in;
744 struct mlx5_ib_mr *mr;
745 int inlen;
746 int err;
747
748 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
749 if (!mr)
750 return ERR_PTR(-ENOMEM);
751
752 inlen = sizeof(*in) + sizeof(*in->pas) * ((npages + 1) / 2) * 2;
753 in = mlx5_vzalloc(inlen);
754 if (!in) {
755 err = -ENOMEM;
756 goto err_1;
757 }
758 mlx5_ib_populate_pas(dev, umem, page_shift, in->pas, 0);
759
760 in->seg.flags = convert_access(access_flags) |
761 MLX5_ACCESS_MODE_MTT;
762 in->seg.flags_pd = cpu_to_be32(to_mpd(pd)->pdn);
763 in->seg.start_addr = cpu_to_be64(virt_addr);
764 in->seg.len = cpu_to_be64(length);
765 in->seg.bsfs_octo_size = 0;
766 in->seg.xlt_oct_size = cpu_to_be32(get_octo_len(virt_addr, length, 1 << page_shift));
767 in->seg.log2_page_size = page_shift;
768 in->seg.qpn_mkey7_0 = cpu_to_be32(0xffffff << 8);
769 in->xlat_oct_act_size = cpu_to_be32(get_octo_len(virt_addr, length, 1 << page_shift));
770 err = mlx5_core_create_mkey(&dev->mdev, &mr->mmr, in, inlen);
771 if (err) {
772 mlx5_ib_warn(dev, "create mkey failed\n");
773 goto err_2;
774 }
775 mr->umem = umem;
776 mlx5_vfree(in);
777
778 mlx5_ib_dbg(dev, "mkey = 0x%x\n", mr->mmr.key);
779
780 return mr;
781
782err_2:
783 mlx5_vfree(in);
784
785err_1:
786 kfree(mr);
787
788 return ERR_PTR(err);
789}
790
791struct ib_mr *mlx5_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
792 u64 virt_addr, int access_flags,
793 struct ib_udata *udata)
794{
795 struct mlx5_ib_dev *dev = to_mdev(pd->device);
796 struct mlx5_ib_mr *mr = NULL;
797 struct ib_umem *umem;
798 int page_shift;
799 int npages;
800 int ncont;
801 int order;
802 int err;
803
804 mlx5_ib_dbg(dev, "start 0x%llx, virt_addr 0x%llx, length 0x%llx\n",
805 start, virt_addr, length);
806 umem = ib_umem_get(pd->uobject->context, start, length, access_flags,
807 0);
808 if (IS_ERR(umem)) {
809 mlx5_ib_dbg(dev, "umem get failed\n");
810 return (void *)umem;
811 }
812
813 mlx5_ib_cont_pages(umem, start, &npages, &page_shift, &ncont, &order);
814 if (!npages) {
815 mlx5_ib_warn(dev, "avoid zero region\n");
816 err = -EINVAL;
817 goto error;
818 }
819
820 mlx5_ib_dbg(dev, "npages %d, ncont %d, order %d, page_shift %d\n",
821 npages, ncont, order, page_shift);
822
823 if (use_umr(order)) {
824 mr = reg_umr(pd, umem, virt_addr, length, ncont, page_shift,
825 order, access_flags);
826 if (PTR_ERR(mr) == -EAGAIN) {
827 mlx5_ib_dbg(dev, "cache empty for order %d", order);
828 mr = NULL;
829 }
830 }
831
832 if (!mr)
833 mr = reg_create(pd, virt_addr, length, umem, ncont, page_shift,
834 access_flags);
835
836 if (IS_ERR(mr)) {
837 err = PTR_ERR(mr);
838 goto error;
839 }
840
841 mlx5_ib_dbg(dev, "mkey 0x%x\n", mr->mmr.key);
842
843 mr->umem = umem;
844 mr->npages = npages;
845 spin_lock(&dev->mr_lock);
846 dev->mdev.priv.reg_pages += npages;
847 spin_unlock(&dev->mr_lock);
848 mr->ibmr.lkey = mr->mmr.key;
849 mr->ibmr.rkey = mr->mmr.key;
850
851 return &mr->ibmr;
852
853error:
854 ib_umem_release(umem);
855 return ERR_PTR(err);
856}
857
858static int unreg_umr(struct mlx5_ib_dev *dev, struct mlx5_ib_mr *mr)
859{
860 struct umr_common *umrc = &dev->umrc;
861 struct ib_send_wr wr, *bad;
862 int err;
863
864 memset(&wr, 0, sizeof(wr));
865 wr.wr_id = (u64)(unsigned long)mr;
866 prep_umr_unreg_wqe(dev, &wr, mr->mmr.key);
867
868 down(&umrc->sem);
869 init_completion(&mr->done);
870 err = ib_post_send(umrc->qp, &wr, &bad);
871 if (err) {
872 up(&umrc->sem);
873 mlx5_ib_dbg(dev, "err %d\n", err);
874 goto error;
875 }
876 wait_for_completion(&mr->done);
877 up(&umrc->sem);
878 if (mr->status != IB_WC_SUCCESS) {
879 mlx5_ib_warn(dev, "unreg umr failed\n");
880 err = -EFAULT;
881 goto error;
882 }
883 return 0;
884
885error:
886 return err;
887}
888
889int mlx5_ib_dereg_mr(struct ib_mr *ibmr)
890{
891 struct mlx5_ib_dev *dev = to_mdev(ibmr->device);
892 struct mlx5_ib_mr *mr = to_mmr(ibmr);
893 struct ib_umem *umem = mr->umem;
894 int npages = mr->npages;
895 int umred = mr->umred;
896 int err;
897
898 if (!umred) {
899 err = mlx5_core_destroy_mkey(&dev->mdev, &mr->mmr);
900 if (err) {
901 mlx5_ib_warn(dev, "failed to destroy mkey 0x%x (%d)\n",
902 mr->mmr.key, err);
903 return err;
904 }
905 } else {
906 err = unreg_umr(dev, mr);
907 if (err) {
908 mlx5_ib_warn(dev, "failed unregister\n");
909 return err;
910 }
911 free_cached_mr(dev, mr);
912 }
913
914 if (umem) {
915 ib_umem_release(umem);
916 spin_lock(&dev->mr_lock);
917 dev->mdev.priv.reg_pages -= npages;
918 spin_unlock(&dev->mr_lock);
919 }
920
921 if (!umred)
922 kfree(mr);
923
924 return 0;
925}
926
927struct ib_mr *mlx5_ib_alloc_fast_reg_mr(struct ib_pd *pd,
928 int max_page_list_len)
929{
930 struct mlx5_ib_dev *dev = to_mdev(pd->device);
931 struct mlx5_create_mkey_mbox_in *in;
932 struct mlx5_ib_mr *mr;
933 int err;
934
935 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
936 if (!mr)
937 return ERR_PTR(-ENOMEM);
938
939 in = kzalloc(sizeof(*in), GFP_KERNEL);
940 if (!in) {
941 err = -ENOMEM;
942 goto err_free;
943 }
944
945 in->seg.status = 1 << 6; /* free */
946 in->seg.xlt_oct_size = cpu_to_be32((max_page_list_len + 1) / 2);
947 in->seg.qpn_mkey7_0 = cpu_to_be32(0xffffff << 8);
948 in->seg.flags = MLX5_PERM_UMR_EN | MLX5_ACCESS_MODE_MTT;
949 in->seg.flags_pd = cpu_to_be32(to_mpd(pd)->pdn);
950 /*
951 * TBD not needed - issue 197292 */
952 in->seg.log2_page_size = PAGE_SHIFT;
953
954 err = mlx5_core_create_mkey(&dev->mdev, &mr->mmr, in, sizeof(*in));
955 kfree(in);
956 if (err)
957 goto err_free;
958
959 mr->ibmr.lkey = mr->mmr.key;
960 mr->ibmr.rkey = mr->mmr.key;
961 mr->umem = NULL;
962
963 return &mr->ibmr;
964
965err_free:
966 kfree(mr);
967 return ERR_PTR(err);
968}
969
970struct ib_fast_reg_page_list *mlx5_ib_alloc_fast_reg_page_list(struct ib_device *ibdev,
971 int page_list_len)
972{
973 struct mlx5_ib_fast_reg_page_list *mfrpl;
974 int size = page_list_len * sizeof(u64);
975
976 mfrpl = kmalloc(sizeof(*mfrpl), GFP_KERNEL);
977 if (!mfrpl)
978 return ERR_PTR(-ENOMEM);
979
980 mfrpl->ibfrpl.page_list = kmalloc(size, GFP_KERNEL);
981 if (!mfrpl->ibfrpl.page_list)
982 goto err_free;
983
984 mfrpl->mapped_page_list = dma_alloc_coherent(ibdev->dma_device,
985 size, &mfrpl->map,
986 GFP_KERNEL);
987 if (!mfrpl->mapped_page_list)
988 goto err_free;
989
990 WARN_ON(mfrpl->map & 0x3f);
991
992 return &mfrpl->ibfrpl;
993
994err_free:
995 kfree(mfrpl->ibfrpl.page_list);
996 kfree(mfrpl);
997 return ERR_PTR(-ENOMEM);
998}
999
1000void mlx5_ib_free_fast_reg_page_list(struct ib_fast_reg_page_list *page_list)
1001{
1002 struct mlx5_ib_fast_reg_page_list *mfrpl = to_mfrpl(page_list);
1003 struct mlx5_ib_dev *dev = to_mdev(page_list->device);
1004 int size = page_list->max_page_list_len * sizeof(u64);
1005
1006 dma_free_coherent(&dev->mdev.pdev->dev, size, mfrpl->mapped_page_list,
1007 mfrpl->map);
1008 kfree(mfrpl->ibfrpl.page_list);
1009 kfree(mfrpl);
1010}