[mirror_ubuntu-jammy-kernel.git] / drivers / infiniband / hw / mlx5 / user.h

/*
 * Copyright (c) 2013, Mellanox Technologies inc.  All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */

#ifndef MLX5_IB_USER_H
#define MLX5_IB_USER_H

#include <linux/types.h>

enum {
	MLX5_QP_FLAG_SIGNATURE		= 1 << 0,
	MLX5_QP_FLAG_SCATTER_CQE	= 1 << 1,
};

enum {
	MLX5_SRQ_FLAG_SIGNATURE		= 1 << 0,
};


/* Increment this value if any changes that break userspace ABI
 * compatibility are made.
 */
#define MLX5_IB_UVERBS_ABI_VERSION	1

/* Make sure that all structs defined in this file remain laid out so
 * that they pack the same way on 32-bit and 64-bit architectures (to
 * avoid incompatibility between 32-bit userspace and 64-bit kernels).
 * In particular do not use pointer types -- pass pointers in __u64
 * instead.
 */

struct mlx5_ib_alloc_ucontext_req {
	__u32	total_num_uuars;
	__u32	num_low_latency_uuars;
};

struct mlx5_ib_alloc_ucontext_req_v2 {
	__u32	total_num_uuars;
	__u32	num_low_latency_uuars;
	__u32	flags;
	__u32	reserved;
};

struct mlx5_ib_alloc_ucontext_resp {
	__u32	qp_tab_size;
	__u32	bf_reg_size;
	__u32	tot_uuars;
	__u32	cache_line_size;
	__u16	max_sq_desc_sz;
	__u16	max_rq_desc_sz;
	__u32	max_send_wqebb;
	__u32	max_recv_wr;
	__u32	max_srq_recv_wr;
	__u16	num_ports;
	__u16	reserved;
};

struct mlx5_ib_alloc_pd_resp {
	__u32	pdn;
};

struct mlx5_ib_create_cq {
	__u64	buf_addr;
	__u64	db_addr;
	__u32	cqe_size;
};

struct mlx5_ib_create_cq_resp {
	__u32	cqn;
	__u32	reserved;
};

struct mlx5_ib_resize_cq {
	__u64	buf_addr;
	__u16	cqe_size;
	__u16	reserved0;
	__u32	reserved1;
};

struct mlx5_ib_create_srq {
	__u64	buf_addr;
	__u64	db_addr;
	__u32	flags;
};

struct mlx5_ib_create_srq_resp {
	__u32	srqn;
	__u32	reserved;
};

struct mlx5_ib_create_qp {
	__u64	buf_addr;
	__u64	db_addr;
	__u32	sq_wqe_count;
	__u32	rq_wqe_count;
	__u32	rq_wqe_shift;
	__u32	flags;
};

struct mlx5_ib_create_qp_resp {
	__u32	uuar_index;
};
#endif /* MLX5_IB_USER_H */
Commit	Line	Data
e126ba97 EC	1	/*
	2	* Copyright (c) 2013, Mellanox Technologies inc. All rights reserved.
	3	*
	4	* This software is available to you under a choice of one of two
	5	* licenses. You may choose to be licensed under the terms of the GNU
	6	* General Public License (GPL) Version 2, available from the file
	7	* COPYING in the main directory of this source tree, or the
	8	* OpenIB.org BSD license below:
	9	*
	10	* Redistribution and use in source and binary forms, with or
	11	* without modification, are permitted provided that the following
	12	* conditions are met:
	13	*
	14	* - Redistributions of source code must retain the above
	15	* copyright notice, this list of conditions and the following
	16	* disclaimer.
	17	*
	18	* - Redistributions in binary form must reproduce the above
	19	* copyright notice, this list of conditions and the following
	20	* disclaimer in the documentation and/or other materials
	21	* provided with the distribution.
	22	*
	23	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	24	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	25	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	26	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	27	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	28	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	29	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	30	* SOFTWARE.
	31	*/
	32
	33	#ifndef MLX5_IB_USER_H
	34	#define MLX5_IB_USER_H
	35
	36	#include <linux/types.h>
	37
	38	enum {
	39	MLX5_QP_FLAG_SIGNATURE = 1 << 0,
	40	MLX5_QP_FLAG_SCATTER_CQE = 1 << 1,
	41	};
	42
	43	enum {
	44	MLX5_SRQ_FLAG_SIGNATURE = 1 << 0,
	45	};
	46
	47
	48	/* Increment this value if any changes that break userspace ABI
	49	* compatibility are made.
	50	*/
	51	#define MLX5_IB_UVERBS_ABI_VERSION 1
	52
	53	/* Make sure that all structs defined in this file remain laid out so
	54	* that they pack the same way on 32-bit and 64-bit architectures (to
	55	* avoid incompatibility between 32-bit userspace and 64-bit kernels).
	56	* In particular do not use pointer types -- pass pointers in __u64
	57	* instead.
	58	*/
	59
	60	struct mlx5_ib_alloc_ucontext_req {
	61	__u32 total_num_uuars;
	62	__u32 num_low_latency_uuars;
	63	};
	64
78c0f98c EC	65	struct mlx5_ib_alloc_ucontext_req_v2 {
	66	__u32 total_num_uuars;
	67	__u32 num_low_latency_uuars;
	68	__u32 flags;
	69	__u32 reserved;
	70	};
	71
e126ba97 EC	72	struct mlx5_ib_alloc_ucontext_resp {
	73	__u32 qp_tab_size;
	74	__u32 bf_reg_size;
	75	__u32 tot_uuars;
	76	__u32 cache_line_size;
	77	__u16 max_sq_desc_sz;
	78	__u16 max_rq_desc_sz;
	79	__u32 max_send_wqebb;
	80	__u32 max_recv_wr;
	81	__u32 max_srq_recv_wr;
	82	__u16 num_ports;
	83	__u16 reserved;
	84	};
	85
	86	struct mlx5_ib_alloc_pd_resp {
	87	__u32 pdn;
	88	};
	89
	90	struct mlx5_ib_create_cq {
	91	__u64 buf_addr;
	92	__u64 db_addr;
	93	__u32 cqe_size;
	94	};
	95
	96	struct mlx5_ib_create_cq_resp {
	97	__u32 cqn;
	98	__u32 reserved;
	99	};
	100
	101	struct mlx5_ib_resize_cq {
	102	__u64 buf_addr;
bde51583 EC	103	__u16 cqe_size;
	104	__u16 reserved0;
	105	__u32 reserved1;
e126ba97 EC	106	};
	107
	108	struct mlx5_ib_create_srq {
	109	__u64 buf_addr;
	110	__u64 db_addr;
	111	__u32 flags;
	112	};
	113
	114	struct mlx5_ib_create_srq_resp {
	115	__u32 srqn;
	116	__u32 reserved;
	117	};
	118
	119	struct mlx5_ib_create_qp {
	120	__u64 buf_addr;
	121	__u64 db_addr;
	122	__u32 sq_wqe_count;
	123	__u32 rq_wqe_count;
	124	__u32 rq_wqe_shift;
	125	__u32 flags;
	126	};
	127
	128	struct mlx5_ib_create_qp_resp {
	129	__u32 uuar_index;
	130	};
	131	#endif /* MLX5_IB_USER_H */