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[IB] mthca: Add struct pci_driver.owner field
[mirror_ubuntu-kernels.git] / drivers / infiniband / hw / mthca / mthca_main.c
CommitLineData
1da177e4
LT		 1/*
2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
cd4e8fb4 3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
2a1d9b7f 4 * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
1da177e4
LT		 5 *
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
11 *
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
14 * conditions are met:
15 *
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
18 * disclaimer.
19 *
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
24 *
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE.
33 *
34 * $Id: mthca_main.c 1396 2004-12-28 04:10:27Z roland $
35 */
36
37#include <linux/config.h>
1da177e4
LT		 38#include <linux/module.h>
39#include <linux/init.h>
40#include <linux/errno.h>
41#include <linux/pci.h>
42#include <linux/interrupt.h>
43
44#include "mthca_dev.h"
45#include "mthca_config_reg.h"
46#include "mthca_cmd.h"
47#include "mthca_profile.h"
48#include "mthca_memfree.h"
49
50MODULE_AUTHOR("Roland Dreier");
51MODULE_DESCRIPTION("Mellanox InfiniBand HCA low-level driver");
52MODULE_LICENSE("Dual BSD/GPL");
53MODULE_VERSION(DRV_VERSION);
54
55#ifdef CONFIG_PCI_MSI
56
57static int msi_x = 0;
58module_param(msi_x, int, 0444);
59MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero");
60
61static int msi = 0;
62module_param(msi, int, 0444);
63MODULE_PARM_DESC(msi, "attempt to use MSI if nonzero");
64
65#else /* CONFIG_PCI_MSI */
66
67#define msi_x (0)
68#define msi (0)
69
70#endif /* CONFIG_PCI_MSI */
71
72static const char mthca_version[] __devinitdata =
177214af 73 DRV_NAME ": Mellanox InfiniBand HCA driver v"
1da177e4
LT		 74 DRV_VERSION " (" DRV_RELDATE ")\n";
75
76static struct mthca_profile default_profile = {
e0f5fdca
MT		 77 .num_qp = 1 << 16,
78 .rdb_per_qp = 4,
79 .num_cq = 1 << 16,
80 .num_mcg = 1 << 13,
81 .num_mpt = 1 << 17,
82 .num_mtt = 1 << 20,
83 .num_udav = 1 << 15, /* Tavor only */
84 .fmr_reserved_mtts = 1 << 18, /* Tavor only */
85 .uarc_size = 1 << 18, /* Arbel only */
1da177e4
LT		 86};
87
88static int __devinit mthca_tune_pci(struct mthca_dev *mdev)
89{
90 int cap;
91 u16 val;
92
93 /* First try to max out Read Byte Count */
94 cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX);
95 if (cap) {
96 if (pci_read_config_word(mdev->pdev, cap + PCI_X_CMD, &val)) {
97 mthca_err(mdev, "Couldn't read PCI-X command register, "
98 "aborting.\n");
99 return -ENODEV;
100 }
101 val = (val & ~PCI_X_CMD_MAX_READ) | (3 << 2);
102 if (pci_write_config_word(mdev->pdev, cap + PCI_X_CMD, val)) {
103 mthca_err(mdev, "Couldn't write PCI-X command register, "
104 "aborting.\n");
105 return -ENODEV;
106 }
68a3c212 107 } else if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE))
1da177e4
LT		 108 mthca_info(mdev, "No PCI-X capability, not setting RBC.\n");
109
110 cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_EXP);
111 if (cap) {
112 if (pci_read_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, &val)) {
113 mthca_err(mdev, "Couldn't read PCI Express device control "
114 "register, aborting.\n");
115 return -ENODEV;
116 }
117 val = (val & ~PCI_EXP_DEVCTL_READRQ) | (5 << 12);
118 if (pci_write_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, val)) {
119 mthca_err(mdev, "Couldn't write PCI Express device control "
120 "register, aborting.\n");
121 return -ENODEV;
122 }
68a3c212 123 } else if (mdev->mthca_flags & MTHCA_FLAG_PCIE)
1da177e4
LT		 124 mthca_info(mdev, "No PCI Express capability, "
125 "not setting Max Read Request Size.\n");
126
127 return 0;
128}
129
130static int __devinit mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim *dev_lim)
131{
132 int err;
133 u8 status;
134
135 err = mthca_QUERY_DEV_LIM(mdev, dev_lim, &status);
136 if (err) {
137 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
138 return err;
139 }
140 if (status) {
141 mthca_err(mdev, "QUERY_DEV_LIM returned status 0x%02x, "
142 "aborting.\n", status);
143 return -EINVAL;
144 }
145 if (dev_lim->min_page_sz > PAGE_SIZE) {
146 mthca_err(mdev, "HCA minimum page size of %d bigger than "
147 "kernel PAGE_SIZE of %ld, aborting.\n",
148 dev_lim->min_page_sz, PAGE_SIZE);
149 return -ENODEV;
150 }
151 if (dev_lim->num_ports > MTHCA_MAX_PORTS) {
152 mthca_err(mdev, "HCA has %d ports, but we only support %d, "
153 "aborting.\n",
154 dev_lim->num_ports, MTHCA_MAX_PORTS);
155 return -ENODEV;
156 }
157
158 mdev->limits.num_ports = dev_lim->num_ports;
159 mdev->limits.vl_cap = dev_lim->max_vl;
160 mdev->limits.mtu_cap = dev_lim->max_mtu;
161 mdev->limits.gid_table_len = dev_lim->max_gids;
162 mdev->limits.pkey_table_len = dev_lim->max_pkeys;
163 mdev->limits.local_ca_ack_delay = dev_lim->local_ca_ack_delay;
164 mdev->limits.max_sg = dev_lim->max_sg;
efaae8f7
JM		 165 mdev->limits.max_wqes = dev_lim->max_qp_sz;
166 mdev->limits.max_qp_init_rdma = dev_lim->max_requester_per_qp;
1da177e4 167 mdev->limits.reserved_qps = dev_lim->reserved_qps;
efaae8f7 168 mdev->limits.max_srq_wqes = dev_lim->max_srq_sz;
1da177e4
LT		 169 mdev->limits.reserved_srqs = dev_lim->reserved_srqs;
170 mdev->limits.reserved_eecs = dev_lim->reserved_eecs;
efaae8f7
JM		 171 /*
172 * Subtract 1 from the limit because we need to allocate a
173 * spare CQE so the HCA HW can tell the difference between an
174 * empty CQ and a full CQ.
175 */
176 mdev->limits.max_cqes = dev_lim->max_cq_sz - 1;
1da177e4
LT		 177 mdev->limits.reserved_cqs = dev_lim->reserved_cqs;
178 mdev->limits.reserved_eqs = dev_lim->reserved_eqs;
179 mdev->limits.reserved_mtts = dev_lim->reserved_mtts;
180 mdev->limits.reserved_mrws = dev_lim->reserved_mrws;
181 mdev->limits.reserved_uars = dev_lim->reserved_uars;
182 mdev->limits.reserved_pds = dev_lim->reserved_pds;
da6561c2 183 mdev->limits.port_width_cap = dev_lim->max_port_width;
33033b79 184 mdev->limits.flags = dev_lim->flags;
1da177e4
LT		 185
186 /* IB_DEVICE_RESIZE_MAX_WR not supported by driver.
187 May be doable since hardware supports it for SRQ.
188
189 IB_DEVICE_N_NOTIFY_CQ is supported by hardware but not by driver.
190
191 IB_DEVICE_SRQ_RESIZE is supported by hardware but SRQ is not
192 supported by driver. */
193 mdev->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
194 IB_DEVICE_PORT_ACTIVE_EVENT |
195 IB_DEVICE_SYS_IMAGE_GUID |
196 IB_DEVICE_RC_RNR_NAK_GEN;
197
198 if (dev_lim->flags & DEV_LIM_FLAG_BAD_PKEY_CNTR)
199 mdev->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
200
201 if (dev_lim->flags & DEV_LIM_FLAG_BAD_QKEY_CNTR)
202 mdev->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
203
204 if (dev_lim->flags & DEV_LIM_FLAG_RAW_MULTI)
205 mdev->device_cap_flags |= IB_DEVICE_RAW_MULTI;
206
207 if (dev_lim->flags & DEV_LIM_FLAG_AUTO_PATH_MIG)
208 mdev->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
209
210 if (dev_lim->flags & DEV_LIM_FLAG_UD_AV_PORT_ENFORCE)
211 mdev->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
212
213 if (dev_lim->flags & DEV_LIM_FLAG_SRQ)
214 mdev->mthca_flags |= MTHCA_FLAG_SRQ;
215
216 return 0;
217}
218
219static int __devinit mthca_init_tavor(struct mthca_dev *mdev)
220{
221 u8 status;
222 int err;
223 struct mthca_dev_lim dev_lim;
224 struct mthca_profile profile;
225 struct mthca_init_hca_param init_hca;
1da177e4
LT		 226
227 err = mthca_SYS_EN(mdev, &status);
228 if (err) {
229 mthca_err(mdev, "SYS_EN command failed, aborting.\n");
230 return err;
231 }
232 if (status) {
233 mthca_err(mdev, "SYS_EN returned status 0x%02x, "
234 "aborting.\n", status);
235 return -EINVAL;
236 }
237
238 err = mthca_QUERY_FW(mdev, &status);
239 if (err) {
240 mthca_err(mdev, "QUERY_FW command failed, aborting.\n");
241 goto err_disable;
242 }
243 if (status) {
244 mthca_err(mdev, "QUERY_FW returned status 0x%02x, "
245 "aborting.\n", status);
246 err = -EINVAL;
247 goto err_disable;
248 }
249 err = mthca_QUERY_DDR(mdev, &status);
250 if (err) {
251 mthca_err(mdev, "QUERY_DDR command failed, aborting.\n");
252 goto err_disable;
253 }
254 if (status) {
255 mthca_err(mdev, "QUERY_DDR returned status 0x%02x, "
256 "aborting.\n", status);
257 err = -EINVAL;
258 goto err_disable;
259 }
260
261 err = mthca_dev_lim(mdev, &dev_lim);
262
263 profile = default_profile;
264 profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
265 profile.uarc_size = 0;
ec34a922
RD		 266 if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
267 profile.num_srq = dev_lim.max_srqs;
1da177e4
LT		 268
269 err = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca);
270 if (err < 0)
271 goto err_disable;
272
273 err = mthca_INIT_HCA(mdev, &init_hca, &status);
274 if (err) {
275 mthca_err(mdev, "INIT_HCA command failed, aborting.\n");
276 goto err_disable;
277 }
278 if (status) {
279 mthca_err(mdev, "INIT_HCA returned status 0x%02x, "
280 "aborting.\n", status);
281 err = -EINVAL;
282 goto err_disable;
283 }
284
1da177e4
LT		 285 return 0;
286
1da177e4
LT		 287err_disable:
288 mthca_SYS_DIS(mdev, &status);
289
290 return err;
291}
292
293static int __devinit mthca_load_fw(struct mthca_dev *mdev)
294{
295 u8 status;
296 int err;
297
298 /* FIXME: use HCA-attached memory for FW if present */
299
300 mdev->fw.arbel.fw_icm =
301 mthca_alloc_icm(mdev, mdev->fw.arbel.fw_pages,
302 GFP_HIGHUSER | __GFP_NOWARN);
303 if (!mdev->fw.arbel.fw_icm) {
304 mthca_err(mdev, "Couldn't allocate FW area, aborting.\n");
305 return -ENOMEM;
306 }
307
308 err = mthca_MAP_FA(mdev, mdev->fw.arbel.fw_icm, &status);
309 if (err) {
310 mthca_err(mdev, "MAP_FA command failed, aborting.\n");
311 goto err_free;
312 }
313 if (status) {
314 mthca_err(mdev, "MAP_FA returned status 0x%02x, aborting.\n", status);
315 err = -EINVAL;
316 goto err_free;
317 }
318 err = mthca_RUN_FW(mdev, &status);
319 if (err) {
320 mthca_err(mdev, "RUN_FW command failed, aborting.\n");
321 goto err_unmap_fa;
322 }
323 if (status) {
324 mthca_err(mdev, "RUN_FW returned status 0x%02x, aborting.\n", status);
325 err = -EINVAL;
326 goto err_unmap_fa;
327 }
328
329 return 0;
330
331err_unmap_fa:
332 mthca_UNMAP_FA(mdev, &status);
333
334err_free:
335 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm);
336 return err;
337}
338
339static int __devinit mthca_init_icm(struct mthca_dev *mdev,
340 struct mthca_dev_lim *dev_lim,
341 struct mthca_init_hca_param *init_hca,
342 u64 icm_size)
343{
344 u64 aux_pages;
345 u8 status;
346 int err;
347
348 err = mthca_SET_ICM_SIZE(mdev, icm_size, &aux_pages, &status);
349 if (err) {
350 mthca_err(mdev, "SET_ICM_SIZE command failed, aborting.\n");
351 return err;
352 }
353 if (status) {
354 mthca_err(mdev, "SET_ICM_SIZE returned status 0x%02x, "
355 "aborting.\n", status);
356 return -EINVAL;
357 }
358
359 mthca_dbg(mdev, "%lld KB of HCA context requires %lld KB aux memory.\n",
360 (unsigned long long) icm_size >> 10,
361 (unsigned long long) aux_pages << 2);
362
363 mdev->fw.arbel.aux_icm = mthca_alloc_icm(mdev, aux_pages,
364 GFP_HIGHUSER | __GFP_NOWARN);
365 if (!mdev->fw.arbel.aux_icm) {
366 mthca_err(mdev, "Couldn't allocate aux memory, aborting.\n");
367 return -ENOMEM;
368 }
369
370 err = mthca_MAP_ICM_AUX(mdev, mdev->fw.arbel.aux_icm, &status);
371 if (err) {
372 mthca_err(mdev, "MAP_ICM_AUX command failed, aborting.\n");
373 goto err_free_aux;
374 }
375 if (status) {
376 mthca_err(mdev, "MAP_ICM_AUX returned status 0x%02x, aborting.\n", status);
377 err = -EINVAL;
378 goto err_free_aux;
379 }
380
381 err = mthca_map_eq_icm(mdev, init_hca->eqc_base);
382 if (err) {
383 mthca_err(mdev, "Failed to map EQ context memory, aborting.\n");
384 goto err_unmap_aux;
385 }
386
387 mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base,
44ea6687 388 MTHCA_MTT_SEG_SIZE,
1da177e4
LT		 389 mdev->limits.num_mtt_segs,
390 mdev->limits.reserved_mtts, 1);
391 if (!mdev->mr_table.mtt_table) {
392 mthca_err(mdev, "Failed to map MTT context memory, aborting.\n");
393 err = -ENOMEM;
394 goto err_unmap_eq;
395 }
396
397 mdev->mr_table.mpt_table = mthca_alloc_icm_table(mdev, init_hca->mpt_base,
398 dev_lim->mpt_entry_sz,
399 mdev->limits.num_mpts,
400 mdev->limits.reserved_mrws, 1);
401 if (!mdev->mr_table.mpt_table) {
402 mthca_err(mdev, "Failed to map MPT context memory, aborting.\n");
403 err = -ENOMEM;
404 goto err_unmap_mtt;
405 }
406
407 mdev->qp_table.qp_table = mthca_alloc_icm_table(mdev, init_hca->qpc_base,
408 dev_lim->qpc_entry_sz,
409 mdev->limits.num_qps,
410 mdev->limits.reserved_qps, 0);
411 if (!mdev->qp_table.qp_table) {
412 mthca_err(mdev, "Failed to map QP context memory, aborting.\n");
413 err = -ENOMEM;
414 goto err_unmap_mpt;
415 }
416
417 mdev->qp_table.eqp_table = mthca_alloc_icm_table(mdev, init_hca->eqpc_base,
418 dev_lim->eqpc_entry_sz,
419 mdev->limits.num_qps,
420 mdev->limits.reserved_qps, 0);
421 if (!mdev->qp_table.eqp_table) {
422 mthca_err(mdev, "Failed to map EQP context memory, aborting.\n");
423 err = -ENOMEM;
424 goto err_unmap_qp;
425 }
426
08aeb14e
RD		 427 mdev->qp_table.rdb_table = mthca_alloc_icm_table(mdev, init_hca->rdb_base,
428 MTHCA_RDB_ENTRY_SIZE,
429 mdev->limits.num_qps <<
430 mdev->qp_table.rdb_shift,
431 0, 0);
432 if (!mdev->qp_table.rdb_table) {
433 mthca_err(mdev, "Failed to map RDB context memory, aborting\n");
434 err = -ENOMEM;
19272d43 435 goto err_unmap_eqp;
08aeb14e
RD		 436 }
437
438 mdev->cq_table.table = mthca_alloc_icm_table(mdev, init_hca->cqc_base,
ec34a922
RD		 439 dev_lim->cqc_entry_sz,
440 mdev->limits.num_cqs,
441 mdev->limits.reserved_cqs, 0);
1da177e4
LT		 442 if (!mdev->cq_table.table) {
443 mthca_err(mdev, "Failed to map CQ context memory, aborting.\n");
444 err = -ENOMEM;
08aeb14e 445 goto err_unmap_rdb;
1da177e4
LT		 446 }
447
ec34a922
RD		 448 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) {
449 mdev->srq_table.table =
450 mthca_alloc_icm_table(mdev, init_hca->srqc_base,
451 dev_lim->srq_entry_sz,
452 mdev->limits.num_srqs,
453 mdev->limits.reserved_srqs, 0);
454 if (!mdev->srq_table.table) {
455 mthca_err(mdev, "Failed to map SRQ context memory, "
456 "aborting.\n");
457 err = -ENOMEM;
458 goto err_unmap_cq;
459 }
460 }
461
1da177e4
LT		 462 /*
463 * It's not strictly required, but for simplicity just map the
464 * whole multicast group table now. The table isn't very big
465 * and it's a lot easier than trying to track ref counts.
466 */
467 mdev->mcg_table.table = mthca_alloc_icm_table(mdev, init_hca->mc_base,
468 MTHCA_MGM_ENTRY_SIZE,
469 mdev->limits.num_mgms +
470 mdev->limits.num_amgms,
471 mdev->limits.num_mgms +
472 mdev->limits.num_amgms,
473 0);
474 if (!mdev->mcg_table.table) {
475 mthca_err(mdev, "Failed to map MCG context memory, aborting.\n");
476 err = -ENOMEM;
ec34a922 477 goto err_unmap_srq;
1da177e4
LT		 478 }
479
480 return 0;
481
ec34a922
RD		 482err_unmap_srq:
483 if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
484 mthca_free_icm_table(mdev, mdev->srq_table.table);
485
1da177e4
LT		 486err_unmap_cq:
487 mthca_free_icm_table(mdev, mdev->cq_table.table);
488
08aeb14e
RD		 489err_unmap_rdb:
490 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
491
1da177e4
LT		 492err_unmap_eqp:
493 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
494
495err_unmap_qp:
496 mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
497
498err_unmap_mpt:
499 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
500
501err_unmap_mtt:
502 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
503
504err_unmap_eq:
505 mthca_unmap_eq_icm(mdev);
506
507err_unmap_aux:
508 mthca_UNMAP_ICM_AUX(mdev, &status);
509
510err_free_aux:
511 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm);
512
513 return err;
514}
515
aba7a22f
MT		 516static void mthca_free_icms(struct mthca_dev *mdev)
517{
518 u8 status;
519
520 mthca_free_icm_table(mdev, mdev->mcg_table.table);
521 if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
522 mthca_free_icm_table(mdev, mdev->srq_table.table);
523 mthca_free_icm_table(mdev, mdev->cq_table.table);
524 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
525 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
526 mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
527 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
528 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
529 mthca_unmap_eq_icm(mdev);
530
531 mthca_UNMAP_ICM_AUX(mdev, &status);
532 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm);
533}
534
1da177e4
LT		 535static int __devinit mthca_init_arbel(struct mthca_dev *mdev)
536{
537 struct mthca_dev_lim dev_lim;
538 struct mthca_profile profile;
539 struct mthca_init_hca_param init_hca;
1da177e4
LT		 540 u64 icm_size;
541 u8 status;
542 int err;
543
544 err = mthca_QUERY_FW(mdev, &status);
545 if (err) {
546 mthca_err(mdev, "QUERY_FW command failed, aborting.\n");
547 return err;
548 }
549 if (status) {
550 mthca_err(mdev, "QUERY_FW returned status 0x%02x, "
551 "aborting.\n", status);
552 return -EINVAL;
553 }
554
555 err = mthca_ENABLE_LAM(mdev, &status);
556 if (err) {
557 mthca_err(mdev, "ENABLE_LAM command failed, aborting.\n");
558 return err;
559 }
560 if (status == MTHCA_CMD_STAT_LAM_NOT_PRE) {
561 mthca_dbg(mdev, "No HCA-attached memory (running in MemFree mode)\n");
562 mdev->mthca_flags |= MTHCA_FLAG_NO_LAM;
563 } else if (status) {
564 mthca_err(mdev, "ENABLE_LAM returned status 0x%02x, "
565 "aborting.\n", status);
566 return -EINVAL;
567 }
568
569 err = mthca_load_fw(mdev);
570 if (err) {
571 mthca_err(mdev, "Failed to start FW, aborting.\n");
572 goto err_disable;
573 }
574
575 err = mthca_dev_lim(mdev, &dev_lim);
576 if (err) {
577 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
578 goto err_stop_fw;
579 }
580
581 profile = default_profile;
582 profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
583 profile.num_udav = 0;
ec34a922
RD		 584 if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
585 profile.num_srq = dev_lim.max_srqs;
1da177e4
LT		 586
587 icm_size = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca);
588 if ((int) icm_size < 0) {
589 err = icm_size;
590 goto err_stop_fw;
591 }
592
593 err = mthca_init_icm(mdev, &dev_lim, &init_hca, icm_size);
594 if (err)
595 goto err_stop_fw;
596
597 err = mthca_INIT_HCA(mdev, &init_hca, &status);
598 if (err) {
599 mthca_err(mdev, "INIT_HCA command failed, aborting.\n");
600 goto err_free_icm;
601 }
602 if (status) {
603 mthca_err(mdev, "INIT_HCA returned status 0x%02x, "
604 "aborting.\n", status);
605 err = -EINVAL;
606 goto err_free_icm;
607 }
608
1da177e4
LT		 609 return 0;
610
611err_free_icm:
aba7a22f 612 mthca_free_icms(mdev);
1da177e4
LT		 613
614err_stop_fw:
615 mthca_UNMAP_FA(mdev, &status);
616 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm);
617
618err_disable:
619 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM))
620 mthca_DISABLE_LAM(mdev, &status);
621
622 return err;
623}
624
2e8b981c
MT		 625static void mthca_close_hca(struct mthca_dev *mdev)
626{
627 u8 status;
628
629 mthca_CLOSE_HCA(mdev, 0, &status);
630
631 if (mthca_is_memfree(mdev)) {
aba7a22f 632 mthca_free_icms(mdev);
2e8b981c
MT		 633
634 mthca_UNMAP_FA(mdev, &status);
635 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm);
636
637 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM))
638 mthca_DISABLE_LAM(mdev, &status);
639 } else
640 mthca_SYS_DIS(mdev, &status);
641}
642
1da177e4
LT		 643static int __devinit mthca_init_hca(struct mthca_dev *mdev)
644{
2e8b981c
MT		 645 u8 status;
646 int err;
647 struct mthca_adapter adapter;
648
d10ddbf6 649 if (mthca_is_memfree(mdev))
2e8b981c 650 err = mthca_init_arbel(mdev);
1da177e4 651 else
2e8b981c
MT		 652 err = mthca_init_tavor(mdev);
653
654 if (err)
655 return err;
656
657 err = mthca_QUERY_ADAPTER(mdev, &adapter, &status);
658 if (err) {
659 mthca_err(mdev, "QUERY_ADAPTER command failed, aborting.\n");
660 goto err_close;
661 }
662 if (status) {
663 mthca_err(mdev, "QUERY_ADAPTER returned status 0x%02x, "
664 "aborting.\n", status);
665 err = -EINVAL;
666 goto err_close;
667 }
668
669 mdev->eq_table.inta_pin = adapter.inta_pin;
670 mdev->rev_id = adapter.revision_id;
671 memcpy(mdev->board_id, adapter.board_id, sizeof mdev->board_id);
672
673 return 0;
674
675err_close:
676 mthca_close_hca(mdev);
677 return err;
1da177e4
LT		 678}
679
680static int __devinit mthca_setup_hca(struct mthca_dev *dev)
681{
682 int err;
683 u8 status;
684
685 MTHCA_INIT_DOORBELL_LOCK(&dev->doorbell_lock);
686
687 err = mthca_init_uar_table(dev);
688 if (err) {
689 mthca_err(dev, "Failed to initialize "
690 "user access region table, aborting.\n");
691 return err;
692 }
693
694 err = mthca_uar_alloc(dev, &dev->driver_uar);
695 if (err) {
696 mthca_err(dev, "Failed to allocate driver access region, "
697 "aborting.\n");
698 goto err_uar_table_free;
699 }
700
701 dev->kar = ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
702 if (!dev->kar) {
703 mthca_err(dev, "Couldn't map kernel access region, "
704 "aborting.\n");
705 err = -ENOMEM;
706 goto err_uar_free;
707 }
708
709 err = mthca_init_pd_table(dev);
710 if (err) {
711 mthca_err(dev, "Failed to initialize "
712 "protection domain table, aborting.\n");
713 goto err_kar_unmap;
714 }
715
716 err = mthca_init_mr_table(dev);
717 if (err) {
718 mthca_err(dev, "Failed to initialize "
719 "memory region table, aborting.\n");
720 goto err_pd_table_free;
721 }
722
99264c1e 723 err = mthca_pd_alloc(dev, 1, &dev->driver_pd);
1da177e4
LT		 724 if (err) {
725 mthca_err(dev, "Failed to create driver PD, "
726 "aborting.\n");
727 goto err_mr_table_free;
728 }
729
730 err = mthca_init_eq_table(dev);
731 if (err) {
732 mthca_err(dev, "Failed to initialize "
733 "event queue table, aborting.\n");
734 goto err_pd_free;
735 }
736
737 err = mthca_cmd_use_events(dev);
738 if (err) {
739 mthca_err(dev, "Failed to switch to event-driven "
740 "firmware commands, aborting.\n");
741 goto err_eq_table_free;
742 }
743
744 err = mthca_NOP(dev, &status);
745 if (err || status) {
4ad81174
RD		 746 mthca_err(dev, "NOP command failed to generate interrupt (IRQ %d), aborting.\n",
747 dev->mthca_flags & MTHCA_FLAG_MSI_X ?
748 dev->eq_table.eq[MTHCA_EQ_CMD].msi_x_vector :
749 dev->pdev->irq);
1da177e4
LT		 750 if (dev->mthca_flags & (MTHCA_FLAG_MSI | MTHCA_FLAG_MSI_X))
751 mthca_err(dev, "Try again with MSI/MSI-X disabled.\n");
752 else
753 mthca_err(dev, "BIOS or ACPI interrupt routing problem?\n");
754
755 goto err_cmd_poll;
756 }
757
758 mthca_dbg(dev, "NOP command IRQ test passed\n");
759
760 err = mthca_init_cq_table(dev);
761 if (err) {
762 mthca_err(dev, "Failed to initialize "
763 "completion queue table, aborting.\n");
764 goto err_cmd_poll;
765 }
766
ec34a922
RD		 767 err = mthca_init_srq_table(dev);
768 if (err) {
769 mthca_err(dev, "Failed to initialize "
770 "shared receive queue table, aborting.\n");
771 goto err_cq_table_free;
772 }
773
1da177e4
LT		 774 err = mthca_init_qp_table(dev);
775 if (err) {
776 mthca_err(dev, "Failed to initialize "
777 "queue pair table, aborting.\n");
ec34a922 778 goto err_srq_table_free;
1da177e4
LT		 779 }
780
781 err = mthca_init_av_table(dev);
782 if (err) {
783 mthca_err(dev, "Failed to initialize "
784 "address vector table, aborting.\n");
785 goto err_qp_table_free;
786 }
787
788 err = mthca_init_mcg_table(dev);
789 if (err) {
790 mthca_err(dev, "Failed to initialize "
791 "multicast group table, aborting.\n");
792 goto err_av_table_free;
793 }
794
795 return 0;
796
797err_av_table_free:
798 mthca_cleanup_av_table(dev);
799
800err_qp_table_free:
801 mthca_cleanup_qp_table(dev);
802
ec34a922
RD		 803err_srq_table_free:
804 mthca_cleanup_srq_table(dev);
805
1da177e4
LT		 806err_cq_table_free:
807 mthca_cleanup_cq_table(dev);
808
809err_cmd_poll:
810 mthca_cmd_use_polling(dev);
811
812err_eq_table_free:
813 mthca_cleanup_eq_table(dev);
814
815err_pd_free:
816 mthca_pd_free(dev, &dev->driver_pd);
817
818err_mr_table_free:
819 mthca_cleanup_mr_table(dev);
820
821err_pd_table_free:
822 mthca_cleanup_pd_table(dev);
823
824err_kar_unmap:
825 iounmap(dev->kar);
826
827err_uar_free:
828 mthca_uar_free(dev, &dev->driver_uar);
829
830err_uar_table_free:
831 mthca_cleanup_uar_table(dev);
832 return err;
833}
834
835static int __devinit mthca_request_regions(struct pci_dev *pdev,
836 int ddr_hidden)
837{
838 int err;
839
840 /*
841 * We can't just use pci_request_regions() because the MSI-X
842 * table is right in the middle of the first BAR. If we did
843 * pci_request_region and grab all of the first BAR, then
844 * setting up MSI-X would fail, since the PCI core wants to do
845 * request_mem_region on the MSI-X vector table.
846 *
847 * So just request what we need right now, and request any
848 * other regions we need when setting up EQs.
849 */
850 if (!request_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
851 MTHCA_HCR_SIZE, DRV_NAME))
852 return -EBUSY;
853
854 err = pci_request_region(pdev, 2, DRV_NAME);
855 if (err)
856 goto err_bar2_failed;
857
858 if (!ddr_hidden) {
859 err = pci_request_region(pdev, 4, DRV_NAME);
860 if (err)
861 goto err_bar4_failed;
862 }
863
864 return 0;
865
866err_bar4_failed:
867 pci_release_region(pdev, 2);
868
869err_bar2_failed:
870 release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
871 MTHCA_HCR_SIZE);
872
873 return err;
874}
875
876static void mthca_release_regions(struct pci_dev *pdev,
877 int ddr_hidden)
878{
879 if (!ddr_hidden)
880 pci_release_region(pdev, 4);
881
882 pci_release_region(pdev, 2);
883
884 release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
885 MTHCA_HCR_SIZE);
886}
887
888static int __devinit mthca_enable_msi_x(struct mthca_dev *mdev)
889{
890 struct msix_entry entries[3];
891 int err;
892
893 entries[0].entry = 0;
894 entries[1].entry = 1;
895 entries[2].entry = 2;
896
897 err = pci_enable_msix(mdev->pdev, entries, ARRAY_SIZE(entries));
898 if (err) {
899 if (err > 0)
900 mthca_info(mdev, "Only %d MSI-X vectors available, "
901 "not using MSI-X\n", err);
902 return err;
903 }
904
905 mdev->eq_table.eq[MTHCA_EQ_COMP ].msi_x_vector = entries[0].vector;
906 mdev->eq_table.eq[MTHCA_EQ_ASYNC].msi_x_vector = entries[1].vector;
907 mdev->eq_table.eq[MTHCA_EQ_CMD ].msi_x_vector = entries[2].vector;
908
909 return 0;
910}
911
68a3c212
RD		 912/* Types of supported HCA */
913enum {
914 TAVOR, /* MT23108 */
915 ARBEL_COMPAT, /* MT25208 in Tavor compat mode */
916 ARBEL_NATIVE, /* MT25208 with extended features */
917 SINAI /* MT25204 */
918};
919
920#define MTHCA_FW_VER(major, minor, subminor) \
921 (((u64) (major) << 32) | ((u64) (minor) << 16) | (u64) (subminor))
922
923static struct {
924 u64 latest_fw;
925 int is_memfree;
926 int is_pcie;
927} mthca_hca_table[] = {
49f6a7fb
TK		 928 [TAVOR] = { .latest_fw = MTHCA_FW_VER(3, 3, 3), .is_memfree = 0, .is_pcie = 0 },
929 [ARBEL_COMPAT] = { .latest_fw = MTHCA_FW_VER(4, 7, 0), .is_memfree = 0, .is_pcie = 1 },
930 [ARBEL_NATIVE] = { .latest_fw = MTHCA_FW_VER(5, 1, 0), .is_memfree = 1, .is_pcie = 1 },
68a3c212
RD		 931 [SINAI] = { .latest_fw = MTHCA_FW_VER(1, 0, 1), .is_memfree = 1, .is_pcie = 1 }
932};
933
1da177e4
LT		 934static int __devinit mthca_init_one(struct pci_dev *pdev,
935 const struct pci_device_id *id)
936{
937 static int mthca_version_printed = 0;
1da177e4
LT		 938 int ddr_hidden = 0;
939 int err;
940 struct mthca_dev *mdev;
941
942 if (!mthca_version_printed) {
943 printk(KERN_INFO "%s", mthca_version);
944 ++mthca_version_printed;
945 }
946
982245f0
AB		 947 printk(KERN_INFO PFX "Initializing %s\n",
948 pci_name(pdev));
1da177e4 949
68a3c212 950 if (id->driver_data >= ARRAY_SIZE(mthca_hca_table)) {
982245f0
AB		 951 printk(KERN_ERR PFX "%s has invalid driver data %lx\n",
952 pci_name(pdev), id->driver_data);
68a3c212
RD		 953 return -ENODEV;
954 }
955
1da177e4
LT		 956 err = pci_enable_device(pdev);
957 if (err) {
958 dev_err(&pdev->dev, "Cannot enable PCI device, "
959 "aborting.\n");
960 return err;
961 }
962
963 /*
964 * Check for BARs. We expect 0: 1MB, 2: 8MB, 4: DDR (may not
965 * be present)
966 */
967 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) ||
968 pci_resource_len(pdev, 0) != 1 << 20) {
177214af 969 dev_err(&pdev->dev, "Missing DCS, aborting.\n");
1da177e4
LT		 970 err = -ENODEV;
971 goto err_disable_pdev;
972 }
973 if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM) ||
974 pci_resource_len(pdev, 2) != 1 << 23) {
177214af 975 dev_err(&pdev->dev, "Missing UAR, aborting.\n");
1da177e4
LT		 976 err = -ENODEV;
977 goto err_disable_pdev;
978 }
979 if (!(pci_resource_flags(pdev, 4) & IORESOURCE_MEM))
980 ddr_hidden = 1;
981
982 err = mthca_request_regions(pdev, ddr_hidden);
983 if (err) {
984 dev_err(&pdev->dev, "Cannot obtain PCI resources, "
985 "aborting.\n");
986 goto err_disable_pdev;
987 }
988
989 pci_set_master(pdev);
990
991 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
992 if (err) {
993 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n");
994 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
995 if (err) {
996 dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n");
997 goto err_free_res;
998 }
999 }
1000 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
1001 if (err) {
1002 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit "
1003 "consistent PCI DMA mask.\n");
1004 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1005 if (err) {
1006 dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, "
1007 "aborting.\n");
1008 goto err_free_res;
1009 }
1010 }
1011
1012 mdev = (struct mthca_dev *) ib_alloc_device(sizeof *mdev);
1013 if (!mdev) {
1014 dev_err(&pdev->dev, "Device struct alloc failed, "
1015 "aborting.\n");
1016 err = -ENOMEM;
1017 goto err_free_res;
1018 }
1019
68a3c212 1020 mdev->pdev = pdev;
1da177e4
LT		 1021
1022 if (ddr_hidden)
1023 mdev->mthca_flags |= MTHCA_FLAG_DDR_HIDDEN;
68a3c212
RD		 1024 if (mthca_hca_table[id->driver_data].is_memfree)
1025 mdev->mthca_flags |= MTHCA_FLAG_MEMFREE;
1026 if (mthca_hca_table[id->driver_data].is_pcie)
1027 mdev->mthca_flags |= MTHCA_FLAG_PCIE;
1da177e4
LT		 1028
1029 /*
1030 * Now reset the HCA before we touch the PCI capabilities or
1031 * attempt a firmware command, since a boot ROM may have left
1032 * the HCA in an undefined state.
1033 */
1034 err = mthca_reset(mdev);
1035 if (err) {
1036 mthca_err(mdev, "Failed to reset HCA, aborting.\n");
1037 goto err_free_dev;
1038 }
1039
1040 if (msi_x && !mthca_enable_msi_x(mdev))
1041 mdev->mthca_flags |= MTHCA_FLAG_MSI_X;
1042 if (msi && !(mdev->mthca_flags & MTHCA_FLAG_MSI_X) &&
1043 !pci_enable_msi(pdev))
1044 mdev->mthca_flags |= MTHCA_FLAG_MSI;
1045
80fd8238
RD		 1046 if (mthca_cmd_init(mdev)) {
1047 mthca_err(mdev, "Failed to init command interface, aborting.\n");
1da177e4
LT		 1048 goto err_free_dev;
1049 }
1050
1051 err = mthca_tune_pci(mdev);
1052 if (err)
80fd8238 1053 goto err_cmd;
1da177e4
LT		 1054
1055 err = mthca_init_hca(mdev);
1056 if (err)
80fd8238 1057 goto err_cmd;
1da177e4 1058
68a3c212
RD		 1059 if (mdev->fw_ver < mthca_hca_table[id->driver_data].latest_fw) {
1060 mthca_warn(mdev, "HCA FW version %x.%x.%x is old (%x.%x.%x is current).\n",
1061 (int) (mdev->fw_ver >> 32), (int) (mdev->fw_ver >> 16) & 0xffff,
1062 (int) (mdev->fw_ver & 0xffff),
1063 (int) (mthca_hca_table[id->driver_data].latest_fw >> 32),
1064 (int) (mthca_hca_table[id->driver_data].latest_fw >> 16) & 0xffff,
1065 (int) (mthca_hca_table[id->driver_data].latest_fw & 0xffff));
1066 mthca_warn(mdev, "If you have problems, try updating your HCA FW.\n");
1067 }
1068
1da177e4
LT		 1069 err = mthca_setup_hca(mdev);
1070 if (err)
1071 goto err_close;
1072
1073 err = mthca_register_device(mdev);
1074 if (err)
1075 goto err_cleanup;
1076
1077 err = mthca_create_agents(mdev);
1078 if (err)
1079 goto err_unregister;
1080
1081 pci_set_drvdata(pdev, mdev);
1082
1083 return 0;
1084
1085err_unregister:
1086 mthca_unregister_device(mdev);
1087
1088err_cleanup:
1089 mthca_cleanup_mcg_table(mdev);
1090 mthca_cleanup_av_table(mdev);
1091 mthca_cleanup_qp_table(mdev);
ec34a922 1092 mthca_cleanup_srq_table(mdev);
1da177e4
LT		 1093 mthca_cleanup_cq_table(mdev);
1094 mthca_cmd_use_polling(mdev);
1095 mthca_cleanup_eq_table(mdev);
1096
1097 mthca_pd_free(mdev, &mdev->driver_pd);
1098
1099 mthca_cleanup_mr_table(mdev);
1100 mthca_cleanup_pd_table(mdev);
1101 mthca_cleanup_uar_table(mdev);
1102
1103err_close:
1104 mthca_close_hca(mdev);
1105
80fd8238
RD		 1106err_cmd:
1107 mthca_cmd_cleanup(mdev);
1da177e4
LT		 1108
1109err_free_dev:
1110 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
1111 pci_disable_msix(pdev);
1112 if (mdev->mthca_flags & MTHCA_FLAG_MSI)
1113 pci_disable_msi(pdev);
1114
1115 ib_dealloc_device(&mdev->ib_dev);
1116
1117err_free_res:
1118 mthca_release_regions(pdev, ddr_hidden);
1119
1120err_disable_pdev:
1121 pci_disable_device(pdev);
1122 pci_set_drvdata(pdev, NULL);
1123 return err;
1124}
1125
1126static void __devexit mthca_remove_one(struct pci_dev *pdev)
1127{
1128 struct mthca_dev *mdev = pci_get_drvdata(pdev);
1129 u8 status;
1130 int p;
1131
1132 if (mdev) {
1133 mthca_free_agents(mdev);
1134 mthca_unregister_device(mdev);
1135
1136 for (p = 1; p <= mdev->limits.num_ports; ++p)
1137 mthca_CLOSE_IB(mdev, p, &status);
1138
1139 mthca_cleanup_mcg_table(mdev);
1140 mthca_cleanup_av_table(mdev);
1141 mthca_cleanup_qp_table(mdev);
ec34a922 1142 mthca_cleanup_srq_table(mdev);
1da177e4
LT		 1143 mthca_cleanup_cq_table(mdev);
1144 mthca_cmd_use_polling(mdev);
1145 mthca_cleanup_eq_table(mdev);
1146
1147 mthca_pd_free(mdev, &mdev->driver_pd);
1148
1149 mthca_cleanup_mr_table(mdev);
1150 mthca_cleanup_pd_table(mdev);
1151
1152 iounmap(mdev->kar);
1153 mthca_uar_free(mdev, &mdev->driver_uar);
1154 mthca_cleanup_uar_table(mdev);
1da177e4 1155 mthca_close_hca(mdev);
80fd8238 1156 mthca_cmd_cleanup(mdev);
1da177e4
LT		 1157
1158 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
1159 pci_disable_msix(pdev);
1160 if (mdev->mthca_flags & MTHCA_FLAG_MSI)
1161 pci_disable_msi(pdev);
1162
1163 ib_dealloc_device(&mdev->ib_dev);
1164 mthca_release_regions(pdev, mdev->mthca_flags &
1165 MTHCA_FLAG_DDR_HIDDEN);
1166 pci_disable_device(pdev);
1167 pci_set_drvdata(pdev, NULL);
1168 }
1169}
1170
1171static struct pci_device_id mthca_pci_table[] = {
1172 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_TAVOR),
1173 .driver_data = TAVOR },
1174 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_TAVOR),
1175 .driver_data = TAVOR },
1176 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT),
1177 .driver_data = ARBEL_COMPAT },
1178 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT),
1179 .driver_data = ARBEL_COMPAT },
1180 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL),
1181 .driver_data = ARBEL_NATIVE },
1182 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL),
1183 .driver_data = ARBEL_NATIVE },
68a3c212
RD		 1184 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI),
1185 .driver_data = SINAI },
1186 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI),
1187 .driver_data = SINAI },
1188 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI_OLD),
1189 .driver_data = SINAI },
1190 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI_OLD),
1191 .driver_data = SINAI },
1da177e4
LT		 1192 { 0, }
1193};
1194
1195MODULE_DEVICE_TABLE(pci, mthca_pci_table);
1196
1197static struct pci_driver mthca_driver = {
177214af 1198 .name = DRV_NAME,
d476306f 1199 .owner = THIS_MODULE,
1da177e4
LT		 1200 .id_table = mthca_pci_table,
1201 .probe = mthca_init_one,
1202 .remove = __devexit_p(mthca_remove_one)
1203};
1204
1205static int __init mthca_init(void)
1206{
1207 int ret;
1208
1209 ret = pci_register_driver(&mthca_driver);
1210 return ret < 0 ? ret : 0;
1211}
1212
1213static void __exit mthca_cleanup(void)
1214{
1215 pci_unregister_driver(&mthca_driver);
1216}
1217
1218module_init(mthca_init);
1219module_exit(mthca_cleanup);
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