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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved. | |
56483ec1 | 3 | * Copyright (c) 2005 Cisco Systems. All rights reserved. |
2a1d9b7f | 4 | * Copyright (c) 2005 Mellanox Technologies. All rights reserved. |
1da177e4 LT |
5 | * |
6 | * This software is available to you under a choice of one of two | |
7 | * licenses. You may choose to be licensed under the terms of the GNU | |
8 | * General Public License (GPL) Version 2, available from the file | |
9 | * COPYING in the main directory of this source tree, or the | |
10 | * OpenIB.org BSD license below: | |
11 | * | |
12 | * Redistribution and use in source and binary forms, with or | |
13 | * without modification, are permitted provided that the following | |
14 | * conditions are met: | |
15 | * | |
16 | * - Redistributions of source code must retain the above | |
17 | * copyright notice, this list of conditions and the following | |
18 | * disclaimer. | |
19 | * | |
20 | * - Redistributions in binary form must reproduce the above | |
21 | * copyright notice, this list of conditions and the following | |
22 | * disclaimer in the documentation and/or other materials | |
23 | * provided with the distribution. | |
24 | * | |
25 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
26 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
27 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
28 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
29 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
32 | * SOFTWARE. | |
33 | * | |
34 | * $Id$ | |
35 | */ | |
36 | ||
dbcf31ba | 37 | #include <linux/mm.h> |
391e4dea | 38 | #include <linux/scatterlist.h> |
e8edc6e0 | 39 | #include <linux/sched.h> |
391e4dea MT |
40 | |
41 | #include <asm/page.h> | |
dbcf31ba | 42 | |
1da177e4 LT |
43 | #include "mthca_memfree.h" |
44 | #include "mthca_dev.h" | |
45 | #include "mthca_cmd.h" | |
46 | ||
47 | /* | |
48 | * We allocate in as big chunks as we can, up to a maximum of 256 KB | |
49 | * per chunk. | |
50 | */ | |
51 | enum { | |
52 | MTHCA_ICM_ALLOC_SIZE = 1 << 18, | |
53 | MTHCA_TABLE_CHUNK_SIZE = 1 << 18 | |
54 | }; | |
55 | ||
56483ec1 | 56 | struct mthca_user_db_table { |
fd9cfdd1 | 57 | struct mutex mutex; |
56483ec1 RD |
58 | struct { |
59 | u64 uvirt; | |
60 | struct scatterlist mem; | |
61 | int refcount; | |
62 | } page[0]; | |
63 | }; | |
64 | ||
391e4dea MT |
65 | static void mthca_free_icm_pages(struct mthca_dev *dev, struct mthca_icm_chunk *chunk) |
66 | { | |
67 | int i; | |
68 | ||
69 | if (chunk->nsg > 0) | |
70 | pci_unmap_sg(dev->pdev, chunk->mem, chunk->npages, | |
71 | PCI_DMA_BIDIRECTIONAL); | |
72 | ||
73 | for (i = 0; i < chunk->npages; ++i) | |
45711f1a | 74 | __free_pages(sg_page(&chunk->mem[i]), |
391e4dea MT |
75 | get_order(chunk->mem[i].length)); |
76 | } | |
77 | ||
78 | static void mthca_free_icm_coherent(struct mthca_dev *dev, struct mthca_icm_chunk *chunk) | |
1da177e4 | 79 | { |
1da177e4 LT |
80 | int i; |
81 | ||
391e4dea MT |
82 | for (i = 0; i < chunk->npages; ++i) { |
83 | dma_free_coherent(&dev->pdev->dev, chunk->mem[i].length, | |
45711f1a | 84 | lowmem_page_address(sg_page(&chunk->mem[i])), |
391e4dea MT |
85 | sg_dma_address(&chunk->mem[i])); |
86 | } | |
87 | } | |
88 | ||
89 | void mthca_free_icm(struct mthca_dev *dev, struct mthca_icm *icm, int coherent) | |
90 | { | |
91 | struct mthca_icm_chunk *chunk, *tmp; | |
92 | ||
1da177e4 LT |
93 | if (!icm) |
94 | return; | |
95 | ||
96 | list_for_each_entry_safe(chunk, tmp, &icm->chunk_list, list) { | |
391e4dea MT |
97 | if (coherent) |
98 | mthca_free_icm_coherent(dev, chunk); | |
99 | else | |
100 | mthca_free_icm_pages(dev, chunk); | |
1da177e4 LT |
101 | |
102 | kfree(chunk); | |
103 | } | |
104 | ||
105 | kfree(icm); | |
106 | } | |
107 | ||
391e4dea MT |
108 | static int mthca_alloc_icm_pages(struct scatterlist *mem, int order, gfp_t gfp_mask) |
109 | { | |
45711f1a JA |
110 | struct page *page; |
111 | ||
112 | page = alloc_pages(gfp_mask, order); | |
113 | if (!page) | |
391e4dea MT |
114 | return -ENOMEM; |
115 | ||
642f1490 | 116 | sg_set_page(mem, page, PAGE_SIZE << order, 0); |
391e4dea MT |
117 | return 0; |
118 | } | |
119 | ||
120 | static int mthca_alloc_icm_coherent(struct device *dev, struct scatterlist *mem, | |
121 | int order, gfp_t gfp_mask) | |
122 | { | |
123 | void *buf = dma_alloc_coherent(dev, PAGE_SIZE << order, &sg_dma_address(mem), | |
124 | gfp_mask); | |
125 | if (!buf) | |
126 | return -ENOMEM; | |
127 | ||
128 | sg_set_buf(mem, buf, PAGE_SIZE << order); | |
129 | BUG_ON(mem->offset); | |
130 | sg_dma_len(mem) = PAGE_SIZE << order; | |
131 | return 0; | |
132 | } | |
133 | ||
1da177e4 | 134 | struct mthca_icm *mthca_alloc_icm(struct mthca_dev *dev, int npages, |
391e4dea | 135 | gfp_t gfp_mask, int coherent) |
1da177e4 LT |
136 | { |
137 | struct mthca_icm *icm; | |
138 | struct mthca_icm_chunk *chunk = NULL; | |
139 | int cur_order; | |
391e4dea MT |
140 | int ret; |
141 | ||
142 | /* We use sg_set_buf for coherent allocs, which assumes low memory */ | |
143 | BUG_ON(coherent && (gfp_mask & __GFP_HIGHMEM)); | |
1da177e4 LT |
144 | |
145 | icm = kmalloc(sizeof *icm, gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN)); | |
146 | if (!icm) | |
147 | return icm; | |
148 | ||
149 | icm->refcount = 0; | |
150 | INIT_LIST_HEAD(&icm->chunk_list); | |
151 | ||
152 | cur_order = get_order(MTHCA_ICM_ALLOC_SIZE); | |
153 | ||
154 | while (npages > 0) { | |
155 | if (!chunk) { | |
156 | chunk = kmalloc(sizeof *chunk, | |
157 | gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN)); | |
158 | if (!chunk) | |
159 | goto fail; | |
160 | ||
45711f1a | 161 | sg_init_table(chunk->mem, MTHCA_ICM_CHUNK_LEN); |
1da177e4 LT |
162 | chunk->npages = 0; |
163 | chunk->nsg = 0; | |
164 | list_add_tail(&chunk->list, &icm->chunk_list); | |
165 | } | |
166 | ||
167 | while (1 << cur_order > npages) | |
168 | --cur_order; | |
169 | ||
391e4dea MT |
170 | if (coherent) |
171 | ret = mthca_alloc_icm_coherent(&dev->pdev->dev, | |
172 | &chunk->mem[chunk->npages], | |
173 | cur_order, gfp_mask); | |
174 | else | |
175 | ret = mthca_alloc_icm_pages(&chunk->mem[chunk->npages], | |
176 | cur_order, gfp_mask); | |
177 | ||
178 | if (!ret) { | |
179 | ++chunk->npages; | |
1da177e4 | 180 | |
11282b32 RD |
181 | if (coherent) |
182 | ++chunk->nsg; | |
183 | else if (chunk->npages == MTHCA_ICM_CHUNK_LEN) { | |
1da177e4 LT |
184 | chunk->nsg = pci_map_sg(dev->pdev, chunk->mem, |
185 | chunk->npages, | |
186 | PCI_DMA_BIDIRECTIONAL); | |
187 | ||
188 | if (chunk->nsg <= 0) | |
189 | goto fail; | |
391e4dea | 190 | } |
1da177e4 | 191 | |
391e4dea | 192 | if (chunk->npages == MTHCA_ICM_CHUNK_LEN) |
1da177e4 | 193 | chunk = NULL; |
1da177e4 LT |
194 | |
195 | npages -= 1 << cur_order; | |
196 | } else { | |
197 | --cur_order; | |
198 | if (cur_order < 0) | |
199 | goto fail; | |
200 | } | |
201 | } | |
202 | ||
391e4dea | 203 | if (!coherent && chunk) { |
1da177e4 LT |
204 | chunk->nsg = pci_map_sg(dev->pdev, chunk->mem, |
205 | chunk->npages, | |
206 | PCI_DMA_BIDIRECTIONAL); | |
207 | ||
208 | if (chunk->nsg <= 0) | |
209 | goto fail; | |
210 | } | |
211 | ||
212 | return icm; | |
213 | ||
214 | fail: | |
391e4dea | 215 | mthca_free_icm(dev, icm, coherent); |
1da177e4 LT |
216 | return NULL; |
217 | } | |
218 | ||
219 | int mthca_table_get(struct mthca_dev *dev, struct mthca_icm_table *table, int obj) | |
220 | { | |
221 | int i = (obj & (table->num_obj - 1)) * table->obj_size / MTHCA_TABLE_CHUNK_SIZE; | |
222 | int ret = 0; | |
223 | u8 status; | |
224 | ||
fd9cfdd1 | 225 | mutex_lock(&table->mutex); |
1da177e4 LT |
226 | |
227 | if (table->icm[i]) { | |
228 | ++table->icm[i]->refcount; | |
229 | goto out; | |
230 | } | |
231 | ||
232 | table->icm[i] = mthca_alloc_icm(dev, MTHCA_TABLE_CHUNK_SIZE >> PAGE_SHIFT, | |
233 | (table->lowmem ? GFP_KERNEL : GFP_HIGHUSER) | | |
391e4dea | 234 | __GFP_NOWARN, table->coherent); |
1da177e4 LT |
235 | if (!table->icm[i]) { |
236 | ret = -ENOMEM; | |
237 | goto out; | |
238 | } | |
239 | ||
240 | if (mthca_MAP_ICM(dev, table->icm[i], table->virt + i * MTHCA_TABLE_CHUNK_SIZE, | |
241 | &status) || status) { | |
391e4dea | 242 | mthca_free_icm(dev, table->icm[i], table->coherent); |
1da177e4 LT |
243 | table->icm[i] = NULL; |
244 | ret = -ENOMEM; | |
245 | goto out; | |
246 | } | |
247 | ||
248 | ++table->icm[i]->refcount; | |
249 | ||
250 | out: | |
fd9cfdd1 | 251 | mutex_unlock(&table->mutex); |
1da177e4 LT |
252 | return ret; |
253 | } | |
254 | ||
255 | void mthca_table_put(struct mthca_dev *dev, struct mthca_icm_table *table, int obj) | |
256 | { | |
a03a5a67 | 257 | int i; |
1da177e4 LT |
258 | u8 status; |
259 | ||
a03a5a67 RD |
260 | if (!mthca_is_memfree(dev)) |
261 | return; | |
262 | ||
263 | i = (obj & (table->num_obj - 1)) * table->obj_size / MTHCA_TABLE_CHUNK_SIZE; | |
264 | ||
fd9cfdd1 | 265 | mutex_lock(&table->mutex); |
1da177e4 LT |
266 | |
267 | if (--table->icm[i]->refcount == 0) { | |
268 | mthca_UNMAP_ICM(dev, table->virt + i * MTHCA_TABLE_CHUNK_SIZE, | |
8d3ef29d IR |
269 | MTHCA_TABLE_CHUNK_SIZE / MTHCA_ICM_PAGE_SIZE, |
270 | &status); | |
391e4dea | 271 | mthca_free_icm(dev, table->icm[i], table->coherent); |
1da177e4 LT |
272 | table->icm[i] = NULL; |
273 | } | |
274 | ||
fd9cfdd1 | 275 | mutex_unlock(&table->mutex); |
1da177e4 LT |
276 | } |
277 | ||
391e4dea | 278 | void *mthca_table_find(struct mthca_icm_table *table, int obj, dma_addr_t *dma_handle) |
0fabd9fb | 279 | { |
391e4dea | 280 | int idx, offset, dma_offset, i; |
0fabd9fb MT |
281 | struct mthca_icm_chunk *chunk; |
282 | struct mthca_icm *icm; | |
283 | struct page *page = NULL; | |
284 | ||
285 | if (!table->lowmem) | |
286 | return NULL; | |
287 | ||
fd9cfdd1 | 288 | mutex_lock(&table->mutex); |
0fabd9fb MT |
289 | |
290 | idx = (obj & (table->num_obj - 1)) * table->obj_size; | |
291 | icm = table->icm[idx / MTHCA_TABLE_CHUNK_SIZE]; | |
391e4dea | 292 | dma_offset = offset = idx % MTHCA_TABLE_CHUNK_SIZE; |
0fabd9fb MT |
293 | |
294 | if (!icm) | |
295 | goto out; | |
296 | ||
297 | list_for_each_entry(chunk, &icm->chunk_list, list) { | |
298 | for (i = 0; i < chunk->npages; ++i) { | |
391e4dea MT |
299 | if (dma_handle && dma_offset >= 0) { |
300 | if (sg_dma_len(&chunk->mem[i]) > dma_offset) | |
301 | *dma_handle = sg_dma_address(&chunk->mem[i]) + | |
302 | dma_offset; | |
303 | dma_offset -= sg_dma_len(&chunk->mem[i]); | |
304 | } | |
305 | /* DMA mapping can merge pages but not split them, | |
306 | * so if we found the page, dma_handle has already | |
307 | * been assigned to. */ | |
46707e96 | 308 | if (chunk->mem[i].length > offset) { |
45711f1a | 309 | page = sg_page(&chunk->mem[i]); |
6c7d2a75 | 310 | goto out; |
0fabd9fb MT |
311 | } |
312 | offset -= chunk->mem[i].length; | |
313 | } | |
314 | } | |
315 | ||
316 | out: | |
fd9cfdd1 | 317 | mutex_unlock(&table->mutex); |
0fabd9fb MT |
318 | return page ? lowmem_page_address(page) + offset : NULL; |
319 | } | |
320 | ||
86562a13 RD |
321 | int mthca_table_get_range(struct mthca_dev *dev, struct mthca_icm_table *table, |
322 | int start, int end) | |
323 | { | |
324 | int inc = MTHCA_TABLE_CHUNK_SIZE / table->obj_size; | |
325 | int i, err; | |
326 | ||
327 | for (i = start; i <= end; i += inc) { | |
328 | err = mthca_table_get(dev, table, i); | |
329 | if (err) | |
330 | goto fail; | |
331 | } | |
332 | ||
333 | return 0; | |
334 | ||
335 | fail: | |
336 | while (i > start) { | |
337 | i -= inc; | |
338 | mthca_table_put(dev, table, i); | |
339 | } | |
340 | ||
341 | return err; | |
342 | } | |
343 | ||
344 | void mthca_table_put_range(struct mthca_dev *dev, struct mthca_icm_table *table, | |
345 | int start, int end) | |
346 | { | |
347 | int i; | |
348 | ||
a03a5a67 RD |
349 | if (!mthca_is_memfree(dev)) |
350 | return; | |
351 | ||
86562a13 RD |
352 | for (i = start; i <= end; i += MTHCA_TABLE_CHUNK_SIZE / table->obj_size) |
353 | mthca_table_put(dev, table, i); | |
354 | } | |
355 | ||
1da177e4 LT |
356 | struct mthca_icm_table *mthca_alloc_icm_table(struct mthca_dev *dev, |
357 | u64 virt, int obj_size, | |
358 | int nobj, int reserved, | |
391e4dea | 359 | int use_lowmem, int use_coherent) |
1da177e4 LT |
360 | { |
361 | struct mthca_icm_table *table; | |
362 | int num_icm; | |
d20a4019 | 363 | unsigned chunk_size; |
1da177e4 LT |
364 | int i; |
365 | u8 status; | |
366 | ||
f02b16be | 367 | num_icm = (obj_size * nobj + MTHCA_TABLE_CHUNK_SIZE - 1) / MTHCA_TABLE_CHUNK_SIZE; |
1da177e4 LT |
368 | |
369 | table = kmalloc(sizeof *table + num_icm * sizeof *table->icm, GFP_KERNEL); | |
370 | if (!table) | |
371 | return NULL; | |
372 | ||
373 | table->virt = virt; | |
374 | table->num_icm = num_icm; | |
375 | table->num_obj = nobj; | |
376 | table->obj_size = obj_size; | |
377 | table->lowmem = use_lowmem; | |
391e4dea | 378 | table->coherent = use_coherent; |
fd9cfdd1 | 379 | mutex_init(&table->mutex); |
1da177e4 LT |
380 | |
381 | for (i = 0; i < num_icm; ++i) | |
382 | table->icm[i] = NULL; | |
383 | ||
384 | for (i = 0; i * MTHCA_TABLE_CHUNK_SIZE < reserved * obj_size; ++i) { | |
d20a4019 RD |
385 | chunk_size = MTHCA_TABLE_CHUNK_SIZE; |
386 | if ((i + 1) * MTHCA_TABLE_CHUNK_SIZE > nobj * obj_size) | |
387 | chunk_size = nobj * obj_size - i * MTHCA_TABLE_CHUNK_SIZE; | |
388 | ||
389 | table->icm[i] = mthca_alloc_icm(dev, chunk_size >> PAGE_SHIFT, | |
1da177e4 | 390 | (use_lowmem ? GFP_KERNEL : GFP_HIGHUSER) | |
391e4dea | 391 | __GFP_NOWARN, use_coherent); |
1da177e4 LT |
392 | if (!table->icm[i]) |
393 | goto err; | |
394 | if (mthca_MAP_ICM(dev, table->icm[i], virt + i * MTHCA_TABLE_CHUNK_SIZE, | |
395 | &status) || status) { | |
391e4dea | 396 | mthca_free_icm(dev, table->icm[i], table->coherent); |
1da177e4 LT |
397 | table->icm[i] = NULL; |
398 | goto err; | |
399 | } | |
400 | ||
401 | /* | |
402 | * Add a reference to this ICM chunk so that it never | |
403 | * gets freed (since it contains reserved firmware objects). | |
404 | */ | |
405 | ++table->icm[i]->refcount; | |
406 | } | |
407 | ||
408 | return table; | |
409 | ||
410 | err: | |
411 | for (i = 0; i < num_icm; ++i) | |
412 | if (table->icm[i]) { | |
413 | mthca_UNMAP_ICM(dev, virt + i * MTHCA_TABLE_CHUNK_SIZE, | |
8d3ef29d IR |
414 | MTHCA_TABLE_CHUNK_SIZE / MTHCA_ICM_PAGE_SIZE, |
415 | &status); | |
391e4dea | 416 | mthca_free_icm(dev, table->icm[i], table->coherent); |
1da177e4 LT |
417 | } |
418 | ||
419 | kfree(table); | |
420 | ||
421 | return NULL; | |
422 | } | |
423 | ||
424 | void mthca_free_icm_table(struct mthca_dev *dev, struct mthca_icm_table *table) | |
425 | { | |
426 | int i; | |
427 | u8 status; | |
428 | ||
429 | for (i = 0; i < table->num_icm; ++i) | |
430 | if (table->icm[i]) { | |
431 | mthca_UNMAP_ICM(dev, table->virt + i * MTHCA_TABLE_CHUNK_SIZE, | |
8d3ef29d IR |
432 | MTHCA_TABLE_CHUNK_SIZE / MTHCA_ICM_PAGE_SIZE, |
433 | &status); | |
391e4dea | 434 | mthca_free_icm(dev, table->icm[i], table->coherent); |
1da177e4 LT |
435 | } |
436 | ||
437 | kfree(table); | |
438 | } | |
439 | ||
56483ec1 | 440 | static u64 mthca_uarc_virt(struct mthca_dev *dev, struct mthca_uar *uar, int page) |
1da177e4 LT |
441 | { |
442 | return dev->uar_table.uarc_base + | |
56483ec1 | 443 | uar->index * dev->uar_table.uarc_size + |
8d3ef29d | 444 | page * MTHCA_ICM_PAGE_SIZE; |
1da177e4 LT |
445 | } |
446 | ||
56483ec1 RD |
447 | int mthca_map_user_db(struct mthca_dev *dev, struct mthca_uar *uar, |
448 | struct mthca_user_db_table *db_tab, int index, u64 uaddr) | |
449 | { | |
45711f1a | 450 | struct page *pages[1]; |
56483ec1 RD |
451 | int ret = 0; |
452 | u8 status; | |
453 | int i; | |
454 | ||
455 | if (!mthca_is_memfree(dev)) | |
456 | return 0; | |
457 | ||
458 | if (index < 0 || index > dev->uar_table.uarc_size / 8) | |
459 | return -EINVAL; | |
460 | ||
fd9cfdd1 | 461 | mutex_lock(&db_tab->mutex); |
56483ec1 RD |
462 | |
463 | i = index / MTHCA_DB_REC_PER_PAGE; | |
464 | ||
465 | if ((db_tab->page[i].refcount >= MTHCA_DB_REC_PER_PAGE) || | |
466 | (db_tab->page[i].uvirt && db_tab->page[i].uvirt != uaddr) || | |
467 | (uaddr & 4095)) { | |
468 | ret = -EINVAL; | |
469 | goto out; | |
470 | } | |
471 | ||
472 | if (db_tab->page[i].refcount) { | |
473 | ++db_tab->page[i].refcount; | |
474 | goto out; | |
475 | } | |
476 | ||
477 | ret = get_user_pages(current, current->mm, uaddr & PAGE_MASK, 1, 1, 0, | |
45711f1a | 478 | pages, NULL); |
56483ec1 RD |
479 | if (ret < 0) |
480 | goto out; | |
481 | ||
642f1490 JA |
482 | sg_set_page(&db_tab->page[i].mem, pages[0], MTHCA_ICM_PAGE_SIZE, |
483 | uaddr & ~PAGE_MASK); | |
56483ec1 RD |
484 | |
485 | ret = pci_map_sg(dev->pdev, &db_tab->page[i].mem, 1, PCI_DMA_TODEVICE); | |
486 | if (ret < 0) { | |
45711f1a | 487 | put_page(pages[0]); |
56483ec1 RD |
488 | goto out; |
489 | } | |
490 | ||
491 | ret = mthca_MAP_ICM_page(dev, sg_dma_address(&db_tab->page[i].mem), | |
492 | mthca_uarc_virt(dev, uar, i), &status); | |
493 | if (!ret && status) | |
494 | ret = -EINVAL; | |
495 | if (ret) { | |
496 | pci_unmap_sg(dev->pdev, &db_tab->page[i].mem, 1, PCI_DMA_TODEVICE); | |
45711f1a | 497 | put_page(sg_page(&db_tab->page[i].mem)); |
56483ec1 RD |
498 | goto out; |
499 | } | |
500 | ||
501 | db_tab->page[i].uvirt = uaddr; | |
502 | db_tab->page[i].refcount = 1; | |
503 | ||
504 | out: | |
fd9cfdd1 | 505 | mutex_unlock(&db_tab->mutex); |
56483ec1 RD |
506 | return ret; |
507 | } | |
508 | ||
509 | void mthca_unmap_user_db(struct mthca_dev *dev, struct mthca_uar *uar, | |
510 | struct mthca_user_db_table *db_tab, int index) | |
511 | { | |
512 | if (!mthca_is_memfree(dev)) | |
513 | return; | |
514 | ||
515 | /* | |
516 | * To make our bookkeeping simpler, we don't unmap DB | |
517 | * pages until we clean up the whole db table. | |
518 | */ | |
519 | ||
fd9cfdd1 | 520 | mutex_lock(&db_tab->mutex); |
56483ec1 RD |
521 | |
522 | --db_tab->page[index / MTHCA_DB_REC_PER_PAGE].refcount; | |
523 | ||
fd9cfdd1 | 524 | mutex_unlock(&db_tab->mutex); |
56483ec1 RD |
525 | } |
526 | ||
527 | struct mthca_user_db_table *mthca_init_user_db_tab(struct mthca_dev *dev) | |
528 | { | |
529 | struct mthca_user_db_table *db_tab; | |
530 | int npages; | |
531 | int i; | |
532 | ||
533 | if (!mthca_is_memfree(dev)) | |
534 | return NULL; | |
535 | ||
8d3ef29d | 536 | npages = dev->uar_table.uarc_size / MTHCA_ICM_PAGE_SIZE; |
56483ec1 RD |
537 | db_tab = kmalloc(sizeof *db_tab + npages * sizeof *db_tab->page, GFP_KERNEL); |
538 | if (!db_tab) | |
539 | return ERR_PTR(-ENOMEM); | |
540 | ||
fd9cfdd1 | 541 | mutex_init(&db_tab->mutex); |
56483ec1 RD |
542 | for (i = 0; i < npages; ++i) { |
543 | db_tab->page[i].refcount = 0; | |
544 | db_tab->page[i].uvirt = 0; | |
fe174357 | 545 | sg_init_table(&db_tab->page[i].mem, 1); |
56483ec1 RD |
546 | } |
547 | ||
548 | return db_tab; | |
549 | } | |
550 | ||
551 | void mthca_cleanup_user_db_tab(struct mthca_dev *dev, struct mthca_uar *uar, | |
552 | struct mthca_user_db_table *db_tab) | |
553 | { | |
554 | int i; | |
555 | u8 status; | |
556 | ||
557 | if (!mthca_is_memfree(dev)) | |
558 | return; | |
559 | ||
8d3ef29d | 560 | for (i = 0; i < dev->uar_table.uarc_size / MTHCA_ICM_PAGE_SIZE; ++i) { |
56483ec1 RD |
561 | if (db_tab->page[i].uvirt) { |
562 | mthca_UNMAP_ICM(dev, mthca_uarc_virt(dev, uar, i), 1, &status); | |
563 | pci_unmap_sg(dev->pdev, &db_tab->page[i].mem, 1, PCI_DMA_TODEVICE); | |
45711f1a | 564 | put_page(sg_page(&db_tab->page[i].mem)); |
56483ec1 RD |
565 | } |
566 | } | |
52d0df15 JM |
567 | |
568 | kfree(db_tab); | |
56483ec1 RD |
569 | } |
570 | ||
c6f5cb7b RD |
571 | int mthca_alloc_db(struct mthca_dev *dev, enum mthca_db_type type, |
572 | u32 qn, __be32 **db) | |
1da177e4 LT |
573 | { |
574 | int group; | |
575 | int start, end, dir; | |
576 | int i, j; | |
577 | struct mthca_db_page *page; | |
578 | int ret = 0; | |
579 | u8 status; | |
580 | ||
fd9cfdd1 | 581 | mutex_lock(&dev->db_tab->mutex); |
1da177e4 LT |
582 | |
583 | switch (type) { | |
584 | case MTHCA_DB_TYPE_CQ_ARM: | |
585 | case MTHCA_DB_TYPE_SQ: | |
586 | group = 0; | |
587 | start = 0; | |
588 | end = dev->db_tab->max_group1; | |
589 | dir = 1; | |
590 | break; | |
591 | ||
592 | case MTHCA_DB_TYPE_CQ_SET_CI: | |
593 | case MTHCA_DB_TYPE_RQ: | |
594 | case MTHCA_DB_TYPE_SRQ: | |
595 | group = 1; | |
596 | start = dev->db_tab->npages - 1; | |
597 | end = dev->db_tab->min_group2; | |
598 | dir = -1; | |
599 | break; | |
600 | ||
601 | default: | |
2714eb5a RD |
602 | ret = -EINVAL; |
603 | goto out; | |
1da177e4 LT |
604 | } |
605 | ||
606 | for (i = start; i != end; i += dir) | |
607 | if (dev->db_tab->page[i].db_rec && | |
608 | !bitmap_full(dev->db_tab->page[i].used, | |
609 | MTHCA_DB_REC_PER_PAGE)) { | |
610 | page = dev->db_tab->page + i; | |
611 | goto found; | |
612 | } | |
613 | ||
018771f4 RD |
614 | for (i = start; i != end; i += dir) |
615 | if (!dev->db_tab->page[i].db_rec) { | |
616 | page = dev->db_tab->page + i; | |
617 | goto alloc; | |
618 | } | |
619 | ||
1da177e4 LT |
620 | if (dev->db_tab->max_group1 >= dev->db_tab->min_group2 - 1) { |
621 | ret = -ENOMEM; | |
622 | goto out; | |
623 | } | |
624 | ||
018771f4 RD |
625 | if (group == 0) |
626 | ++dev->db_tab->max_group1; | |
627 | else | |
628 | --dev->db_tab->min_group2; | |
629 | ||
1da177e4 | 630 | page = dev->db_tab->page + end; |
018771f4 RD |
631 | |
632 | alloc: | |
8d3ef29d | 633 | page->db_rec = dma_alloc_coherent(&dev->pdev->dev, MTHCA_ICM_PAGE_SIZE, |
1da177e4 LT |
634 | &page->mapping, GFP_KERNEL); |
635 | if (!page->db_rec) { | |
636 | ret = -ENOMEM; | |
637 | goto out; | |
638 | } | |
8d3ef29d | 639 | memset(page->db_rec, 0, MTHCA_ICM_PAGE_SIZE); |
1da177e4 | 640 | |
56483ec1 RD |
641 | ret = mthca_MAP_ICM_page(dev, page->mapping, |
642 | mthca_uarc_virt(dev, &dev->driver_uar, i), &status); | |
1da177e4 LT |
643 | if (!ret && status) |
644 | ret = -EINVAL; | |
645 | if (ret) { | |
8d3ef29d | 646 | dma_free_coherent(&dev->pdev->dev, MTHCA_ICM_PAGE_SIZE, |
1da177e4 LT |
647 | page->db_rec, page->mapping); |
648 | goto out; | |
649 | } | |
650 | ||
651 | bitmap_zero(page->used, MTHCA_DB_REC_PER_PAGE); | |
1da177e4 LT |
652 | |
653 | found: | |
654 | j = find_first_zero_bit(page->used, MTHCA_DB_REC_PER_PAGE); | |
655 | set_bit(j, page->used); | |
656 | ||
657 | if (group == 1) | |
658 | j = MTHCA_DB_REC_PER_PAGE - 1 - j; | |
659 | ||
660 | ret = i * MTHCA_DB_REC_PER_PAGE + j; | |
661 | ||
662 | page->db_rec[j] = cpu_to_be64((qn << 8) | (type << 5)); | |
663 | ||
97f52eb4 | 664 | *db = (__be32 *) &page->db_rec[j]; |
1da177e4 LT |
665 | |
666 | out: | |
fd9cfdd1 | 667 | mutex_unlock(&dev->db_tab->mutex); |
1da177e4 LT |
668 | |
669 | return ret; | |
670 | } | |
671 | ||
672 | void mthca_free_db(struct mthca_dev *dev, int type, int db_index) | |
673 | { | |
674 | int i, j; | |
675 | struct mthca_db_page *page; | |
676 | u8 status; | |
677 | ||
678 | i = db_index / MTHCA_DB_REC_PER_PAGE; | |
679 | j = db_index % MTHCA_DB_REC_PER_PAGE; | |
680 | ||
681 | page = dev->db_tab->page + i; | |
682 | ||
fd9cfdd1 | 683 | mutex_lock(&dev->db_tab->mutex); |
1da177e4 LT |
684 | |
685 | page->db_rec[j] = 0; | |
686 | if (i >= dev->db_tab->min_group2) | |
687 | j = MTHCA_DB_REC_PER_PAGE - 1 - j; | |
688 | clear_bit(j, page->used); | |
689 | ||
690 | if (bitmap_empty(page->used, MTHCA_DB_REC_PER_PAGE) && | |
691 | i >= dev->db_tab->max_group1 - 1) { | |
56483ec1 | 692 | mthca_UNMAP_ICM(dev, mthca_uarc_virt(dev, &dev->driver_uar, i), 1, &status); |
1da177e4 | 693 | |
8d3ef29d | 694 | dma_free_coherent(&dev->pdev->dev, MTHCA_ICM_PAGE_SIZE, |
1da177e4 LT |
695 | page->db_rec, page->mapping); |
696 | page->db_rec = NULL; | |
697 | ||
698 | if (i == dev->db_tab->max_group1) { | |
699 | --dev->db_tab->max_group1; | |
700 | /* XXX may be able to unmap more pages now */ | |
701 | } | |
702 | if (i == dev->db_tab->min_group2) | |
703 | ++dev->db_tab->min_group2; | |
704 | } | |
705 | ||
fd9cfdd1 | 706 | mutex_unlock(&dev->db_tab->mutex); |
1da177e4 LT |
707 | } |
708 | ||
709 | int mthca_init_db_tab(struct mthca_dev *dev) | |
710 | { | |
711 | int i; | |
712 | ||
d10ddbf6 | 713 | if (!mthca_is_memfree(dev)) |
1da177e4 LT |
714 | return 0; |
715 | ||
716 | dev->db_tab = kmalloc(sizeof *dev->db_tab, GFP_KERNEL); | |
717 | if (!dev->db_tab) | |
718 | return -ENOMEM; | |
719 | ||
fd9cfdd1 | 720 | mutex_init(&dev->db_tab->mutex); |
1da177e4 | 721 | |
8d3ef29d | 722 | dev->db_tab->npages = dev->uar_table.uarc_size / MTHCA_ICM_PAGE_SIZE; |
1da177e4 LT |
723 | dev->db_tab->max_group1 = 0; |
724 | dev->db_tab->min_group2 = dev->db_tab->npages - 1; | |
725 | ||
726 | dev->db_tab->page = kmalloc(dev->db_tab->npages * | |
727 | sizeof *dev->db_tab->page, | |
728 | GFP_KERNEL); | |
729 | if (!dev->db_tab->page) { | |
730 | kfree(dev->db_tab); | |
731 | return -ENOMEM; | |
732 | } | |
733 | ||
734 | for (i = 0; i < dev->db_tab->npages; ++i) | |
735 | dev->db_tab->page[i].db_rec = NULL; | |
736 | ||
737 | return 0; | |
738 | } | |
739 | ||
740 | void mthca_cleanup_db_tab(struct mthca_dev *dev) | |
741 | { | |
742 | int i; | |
743 | u8 status; | |
744 | ||
d10ddbf6 | 745 | if (!mthca_is_memfree(dev)) |
1da177e4 LT |
746 | return; |
747 | ||
748 | /* | |
749 | * Because we don't always free our UARC pages when they | |
750 | * become empty to make mthca_free_db() simpler we need to | |
751 | * make a sweep through the doorbell pages and free any | |
752 | * leftover pages now. | |
753 | */ | |
754 | for (i = 0; i < dev->db_tab->npages; ++i) { | |
755 | if (!dev->db_tab->page[i].db_rec) | |
756 | continue; | |
757 | ||
758 | if (!bitmap_empty(dev->db_tab->page[i].used, MTHCA_DB_REC_PER_PAGE)) | |
759 | mthca_warn(dev, "Kernel UARC page %d not empty\n", i); | |
760 | ||
56483ec1 | 761 | mthca_UNMAP_ICM(dev, mthca_uarc_virt(dev, &dev->driver_uar, i), 1, &status); |
1da177e4 | 762 | |
8d3ef29d | 763 | dma_free_coherent(&dev->pdev->dev, MTHCA_ICM_PAGE_SIZE, |
1da177e4 LT |
764 | dev->db_tab->page[i].db_rec, |
765 | dev->db_tab->page[i].mapping); | |
766 | } | |
767 | ||
768 | kfree(dev->db_tab->page); | |
769 | kfree(dev->db_tab); | |
770 | } |