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71ee6730 DS |
1 | /* This file is part of the Emulex RoCE Device Driver for |
2 | * RoCE (RDMA over Converged Ethernet) adapters. | |
3 | * Copyright (C) 2012-2015 Emulex. All rights reserved. | |
4 | * EMULEX and SLI are trademarks of Emulex. | |
5 | * www.emulex.com | |
6 | * | |
7 | * This software is available to you under a choice of one of two licenses. | |
8 | * You may choose to be licensed under the terms of the GNU General Public | |
9 | * License (GPL) Version 2, available from the file COPYING in the main | |
10 | * directory of this source tree, or the BSD license below: | |
11 | * | |
12 | * Redistribution and use in source and binary forms, with or without | |
13 | * modification, are permitted provided that the following conditions | |
14 | * are met: | |
15 | * | |
16 | * - Redistributions of source code must retain the above copyright notice, | |
17 | * this list of conditions and the following disclaimer. | |
18 | * | |
19 | * - Redistributions in binary form must reproduce the above copyright | |
20 | * notice, this list of conditions and the following disclaimer in | |
21 | * the documentation and/or other materials provided with the distribution. | |
22 | * | |
23 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
24 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE | |
25 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
26 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE | |
27 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | |
28 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | |
29 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR | |
30 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, | |
31 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR | |
32 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF | |
33 | * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
fe2caefc PP |
34 | * |
35 | * Contact Information: | |
36 | * linux-drivers@emulex.com | |
37 | * | |
38 | * Emulex | |
39 | * 3333 Susan Street | |
40 | * Costa Mesa, CA 92626 | |
71ee6730 | 41 | */ |
fe2caefc PP |
42 | |
43 | #include <linux/dma-mapping.h> | |
44 | #include <rdma/ib_verbs.h> | |
45 | #include <rdma/ib_user_verbs.h> | |
46 | #include <rdma/iw_cm.h> | |
47 | #include <rdma/ib_umem.h> | |
48 | #include <rdma/ib_addr.h> | |
cc36929e | 49 | #include <rdma/ib_cache.h> |
fe2caefc PP |
50 | |
51 | #include "ocrdma.h" | |
52 | #include "ocrdma_hw.h" | |
53 | #include "ocrdma_verbs.h" | |
a7fe7380 | 54 | #include <rdma/ocrdma-abi.h> |
fe2caefc PP |
55 | |
56 | int ocrdma_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey) | |
57 | { | |
58 | if (index > 1) | |
59 | return -EINVAL; | |
60 | ||
61 | *pkey = 0xffff; | |
62 | return 0; | |
63 | } | |
64 | ||
65 | int ocrdma_query_gid(struct ib_device *ibdev, u8 port, | |
66 | int index, union ib_gid *sgid) | |
67 | { | |
cc36929e | 68 | int ret; |
fe2caefc PP |
69 | struct ocrdma_dev *dev; |
70 | ||
71 | dev = get_ocrdma_dev(ibdev); | |
72 | memset(sgid, 0, sizeof(*sgid)); | |
59a39ca3 | 73 | if (index >= OCRDMA_MAX_SGID) |
fe2caefc PP |
74 | return -EINVAL; |
75 | ||
55ee3ab2 | 76 | ret = ib_get_cached_gid(ibdev, port, index, sgid, NULL); |
cc36929e SK |
77 | if (ret == -EAGAIN) { |
78 | memcpy(sgid, &zgid, sizeof(*sgid)); | |
79 | return 0; | |
80 | } | |
81 | ||
82 | return ret; | |
83 | } | |
fe2caefc | 84 | |
cc36929e SK |
85 | int ocrdma_add_gid(struct ib_device *device, |
86 | u8 port_num, | |
87 | unsigned int index, | |
88 | const union ib_gid *gid, | |
89 | const struct ib_gid_attr *attr, | |
90 | void **context) { | |
91 | return 0; | |
92 | } | |
93 | ||
94 | int ocrdma_del_gid(struct ib_device *device, | |
95 | u8 port_num, | |
96 | unsigned int index, | |
97 | void **context) { | |
fe2caefc PP |
98 | return 0; |
99 | } | |
100 | ||
2528e33e MB |
101 | int ocrdma_query_device(struct ib_device *ibdev, struct ib_device_attr *attr, |
102 | struct ib_udata *uhw) | |
fe2caefc PP |
103 | { |
104 | struct ocrdma_dev *dev = get_ocrdma_dev(ibdev); | |
105 | ||
2528e33e MB |
106 | if (uhw->inlen || uhw->outlen) |
107 | return -EINVAL; | |
108 | ||
fe2caefc PP |
109 | memset(attr, 0, sizeof *attr); |
110 | memcpy(&attr->fw_ver, &dev->attr.fw_ver[0], | |
111 | min(sizeof(dev->attr.fw_ver), sizeof(attr->fw_ver))); | |
112 | ocrdma_get_guid(dev, (u8 *)&attr->sys_image_guid); | |
033edd4d | 113 | attr->max_mr_size = dev->attr.max_mr_size; |
fe2caefc PP |
114 | attr->page_size_cap = 0xffff000; |
115 | attr->vendor_id = dev->nic_info.pdev->vendor; | |
116 | attr->vendor_part_id = dev->nic_info.pdev->device; | |
96c51abe | 117 | attr->hw_ver = dev->asic_id; |
fe2caefc | 118 | attr->max_qp = dev->attr.max_qp; |
d3cb6c0b | 119 | attr->max_ah = OCRDMA_MAX_AH; |
fe2caefc PP |
120 | attr->max_qp_wr = dev->attr.max_wqe; |
121 | ||
122 | attr->device_cap_flags = IB_DEVICE_CURR_QP_STATE_MOD | | |
123 | IB_DEVICE_RC_RNR_NAK_GEN | | |
124 | IB_DEVICE_SHUTDOWN_PORT | | |
125 | IB_DEVICE_SYS_IMAGE_GUID | | |
2b51a9b9 NG |
126 | IB_DEVICE_LOCAL_DMA_LKEY | |
127 | IB_DEVICE_MEM_MGT_EXTENSIONS; | |
3c199b45 SX |
128 | attr->max_sge = min(dev->attr.max_send_sge, dev->attr.max_recv_sge); |
129 | attr->max_sge_rd = dev->attr.max_rdma_sge; | |
fe2caefc PP |
130 | attr->max_cq = dev->attr.max_cq; |
131 | attr->max_cqe = dev->attr.max_cqe; | |
132 | attr->max_mr = dev->attr.max_mr; | |
ac578aef | 133 | attr->max_mw = dev->attr.max_mw; |
fe2caefc PP |
134 | attr->max_pd = dev->attr.max_pd; |
135 | attr->atomic_cap = 0; | |
136 | attr->max_fmr = 0; | |
137 | attr->max_map_per_fmr = 0; | |
138 | attr->max_qp_rd_atom = | |
139 | min(dev->attr.max_ord_per_qp, dev->attr.max_ird_per_qp); | |
140 | attr->max_qp_init_rd_atom = dev->attr.max_ord_per_qp; | |
7c33880c | 141 | attr->max_srq = dev->attr.max_srq; |
d1e09ebf | 142 | attr->max_srq_sge = dev->attr.max_srq_sge; |
fe2caefc PP |
143 | attr->max_srq_wr = dev->attr.max_rqe; |
144 | attr->local_ca_ack_delay = dev->attr.local_ca_ack_delay; | |
d6a488f2 | 145 | attr->max_fast_reg_page_list_len = dev->attr.max_pages_per_frmr; |
fe2caefc PP |
146 | attr->max_pkeys = 1; |
147 | return 0; | |
148 | } | |
149 | ||
cc36929e SK |
150 | struct net_device *ocrdma_get_netdev(struct ib_device *ibdev, u8 port_num) |
151 | { | |
152 | struct ocrdma_dev *dev; | |
153 | struct net_device *ndev = NULL; | |
154 | ||
155 | rcu_read_lock(); | |
156 | ||
157 | dev = get_ocrdma_dev(ibdev); | |
158 | if (dev) | |
159 | ndev = dev->nic_info.netdev; | |
160 | if (ndev) | |
161 | dev_hold(ndev); | |
162 | ||
163 | rcu_read_unlock(); | |
164 | ||
165 | return ndev; | |
166 | } | |
167 | ||
f24ceba6 NG |
168 | static inline void get_link_speed_and_width(struct ocrdma_dev *dev, |
169 | u8 *ib_speed, u8 *ib_width) | |
170 | { | |
171 | int status; | |
172 | u8 speed; | |
173 | ||
3b1ea430 | 174 | status = ocrdma_mbx_get_link_speed(dev, &speed, NULL); |
f24ceba6 NG |
175 | if (status) |
176 | speed = OCRDMA_PHYS_LINK_SPEED_ZERO; | |
177 | ||
178 | switch (speed) { | |
179 | case OCRDMA_PHYS_LINK_SPEED_1GBPS: | |
180 | *ib_speed = IB_SPEED_SDR; | |
181 | *ib_width = IB_WIDTH_1X; | |
182 | break; | |
183 | ||
184 | case OCRDMA_PHYS_LINK_SPEED_10GBPS: | |
185 | *ib_speed = IB_SPEED_QDR; | |
186 | *ib_width = IB_WIDTH_1X; | |
187 | break; | |
188 | ||
189 | case OCRDMA_PHYS_LINK_SPEED_20GBPS: | |
190 | *ib_speed = IB_SPEED_DDR; | |
191 | *ib_width = IB_WIDTH_4X; | |
192 | break; | |
193 | ||
194 | case OCRDMA_PHYS_LINK_SPEED_40GBPS: | |
195 | *ib_speed = IB_SPEED_QDR; | |
196 | *ib_width = IB_WIDTH_4X; | |
197 | break; | |
198 | ||
199 | default: | |
200 | /* Unsupported */ | |
201 | *ib_speed = IB_SPEED_SDR; | |
202 | *ib_width = IB_WIDTH_1X; | |
2b50176d | 203 | } |
f24ceba6 NG |
204 | } |
205 | ||
fe2caefc PP |
206 | int ocrdma_query_port(struct ib_device *ibdev, |
207 | u8 port, struct ib_port_attr *props) | |
208 | { | |
209 | enum ib_port_state port_state; | |
210 | struct ocrdma_dev *dev; | |
211 | struct net_device *netdev; | |
212 | ||
c4550c63 | 213 | /* props being zeroed by the caller, avoid zeroing it here */ |
fe2caefc PP |
214 | dev = get_ocrdma_dev(ibdev); |
215 | if (port > 1) { | |
ef99c4c2 NG |
216 | pr_err("%s(%d) invalid_port=0x%x\n", __func__, |
217 | dev->id, port); | |
fe2caefc PP |
218 | return -EINVAL; |
219 | } | |
220 | netdev = dev->nic_info.netdev; | |
221 | if (netif_running(netdev) && netif_oper_up(netdev)) { | |
222 | port_state = IB_PORT_ACTIVE; | |
223 | props->phys_state = 5; | |
224 | } else { | |
225 | port_state = IB_PORT_DOWN; | |
226 | props->phys_state = 3; | |
227 | } | |
228 | props->max_mtu = IB_MTU_4096; | |
229 | props->active_mtu = iboe_get_mtu(netdev->mtu); | |
230 | props->lid = 0; | |
231 | props->lmc = 0; | |
232 | props->sm_lid = 0; | |
233 | props->sm_sl = 0; | |
234 | props->state = port_state; | |
235 | props->port_cap_flags = | |
236 | IB_PORT_CM_SUP | | |
237 | IB_PORT_REINIT_SUP | | |
cc36929e SK |
238 | IB_PORT_DEVICE_MGMT_SUP | IB_PORT_VENDOR_CLASS_SUP | |
239 | IB_PORT_IP_BASED_GIDS; | |
fe2caefc PP |
240 | props->gid_tbl_len = OCRDMA_MAX_SGID; |
241 | props->pkey_tbl_len = 1; | |
242 | props->bad_pkey_cntr = 0; | |
243 | props->qkey_viol_cntr = 0; | |
f24ceba6 NG |
244 | get_link_speed_and_width(dev, &props->active_speed, |
245 | &props->active_width); | |
fe2caefc PP |
246 | props->max_msg_sz = 0x80000000; |
247 | props->max_vl_num = 4; | |
248 | return 0; | |
249 | } | |
250 | ||
251 | int ocrdma_modify_port(struct ib_device *ibdev, u8 port, int mask, | |
252 | struct ib_port_modify *props) | |
253 | { | |
254 | struct ocrdma_dev *dev; | |
255 | ||
256 | dev = get_ocrdma_dev(ibdev); | |
257 | if (port > 1) { | |
ef99c4c2 | 258 | pr_err("%s(%d) invalid_port=0x%x\n", __func__, dev->id, port); |
fe2caefc PP |
259 | return -EINVAL; |
260 | } | |
261 | return 0; | |
262 | } | |
263 | ||
264 | static int ocrdma_add_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr, | |
265 | unsigned long len) | |
266 | { | |
267 | struct ocrdma_mm *mm; | |
268 | ||
269 | mm = kzalloc(sizeof(*mm), GFP_KERNEL); | |
270 | if (mm == NULL) | |
271 | return -ENOMEM; | |
272 | mm->key.phy_addr = phy_addr; | |
273 | mm->key.len = len; | |
274 | INIT_LIST_HEAD(&mm->entry); | |
275 | ||
276 | mutex_lock(&uctx->mm_list_lock); | |
277 | list_add_tail(&mm->entry, &uctx->mm_head); | |
278 | mutex_unlock(&uctx->mm_list_lock); | |
279 | return 0; | |
280 | } | |
281 | ||
282 | static void ocrdma_del_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr, | |
283 | unsigned long len) | |
284 | { | |
285 | struct ocrdma_mm *mm, *tmp; | |
286 | ||
287 | mutex_lock(&uctx->mm_list_lock); | |
288 | list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) { | |
43a6b402 | 289 | if (len != mm->key.len && phy_addr != mm->key.phy_addr) |
fe2caefc PP |
290 | continue; |
291 | ||
292 | list_del(&mm->entry); | |
293 | kfree(mm); | |
294 | break; | |
295 | } | |
296 | mutex_unlock(&uctx->mm_list_lock); | |
297 | } | |
298 | ||
299 | static bool ocrdma_search_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr, | |
300 | unsigned long len) | |
301 | { | |
302 | bool found = false; | |
303 | struct ocrdma_mm *mm; | |
304 | ||
305 | mutex_lock(&uctx->mm_list_lock); | |
306 | list_for_each_entry(mm, &uctx->mm_head, entry) { | |
43a6b402 | 307 | if (len != mm->key.len && phy_addr != mm->key.phy_addr) |
fe2caefc PP |
308 | continue; |
309 | ||
310 | found = true; | |
311 | break; | |
312 | } | |
313 | mutex_unlock(&uctx->mm_list_lock); | |
314 | return found; | |
315 | } | |
316 | ||
9ba1377d MA |
317 | |
318 | static u16 _ocrdma_pd_mgr_get_bitmap(struct ocrdma_dev *dev, bool dpp_pool) | |
319 | { | |
320 | u16 pd_bitmap_idx = 0; | |
321 | const unsigned long *pd_bitmap; | |
322 | ||
323 | if (dpp_pool) { | |
324 | pd_bitmap = dev->pd_mgr->pd_dpp_bitmap; | |
325 | pd_bitmap_idx = find_first_zero_bit(pd_bitmap, | |
326 | dev->pd_mgr->max_dpp_pd); | |
327 | __set_bit(pd_bitmap_idx, dev->pd_mgr->pd_dpp_bitmap); | |
328 | dev->pd_mgr->pd_dpp_count++; | |
329 | if (dev->pd_mgr->pd_dpp_count > dev->pd_mgr->pd_dpp_thrsh) | |
330 | dev->pd_mgr->pd_dpp_thrsh = dev->pd_mgr->pd_dpp_count; | |
331 | } else { | |
332 | pd_bitmap = dev->pd_mgr->pd_norm_bitmap; | |
333 | pd_bitmap_idx = find_first_zero_bit(pd_bitmap, | |
334 | dev->pd_mgr->max_normal_pd); | |
335 | __set_bit(pd_bitmap_idx, dev->pd_mgr->pd_norm_bitmap); | |
336 | dev->pd_mgr->pd_norm_count++; | |
337 | if (dev->pd_mgr->pd_norm_count > dev->pd_mgr->pd_norm_thrsh) | |
338 | dev->pd_mgr->pd_norm_thrsh = dev->pd_mgr->pd_norm_count; | |
339 | } | |
340 | return pd_bitmap_idx; | |
341 | } | |
342 | ||
343 | static int _ocrdma_pd_mgr_put_bitmap(struct ocrdma_dev *dev, u16 pd_id, | |
344 | bool dpp_pool) | |
345 | { | |
346 | u16 pd_count; | |
347 | u16 pd_bit_index; | |
348 | ||
349 | pd_count = dpp_pool ? dev->pd_mgr->pd_dpp_count : | |
350 | dev->pd_mgr->pd_norm_count; | |
351 | if (pd_count == 0) | |
352 | return -EINVAL; | |
353 | ||
354 | if (dpp_pool) { | |
355 | pd_bit_index = pd_id - dev->pd_mgr->pd_dpp_start; | |
356 | if (pd_bit_index >= dev->pd_mgr->max_dpp_pd) { | |
357 | return -EINVAL; | |
358 | } else { | |
359 | __clear_bit(pd_bit_index, dev->pd_mgr->pd_dpp_bitmap); | |
360 | dev->pd_mgr->pd_dpp_count--; | |
361 | } | |
362 | } else { | |
363 | pd_bit_index = pd_id - dev->pd_mgr->pd_norm_start; | |
364 | if (pd_bit_index >= dev->pd_mgr->max_normal_pd) { | |
365 | return -EINVAL; | |
366 | } else { | |
367 | __clear_bit(pd_bit_index, dev->pd_mgr->pd_norm_bitmap); | |
368 | dev->pd_mgr->pd_norm_count--; | |
369 | } | |
370 | } | |
371 | ||
372 | return 0; | |
373 | } | |
374 | ||
004d18ea | 375 | static int ocrdma_put_pd_num(struct ocrdma_dev *dev, u16 pd_id, |
9ba1377d MA |
376 | bool dpp_pool) |
377 | { | |
378 | int status; | |
379 | ||
380 | mutex_lock(&dev->dev_lock); | |
381 | status = _ocrdma_pd_mgr_put_bitmap(dev, pd_id, dpp_pool); | |
382 | mutex_unlock(&dev->dev_lock); | |
383 | return status; | |
384 | } | |
385 | ||
386 | static int ocrdma_get_pd_num(struct ocrdma_dev *dev, struct ocrdma_pd *pd) | |
387 | { | |
388 | u16 pd_idx = 0; | |
389 | int status = 0; | |
390 | ||
391 | mutex_lock(&dev->dev_lock); | |
392 | if (pd->dpp_enabled) { | |
393 | /* try allocating DPP PD, if not available then normal PD */ | |
394 | if (dev->pd_mgr->pd_dpp_count < dev->pd_mgr->max_dpp_pd) { | |
395 | pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, true); | |
396 | pd->id = dev->pd_mgr->pd_dpp_start + pd_idx; | |
397 | pd->dpp_page = dev->pd_mgr->dpp_page_index + pd_idx; | |
398 | } else if (dev->pd_mgr->pd_norm_count < | |
399 | dev->pd_mgr->max_normal_pd) { | |
400 | pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, false); | |
401 | pd->id = dev->pd_mgr->pd_norm_start + pd_idx; | |
402 | pd->dpp_enabled = false; | |
403 | } else { | |
404 | status = -EINVAL; | |
405 | } | |
406 | } else { | |
407 | if (dev->pd_mgr->pd_norm_count < dev->pd_mgr->max_normal_pd) { | |
408 | pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, false); | |
409 | pd->id = dev->pd_mgr->pd_norm_start + pd_idx; | |
410 | } else { | |
411 | status = -EINVAL; | |
412 | } | |
413 | } | |
414 | mutex_unlock(&dev->dev_lock); | |
415 | return status; | |
416 | } | |
417 | ||
cffce990 NG |
418 | static struct ocrdma_pd *_ocrdma_alloc_pd(struct ocrdma_dev *dev, |
419 | struct ocrdma_ucontext *uctx, | |
420 | struct ib_udata *udata) | |
421 | { | |
422 | struct ocrdma_pd *pd = NULL; | |
0ca4c39f | 423 | int status; |
cffce990 NG |
424 | |
425 | pd = kzalloc(sizeof(*pd), GFP_KERNEL); | |
426 | if (!pd) | |
427 | return ERR_PTR(-ENOMEM); | |
428 | ||
59582d86 | 429 | if (udata && uctx && dev->attr.max_dpp_pds) { |
cffce990 | 430 | pd->dpp_enabled = |
21c3391a | 431 | ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R; |
cffce990 | 432 | pd->num_dpp_qp = |
a53d77a3 DS |
433 | pd->dpp_enabled ? (dev->nic_info.db_page_size / |
434 | dev->attr.wqe_size) : 0; | |
cffce990 NG |
435 | } |
436 | ||
9ba1377d MA |
437 | if (dev->pd_mgr->pd_prealloc_valid) { |
438 | status = ocrdma_get_pd_num(dev, pd); | |
18eaf1f1 RD |
439 | if (status == 0) { |
440 | return pd; | |
441 | } else { | |
442 | kfree(pd); | |
443 | return ERR_PTR(status); | |
444 | } | |
9ba1377d MA |
445 | } |
446 | ||
cffce990 NG |
447 | retry: |
448 | status = ocrdma_mbx_alloc_pd(dev, pd); | |
449 | if (status) { | |
450 | if (pd->dpp_enabled) { | |
451 | pd->dpp_enabled = false; | |
452 | pd->num_dpp_qp = 0; | |
453 | goto retry; | |
454 | } else { | |
455 | kfree(pd); | |
456 | return ERR_PTR(status); | |
457 | } | |
458 | } | |
459 | ||
460 | return pd; | |
461 | } | |
462 | ||
463 | static inline int is_ucontext_pd(struct ocrdma_ucontext *uctx, | |
464 | struct ocrdma_pd *pd) | |
465 | { | |
466 | return (uctx->cntxt_pd == pd ? true : false); | |
467 | } | |
468 | ||
469 | static int _ocrdma_dealloc_pd(struct ocrdma_dev *dev, | |
470 | struct ocrdma_pd *pd) | |
471 | { | |
0ca4c39f | 472 | int status; |
cffce990 | 473 | |
9ba1377d MA |
474 | if (dev->pd_mgr->pd_prealloc_valid) |
475 | status = ocrdma_put_pd_num(dev, pd->id, pd->dpp_enabled); | |
476 | else | |
477 | status = ocrdma_mbx_dealloc_pd(dev, pd); | |
478 | ||
cffce990 NG |
479 | kfree(pd); |
480 | return status; | |
481 | } | |
482 | ||
483 | static int ocrdma_alloc_ucontext_pd(struct ocrdma_dev *dev, | |
484 | struct ocrdma_ucontext *uctx, | |
485 | struct ib_udata *udata) | |
486 | { | |
487 | int status = 0; | |
488 | ||
489 | uctx->cntxt_pd = _ocrdma_alloc_pd(dev, uctx, udata); | |
490 | if (IS_ERR(uctx->cntxt_pd)) { | |
491 | status = PTR_ERR(uctx->cntxt_pd); | |
492 | uctx->cntxt_pd = NULL; | |
493 | goto err; | |
494 | } | |
495 | ||
496 | uctx->cntxt_pd->uctx = uctx; | |
497 | uctx->cntxt_pd->ibpd.device = &dev->ibdev; | |
498 | err: | |
499 | return status; | |
500 | } | |
501 | ||
502 | static int ocrdma_dealloc_ucontext_pd(struct ocrdma_ucontext *uctx) | |
503 | { | |
cffce990 NG |
504 | struct ocrdma_pd *pd = uctx->cntxt_pd; |
505 | struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device); | |
506 | ||
6dab0264 MA |
507 | if (uctx->pd_in_use) { |
508 | pr_err("%s(%d) Freeing in use pdid=0x%x.\n", | |
509 | __func__, dev->id, pd->id); | |
510 | } | |
cffce990 | 511 | uctx->cntxt_pd = NULL; |
4b8180aa MA |
512 | (void)_ocrdma_dealloc_pd(dev, pd); |
513 | return 0; | |
cffce990 NG |
514 | } |
515 | ||
516 | static struct ocrdma_pd *ocrdma_get_ucontext_pd(struct ocrdma_ucontext *uctx) | |
517 | { | |
518 | struct ocrdma_pd *pd = NULL; | |
519 | ||
520 | mutex_lock(&uctx->mm_list_lock); | |
521 | if (!uctx->pd_in_use) { | |
522 | uctx->pd_in_use = true; | |
523 | pd = uctx->cntxt_pd; | |
524 | } | |
525 | mutex_unlock(&uctx->mm_list_lock); | |
526 | ||
527 | return pd; | |
528 | } | |
529 | ||
530 | static void ocrdma_release_ucontext_pd(struct ocrdma_ucontext *uctx) | |
531 | { | |
532 | mutex_lock(&uctx->mm_list_lock); | |
533 | uctx->pd_in_use = false; | |
534 | mutex_unlock(&uctx->mm_list_lock); | |
535 | } | |
536 | ||
fe2caefc PP |
537 | struct ib_ucontext *ocrdma_alloc_ucontext(struct ib_device *ibdev, |
538 | struct ib_udata *udata) | |
539 | { | |
540 | int status; | |
541 | struct ocrdma_ucontext *ctx; | |
542 | struct ocrdma_alloc_ucontext_resp resp; | |
543 | struct ocrdma_dev *dev = get_ocrdma_dev(ibdev); | |
544 | struct pci_dev *pdev = dev->nic_info.pdev; | |
545 | u32 map_len = roundup(sizeof(u32) * 2048, PAGE_SIZE); | |
546 | ||
547 | if (!udata) | |
548 | return ERR_PTR(-EFAULT); | |
549 | ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); | |
550 | if (!ctx) | |
551 | return ERR_PTR(-ENOMEM); | |
fe2caefc PP |
552 | INIT_LIST_HEAD(&ctx->mm_head); |
553 | mutex_init(&ctx->mm_list_lock); | |
554 | ||
555 | ctx->ah_tbl.va = dma_alloc_coherent(&pdev->dev, map_len, | |
556 | &ctx->ah_tbl.pa, GFP_KERNEL); | |
557 | if (!ctx->ah_tbl.va) { | |
558 | kfree(ctx); | |
559 | return ERR_PTR(-ENOMEM); | |
560 | } | |
561 | memset(ctx->ah_tbl.va, 0, map_len); | |
562 | ctx->ah_tbl.len = map_len; | |
563 | ||
63ea3749 | 564 | memset(&resp, 0, sizeof(resp)); |
fe2caefc | 565 | resp.ah_tbl_len = ctx->ah_tbl.len; |
1b76d383 | 566 | resp.ah_tbl_page = virt_to_phys(ctx->ah_tbl.va); |
fe2caefc PP |
567 | |
568 | status = ocrdma_add_mmap(ctx, resp.ah_tbl_page, resp.ah_tbl_len); | |
569 | if (status) | |
570 | goto map_err; | |
cffce990 NG |
571 | |
572 | status = ocrdma_alloc_ucontext_pd(dev, ctx, udata); | |
573 | if (status) | |
574 | goto pd_err; | |
575 | ||
fe2caefc PP |
576 | resp.dev_id = dev->id; |
577 | resp.max_inline_data = dev->attr.max_inline_data; | |
578 | resp.wqe_size = dev->attr.wqe_size; | |
579 | resp.rqe_size = dev->attr.rqe_size; | |
580 | resp.dpp_wqe_size = dev->attr.wqe_size; | |
fe2caefc PP |
581 | |
582 | memcpy(resp.fw_ver, dev->attr.fw_ver, sizeof(resp.fw_ver)); | |
583 | status = ib_copy_to_udata(udata, &resp, sizeof(resp)); | |
584 | if (status) | |
585 | goto cpy_err; | |
586 | return &ctx->ibucontext; | |
587 | ||
588 | cpy_err: | |
cffce990 | 589 | pd_err: |
fe2caefc PP |
590 | ocrdma_del_mmap(ctx, ctx->ah_tbl.pa, ctx->ah_tbl.len); |
591 | map_err: | |
592 | dma_free_coherent(&pdev->dev, ctx->ah_tbl.len, ctx->ah_tbl.va, | |
593 | ctx->ah_tbl.pa); | |
594 | kfree(ctx); | |
595 | return ERR_PTR(status); | |
596 | } | |
597 | ||
598 | int ocrdma_dealloc_ucontext(struct ib_ucontext *ibctx) | |
599 | { | |
0ca4c39f | 600 | int status; |
fe2caefc PP |
601 | struct ocrdma_mm *mm, *tmp; |
602 | struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ibctx); | |
1afc0454 NG |
603 | struct ocrdma_dev *dev = get_ocrdma_dev(ibctx->device); |
604 | struct pci_dev *pdev = dev->nic_info.pdev; | |
fe2caefc | 605 | |
cffce990 NG |
606 | status = ocrdma_dealloc_ucontext_pd(uctx); |
607 | ||
fe2caefc PP |
608 | ocrdma_del_mmap(uctx, uctx->ah_tbl.pa, uctx->ah_tbl.len); |
609 | dma_free_coherent(&pdev->dev, uctx->ah_tbl.len, uctx->ah_tbl.va, | |
610 | uctx->ah_tbl.pa); | |
611 | ||
612 | list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) { | |
613 | list_del(&mm->entry); | |
614 | kfree(mm); | |
615 | } | |
616 | kfree(uctx); | |
cffce990 | 617 | return status; |
fe2caefc PP |
618 | } |
619 | ||
620 | int ocrdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma) | |
621 | { | |
622 | struct ocrdma_ucontext *ucontext = get_ocrdma_ucontext(context); | |
1afc0454 | 623 | struct ocrdma_dev *dev = get_ocrdma_dev(context->device); |
fe2caefc PP |
624 | unsigned long vm_page = vma->vm_pgoff << PAGE_SHIFT; |
625 | u64 unmapped_db = (u64) dev->nic_info.unmapped_db; | |
626 | unsigned long len = (vma->vm_end - vma->vm_start); | |
0ca4c39f | 627 | int status; |
fe2caefc PP |
628 | bool found; |
629 | ||
630 | if (vma->vm_start & (PAGE_SIZE - 1)) | |
631 | return -EINVAL; | |
632 | found = ocrdma_search_mmap(ucontext, vma->vm_pgoff << PAGE_SHIFT, len); | |
633 | if (!found) | |
634 | return -EINVAL; | |
635 | ||
636 | if ((vm_page >= unmapped_db) && (vm_page <= (unmapped_db + | |
637 | dev->nic_info.db_total_size)) && | |
638 | (len <= dev->nic_info.db_page_size)) { | |
43a6b402 NG |
639 | if (vma->vm_flags & VM_READ) |
640 | return -EPERM; | |
641 | ||
642 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); | |
fe2caefc PP |
643 | status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff, |
644 | len, vma->vm_page_prot); | |
645 | } else if (dev->nic_info.dpp_unmapped_len && | |
646 | (vm_page >= (u64) dev->nic_info.dpp_unmapped_addr) && | |
647 | (vm_page <= (u64) (dev->nic_info.dpp_unmapped_addr + | |
648 | dev->nic_info.dpp_unmapped_len)) && | |
649 | (len <= dev->nic_info.dpp_unmapped_len)) { | |
43a6b402 NG |
650 | if (vma->vm_flags & VM_READ) |
651 | return -EPERM; | |
652 | ||
fe2caefc PP |
653 | vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); |
654 | status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff, | |
655 | len, vma->vm_page_prot); | |
656 | } else { | |
fe2caefc PP |
657 | status = remap_pfn_range(vma, vma->vm_start, |
658 | vma->vm_pgoff, len, vma->vm_page_prot); | |
659 | } | |
660 | return status; | |
661 | } | |
662 | ||
45e86b33 | 663 | static int ocrdma_copy_pd_uresp(struct ocrdma_dev *dev, struct ocrdma_pd *pd, |
fe2caefc PP |
664 | struct ib_ucontext *ib_ctx, |
665 | struct ib_udata *udata) | |
666 | { | |
667 | int status; | |
668 | u64 db_page_addr; | |
da496438 | 669 | u64 dpp_page_addr = 0; |
fe2caefc PP |
670 | u32 db_page_size; |
671 | struct ocrdma_alloc_pd_uresp rsp; | |
672 | struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ib_ctx); | |
673 | ||
63ea3749 | 674 | memset(&rsp, 0, sizeof(rsp)); |
fe2caefc PP |
675 | rsp.id = pd->id; |
676 | rsp.dpp_enabled = pd->dpp_enabled; | |
cffce990 | 677 | db_page_addr = ocrdma_get_db_addr(dev, pd->id); |
f99b1649 | 678 | db_page_size = dev->nic_info.db_page_size; |
fe2caefc PP |
679 | |
680 | status = ocrdma_add_mmap(uctx, db_page_addr, db_page_size); | |
681 | if (status) | |
682 | return status; | |
683 | ||
684 | if (pd->dpp_enabled) { | |
f99b1649 | 685 | dpp_page_addr = dev->nic_info.dpp_unmapped_addr + |
43a6b402 | 686 | (pd->id * PAGE_SIZE); |
fe2caefc | 687 | status = ocrdma_add_mmap(uctx, dpp_page_addr, |
43a6b402 | 688 | PAGE_SIZE); |
fe2caefc PP |
689 | if (status) |
690 | goto dpp_map_err; | |
691 | rsp.dpp_page_addr_hi = upper_32_bits(dpp_page_addr); | |
692 | rsp.dpp_page_addr_lo = dpp_page_addr; | |
693 | } | |
694 | ||
695 | status = ib_copy_to_udata(udata, &rsp, sizeof(rsp)); | |
696 | if (status) | |
697 | goto ucopy_err; | |
698 | ||
699 | pd->uctx = uctx; | |
700 | return 0; | |
701 | ||
702 | ucopy_err: | |
da496438 | 703 | if (pd->dpp_enabled) |
43a6b402 | 704 | ocrdma_del_mmap(pd->uctx, dpp_page_addr, PAGE_SIZE); |
fe2caefc PP |
705 | dpp_map_err: |
706 | ocrdma_del_mmap(pd->uctx, db_page_addr, db_page_size); | |
707 | return status; | |
708 | } | |
709 | ||
710 | struct ib_pd *ocrdma_alloc_pd(struct ib_device *ibdev, | |
711 | struct ib_ucontext *context, | |
712 | struct ib_udata *udata) | |
713 | { | |
714 | struct ocrdma_dev *dev = get_ocrdma_dev(ibdev); | |
715 | struct ocrdma_pd *pd; | |
cffce990 | 716 | struct ocrdma_ucontext *uctx = NULL; |
fe2caefc | 717 | int status; |
cffce990 | 718 | u8 is_uctx_pd = false; |
fe2caefc | 719 | |
fe2caefc | 720 | if (udata && context) { |
cffce990 NG |
721 | uctx = get_ocrdma_ucontext(context); |
722 | pd = ocrdma_get_ucontext_pd(uctx); | |
723 | if (pd) { | |
724 | is_uctx_pd = true; | |
725 | goto pd_mapping; | |
43a6b402 | 726 | } |
fe2caefc | 727 | } |
fe2caefc | 728 | |
cffce990 NG |
729 | pd = _ocrdma_alloc_pd(dev, uctx, udata); |
730 | if (IS_ERR(pd)) { | |
731 | status = PTR_ERR(pd); | |
732 | goto exit; | |
733 | } | |
734 | ||
735 | pd_mapping: | |
fe2caefc | 736 | if (udata && context) { |
45e86b33 | 737 | status = ocrdma_copy_pd_uresp(dev, pd, context, udata); |
fe2caefc PP |
738 | if (status) |
739 | goto err; | |
740 | } | |
741 | return &pd->ibpd; | |
742 | ||
743 | err: | |
cffce990 NG |
744 | if (is_uctx_pd) { |
745 | ocrdma_release_ucontext_pd(uctx); | |
746 | } else { | |
dd75cfa6 DC |
747 | if (_ocrdma_dealloc_pd(dev, pd)) |
748 | pr_err("%s: _ocrdma_dealloc_pd() failed\n", __func__); | |
cffce990 NG |
749 | } |
750 | exit: | |
fe2caefc PP |
751 | return ERR_PTR(status); |
752 | } | |
753 | ||
754 | int ocrdma_dealloc_pd(struct ib_pd *ibpd) | |
755 | { | |
756 | struct ocrdma_pd *pd = get_ocrdma_pd(ibpd); | |
f99b1649 | 757 | struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device); |
cffce990 NG |
758 | struct ocrdma_ucontext *uctx = NULL; |
759 | int status = 0; | |
fe2caefc PP |
760 | u64 usr_db; |
761 | ||
cffce990 NG |
762 | uctx = pd->uctx; |
763 | if (uctx) { | |
fe2caefc | 764 | u64 dpp_db = dev->nic_info.dpp_unmapped_addr + |
cffce990 | 765 | (pd->id * PAGE_SIZE); |
fe2caefc | 766 | if (pd->dpp_enabled) |
43a6b402 | 767 | ocrdma_del_mmap(pd->uctx, dpp_db, PAGE_SIZE); |
cffce990 | 768 | usr_db = ocrdma_get_db_addr(dev, pd->id); |
fe2caefc | 769 | ocrdma_del_mmap(pd->uctx, usr_db, dev->nic_info.db_page_size); |
cffce990 NG |
770 | |
771 | if (is_ucontext_pd(uctx, pd)) { | |
772 | ocrdma_release_ucontext_pd(uctx); | |
773 | return status; | |
774 | } | |
fe2caefc | 775 | } |
cffce990 | 776 | status = _ocrdma_dealloc_pd(dev, pd); |
fe2caefc PP |
777 | return status; |
778 | } | |
779 | ||
1afc0454 NG |
780 | static int ocrdma_alloc_lkey(struct ocrdma_dev *dev, struct ocrdma_mr *mr, |
781 | u32 pdid, int acc, u32 num_pbls, u32 addr_check) | |
fe2caefc PP |
782 | { |
783 | int status; | |
fe2caefc | 784 | |
fe2caefc PP |
785 | mr->hwmr.fr_mr = 0; |
786 | mr->hwmr.local_rd = 1; | |
787 | mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0; | |
788 | mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0; | |
789 | mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0; | |
790 | mr->hwmr.mw_bind = (acc & IB_ACCESS_MW_BIND) ? 1 : 0; | |
791 | mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0; | |
792 | mr->hwmr.num_pbls = num_pbls; | |
793 | ||
f99b1649 NG |
794 | status = ocrdma_mbx_alloc_lkey(dev, &mr->hwmr, pdid, addr_check); |
795 | if (status) | |
796 | return status; | |
797 | ||
fe2caefc PP |
798 | mr->ibmr.lkey = mr->hwmr.lkey; |
799 | if (mr->hwmr.remote_wr || mr->hwmr.remote_rd) | |
800 | mr->ibmr.rkey = mr->hwmr.lkey; | |
f99b1649 | 801 | return 0; |
fe2caefc PP |
802 | } |
803 | ||
804 | struct ib_mr *ocrdma_get_dma_mr(struct ib_pd *ibpd, int acc) | |
805 | { | |
f99b1649 | 806 | int status; |
fe2caefc | 807 | struct ocrdma_mr *mr; |
f99b1649 NG |
808 | struct ocrdma_pd *pd = get_ocrdma_pd(ibpd); |
809 | struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device); | |
810 | ||
811 | if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE)) { | |
812 | pr_err("%s err, invalid access rights\n", __func__); | |
813 | return ERR_PTR(-EINVAL); | |
814 | } | |
fe2caefc | 815 | |
f99b1649 NG |
816 | mr = kzalloc(sizeof(*mr), GFP_KERNEL); |
817 | if (!mr) | |
818 | return ERR_PTR(-ENOMEM); | |
819 | ||
1afc0454 | 820 | status = ocrdma_alloc_lkey(dev, mr, pd->id, acc, 0, |
f99b1649 NG |
821 | OCRDMA_ADDR_CHECK_DISABLE); |
822 | if (status) { | |
823 | kfree(mr); | |
824 | return ERR_PTR(status); | |
825 | } | |
fe2caefc PP |
826 | |
827 | return &mr->ibmr; | |
828 | } | |
829 | ||
830 | static void ocrdma_free_mr_pbl_tbl(struct ocrdma_dev *dev, | |
831 | struct ocrdma_hw_mr *mr) | |
832 | { | |
833 | struct pci_dev *pdev = dev->nic_info.pdev; | |
834 | int i = 0; | |
835 | ||
836 | if (mr->pbl_table) { | |
837 | for (i = 0; i < mr->num_pbls; i++) { | |
838 | if (!mr->pbl_table[i].va) | |
839 | continue; | |
840 | dma_free_coherent(&pdev->dev, mr->pbl_size, | |
841 | mr->pbl_table[i].va, | |
842 | mr->pbl_table[i].pa); | |
843 | } | |
844 | kfree(mr->pbl_table); | |
845 | mr->pbl_table = NULL; | |
846 | } | |
847 | } | |
848 | ||
1afc0454 NG |
849 | static int ocrdma_get_pbl_info(struct ocrdma_dev *dev, struct ocrdma_mr *mr, |
850 | u32 num_pbes) | |
fe2caefc PP |
851 | { |
852 | u32 num_pbls = 0; | |
853 | u32 idx = 0; | |
854 | int status = 0; | |
855 | u32 pbl_size; | |
856 | ||
857 | do { | |
858 | pbl_size = OCRDMA_MIN_HPAGE_SIZE * (1 << idx); | |
859 | if (pbl_size > MAX_OCRDMA_PBL_SIZE) { | |
860 | status = -EFAULT; | |
861 | break; | |
862 | } | |
863 | num_pbls = roundup(num_pbes, (pbl_size / sizeof(u64))); | |
864 | num_pbls = num_pbls / (pbl_size / sizeof(u64)); | |
865 | idx++; | |
1afc0454 | 866 | } while (num_pbls >= dev->attr.max_num_mr_pbl); |
fe2caefc PP |
867 | |
868 | mr->hwmr.num_pbes = num_pbes; | |
869 | mr->hwmr.num_pbls = num_pbls; | |
870 | mr->hwmr.pbl_size = pbl_size; | |
871 | return status; | |
872 | } | |
873 | ||
874 | static int ocrdma_build_pbl_tbl(struct ocrdma_dev *dev, struct ocrdma_hw_mr *mr) | |
875 | { | |
876 | int status = 0; | |
877 | int i; | |
878 | u32 dma_len = mr->pbl_size; | |
879 | struct pci_dev *pdev = dev->nic_info.pdev; | |
880 | void *va; | |
881 | dma_addr_t pa; | |
882 | ||
883 | mr->pbl_table = kzalloc(sizeof(struct ocrdma_pbl) * | |
884 | mr->num_pbls, GFP_KERNEL); | |
885 | ||
886 | if (!mr->pbl_table) | |
887 | return -ENOMEM; | |
888 | ||
889 | for (i = 0; i < mr->num_pbls; i++) { | |
890 | va = dma_alloc_coherent(&pdev->dev, dma_len, &pa, GFP_KERNEL); | |
891 | if (!va) { | |
892 | ocrdma_free_mr_pbl_tbl(dev, mr); | |
893 | status = -ENOMEM; | |
894 | break; | |
895 | } | |
896 | memset(va, 0, dma_len); | |
897 | mr->pbl_table[i].va = va; | |
898 | mr->pbl_table[i].pa = pa; | |
899 | } | |
900 | return status; | |
901 | } | |
902 | ||
903 | static void build_user_pbes(struct ocrdma_dev *dev, struct ocrdma_mr *mr, | |
904 | u32 num_pbes) | |
905 | { | |
906 | struct ocrdma_pbe *pbe; | |
eeb8461e | 907 | struct scatterlist *sg; |
fe2caefc PP |
908 | struct ocrdma_pbl *pbl_tbl = mr->hwmr.pbl_table; |
909 | struct ib_umem *umem = mr->umem; | |
eeb8461e | 910 | int shift, pg_cnt, pages, pbe_cnt, entry, total_num_pbes = 0; |
fe2caefc PP |
911 | |
912 | if (!mr->hwmr.num_pbes) | |
913 | return; | |
914 | ||
915 | pbe = (struct ocrdma_pbe *)pbl_tbl->va; | |
916 | pbe_cnt = 0; | |
917 | ||
3e7e1193 | 918 | shift = umem->page_shift; |
fe2caefc | 919 | |
eeb8461e YH |
920 | for_each_sg(umem->sg_head.sgl, sg, umem->nmap, entry) { |
921 | pages = sg_dma_len(sg) >> shift; | |
922 | for (pg_cnt = 0; pg_cnt < pages; pg_cnt++) { | |
923 | /* store the page address in pbe */ | |
924 | pbe->pa_lo = | |
3e7e1193 AK |
925 | cpu_to_le32(sg_dma_address(sg) + |
926 | (pg_cnt << shift)); | |
eeb8461e | 927 | pbe->pa_hi = |
3e7e1193 AK |
928 | cpu_to_le32(upper_32_bits(sg_dma_address(sg) + |
929 | (pg_cnt << shift))); | |
eeb8461e YH |
930 | pbe_cnt += 1; |
931 | total_num_pbes += 1; | |
932 | pbe++; | |
933 | ||
934 | /* if done building pbes, issue the mbx cmd. */ | |
935 | if (total_num_pbes == num_pbes) | |
936 | return; | |
937 | ||
938 | /* if the given pbl is full storing the pbes, | |
939 | * move to next pbl. | |
940 | */ | |
941 | if (pbe_cnt == | |
942 | (mr->hwmr.pbl_size / sizeof(u64))) { | |
943 | pbl_tbl++; | |
944 | pbe = (struct ocrdma_pbe *)pbl_tbl->va; | |
945 | pbe_cnt = 0; | |
fe2caefc | 946 | } |
eeb8461e | 947 | |
fe2caefc PP |
948 | } |
949 | } | |
950 | } | |
951 | ||
952 | struct ib_mr *ocrdma_reg_user_mr(struct ib_pd *ibpd, u64 start, u64 len, | |
953 | u64 usr_addr, int acc, struct ib_udata *udata) | |
954 | { | |
955 | int status = -ENOMEM; | |
f99b1649 | 956 | struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device); |
fe2caefc PP |
957 | struct ocrdma_mr *mr; |
958 | struct ocrdma_pd *pd; | |
fe2caefc PP |
959 | u32 num_pbes; |
960 | ||
961 | pd = get_ocrdma_pd(ibpd); | |
fe2caefc PP |
962 | |
963 | if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE)) | |
964 | return ERR_PTR(-EINVAL); | |
965 | ||
966 | mr = kzalloc(sizeof(*mr), GFP_KERNEL); | |
967 | if (!mr) | |
968 | return ERR_PTR(status); | |
fe2caefc PP |
969 | mr->umem = ib_umem_get(ibpd->uobject->context, start, len, acc, 0); |
970 | if (IS_ERR(mr->umem)) { | |
971 | status = -EFAULT; | |
972 | goto umem_err; | |
973 | } | |
974 | num_pbes = ib_umem_page_count(mr->umem); | |
1afc0454 | 975 | status = ocrdma_get_pbl_info(dev, mr, num_pbes); |
fe2caefc PP |
976 | if (status) |
977 | goto umem_err; | |
978 | ||
3e7e1193 | 979 | mr->hwmr.pbe_size = BIT(mr->umem->page_shift); |
406f9e5f | 980 | mr->hwmr.fbo = ib_umem_offset(mr->umem); |
fe2caefc PP |
981 | mr->hwmr.va = usr_addr; |
982 | mr->hwmr.len = len; | |
983 | mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0; | |
984 | mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0; | |
985 | mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0; | |
986 | mr->hwmr.local_rd = 1; | |
987 | mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0; | |
988 | status = ocrdma_build_pbl_tbl(dev, &mr->hwmr); | |
989 | if (status) | |
990 | goto umem_err; | |
991 | build_user_pbes(dev, mr, num_pbes); | |
992 | status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, acc); | |
993 | if (status) | |
994 | goto mbx_err; | |
fe2caefc PP |
995 | mr->ibmr.lkey = mr->hwmr.lkey; |
996 | if (mr->hwmr.remote_wr || mr->hwmr.remote_rd) | |
997 | mr->ibmr.rkey = mr->hwmr.lkey; | |
998 | ||
999 | return &mr->ibmr; | |
1000 | ||
1001 | mbx_err: | |
1002 | ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr); | |
1003 | umem_err: | |
1004 | kfree(mr); | |
1005 | return ERR_PTR(status); | |
1006 | } | |
1007 | ||
1008 | int ocrdma_dereg_mr(struct ib_mr *ib_mr) | |
1009 | { | |
1010 | struct ocrdma_mr *mr = get_ocrdma_mr(ib_mr); | |
1afc0454 | 1011 | struct ocrdma_dev *dev = get_ocrdma_dev(ib_mr->device); |
fe2caefc | 1012 | |
4b8180aa | 1013 | (void) ocrdma_mbx_dealloc_lkey(dev, mr->hwmr.fr_mr, mr->hwmr.lkey); |
fe2caefc | 1014 | |
2eaa1c56 | 1015 | kfree(mr->pages); |
9d1878a3 | 1016 | ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr); |
fe2caefc | 1017 | |
fe2caefc PP |
1018 | /* it could be user registered memory. */ |
1019 | if (mr->umem) | |
1020 | ib_umem_release(mr->umem); | |
1021 | kfree(mr); | |
6dab0264 MA |
1022 | |
1023 | /* Don't stop cleanup, in case FW is unresponsive */ | |
1024 | if (dev->mqe_ctx.fw_error_state) { | |
6dab0264 MA |
1025 | pr_err("%s(%d) fw not responding.\n", |
1026 | __func__, dev->id); | |
1027 | } | |
4b8180aa | 1028 | return 0; |
fe2caefc PP |
1029 | } |
1030 | ||
1afc0454 NG |
1031 | static int ocrdma_copy_cq_uresp(struct ocrdma_dev *dev, struct ocrdma_cq *cq, |
1032 | struct ib_udata *udata, | |
fe2caefc PP |
1033 | struct ib_ucontext *ib_ctx) |
1034 | { | |
1035 | int status; | |
cffce990 | 1036 | struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ib_ctx); |
fe2caefc PP |
1037 | struct ocrdma_create_cq_uresp uresp; |
1038 | ||
63ea3749 | 1039 | memset(&uresp, 0, sizeof(uresp)); |
fe2caefc | 1040 | uresp.cq_id = cq->id; |
43a6b402 | 1041 | uresp.page_size = PAGE_ALIGN(cq->len); |
fe2caefc PP |
1042 | uresp.num_pages = 1; |
1043 | uresp.max_hw_cqe = cq->max_hw_cqe; | |
1b76d383 | 1044 | uresp.page_addr[0] = virt_to_phys(cq->va); |
cffce990 | 1045 | uresp.db_page_addr = ocrdma_get_db_addr(dev, uctx->cntxt_pd->id); |
1afc0454 | 1046 | uresp.db_page_size = dev->nic_info.db_page_size; |
fe2caefc PP |
1047 | uresp.phase_change = cq->phase_change ? 1 : 0; |
1048 | status = ib_copy_to_udata(udata, &uresp, sizeof(uresp)); | |
1049 | if (status) { | |
ef99c4c2 | 1050 | pr_err("%s(%d) copy error cqid=0x%x.\n", |
1afc0454 | 1051 | __func__, dev->id, cq->id); |
fe2caefc PP |
1052 | goto err; |
1053 | } | |
fe2caefc PP |
1054 | status = ocrdma_add_mmap(uctx, uresp.db_page_addr, uresp.db_page_size); |
1055 | if (status) | |
1056 | goto err; | |
1057 | status = ocrdma_add_mmap(uctx, uresp.page_addr[0], uresp.page_size); | |
1058 | if (status) { | |
1059 | ocrdma_del_mmap(uctx, uresp.db_page_addr, uresp.db_page_size); | |
1060 | goto err; | |
1061 | } | |
1062 | cq->ucontext = uctx; | |
1063 | err: | |
1064 | return status; | |
1065 | } | |
1066 | ||
bcf4c1ea MB |
1067 | struct ib_cq *ocrdma_create_cq(struct ib_device *ibdev, |
1068 | const struct ib_cq_init_attr *attr, | |
fe2caefc PP |
1069 | struct ib_ucontext *ib_ctx, |
1070 | struct ib_udata *udata) | |
1071 | { | |
bcf4c1ea | 1072 | int entries = attr->cqe; |
fe2caefc PP |
1073 | struct ocrdma_cq *cq; |
1074 | struct ocrdma_dev *dev = get_ocrdma_dev(ibdev); | |
cffce990 NG |
1075 | struct ocrdma_ucontext *uctx = NULL; |
1076 | u16 pd_id = 0; | |
fe2caefc PP |
1077 | int status; |
1078 | struct ocrdma_create_cq_ureq ureq; | |
1079 | ||
bcf4c1ea MB |
1080 | if (attr->flags) |
1081 | return ERR_PTR(-EINVAL); | |
1082 | ||
fe2caefc PP |
1083 | if (udata) { |
1084 | if (ib_copy_from_udata(&ureq, udata, sizeof(ureq))) | |
1085 | return ERR_PTR(-EFAULT); | |
1086 | } else | |
1087 | ureq.dpp_cq = 0; | |
1088 | cq = kzalloc(sizeof(*cq), GFP_KERNEL); | |
1089 | if (!cq) | |
1090 | return ERR_PTR(-ENOMEM); | |
1091 | ||
1092 | spin_lock_init(&cq->cq_lock); | |
1093 | spin_lock_init(&cq->comp_handler_lock); | |
fe2caefc PP |
1094 | INIT_LIST_HEAD(&cq->sq_head); |
1095 | INIT_LIST_HEAD(&cq->rq_head); | |
fe2caefc | 1096 | |
cffce990 NG |
1097 | if (ib_ctx) { |
1098 | uctx = get_ocrdma_ucontext(ib_ctx); | |
1099 | pd_id = uctx->cntxt_pd->id; | |
1100 | } | |
1101 | ||
1102 | status = ocrdma_mbx_create_cq(dev, cq, entries, ureq.dpp_cq, pd_id); | |
fe2caefc PP |
1103 | if (status) { |
1104 | kfree(cq); | |
1105 | return ERR_PTR(status); | |
1106 | } | |
1107 | if (ib_ctx) { | |
1afc0454 | 1108 | status = ocrdma_copy_cq_uresp(dev, cq, udata, ib_ctx); |
fe2caefc PP |
1109 | if (status) |
1110 | goto ctx_err; | |
1111 | } | |
1112 | cq->phase = OCRDMA_CQE_VALID; | |
fe2caefc | 1113 | dev->cq_tbl[cq->id] = cq; |
fe2caefc PP |
1114 | return &cq->ibcq; |
1115 | ||
1116 | ctx_err: | |
1117 | ocrdma_mbx_destroy_cq(dev, cq); | |
1118 | kfree(cq); | |
1119 | return ERR_PTR(status); | |
1120 | } | |
1121 | ||
1122 | int ocrdma_resize_cq(struct ib_cq *ibcq, int new_cnt, | |
1123 | struct ib_udata *udata) | |
1124 | { | |
1125 | int status = 0; | |
1126 | struct ocrdma_cq *cq = get_ocrdma_cq(ibcq); | |
1127 | ||
1128 | if (new_cnt < 1 || new_cnt > cq->max_hw_cqe) { | |
1129 | status = -EINVAL; | |
1130 | return status; | |
1131 | } | |
1132 | ibcq->cqe = new_cnt; | |
1133 | return status; | |
1134 | } | |
1135 | ||
ea617626 DS |
1136 | static void ocrdma_flush_cq(struct ocrdma_cq *cq) |
1137 | { | |
1138 | int cqe_cnt; | |
1139 | int valid_count = 0; | |
1140 | unsigned long flags; | |
1141 | ||
1142 | struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device); | |
1143 | struct ocrdma_cqe *cqe = NULL; | |
1144 | ||
1145 | cqe = cq->va; | |
1146 | cqe_cnt = cq->cqe_cnt; | |
1147 | ||
1148 | /* Last irq might have scheduled a polling thread | |
1149 | * sync-up with it before hard flushing. | |
1150 | */ | |
1151 | spin_lock_irqsave(&cq->cq_lock, flags); | |
1152 | while (cqe_cnt) { | |
1153 | if (is_cqe_valid(cq, cqe)) | |
1154 | valid_count++; | |
1155 | cqe++; | |
1156 | cqe_cnt--; | |
1157 | } | |
1158 | ocrdma_ring_cq_db(dev, cq->id, false, false, valid_count); | |
1159 | spin_unlock_irqrestore(&cq->cq_lock, flags); | |
1160 | } | |
1161 | ||
fe2caefc PP |
1162 | int ocrdma_destroy_cq(struct ib_cq *ibcq) |
1163 | { | |
fe2caefc | 1164 | struct ocrdma_cq *cq = get_ocrdma_cq(ibcq); |
ea617626 | 1165 | struct ocrdma_eq *eq = NULL; |
1afc0454 | 1166 | struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device); |
cffce990 | 1167 | int pdid = 0; |
ea617626 | 1168 | u32 irq, indx; |
fe2caefc | 1169 | |
ea617626 DS |
1170 | dev->cq_tbl[cq->id] = NULL; |
1171 | indx = ocrdma_get_eq_table_index(dev, cq->eqn); | |
db287ec5 | 1172 | BUG_ON(indx == -EINVAL); |
fe2caefc | 1173 | |
ea617626 DS |
1174 | eq = &dev->eq_tbl[indx]; |
1175 | irq = ocrdma_get_irq(dev, eq); | |
1176 | synchronize_irq(irq); | |
1177 | ocrdma_flush_cq(cq); | |
fe2caefc | 1178 | |
4b8180aa | 1179 | (void)ocrdma_mbx_destroy_cq(dev, cq); |
fe2caefc | 1180 | if (cq->ucontext) { |
cffce990 | 1181 | pdid = cq->ucontext->cntxt_pd->id; |
43a6b402 NG |
1182 | ocrdma_del_mmap(cq->ucontext, (u64) cq->pa, |
1183 | PAGE_ALIGN(cq->len)); | |
cffce990 NG |
1184 | ocrdma_del_mmap(cq->ucontext, |
1185 | ocrdma_get_db_addr(dev, pdid), | |
fe2caefc PP |
1186 | dev->nic_info.db_page_size); |
1187 | } | |
fe2caefc PP |
1188 | |
1189 | kfree(cq); | |
4b8180aa | 1190 | return 0; |
fe2caefc PP |
1191 | } |
1192 | ||
1193 | static int ocrdma_add_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp) | |
1194 | { | |
1195 | int status = -EINVAL; | |
1196 | ||
1197 | if (qp->id < OCRDMA_MAX_QP && dev->qp_tbl[qp->id] == NULL) { | |
1198 | dev->qp_tbl[qp->id] = qp; | |
1199 | status = 0; | |
1200 | } | |
1201 | return status; | |
1202 | } | |
1203 | ||
1204 | static void ocrdma_del_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp) | |
1205 | { | |
1206 | dev->qp_tbl[qp->id] = NULL; | |
1207 | } | |
1208 | ||
1209 | static int ocrdma_check_qp_params(struct ib_pd *ibpd, struct ocrdma_dev *dev, | |
1210 | struct ib_qp_init_attr *attrs) | |
1211 | { | |
43a6b402 NG |
1212 | if ((attrs->qp_type != IB_QPT_GSI) && |
1213 | (attrs->qp_type != IB_QPT_RC) && | |
1214 | (attrs->qp_type != IB_QPT_UC) && | |
1215 | (attrs->qp_type != IB_QPT_UD)) { | |
ef99c4c2 NG |
1216 | pr_err("%s(%d) unsupported qp type=0x%x requested\n", |
1217 | __func__, dev->id, attrs->qp_type); | |
fe2caefc PP |
1218 | return -EINVAL; |
1219 | } | |
43a6b402 NG |
1220 | /* Skip the check for QP1 to support CM size of 128 */ |
1221 | if ((attrs->qp_type != IB_QPT_GSI) && | |
1222 | (attrs->cap.max_send_wr > dev->attr.max_wqe)) { | |
ef99c4c2 NG |
1223 | pr_err("%s(%d) unsupported send_wr=0x%x requested\n", |
1224 | __func__, dev->id, attrs->cap.max_send_wr); | |
1225 | pr_err("%s(%d) supported send_wr=0x%x\n", | |
1226 | __func__, dev->id, dev->attr.max_wqe); | |
fe2caefc PP |
1227 | return -EINVAL; |
1228 | } | |
1229 | if (!attrs->srq && (attrs->cap.max_recv_wr > dev->attr.max_rqe)) { | |
ef99c4c2 NG |
1230 | pr_err("%s(%d) unsupported recv_wr=0x%x requested\n", |
1231 | __func__, dev->id, attrs->cap.max_recv_wr); | |
1232 | pr_err("%s(%d) supported recv_wr=0x%x\n", | |
1233 | __func__, dev->id, dev->attr.max_rqe); | |
fe2caefc PP |
1234 | return -EINVAL; |
1235 | } | |
1236 | if (attrs->cap.max_inline_data > dev->attr.max_inline_data) { | |
ef99c4c2 NG |
1237 | pr_err("%s(%d) unsupported inline data size=0x%x requested\n", |
1238 | __func__, dev->id, attrs->cap.max_inline_data); | |
1239 | pr_err("%s(%d) supported inline data size=0x%x\n", | |
1240 | __func__, dev->id, dev->attr.max_inline_data); | |
fe2caefc PP |
1241 | return -EINVAL; |
1242 | } | |
1243 | if (attrs->cap.max_send_sge > dev->attr.max_send_sge) { | |
ef99c4c2 NG |
1244 | pr_err("%s(%d) unsupported send_sge=0x%x requested\n", |
1245 | __func__, dev->id, attrs->cap.max_send_sge); | |
1246 | pr_err("%s(%d) supported send_sge=0x%x\n", | |
1247 | __func__, dev->id, dev->attr.max_send_sge); | |
fe2caefc PP |
1248 | return -EINVAL; |
1249 | } | |
1250 | if (attrs->cap.max_recv_sge > dev->attr.max_recv_sge) { | |
ef99c4c2 NG |
1251 | pr_err("%s(%d) unsupported recv_sge=0x%x requested\n", |
1252 | __func__, dev->id, attrs->cap.max_recv_sge); | |
1253 | pr_err("%s(%d) supported recv_sge=0x%x\n", | |
1254 | __func__, dev->id, dev->attr.max_recv_sge); | |
fe2caefc PP |
1255 | return -EINVAL; |
1256 | } | |
1257 | /* unprivileged user space cannot create special QP */ | |
1258 | if (ibpd->uobject && attrs->qp_type == IB_QPT_GSI) { | |
ef99c4c2 | 1259 | pr_err |
fe2caefc PP |
1260 | ("%s(%d) Userspace can't create special QPs of type=0x%x\n", |
1261 | __func__, dev->id, attrs->qp_type); | |
1262 | return -EINVAL; | |
1263 | } | |
1264 | /* allow creating only one GSI type of QP */ | |
1265 | if (attrs->qp_type == IB_QPT_GSI && dev->gsi_qp_created) { | |
ef99c4c2 NG |
1266 | pr_err("%s(%d) GSI special QPs already created.\n", |
1267 | __func__, dev->id); | |
fe2caefc PP |
1268 | return -EINVAL; |
1269 | } | |
1270 | /* verify consumer QPs are not trying to use GSI QP's CQ */ | |
1271 | if ((attrs->qp_type != IB_QPT_GSI) && (dev->gsi_qp_created)) { | |
1272 | if ((dev->gsi_sqcq == get_ocrdma_cq(attrs->send_cq)) || | |
43a6b402 | 1273 | (dev->gsi_rqcq == get_ocrdma_cq(attrs->recv_cq))) { |
ef99c4c2 | 1274 | pr_err("%s(%d) Consumer QP cannot use GSI CQs.\n", |
43a6b402 | 1275 | __func__, dev->id); |
fe2caefc PP |
1276 | return -EINVAL; |
1277 | } | |
1278 | } | |
1279 | return 0; | |
1280 | } | |
1281 | ||
1282 | static int ocrdma_copy_qp_uresp(struct ocrdma_qp *qp, | |
1283 | struct ib_udata *udata, int dpp_offset, | |
1284 | int dpp_credit_lmt, int srq) | |
1285 | { | |
0ca4c39f | 1286 | int status; |
fe2caefc PP |
1287 | u64 usr_db; |
1288 | struct ocrdma_create_qp_uresp uresp; | |
fe2caefc | 1289 | struct ocrdma_pd *pd = qp->pd; |
d2b8f7b1 | 1290 | struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device); |
fe2caefc PP |
1291 | |
1292 | memset(&uresp, 0, sizeof(uresp)); | |
1293 | usr_db = dev->nic_info.unmapped_db + | |
1294 | (pd->id * dev->nic_info.db_page_size); | |
1295 | uresp.qp_id = qp->id; | |
1296 | uresp.sq_dbid = qp->sq.dbid; | |
1297 | uresp.num_sq_pages = 1; | |
43a6b402 | 1298 | uresp.sq_page_size = PAGE_ALIGN(qp->sq.len); |
1b76d383 | 1299 | uresp.sq_page_addr[0] = virt_to_phys(qp->sq.va); |
fe2caefc PP |
1300 | uresp.num_wqe_allocated = qp->sq.max_cnt; |
1301 | if (!srq) { | |
1302 | uresp.rq_dbid = qp->rq.dbid; | |
1303 | uresp.num_rq_pages = 1; | |
43a6b402 | 1304 | uresp.rq_page_size = PAGE_ALIGN(qp->rq.len); |
1b76d383 | 1305 | uresp.rq_page_addr[0] = virt_to_phys(qp->rq.va); |
fe2caefc PP |
1306 | uresp.num_rqe_allocated = qp->rq.max_cnt; |
1307 | } | |
1308 | uresp.db_page_addr = usr_db; | |
1309 | uresp.db_page_size = dev->nic_info.db_page_size; | |
2df84fa8 DS |
1310 | uresp.db_sq_offset = OCRDMA_DB_GEN2_SQ_OFFSET; |
1311 | uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET; | |
1312 | uresp.db_shift = OCRDMA_DB_RQ_SHIFT; | |
fe2caefc PP |
1313 | |
1314 | if (qp->dpp_enabled) { | |
1315 | uresp.dpp_credit = dpp_credit_lmt; | |
1316 | uresp.dpp_offset = dpp_offset; | |
1317 | } | |
1318 | status = ib_copy_to_udata(udata, &uresp, sizeof(uresp)); | |
1319 | if (status) { | |
ef99c4c2 | 1320 | pr_err("%s(%d) user copy error.\n", __func__, dev->id); |
fe2caefc PP |
1321 | goto err; |
1322 | } | |
1323 | status = ocrdma_add_mmap(pd->uctx, uresp.sq_page_addr[0], | |
1324 | uresp.sq_page_size); | |
1325 | if (status) | |
1326 | goto err; | |
1327 | ||
1328 | if (!srq) { | |
1329 | status = ocrdma_add_mmap(pd->uctx, uresp.rq_page_addr[0], | |
1330 | uresp.rq_page_size); | |
1331 | if (status) | |
1332 | goto rq_map_err; | |
1333 | } | |
1334 | return status; | |
1335 | rq_map_err: | |
1336 | ocrdma_del_mmap(pd->uctx, uresp.sq_page_addr[0], uresp.sq_page_size); | |
1337 | err: | |
1338 | return status; | |
1339 | } | |
1340 | ||
1341 | static void ocrdma_set_qp_db(struct ocrdma_dev *dev, struct ocrdma_qp *qp, | |
1342 | struct ocrdma_pd *pd) | |
1343 | { | |
21c3391a | 1344 | if (ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R) { |
fe2caefc PP |
1345 | qp->sq_db = dev->nic_info.db + |
1346 | (pd->id * dev->nic_info.db_page_size) + | |
1347 | OCRDMA_DB_GEN2_SQ_OFFSET; | |
1348 | qp->rq_db = dev->nic_info.db + | |
1349 | (pd->id * dev->nic_info.db_page_size) + | |
f11220ee | 1350 | OCRDMA_DB_GEN2_RQ_OFFSET; |
fe2caefc PP |
1351 | } else { |
1352 | qp->sq_db = dev->nic_info.db + | |
1353 | (pd->id * dev->nic_info.db_page_size) + | |
1354 | OCRDMA_DB_SQ_OFFSET; | |
1355 | qp->rq_db = dev->nic_info.db + | |
1356 | (pd->id * dev->nic_info.db_page_size) + | |
1357 | OCRDMA_DB_RQ_OFFSET; | |
1358 | } | |
1359 | } | |
1360 | ||
1361 | static int ocrdma_alloc_wr_id_tbl(struct ocrdma_qp *qp) | |
1362 | { | |
1363 | qp->wqe_wr_id_tbl = | |
1364 | kzalloc(sizeof(*(qp->wqe_wr_id_tbl)) * qp->sq.max_cnt, | |
1365 | GFP_KERNEL); | |
1366 | if (qp->wqe_wr_id_tbl == NULL) | |
1367 | return -ENOMEM; | |
1368 | qp->rqe_wr_id_tbl = | |
1369 | kzalloc(sizeof(u64) * qp->rq.max_cnt, GFP_KERNEL); | |
1370 | if (qp->rqe_wr_id_tbl == NULL) | |
1371 | return -ENOMEM; | |
1372 | ||
1373 | return 0; | |
1374 | } | |
1375 | ||
1376 | static void ocrdma_set_qp_init_params(struct ocrdma_qp *qp, | |
1377 | struct ocrdma_pd *pd, | |
1378 | struct ib_qp_init_attr *attrs) | |
1379 | { | |
1380 | qp->pd = pd; | |
1381 | spin_lock_init(&qp->q_lock); | |
1382 | INIT_LIST_HEAD(&qp->sq_entry); | |
1383 | INIT_LIST_HEAD(&qp->rq_entry); | |
1384 | ||
1385 | qp->qp_type = attrs->qp_type; | |
1386 | qp->cap_flags = OCRDMA_QP_INB_RD | OCRDMA_QP_INB_WR; | |
1387 | qp->max_inline_data = attrs->cap.max_inline_data; | |
1388 | qp->sq.max_sges = attrs->cap.max_send_sge; | |
1389 | qp->rq.max_sges = attrs->cap.max_recv_sge; | |
1390 | qp->state = OCRDMA_QPS_RST; | |
2b51a9b9 | 1391 | qp->signaled = (attrs->sq_sig_type == IB_SIGNAL_ALL_WR) ? true : false; |
fe2caefc PP |
1392 | } |
1393 | ||
fe2caefc PP |
1394 | static void ocrdma_store_gsi_qp_cq(struct ocrdma_dev *dev, |
1395 | struct ib_qp_init_attr *attrs) | |
1396 | { | |
1397 | if (attrs->qp_type == IB_QPT_GSI) { | |
1398 | dev->gsi_qp_created = 1; | |
1399 | dev->gsi_sqcq = get_ocrdma_cq(attrs->send_cq); | |
1400 | dev->gsi_rqcq = get_ocrdma_cq(attrs->recv_cq); | |
1401 | } | |
1402 | } | |
1403 | ||
1404 | struct ib_qp *ocrdma_create_qp(struct ib_pd *ibpd, | |
1405 | struct ib_qp_init_attr *attrs, | |
1406 | struct ib_udata *udata) | |
1407 | { | |
1408 | int status; | |
1409 | struct ocrdma_pd *pd = get_ocrdma_pd(ibpd); | |
1410 | struct ocrdma_qp *qp; | |
f99b1649 | 1411 | struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device); |
fe2caefc PP |
1412 | struct ocrdma_create_qp_ureq ureq; |
1413 | u16 dpp_credit_lmt, dpp_offset; | |
1414 | ||
1415 | status = ocrdma_check_qp_params(ibpd, dev, attrs); | |
1416 | if (status) | |
1417 | goto gen_err; | |
1418 | ||
1419 | memset(&ureq, 0, sizeof(ureq)); | |
1420 | if (udata) { | |
1421 | if (ib_copy_from_udata(&ureq, udata, sizeof(ureq))) | |
1422 | return ERR_PTR(-EFAULT); | |
1423 | } | |
1424 | qp = kzalloc(sizeof(*qp), GFP_KERNEL); | |
1425 | if (!qp) { | |
1426 | status = -ENOMEM; | |
1427 | goto gen_err; | |
1428 | } | |
fe2caefc | 1429 | ocrdma_set_qp_init_params(qp, pd, attrs); |
43a6b402 NG |
1430 | if (udata == NULL) |
1431 | qp->cap_flags |= (OCRDMA_QP_MW_BIND | OCRDMA_QP_LKEY0 | | |
1432 | OCRDMA_QP_FAST_REG); | |
fe2caefc PP |
1433 | |
1434 | mutex_lock(&dev->dev_lock); | |
1435 | status = ocrdma_mbx_create_qp(qp, attrs, ureq.enable_dpp_cq, | |
1436 | ureq.dpp_cq_id, | |
1437 | &dpp_offset, &dpp_credit_lmt); | |
1438 | if (status) | |
1439 | goto mbx_err; | |
1440 | ||
1441 | /* user space QP's wr_id table are managed in library */ | |
1442 | if (udata == NULL) { | |
fe2caefc PP |
1443 | status = ocrdma_alloc_wr_id_tbl(qp); |
1444 | if (status) | |
1445 | goto map_err; | |
1446 | } | |
1447 | ||
1448 | status = ocrdma_add_qpn_map(dev, qp); | |
1449 | if (status) | |
1450 | goto map_err; | |
1451 | ocrdma_set_qp_db(dev, qp, pd); | |
1452 | if (udata) { | |
1453 | status = ocrdma_copy_qp_uresp(qp, udata, dpp_offset, | |
1454 | dpp_credit_lmt, | |
1455 | (attrs->srq != NULL)); | |
1456 | if (status) | |
1457 | goto cpy_err; | |
1458 | } | |
1459 | ocrdma_store_gsi_qp_cq(dev, attrs); | |
27159f50 | 1460 | qp->ibqp.qp_num = qp->id; |
fe2caefc PP |
1461 | mutex_unlock(&dev->dev_lock); |
1462 | return &qp->ibqp; | |
1463 | ||
1464 | cpy_err: | |
1465 | ocrdma_del_qpn_map(dev, qp); | |
1466 | map_err: | |
1467 | ocrdma_mbx_destroy_qp(dev, qp); | |
1468 | mbx_err: | |
1469 | mutex_unlock(&dev->dev_lock); | |
1470 | kfree(qp->wqe_wr_id_tbl); | |
1471 | kfree(qp->rqe_wr_id_tbl); | |
1472 | kfree(qp); | |
ef99c4c2 | 1473 | pr_err("%s(%d) error=%d\n", __func__, dev->id, status); |
fe2caefc PP |
1474 | gen_err: |
1475 | return ERR_PTR(status); | |
1476 | } | |
1477 | ||
1478 | int _ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, | |
1479 | int attr_mask) | |
1480 | { | |
1481 | int status = 0; | |
1482 | struct ocrdma_qp *qp; | |
1483 | struct ocrdma_dev *dev; | |
1484 | enum ib_qp_state old_qps; | |
1485 | ||
1486 | qp = get_ocrdma_qp(ibqp); | |
d2b8f7b1 | 1487 | dev = get_ocrdma_dev(ibqp->device); |
fe2caefc | 1488 | if (attr_mask & IB_QP_STATE) |
057729cb | 1489 | status = ocrdma_qp_state_change(qp, attr->qp_state, &old_qps); |
fe2caefc PP |
1490 | /* if new and previous states are same hw doesn't need to |
1491 | * know about it. | |
1492 | */ | |
1493 | if (status < 0) | |
1494 | return status; | |
95f60bb8 | 1495 | return ocrdma_mbx_modify_qp(dev, qp, attr, attr_mask); |
fe2caefc PP |
1496 | } |
1497 | ||
1498 | int ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, | |
1499 | int attr_mask, struct ib_udata *udata) | |
1500 | { | |
1501 | unsigned long flags; | |
1502 | int status = -EINVAL; | |
1503 | struct ocrdma_qp *qp; | |
1504 | struct ocrdma_dev *dev; | |
1505 | enum ib_qp_state old_qps, new_qps; | |
1506 | ||
1507 | qp = get_ocrdma_qp(ibqp); | |
d2b8f7b1 | 1508 | dev = get_ocrdma_dev(ibqp->device); |
fe2caefc PP |
1509 | |
1510 | /* syncronize with multiple context trying to change, retrive qps */ | |
1511 | mutex_lock(&dev->dev_lock); | |
1512 | /* syncronize with wqe, rqe posting and cqe processing contexts */ | |
1513 | spin_lock_irqsave(&qp->q_lock, flags); | |
1514 | old_qps = get_ibqp_state(qp->state); | |
1515 | if (attr_mask & IB_QP_STATE) | |
1516 | new_qps = attr->qp_state; | |
1517 | else | |
1518 | new_qps = old_qps; | |
1519 | spin_unlock_irqrestore(&qp->q_lock, flags); | |
1520 | ||
dd5f03be | 1521 | if (!ib_modify_qp_is_ok(old_qps, new_qps, ibqp->qp_type, attr_mask, |
37721d85 | 1522 | IB_LINK_LAYER_ETHERNET)) { |
ef99c4c2 NG |
1523 | pr_err("%s(%d) invalid attribute mask=0x%x specified for\n" |
1524 | "qpn=0x%x of type=0x%x old_qps=0x%x, new_qps=0x%x\n", | |
1525 | __func__, dev->id, attr_mask, qp->id, ibqp->qp_type, | |
1526 | old_qps, new_qps); | |
fe2caefc PP |
1527 | goto param_err; |
1528 | } | |
1529 | ||
1530 | status = _ocrdma_modify_qp(ibqp, attr, attr_mask); | |
1531 | if (status > 0) | |
1532 | status = 0; | |
1533 | param_err: | |
1534 | mutex_unlock(&dev->dev_lock); | |
1535 | return status; | |
1536 | } | |
1537 | ||
1538 | static enum ib_mtu ocrdma_mtu_int_to_enum(u16 mtu) | |
1539 | { | |
1540 | switch (mtu) { | |
1541 | case 256: | |
1542 | return IB_MTU_256; | |
1543 | case 512: | |
1544 | return IB_MTU_512; | |
1545 | case 1024: | |
1546 | return IB_MTU_1024; | |
1547 | case 2048: | |
1548 | return IB_MTU_2048; | |
1549 | case 4096: | |
1550 | return IB_MTU_4096; | |
1551 | default: | |
1552 | return IB_MTU_1024; | |
1553 | } | |
1554 | } | |
1555 | ||
1556 | static int ocrdma_to_ib_qp_acc_flags(int qp_cap_flags) | |
1557 | { | |
1558 | int ib_qp_acc_flags = 0; | |
1559 | ||
1560 | if (qp_cap_flags & OCRDMA_QP_INB_WR) | |
1561 | ib_qp_acc_flags |= IB_ACCESS_REMOTE_WRITE; | |
1562 | if (qp_cap_flags & OCRDMA_QP_INB_RD) | |
1563 | ib_qp_acc_flags |= IB_ACCESS_LOCAL_WRITE; | |
1564 | return ib_qp_acc_flags; | |
1565 | } | |
1566 | ||
1567 | int ocrdma_query_qp(struct ib_qp *ibqp, | |
1568 | struct ib_qp_attr *qp_attr, | |
1569 | int attr_mask, struct ib_qp_init_attr *qp_init_attr) | |
1570 | { | |
1571 | int status; | |
1572 | u32 qp_state; | |
1573 | struct ocrdma_qp_params params; | |
1574 | struct ocrdma_qp *qp = get_ocrdma_qp(ibqp); | |
d2b8f7b1 | 1575 | struct ocrdma_dev *dev = get_ocrdma_dev(ibqp->device); |
fe2caefc PP |
1576 | |
1577 | memset(¶ms, 0, sizeof(params)); | |
1578 | mutex_lock(&dev->dev_lock); | |
1579 | status = ocrdma_mbx_query_qp(dev, qp, ¶ms); | |
1580 | mutex_unlock(&dev->dev_lock); | |
1581 | if (status) | |
1582 | goto mbx_err; | |
95bf0093 MA |
1583 | if (qp->qp_type == IB_QPT_UD) |
1584 | qp_attr->qkey = params.qkey; | |
fe2caefc PP |
1585 | qp_attr->path_mtu = |
1586 | ocrdma_mtu_int_to_enum(params.path_mtu_pkey_indx & | |
1587 | OCRDMA_QP_PARAMS_PATH_MTU_MASK) >> | |
1588 | OCRDMA_QP_PARAMS_PATH_MTU_SHIFT; | |
1589 | qp_attr->path_mig_state = IB_MIG_MIGRATED; | |
1590 | qp_attr->rq_psn = params.hop_lmt_rq_psn & OCRDMA_QP_PARAMS_RQ_PSN_MASK; | |
1591 | qp_attr->sq_psn = params.tclass_sq_psn & OCRDMA_QP_PARAMS_SQ_PSN_MASK; | |
1592 | qp_attr->dest_qp_num = | |
1593 | params.ack_to_rnr_rtc_dest_qpn & OCRDMA_QP_PARAMS_DEST_QPN_MASK; | |
1594 | ||
1595 | qp_attr->qp_access_flags = ocrdma_to_ib_qp_acc_flags(qp->cap_flags); | |
1596 | qp_attr->cap.max_send_wr = qp->sq.max_cnt - 1; | |
1597 | qp_attr->cap.max_recv_wr = qp->rq.max_cnt - 1; | |
1598 | qp_attr->cap.max_send_sge = qp->sq.max_sges; | |
1599 | qp_attr->cap.max_recv_sge = qp->rq.max_sges; | |
c43e9ab8 | 1600 | qp_attr->cap.max_inline_data = qp->max_inline_data; |
fe2caefc | 1601 | qp_init_attr->cap = qp_attr->cap; |
44c58487 | 1602 | qp_attr->ah_attr.type = RDMA_AH_ATTR_TYPE_ROCE; |
d8966fcd DC |
1603 | |
1604 | rdma_ah_set_grh(&qp_attr->ah_attr, NULL, | |
1605 | params.rnt_rc_sl_fl & | |
1606 | OCRDMA_QP_PARAMS_FLOW_LABEL_MASK, | |
1607 | qp->sgid_idx, | |
1608 | (params.hop_lmt_rq_psn & | |
1609 | OCRDMA_QP_PARAMS_HOP_LMT_MASK) >> | |
1610 | OCRDMA_QP_PARAMS_HOP_LMT_SHIFT, | |
1611 | (params.tclass_sq_psn & | |
1612 | OCRDMA_QP_PARAMS_TCLASS_MASK) >> | |
1613 | OCRDMA_QP_PARAMS_TCLASS_SHIFT); | |
1614 | rdma_ah_set_dgid_raw(&qp_attr->ah_attr, ¶ms.dgid[0]); | |
1615 | ||
1616 | rdma_ah_set_port_num(&qp_attr->ah_attr, 1); | |
1617 | rdma_ah_set_sl(&qp_attr->ah_attr, (params.rnt_rc_sl_fl & | |
1618 | OCRDMA_QP_PARAMS_SL_MASK) >> | |
1619 | OCRDMA_QP_PARAMS_SL_SHIFT); | |
fe2caefc PP |
1620 | qp_attr->timeout = (params.ack_to_rnr_rtc_dest_qpn & |
1621 | OCRDMA_QP_PARAMS_ACK_TIMEOUT_MASK) >> | |
1622 | OCRDMA_QP_PARAMS_ACK_TIMEOUT_SHIFT; | |
1623 | qp_attr->rnr_retry = (params.ack_to_rnr_rtc_dest_qpn & | |
1624 | OCRDMA_QP_PARAMS_RNR_RETRY_CNT_MASK) >> | |
1625 | OCRDMA_QP_PARAMS_RNR_RETRY_CNT_SHIFT; | |
1626 | qp_attr->retry_cnt = | |
1627 | (params.rnt_rc_sl_fl & OCRDMA_QP_PARAMS_RETRY_CNT_MASK) >> | |
1628 | OCRDMA_QP_PARAMS_RETRY_CNT_SHIFT; | |
1629 | qp_attr->min_rnr_timer = 0; | |
1630 | qp_attr->pkey_index = 0; | |
1631 | qp_attr->port_num = 1; | |
d8966fcd DC |
1632 | rdma_ah_set_path_bits(&qp_attr->ah_attr, 0); |
1633 | rdma_ah_set_static_rate(&qp_attr->ah_attr, 0); | |
fe2caefc PP |
1634 | qp_attr->alt_pkey_index = 0; |
1635 | qp_attr->alt_port_num = 0; | |
1636 | qp_attr->alt_timeout = 0; | |
1637 | memset(&qp_attr->alt_ah_attr, 0, sizeof(qp_attr->alt_ah_attr)); | |
1638 | qp_state = (params.max_sge_recv_flags & OCRDMA_QP_PARAMS_STATE_MASK) >> | |
1639 | OCRDMA_QP_PARAMS_STATE_SHIFT; | |
43c706b1 PR |
1640 | qp_attr->qp_state = get_ibqp_state(qp_state); |
1641 | qp_attr->cur_qp_state = qp_attr->qp_state; | |
fe2caefc PP |
1642 | qp_attr->sq_draining = (qp_state == OCRDMA_QPS_SQ_DRAINING) ? 1 : 0; |
1643 | qp_attr->max_dest_rd_atomic = | |
1644 | params.max_ord_ird >> OCRDMA_QP_PARAMS_MAX_ORD_SHIFT; | |
1645 | qp_attr->max_rd_atomic = | |
1646 | params.max_ord_ird & OCRDMA_QP_PARAMS_MAX_IRD_MASK; | |
1647 | qp_attr->en_sqd_async_notify = (params.max_sge_recv_flags & | |
1648 | OCRDMA_QP_PARAMS_FLAGS_SQD_ASYNC) ? 1 : 0; | |
43c706b1 PR |
1649 | /* Sync driver QP state with FW */ |
1650 | ocrdma_qp_state_change(qp, qp_attr->qp_state, NULL); | |
fe2caefc PP |
1651 | mbx_err: |
1652 | return status; | |
1653 | } | |
1654 | ||
f3070e7e | 1655 | static void ocrdma_srq_toggle_bit(struct ocrdma_srq *srq, unsigned int idx) |
fe2caefc | 1656 | { |
f3070e7e RV |
1657 | unsigned int i = idx / 32; |
1658 | u32 mask = (1U << (idx % 32)); | |
fe2caefc | 1659 | |
ba64fdca | 1660 | srq->idx_bit_fields[i] ^= mask; |
fe2caefc PP |
1661 | } |
1662 | ||
1663 | static int ocrdma_hwq_free_cnt(struct ocrdma_qp_hwq_info *q) | |
1664 | { | |
43a6b402 | 1665 | return ((q->max_wqe_idx - q->head) + q->tail) % q->max_cnt; |
fe2caefc PP |
1666 | } |
1667 | ||
1668 | static int is_hw_sq_empty(struct ocrdma_qp *qp) | |
1669 | { | |
43a6b402 | 1670 | return (qp->sq.tail == qp->sq.head); |
fe2caefc PP |
1671 | } |
1672 | ||
1673 | static int is_hw_rq_empty(struct ocrdma_qp *qp) | |
1674 | { | |
43a6b402 | 1675 | return (qp->rq.tail == qp->rq.head); |
fe2caefc PP |
1676 | } |
1677 | ||
1678 | static void *ocrdma_hwq_head(struct ocrdma_qp_hwq_info *q) | |
1679 | { | |
1680 | return q->va + (q->head * q->entry_size); | |
1681 | } | |
1682 | ||
1683 | static void *ocrdma_hwq_head_from_idx(struct ocrdma_qp_hwq_info *q, | |
1684 | u32 idx) | |
1685 | { | |
1686 | return q->va + (idx * q->entry_size); | |
1687 | } | |
1688 | ||
1689 | static void ocrdma_hwq_inc_head(struct ocrdma_qp_hwq_info *q) | |
1690 | { | |
1691 | q->head = (q->head + 1) & q->max_wqe_idx; | |
1692 | } | |
1693 | ||
1694 | static void ocrdma_hwq_inc_tail(struct ocrdma_qp_hwq_info *q) | |
1695 | { | |
1696 | q->tail = (q->tail + 1) & q->max_wqe_idx; | |
1697 | } | |
1698 | ||
1699 | /* discard the cqe for a given QP */ | |
1700 | static void ocrdma_discard_cqes(struct ocrdma_qp *qp, struct ocrdma_cq *cq) | |
1701 | { | |
1702 | unsigned long cq_flags; | |
1703 | unsigned long flags; | |
1704 | int discard_cnt = 0; | |
1705 | u32 cur_getp, stop_getp; | |
1706 | struct ocrdma_cqe *cqe; | |
cf5788ad | 1707 | u32 qpn = 0, wqe_idx = 0; |
fe2caefc PP |
1708 | |
1709 | spin_lock_irqsave(&cq->cq_lock, cq_flags); | |
1710 | ||
1711 | /* traverse through the CQEs in the hw CQ, | |
1712 | * find the matching CQE for a given qp, | |
1713 | * mark the matching one discarded by clearing qpn. | |
1714 | * ring the doorbell in the poll_cq() as | |
1715 | * we don't complete out of order cqe. | |
1716 | */ | |
1717 | ||
1718 | cur_getp = cq->getp; | |
1719 | /* find upto when do we reap the cq. */ | |
1720 | stop_getp = cur_getp; | |
1721 | do { | |
1722 | if (is_hw_sq_empty(qp) && (!qp->srq && is_hw_rq_empty(qp))) | |
1723 | break; | |
1724 | ||
1725 | cqe = cq->va + cur_getp; | |
1726 | /* if (a) done reaping whole hw cq, or | |
1727 | * (b) qp_xq becomes empty. | |
1728 | * then exit | |
1729 | */ | |
1730 | qpn = cqe->cmn.qpn & OCRDMA_CQE_QPN_MASK; | |
1731 | /* if previously discarded cqe found, skip that too. */ | |
1732 | /* check for matching qp */ | |
1733 | if (qpn == 0 || qpn != qp->id) | |
1734 | goto skip_cqe; | |
1735 | ||
f99b1649 | 1736 | if (is_cqe_for_sq(cqe)) { |
fe2caefc | 1737 | ocrdma_hwq_inc_tail(&qp->sq); |
f99b1649 | 1738 | } else { |
fe2caefc | 1739 | if (qp->srq) { |
cf5788ad SX |
1740 | wqe_idx = (le32_to_cpu(cqe->rq.buftag_qpn) >> |
1741 | OCRDMA_CQE_BUFTAG_SHIFT) & | |
1742 | qp->srq->rq.max_wqe_idx; | |
db287ec5 | 1743 | BUG_ON(wqe_idx < 1); |
fe2caefc PP |
1744 | spin_lock_irqsave(&qp->srq->q_lock, flags); |
1745 | ocrdma_hwq_inc_tail(&qp->srq->rq); | |
cf5788ad | 1746 | ocrdma_srq_toggle_bit(qp->srq, wqe_idx - 1); |
fe2caefc PP |
1747 | spin_unlock_irqrestore(&qp->srq->q_lock, flags); |
1748 | ||
f99b1649 | 1749 | } else { |
fe2caefc | 1750 | ocrdma_hwq_inc_tail(&qp->rq); |
f99b1649 | 1751 | } |
fe2caefc | 1752 | } |
cf5788ad SX |
1753 | /* mark cqe discarded so that it is not picked up later |
1754 | * in the poll_cq(). | |
1755 | */ | |
1756 | discard_cnt += 1; | |
1757 | cqe->cmn.qpn = 0; | |
fe2caefc PP |
1758 | skip_cqe: |
1759 | cur_getp = (cur_getp + 1) % cq->max_hw_cqe; | |
1760 | } while (cur_getp != stop_getp); | |
1761 | spin_unlock_irqrestore(&cq->cq_lock, cq_flags); | |
1762 | } | |
1763 | ||
f11220ee | 1764 | void ocrdma_del_flush_qp(struct ocrdma_qp *qp) |
fe2caefc PP |
1765 | { |
1766 | int found = false; | |
1767 | unsigned long flags; | |
d2b8f7b1 | 1768 | struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device); |
fe2caefc PP |
1769 | /* sync with any active CQ poll */ |
1770 | ||
1771 | spin_lock_irqsave(&dev->flush_q_lock, flags); | |
1772 | found = ocrdma_is_qp_in_sq_flushlist(qp->sq_cq, qp); | |
1773 | if (found) | |
1774 | list_del(&qp->sq_entry); | |
1775 | if (!qp->srq) { | |
1776 | found = ocrdma_is_qp_in_rq_flushlist(qp->rq_cq, qp); | |
1777 | if (found) | |
1778 | list_del(&qp->rq_entry); | |
1779 | } | |
1780 | spin_unlock_irqrestore(&dev->flush_q_lock, flags); | |
1781 | } | |
1782 | ||
1783 | int ocrdma_destroy_qp(struct ib_qp *ibqp) | |
1784 | { | |
fe2caefc PP |
1785 | struct ocrdma_pd *pd; |
1786 | struct ocrdma_qp *qp; | |
1787 | struct ocrdma_dev *dev; | |
1788 | struct ib_qp_attr attrs; | |
fe48822b | 1789 | int attr_mask; |
d19081e0 | 1790 | unsigned long flags; |
fe2caefc PP |
1791 | |
1792 | qp = get_ocrdma_qp(ibqp); | |
d2b8f7b1 | 1793 | dev = get_ocrdma_dev(ibqp->device); |
fe2caefc | 1794 | |
fe2caefc PP |
1795 | pd = qp->pd; |
1796 | ||
1797 | /* change the QP state to ERROR */ | |
fe48822b DS |
1798 | if (qp->state != OCRDMA_QPS_RST) { |
1799 | attrs.qp_state = IB_QPS_ERR; | |
1800 | attr_mask = IB_QP_STATE; | |
1801 | _ocrdma_modify_qp(ibqp, &attrs, attr_mask); | |
1802 | } | |
fe2caefc PP |
1803 | /* ensure that CQEs for newly created QP (whose id may be same with |
1804 | * one which just getting destroyed are same), dont get | |
1805 | * discarded until the old CQEs are discarded. | |
1806 | */ | |
1807 | mutex_lock(&dev->dev_lock); | |
4b8180aa | 1808 | (void) ocrdma_mbx_destroy_qp(dev, qp); |
fe2caefc PP |
1809 | |
1810 | /* | |
1811 | * acquire CQ lock while destroy is in progress, in order to | |
1812 | * protect against proessing in-flight CQEs for this QP. | |
1813 | */ | |
d19081e0 | 1814 | spin_lock_irqsave(&qp->sq_cq->cq_lock, flags); |
fe2caefc | 1815 | if (qp->rq_cq && (qp->rq_cq != qp->sq_cq)) |
d19081e0 | 1816 | spin_lock(&qp->rq_cq->cq_lock); |
fe2caefc PP |
1817 | |
1818 | ocrdma_del_qpn_map(dev, qp); | |
1819 | ||
1820 | if (qp->rq_cq && (qp->rq_cq != qp->sq_cq)) | |
d19081e0 DC |
1821 | spin_unlock(&qp->rq_cq->cq_lock); |
1822 | spin_unlock_irqrestore(&qp->sq_cq->cq_lock, flags); | |
fe2caefc PP |
1823 | |
1824 | if (!pd->uctx) { | |
1825 | ocrdma_discard_cqes(qp, qp->sq_cq); | |
1826 | ocrdma_discard_cqes(qp, qp->rq_cq); | |
1827 | } | |
1828 | mutex_unlock(&dev->dev_lock); | |
1829 | ||
1830 | if (pd->uctx) { | |
43a6b402 NG |
1831 | ocrdma_del_mmap(pd->uctx, (u64) qp->sq.pa, |
1832 | PAGE_ALIGN(qp->sq.len)); | |
fe2caefc | 1833 | if (!qp->srq) |
43a6b402 NG |
1834 | ocrdma_del_mmap(pd->uctx, (u64) qp->rq.pa, |
1835 | PAGE_ALIGN(qp->rq.len)); | |
fe2caefc PP |
1836 | } |
1837 | ||
1838 | ocrdma_del_flush_qp(qp); | |
1839 | ||
fe2caefc PP |
1840 | kfree(qp->wqe_wr_id_tbl); |
1841 | kfree(qp->rqe_wr_id_tbl); | |
1842 | kfree(qp); | |
4b8180aa | 1843 | return 0; |
fe2caefc PP |
1844 | } |
1845 | ||
1afc0454 NG |
1846 | static int ocrdma_copy_srq_uresp(struct ocrdma_dev *dev, struct ocrdma_srq *srq, |
1847 | struct ib_udata *udata) | |
fe2caefc PP |
1848 | { |
1849 | int status; | |
1850 | struct ocrdma_create_srq_uresp uresp; | |
1851 | ||
63ea3749 | 1852 | memset(&uresp, 0, sizeof(uresp)); |
fe2caefc PP |
1853 | uresp.rq_dbid = srq->rq.dbid; |
1854 | uresp.num_rq_pages = 1; | |
1b76d383 | 1855 | uresp.rq_page_addr[0] = virt_to_phys(srq->rq.va); |
fe2caefc | 1856 | uresp.rq_page_size = srq->rq.len; |
1afc0454 NG |
1857 | uresp.db_page_addr = dev->nic_info.unmapped_db + |
1858 | (srq->pd->id * dev->nic_info.db_page_size); | |
1859 | uresp.db_page_size = dev->nic_info.db_page_size; | |
fe2caefc | 1860 | uresp.num_rqe_allocated = srq->rq.max_cnt; |
21c3391a | 1861 | if (ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R) { |
f11220ee | 1862 | uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET; |
fe2caefc PP |
1863 | uresp.db_shift = 24; |
1864 | } else { | |
1865 | uresp.db_rq_offset = OCRDMA_DB_RQ_OFFSET; | |
1866 | uresp.db_shift = 16; | |
1867 | } | |
1868 | ||
1869 | status = ib_copy_to_udata(udata, &uresp, sizeof(uresp)); | |
1870 | if (status) | |
1871 | return status; | |
1872 | status = ocrdma_add_mmap(srq->pd->uctx, uresp.rq_page_addr[0], | |
1873 | uresp.rq_page_size); | |
1874 | if (status) | |
1875 | return status; | |
1876 | return status; | |
1877 | } | |
1878 | ||
1879 | struct ib_srq *ocrdma_create_srq(struct ib_pd *ibpd, | |
1880 | struct ib_srq_init_attr *init_attr, | |
1881 | struct ib_udata *udata) | |
1882 | { | |
1883 | int status = -ENOMEM; | |
1884 | struct ocrdma_pd *pd = get_ocrdma_pd(ibpd); | |
f99b1649 | 1885 | struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device); |
fe2caefc PP |
1886 | struct ocrdma_srq *srq; |
1887 | ||
1888 | if (init_attr->attr.max_sge > dev->attr.max_recv_sge) | |
1889 | return ERR_PTR(-EINVAL); | |
1890 | if (init_attr->attr.max_wr > dev->attr.max_rqe) | |
1891 | return ERR_PTR(-EINVAL); | |
1892 | ||
1893 | srq = kzalloc(sizeof(*srq), GFP_KERNEL); | |
1894 | if (!srq) | |
1895 | return ERR_PTR(status); | |
1896 | ||
1897 | spin_lock_init(&srq->q_lock); | |
fe2caefc PP |
1898 | srq->pd = pd; |
1899 | srq->db = dev->nic_info.db + (pd->id * dev->nic_info.db_page_size); | |
1afc0454 | 1900 | status = ocrdma_mbx_create_srq(dev, srq, init_attr, pd); |
fe2caefc PP |
1901 | if (status) |
1902 | goto err; | |
1903 | ||
1904 | if (udata == NULL) { | |
f0c6e882 | 1905 | status = -ENOMEM; |
fe2caefc PP |
1906 | srq->rqe_wr_id_tbl = kzalloc(sizeof(u64) * srq->rq.max_cnt, |
1907 | GFP_KERNEL); | |
1908 | if (srq->rqe_wr_id_tbl == NULL) | |
1909 | goto arm_err; | |
1910 | ||
1911 | srq->bit_fields_len = (srq->rq.max_cnt / 32) + | |
1912 | (srq->rq.max_cnt % 32 ? 1 : 0); | |
1913 | srq->idx_bit_fields = | |
1914 | kmalloc(srq->bit_fields_len * sizeof(u32), GFP_KERNEL); | |
1915 | if (srq->idx_bit_fields == NULL) | |
1916 | goto arm_err; | |
1917 | memset(srq->idx_bit_fields, 0xff, | |
1918 | srq->bit_fields_len * sizeof(u32)); | |
1919 | } | |
1920 | ||
1921 | if (init_attr->attr.srq_limit) { | |
1922 | status = ocrdma_mbx_modify_srq(srq, &init_attr->attr); | |
1923 | if (status) | |
1924 | goto arm_err; | |
1925 | } | |
1926 | ||
fe2caefc | 1927 | if (udata) { |
1afc0454 | 1928 | status = ocrdma_copy_srq_uresp(dev, srq, udata); |
fe2caefc PP |
1929 | if (status) |
1930 | goto arm_err; | |
1931 | } | |
1932 | ||
fe2caefc PP |
1933 | return &srq->ibsrq; |
1934 | ||
1935 | arm_err: | |
1936 | ocrdma_mbx_destroy_srq(dev, srq); | |
1937 | err: | |
1938 | kfree(srq->rqe_wr_id_tbl); | |
1939 | kfree(srq->idx_bit_fields); | |
1940 | kfree(srq); | |
1941 | return ERR_PTR(status); | |
1942 | } | |
1943 | ||
1944 | int ocrdma_modify_srq(struct ib_srq *ibsrq, | |
1945 | struct ib_srq_attr *srq_attr, | |
1946 | enum ib_srq_attr_mask srq_attr_mask, | |
1947 | struct ib_udata *udata) | |
1948 | { | |
0ca4c39f | 1949 | int status; |
fe2caefc | 1950 | struct ocrdma_srq *srq; |
fe2caefc PP |
1951 | |
1952 | srq = get_ocrdma_srq(ibsrq); | |
fe2caefc PP |
1953 | if (srq_attr_mask & IB_SRQ_MAX_WR) |
1954 | status = -EINVAL; | |
1955 | else | |
1956 | status = ocrdma_mbx_modify_srq(srq, srq_attr); | |
1957 | return status; | |
1958 | } | |
1959 | ||
1960 | int ocrdma_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *srq_attr) | |
1961 | { | |
1962 | int status; | |
1963 | struct ocrdma_srq *srq; | |
fe2caefc PP |
1964 | |
1965 | srq = get_ocrdma_srq(ibsrq); | |
fe2caefc PP |
1966 | status = ocrdma_mbx_query_srq(srq, srq_attr); |
1967 | return status; | |
1968 | } | |
1969 | ||
1970 | int ocrdma_destroy_srq(struct ib_srq *ibsrq) | |
1971 | { | |
1972 | int status; | |
1973 | struct ocrdma_srq *srq; | |
1afc0454 | 1974 | struct ocrdma_dev *dev = get_ocrdma_dev(ibsrq->device); |
fe2caefc PP |
1975 | |
1976 | srq = get_ocrdma_srq(ibsrq); | |
fe2caefc PP |
1977 | |
1978 | status = ocrdma_mbx_destroy_srq(dev, srq); | |
1979 | ||
1980 | if (srq->pd->uctx) | |
43a6b402 NG |
1981 | ocrdma_del_mmap(srq->pd->uctx, (u64) srq->rq.pa, |
1982 | PAGE_ALIGN(srq->rq.len)); | |
fe2caefc | 1983 | |
fe2caefc PP |
1984 | kfree(srq->idx_bit_fields); |
1985 | kfree(srq->rqe_wr_id_tbl); | |
1986 | kfree(srq); | |
1987 | return status; | |
1988 | } | |
1989 | ||
1990 | /* unprivileged verbs and their support functions. */ | |
1991 | static void ocrdma_build_ud_hdr(struct ocrdma_qp *qp, | |
1992 | struct ocrdma_hdr_wqe *hdr, | |
1993 | struct ib_send_wr *wr) | |
1994 | { | |
1995 | struct ocrdma_ewqe_ud_hdr *ud_hdr = | |
1996 | (struct ocrdma_ewqe_ud_hdr *)(hdr + 1); | |
e622f2f4 | 1997 | struct ocrdma_ah *ah = get_ocrdma_ah(ud_wr(wr)->ah); |
fe2caefc | 1998 | |
e622f2f4 | 1999 | ud_hdr->rsvd_dest_qpn = ud_wr(wr)->remote_qpn; |
fe2caefc PP |
2000 | if (qp->qp_type == IB_QPT_GSI) |
2001 | ud_hdr->qkey = qp->qkey; | |
2002 | else | |
e622f2f4 | 2003 | ud_hdr->qkey = ud_wr(wr)->remote_qkey; |
fe2caefc | 2004 | ud_hdr->rsvd_ahid = ah->id; |
6b062667 | 2005 | ud_hdr->hdr_type = ah->hdr_type; |
29565f2f DS |
2006 | if (ah->av->valid & OCRDMA_AV_VLAN_VALID) |
2007 | hdr->cw |= (OCRDMA_FLAG_AH_VLAN_PR << OCRDMA_WQE_FLAGS_SHIFT); | |
fe2caefc PP |
2008 | } |
2009 | ||
2010 | static void ocrdma_build_sges(struct ocrdma_hdr_wqe *hdr, | |
2011 | struct ocrdma_sge *sge, int num_sge, | |
2012 | struct ib_sge *sg_list) | |
2013 | { | |
2014 | int i; | |
2015 | ||
2016 | for (i = 0; i < num_sge; i++) { | |
2017 | sge[i].lrkey = sg_list[i].lkey; | |
2018 | sge[i].addr_lo = sg_list[i].addr; | |
2019 | sge[i].addr_hi = upper_32_bits(sg_list[i].addr); | |
2020 | sge[i].len = sg_list[i].length; | |
2021 | hdr->total_len += sg_list[i].length; | |
2022 | } | |
2023 | if (num_sge == 0) | |
2024 | memset(sge, 0, sizeof(*sge)); | |
2025 | } | |
2026 | ||
117e6dd1 NG |
2027 | static inline uint32_t ocrdma_sglist_len(struct ib_sge *sg_list, int num_sge) |
2028 | { | |
2029 | uint32_t total_len = 0, i; | |
2030 | ||
2031 | for (i = 0; i < num_sge; i++) | |
2032 | total_len += sg_list[i].length; | |
2033 | return total_len; | |
2034 | } | |
2035 | ||
2036 | ||
fe2caefc PP |
2037 | static int ocrdma_build_inline_sges(struct ocrdma_qp *qp, |
2038 | struct ocrdma_hdr_wqe *hdr, | |
2039 | struct ocrdma_sge *sge, | |
2040 | struct ib_send_wr *wr, u32 wqe_size) | |
2041 | { | |
117e6dd1 NG |
2042 | int i; |
2043 | char *dpp_addr; | |
2044 | ||
43a6b402 | 2045 | if (wr->send_flags & IB_SEND_INLINE && qp->qp_type != IB_QPT_UD) { |
117e6dd1 NG |
2046 | hdr->total_len = ocrdma_sglist_len(wr->sg_list, wr->num_sge); |
2047 | if (unlikely(hdr->total_len > qp->max_inline_data)) { | |
ef99c4c2 | 2048 | pr_err("%s() supported_len=0x%x,\n" |
1a84db56 | 2049 | " unsupported len req=0x%x\n", __func__, |
117e6dd1 | 2050 | qp->max_inline_data, hdr->total_len); |
fe2caefc PP |
2051 | return -EINVAL; |
2052 | } | |
117e6dd1 NG |
2053 | dpp_addr = (char *)sge; |
2054 | for (i = 0; i < wr->num_sge; i++) { | |
2055 | memcpy(dpp_addr, | |
2056 | (void *)(unsigned long)wr->sg_list[i].addr, | |
2057 | wr->sg_list[i].length); | |
2058 | dpp_addr += wr->sg_list[i].length; | |
2059 | } | |
2060 | ||
fe2caefc | 2061 | wqe_size += roundup(hdr->total_len, OCRDMA_WQE_ALIGN_BYTES); |
117e6dd1 | 2062 | if (0 == hdr->total_len) |
43a6b402 | 2063 | wqe_size += sizeof(struct ocrdma_sge); |
fe2caefc PP |
2064 | hdr->cw |= (OCRDMA_TYPE_INLINE << OCRDMA_WQE_TYPE_SHIFT); |
2065 | } else { | |
2066 | ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list); | |
2067 | if (wr->num_sge) | |
2068 | wqe_size += (wr->num_sge * sizeof(struct ocrdma_sge)); | |
2069 | else | |
2070 | wqe_size += sizeof(struct ocrdma_sge); | |
2071 | hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT); | |
2072 | } | |
2073 | hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT); | |
2074 | return 0; | |
2075 | } | |
2076 | ||
2077 | static int ocrdma_build_send(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr, | |
2078 | struct ib_send_wr *wr) | |
2079 | { | |
2080 | int status; | |
2081 | struct ocrdma_sge *sge; | |
2082 | u32 wqe_size = sizeof(*hdr); | |
2083 | ||
2084 | if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) { | |
2085 | ocrdma_build_ud_hdr(qp, hdr, wr); | |
2086 | sge = (struct ocrdma_sge *)(hdr + 2); | |
2087 | wqe_size += sizeof(struct ocrdma_ewqe_ud_hdr); | |
f99b1649 | 2088 | } else { |
fe2caefc | 2089 | sge = (struct ocrdma_sge *)(hdr + 1); |
f99b1649 | 2090 | } |
fe2caefc PP |
2091 | |
2092 | status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size); | |
2093 | return status; | |
2094 | } | |
2095 | ||
2096 | static int ocrdma_build_write(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr, | |
2097 | struct ib_send_wr *wr) | |
2098 | { | |
2099 | int status; | |
2100 | struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1); | |
2101 | struct ocrdma_sge *sge = ext_rw + 1; | |
2102 | u32 wqe_size = sizeof(*hdr) + sizeof(*ext_rw); | |
2103 | ||
2104 | status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size); | |
2105 | if (status) | |
2106 | return status; | |
e622f2f4 CH |
2107 | ext_rw->addr_lo = rdma_wr(wr)->remote_addr; |
2108 | ext_rw->addr_hi = upper_32_bits(rdma_wr(wr)->remote_addr); | |
2109 | ext_rw->lrkey = rdma_wr(wr)->rkey; | |
fe2caefc PP |
2110 | ext_rw->len = hdr->total_len; |
2111 | return 0; | |
2112 | } | |
2113 | ||
2114 | static void ocrdma_build_read(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr, | |
2115 | struct ib_send_wr *wr) | |
2116 | { | |
2117 | struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1); | |
2118 | struct ocrdma_sge *sge = ext_rw + 1; | |
2119 | u32 wqe_size = ((wr->num_sge + 1) * sizeof(struct ocrdma_sge)) + | |
2120 | sizeof(struct ocrdma_hdr_wqe); | |
2121 | ||
2122 | ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list); | |
2123 | hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT); | |
2124 | hdr->cw |= (OCRDMA_READ << OCRDMA_WQE_OPCODE_SHIFT); | |
2125 | hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT); | |
2126 | ||
e622f2f4 CH |
2127 | ext_rw->addr_lo = rdma_wr(wr)->remote_addr; |
2128 | ext_rw->addr_hi = upper_32_bits(rdma_wr(wr)->remote_addr); | |
2129 | ext_rw->lrkey = rdma_wr(wr)->rkey; | |
fe2caefc PP |
2130 | ext_rw->len = hdr->total_len; |
2131 | } | |
2132 | ||
7c33880c NG |
2133 | static int get_encoded_page_size(int pg_sz) |
2134 | { | |
2135 | /* Max size is 256M 4096 << 16 */ | |
2136 | int i = 0; | |
2137 | for (; i < 17; i++) | |
2138 | if (pg_sz == (4096 << i)) | |
2139 | break; | |
2140 | return i; | |
2141 | } | |
2142 | ||
2eaa1c56 SG |
2143 | static int ocrdma_build_reg(struct ocrdma_qp *qp, |
2144 | struct ocrdma_hdr_wqe *hdr, | |
2145 | struct ib_reg_wr *wr) | |
2146 | { | |
2147 | u64 fbo; | |
2148 | struct ocrdma_ewqe_fr *fast_reg = (struct ocrdma_ewqe_fr *)(hdr + 1); | |
2149 | struct ocrdma_mr *mr = get_ocrdma_mr(wr->mr); | |
2150 | struct ocrdma_pbl *pbl_tbl = mr->hwmr.pbl_table; | |
2151 | struct ocrdma_pbe *pbe; | |
2152 | u32 wqe_size = sizeof(*fast_reg) + sizeof(*hdr); | |
2153 | int num_pbes = 0, i; | |
2154 | ||
2155 | wqe_size = roundup(wqe_size, OCRDMA_WQE_ALIGN_BYTES); | |
2156 | ||
2157 | hdr->cw |= (OCRDMA_FR_MR << OCRDMA_WQE_OPCODE_SHIFT); | |
2158 | hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT); | |
2159 | ||
2160 | if (wr->access & IB_ACCESS_LOCAL_WRITE) | |
2161 | hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_LOCAL_WR; | |
2162 | if (wr->access & IB_ACCESS_REMOTE_WRITE) | |
2163 | hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_WR; | |
2164 | if (wr->access & IB_ACCESS_REMOTE_READ) | |
2165 | hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_RD; | |
2166 | hdr->lkey = wr->key; | |
2167 | hdr->total_len = mr->ibmr.length; | |
2168 | ||
2169 | fbo = mr->ibmr.iova - mr->pages[0]; | |
2170 | ||
2171 | fast_reg->va_hi = upper_32_bits(mr->ibmr.iova); | |
2172 | fast_reg->va_lo = (u32) (mr->ibmr.iova & 0xffffffff); | |
2173 | fast_reg->fbo_hi = upper_32_bits(fbo); | |
2174 | fast_reg->fbo_lo = (u32) fbo & 0xffffffff; | |
2175 | fast_reg->num_sges = mr->npages; | |
2176 | fast_reg->size_sge = get_encoded_page_size(mr->ibmr.page_size); | |
2177 | ||
2178 | pbe = pbl_tbl->va; | |
2179 | for (i = 0; i < mr->npages; i++) { | |
2180 | u64 buf_addr = mr->pages[i]; | |
2181 | ||
2182 | pbe->pa_lo = cpu_to_le32((u32) (buf_addr & PAGE_MASK)); | |
2183 | pbe->pa_hi = cpu_to_le32((u32) upper_32_bits(buf_addr)); | |
2184 | num_pbes += 1; | |
2185 | pbe++; | |
2186 | ||
2187 | /* if the pbl is full storing the pbes, | |
2188 | * move to next pbl. | |
2189 | */ | |
2190 | if (num_pbes == (mr->hwmr.pbl_size/sizeof(u64))) { | |
2191 | pbl_tbl++; | |
2192 | pbe = (struct ocrdma_pbe *)pbl_tbl->va; | |
2193 | } | |
2194 | } | |
2195 | ||
2196 | return 0; | |
2197 | } | |
7c33880c | 2198 | |
fe2caefc PP |
2199 | static void ocrdma_ring_sq_db(struct ocrdma_qp *qp) |
2200 | { | |
2df84fa8 | 2201 | u32 val = qp->sq.dbid | (1 << OCRDMA_DB_SQ_SHIFT); |
fe2caefc PP |
2202 | |
2203 | iowrite32(val, qp->sq_db); | |
2204 | } | |
2205 | ||
2206 | int ocrdma_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, | |
2207 | struct ib_send_wr **bad_wr) | |
2208 | { | |
2209 | int status = 0; | |
2210 | struct ocrdma_qp *qp = get_ocrdma_qp(ibqp); | |
2211 | struct ocrdma_hdr_wqe *hdr; | |
2212 | unsigned long flags; | |
2213 | ||
2214 | spin_lock_irqsave(&qp->q_lock, flags); | |
2215 | if (qp->state != OCRDMA_QPS_RTS && qp->state != OCRDMA_QPS_SQD) { | |
2216 | spin_unlock_irqrestore(&qp->q_lock, flags); | |
f6ddcf71 | 2217 | *bad_wr = wr; |
fe2caefc PP |
2218 | return -EINVAL; |
2219 | } | |
2220 | ||
2221 | while (wr) { | |
f252b5dc MA |
2222 | if (qp->qp_type == IB_QPT_UD && |
2223 | (wr->opcode != IB_WR_SEND && | |
2224 | wr->opcode != IB_WR_SEND_WITH_IMM)) { | |
2225 | *bad_wr = wr; | |
2226 | status = -EINVAL; | |
2227 | break; | |
2228 | } | |
fe2caefc PP |
2229 | if (ocrdma_hwq_free_cnt(&qp->sq) == 0 || |
2230 | wr->num_sge > qp->sq.max_sges) { | |
f6ddcf71 | 2231 | *bad_wr = wr; |
fe2caefc PP |
2232 | status = -ENOMEM; |
2233 | break; | |
2234 | } | |
2235 | hdr = ocrdma_hwq_head(&qp->sq); | |
2236 | hdr->cw = 0; | |
2b51a9b9 | 2237 | if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled) |
fe2caefc PP |
2238 | hdr->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT); |
2239 | if (wr->send_flags & IB_SEND_FENCE) | |
2240 | hdr->cw |= | |
2241 | (OCRDMA_FLAG_FENCE_L << OCRDMA_WQE_FLAGS_SHIFT); | |
2242 | if (wr->send_flags & IB_SEND_SOLICITED) | |
2243 | hdr->cw |= | |
2244 | (OCRDMA_FLAG_SOLICIT << OCRDMA_WQE_FLAGS_SHIFT); | |
2245 | hdr->total_len = 0; | |
2246 | switch (wr->opcode) { | |
2247 | case IB_WR_SEND_WITH_IMM: | |
2248 | hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT); | |
2249 | hdr->immdt = ntohl(wr->ex.imm_data); | |
2250 | case IB_WR_SEND: | |
2251 | hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT); | |
2252 | ocrdma_build_send(qp, hdr, wr); | |
2253 | break; | |
2254 | case IB_WR_SEND_WITH_INV: | |
2255 | hdr->cw |= (OCRDMA_FLAG_INV << OCRDMA_WQE_FLAGS_SHIFT); | |
2256 | hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT); | |
2257 | hdr->lkey = wr->ex.invalidate_rkey; | |
2258 | status = ocrdma_build_send(qp, hdr, wr); | |
2259 | break; | |
2260 | case IB_WR_RDMA_WRITE_WITH_IMM: | |
2261 | hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT); | |
2262 | hdr->immdt = ntohl(wr->ex.imm_data); | |
2263 | case IB_WR_RDMA_WRITE: | |
2264 | hdr->cw |= (OCRDMA_WRITE << OCRDMA_WQE_OPCODE_SHIFT); | |
2265 | status = ocrdma_build_write(qp, hdr, wr); | |
2266 | break; | |
fe2caefc PP |
2267 | case IB_WR_RDMA_READ: |
2268 | ocrdma_build_read(qp, hdr, wr); | |
2269 | break; | |
2270 | case IB_WR_LOCAL_INV: | |
2271 | hdr->cw |= | |
2272 | (OCRDMA_LKEY_INV << OCRDMA_WQE_OPCODE_SHIFT); | |
7c33880c NG |
2273 | hdr->cw |= ((sizeof(struct ocrdma_hdr_wqe) + |
2274 | sizeof(struct ocrdma_sge)) / | |
fe2caefc PP |
2275 | OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT; |
2276 | hdr->lkey = wr->ex.invalidate_rkey; | |
2277 | break; | |
2eaa1c56 SG |
2278 | case IB_WR_REG_MR: |
2279 | status = ocrdma_build_reg(qp, hdr, reg_wr(wr)); | |
2280 | break; | |
fe2caefc PP |
2281 | default: |
2282 | status = -EINVAL; | |
2283 | break; | |
2284 | } | |
2285 | if (status) { | |
2286 | *bad_wr = wr; | |
2287 | break; | |
2288 | } | |
2b51a9b9 | 2289 | if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled) |
fe2caefc PP |
2290 | qp->wqe_wr_id_tbl[qp->sq.head].signaled = 1; |
2291 | else | |
2292 | qp->wqe_wr_id_tbl[qp->sq.head].signaled = 0; | |
2293 | qp->wqe_wr_id_tbl[qp->sq.head].wrid = wr->wr_id; | |
2294 | ocrdma_cpu_to_le32(hdr, ((hdr->cw >> OCRDMA_WQE_SIZE_SHIFT) & | |
2295 | OCRDMA_WQE_SIZE_MASK) * OCRDMA_WQE_STRIDE); | |
2296 | /* make sure wqe is written before adapter can access it */ | |
2297 | wmb(); | |
2298 | /* inform hw to start processing it */ | |
2299 | ocrdma_ring_sq_db(qp); | |
2300 | ||
2301 | /* update pointer, counter for next wr */ | |
2302 | ocrdma_hwq_inc_head(&qp->sq); | |
2303 | wr = wr->next; | |
2304 | } | |
2305 | spin_unlock_irqrestore(&qp->q_lock, flags); | |
2306 | return status; | |
2307 | } | |
2308 | ||
2309 | static void ocrdma_ring_rq_db(struct ocrdma_qp *qp) | |
2310 | { | |
2df84fa8 | 2311 | u32 val = qp->rq.dbid | (1 << OCRDMA_DB_RQ_SHIFT); |
fe2caefc | 2312 | |
2df84fa8 | 2313 | iowrite32(val, qp->rq_db); |
fe2caefc PP |
2314 | } |
2315 | ||
2316 | static void ocrdma_build_rqe(struct ocrdma_hdr_wqe *rqe, struct ib_recv_wr *wr, | |
2317 | u16 tag) | |
2318 | { | |
2319 | u32 wqe_size = 0; | |
2320 | struct ocrdma_sge *sge; | |
2321 | if (wr->num_sge) | |
2322 | wqe_size = (wr->num_sge * sizeof(*sge)) + sizeof(*rqe); | |
2323 | else | |
2324 | wqe_size = sizeof(*sge) + sizeof(*rqe); | |
2325 | ||
2326 | rqe->cw = ((wqe_size / OCRDMA_WQE_STRIDE) << | |
2327 | OCRDMA_WQE_SIZE_SHIFT); | |
2328 | rqe->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT); | |
2329 | rqe->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT); | |
2330 | rqe->total_len = 0; | |
2331 | rqe->rsvd_tag = tag; | |
2332 | sge = (struct ocrdma_sge *)(rqe + 1); | |
2333 | ocrdma_build_sges(rqe, sge, wr->num_sge, wr->sg_list); | |
2334 | ocrdma_cpu_to_le32(rqe, wqe_size); | |
2335 | } | |
2336 | ||
2337 | int ocrdma_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr, | |
2338 | struct ib_recv_wr **bad_wr) | |
2339 | { | |
2340 | int status = 0; | |
2341 | unsigned long flags; | |
2342 | struct ocrdma_qp *qp = get_ocrdma_qp(ibqp); | |
2343 | struct ocrdma_hdr_wqe *rqe; | |
2344 | ||
2345 | spin_lock_irqsave(&qp->q_lock, flags); | |
2346 | if (qp->state == OCRDMA_QPS_RST || qp->state == OCRDMA_QPS_ERR) { | |
2347 | spin_unlock_irqrestore(&qp->q_lock, flags); | |
2348 | *bad_wr = wr; | |
2349 | return -EINVAL; | |
2350 | } | |
2351 | while (wr) { | |
2352 | if (ocrdma_hwq_free_cnt(&qp->rq) == 0 || | |
2353 | wr->num_sge > qp->rq.max_sges) { | |
2354 | *bad_wr = wr; | |
2355 | status = -ENOMEM; | |
2356 | break; | |
2357 | } | |
2358 | rqe = ocrdma_hwq_head(&qp->rq); | |
2359 | ocrdma_build_rqe(rqe, wr, 0); | |
2360 | ||
2361 | qp->rqe_wr_id_tbl[qp->rq.head] = wr->wr_id; | |
2362 | /* make sure rqe is written before adapter can access it */ | |
2363 | wmb(); | |
2364 | ||
2365 | /* inform hw to start processing it */ | |
2366 | ocrdma_ring_rq_db(qp); | |
2367 | ||
2368 | /* update pointer, counter for next wr */ | |
2369 | ocrdma_hwq_inc_head(&qp->rq); | |
2370 | wr = wr->next; | |
2371 | } | |
2372 | spin_unlock_irqrestore(&qp->q_lock, flags); | |
2373 | return status; | |
2374 | } | |
2375 | ||
2376 | /* cqe for srq's rqe can potentially arrive out of order. | |
2377 | * index gives the entry in the shadow table where to store | |
2378 | * the wr_id. tag/index is returned in cqe to reference back | |
2379 | * for a given rqe. | |
2380 | */ | |
2381 | static int ocrdma_srq_get_idx(struct ocrdma_srq *srq) | |
2382 | { | |
2383 | int row = 0; | |
2384 | int indx = 0; | |
2385 | ||
2386 | for (row = 0; row < srq->bit_fields_len; row++) { | |
2387 | if (srq->idx_bit_fields[row]) { | |
2388 | indx = ffs(srq->idx_bit_fields[row]); | |
2389 | indx = (row * 32) + (indx - 1); | |
db287ec5 | 2390 | BUG_ON(indx >= srq->rq.max_cnt); |
fe2caefc PP |
2391 | ocrdma_srq_toggle_bit(srq, indx); |
2392 | break; | |
2393 | } | |
2394 | } | |
2395 | ||
db287ec5 | 2396 | BUG_ON(row == srq->bit_fields_len); |
cf5788ad | 2397 | return indx + 1; /* Use from index 1 */ |
fe2caefc PP |
2398 | } |
2399 | ||
2400 | static void ocrdma_ring_srq_db(struct ocrdma_srq *srq) | |
2401 | { | |
2402 | u32 val = srq->rq.dbid | (1 << 16); | |
2403 | ||
2404 | iowrite32(val, srq->db + OCRDMA_DB_GEN2_SRQ_OFFSET); | |
2405 | } | |
2406 | ||
2407 | int ocrdma_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr, | |
2408 | struct ib_recv_wr **bad_wr) | |
2409 | { | |
2410 | int status = 0; | |
2411 | unsigned long flags; | |
2412 | struct ocrdma_srq *srq; | |
2413 | struct ocrdma_hdr_wqe *rqe; | |
2414 | u16 tag; | |
2415 | ||
2416 | srq = get_ocrdma_srq(ibsrq); | |
2417 | ||
2418 | spin_lock_irqsave(&srq->q_lock, flags); | |
2419 | while (wr) { | |
2420 | if (ocrdma_hwq_free_cnt(&srq->rq) == 0 || | |
2421 | wr->num_sge > srq->rq.max_sges) { | |
2422 | status = -ENOMEM; | |
2423 | *bad_wr = wr; | |
2424 | break; | |
2425 | } | |
2426 | tag = ocrdma_srq_get_idx(srq); | |
2427 | rqe = ocrdma_hwq_head(&srq->rq); | |
2428 | ocrdma_build_rqe(rqe, wr, tag); | |
2429 | ||
2430 | srq->rqe_wr_id_tbl[tag] = wr->wr_id; | |
2431 | /* make sure rqe is written before adapter can perform DMA */ | |
2432 | wmb(); | |
2433 | /* inform hw to start processing it */ | |
2434 | ocrdma_ring_srq_db(srq); | |
2435 | /* update pointer, counter for next wr */ | |
2436 | ocrdma_hwq_inc_head(&srq->rq); | |
2437 | wr = wr->next; | |
2438 | } | |
2439 | spin_unlock_irqrestore(&srq->q_lock, flags); | |
2440 | return status; | |
2441 | } | |
2442 | ||
2443 | static enum ib_wc_status ocrdma_to_ibwc_err(u16 status) | |
2444 | { | |
f99b1649 | 2445 | enum ib_wc_status ibwc_status; |
fe2caefc PP |
2446 | |
2447 | switch (status) { | |
2448 | case OCRDMA_CQE_GENERAL_ERR: | |
2449 | ibwc_status = IB_WC_GENERAL_ERR; | |
2450 | break; | |
2451 | case OCRDMA_CQE_LOC_LEN_ERR: | |
2452 | ibwc_status = IB_WC_LOC_LEN_ERR; | |
2453 | break; | |
2454 | case OCRDMA_CQE_LOC_QP_OP_ERR: | |
2455 | ibwc_status = IB_WC_LOC_QP_OP_ERR; | |
2456 | break; | |
2457 | case OCRDMA_CQE_LOC_EEC_OP_ERR: | |
2458 | ibwc_status = IB_WC_LOC_EEC_OP_ERR; | |
2459 | break; | |
2460 | case OCRDMA_CQE_LOC_PROT_ERR: | |
2461 | ibwc_status = IB_WC_LOC_PROT_ERR; | |
2462 | break; | |
2463 | case OCRDMA_CQE_WR_FLUSH_ERR: | |
2464 | ibwc_status = IB_WC_WR_FLUSH_ERR; | |
2465 | break; | |
2466 | case OCRDMA_CQE_MW_BIND_ERR: | |
2467 | ibwc_status = IB_WC_MW_BIND_ERR; | |
2468 | break; | |
2469 | case OCRDMA_CQE_BAD_RESP_ERR: | |
2470 | ibwc_status = IB_WC_BAD_RESP_ERR; | |
2471 | break; | |
2472 | case OCRDMA_CQE_LOC_ACCESS_ERR: | |
2473 | ibwc_status = IB_WC_LOC_ACCESS_ERR; | |
2474 | break; | |
2475 | case OCRDMA_CQE_REM_INV_REQ_ERR: | |
2476 | ibwc_status = IB_WC_REM_INV_REQ_ERR; | |
2477 | break; | |
2478 | case OCRDMA_CQE_REM_ACCESS_ERR: | |
2479 | ibwc_status = IB_WC_REM_ACCESS_ERR; | |
2480 | break; | |
2481 | case OCRDMA_CQE_REM_OP_ERR: | |
2482 | ibwc_status = IB_WC_REM_OP_ERR; | |
2483 | break; | |
2484 | case OCRDMA_CQE_RETRY_EXC_ERR: | |
2485 | ibwc_status = IB_WC_RETRY_EXC_ERR; | |
2486 | break; | |
2487 | case OCRDMA_CQE_RNR_RETRY_EXC_ERR: | |
2488 | ibwc_status = IB_WC_RNR_RETRY_EXC_ERR; | |
2489 | break; | |
2490 | case OCRDMA_CQE_LOC_RDD_VIOL_ERR: | |
2491 | ibwc_status = IB_WC_LOC_RDD_VIOL_ERR; | |
2492 | break; | |
2493 | case OCRDMA_CQE_REM_INV_RD_REQ_ERR: | |
2494 | ibwc_status = IB_WC_REM_INV_RD_REQ_ERR; | |
2495 | break; | |
2496 | case OCRDMA_CQE_REM_ABORT_ERR: | |
2497 | ibwc_status = IB_WC_REM_ABORT_ERR; | |
2498 | break; | |
2499 | case OCRDMA_CQE_INV_EECN_ERR: | |
2500 | ibwc_status = IB_WC_INV_EECN_ERR; | |
2501 | break; | |
2502 | case OCRDMA_CQE_INV_EEC_STATE_ERR: | |
2503 | ibwc_status = IB_WC_INV_EEC_STATE_ERR; | |
2504 | break; | |
2505 | case OCRDMA_CQE_FATAL_ERR: | |
2506 | ibwc_status = IB_WC_FATAL_ERR; | |
2507 | break; | |
2508 | case OCRDMA_CQE_RESP_TIMEOUT_ERR: | |
2509 | ibwc_status = IB_WC_RESP_TIMEOUT_ERR; | |
2510 | break; | |
2511 | default: | |
2512 | ibwc_status = IB_WC_GENERAL_ERR; | |
2513 | break; | |
2b50176d | 2514 | } |
fe2caefc PP |
2515 | return ibwc_status; |
2516 | } | |
2517 | ||
2518 | static void ocrdma_update_wc(struct ocrdma_qp *qp, struct ib_wc *ibwc, | |
2519 | u32 wqe_idx) | |
2520 | { | |
2521 | struct ocrdma_hdr_wqe *hdr; | |
2522 | struct ocrdma_sge *rw; | |
2523 | int opcode; | |
2524 | ||
2525 | hdr = ocrdma_hwq_head_from_idx(&qp->sq, wqe_idx); | |
2526 | ||
2527 | ibwc->wr_id = qp->wqe_wr_id_tbl[wqe_idx].wrid; | |
2528 | /* Undo the hdr->cw swap */ | |
2529 | opcode = le32_to_cpu(hdr->cw) & OCRDMA_WQE_OPCODE_MASK; | |
2530 | switch (opcode) { | |
2531 | case OCRDMA_WRITE: | |
2532 | ibwc->opcode = IB_WC_RDMA_WRITE; | |
2533 | break; | |
2534 | case OCRDMA_READ: | |
2535 | rw = (struct ocrdma_sge *)(hdr + 1); | |
2536 | ibwc->opcode = IB_WC_RDMA_READ; | |
2537 | ibwc->byte_len = rw->len; | |
2538 | break; | |
2539 | case OCRDMA_SEND: | |
2540 | ibwc->opcode = IB_WC_SEND; | |
2541 | break; | |
7c33880c | 2542 | case OCRDMA_FR_MR: |
191cfed5 | 2543 | ibwc->opcode = IB_WC_REG_MR; |
7c33880c | 2544 | break; |
fe2caefc PP |
2545 | case OCRDMA_LKEY_INV: |
2546 | ibwc->opcode = IB_WC_LOCAL_INV; | |
2547 | break; | |
2548 | default: | |
2549 | ibwc->status = IB_WC_GENERAL_ERR; | |
ef99c4c2 NG |
2550 | pr_err("%s() invalid opcode received = 0x%x\n", |
2551 | __func__, hdr->cw & OCRDMA_WQE_OPCODE_MASK); | |
fe2caefc | 2552 | break; |
2b50176d | 2553 | } |
fe2caefc PP |
2554 | } |
2555 | ||
2556 | static void ocrdma_set_cqe_status_flushed(struct ocrdma_qp *qp, | |
2557 | struct ocrdma_cqe *cqe) | |
2558 | { | |
2559 | if (is_cqe_for_sq(cqe)) { | |
2560 | cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu( | |
2561 | cqe->flags_status_srcqpn) & | |
2562 | ~OCRDMA_CQE_STATUS_MASK); | |
2563 | cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu( | |
2564 | cqe->flags_status_srcqpn) | | |
2565 | (OCRDMA_CQE_WR_FLUSH_ERR << | |
2566 | OCRDMA_CQE_STATUS_SHIFT)); | |
2567 | } else { | |
2568 | if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) { | |
2569 | cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu( | |
2570 | cqe->flags_status_srcqpn) & | |
2571 | ~OCRDMA_CQE_UD_STATUS_MASK); | |
2572 | cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu( | |
2573 | cqe->flags_status_srcqpn) | | |
2574 | (OCRDMA_CQE_WR_FLUSH_ERR << | |
2575 | OCRDMA_CQE_UD_STATUS_SHIFT)); | |
2576 | } else { | |
2577 | cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu( | |
2578 | cqe->flags_status_srcqpn) & | |
2579 | ~OCRDMA_CQE_STATUS_MASK); | |
2580 | cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu( | |
2581 | cqe->flags_status_srcqpn) | | |
2582 | (OCRDMA_CQE_WR_FLUSH_ERR << | |
2583 | OCRDMA_CQE_STATUS_SHIFT)); | |
2584 | } | |
2585 | } | |
2586 | } | |
2587 | ||
2588 | static bool ocrdma_update_err_cqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe, | |
2589 | struct ocrdma_qp *qp, int status) | |
2590 | { | |
2591 | bool expand = false; | |
2592 | ||
2593 | ibwc->byte_len = 0; | |
2594 | ibwc->qp = &qp->ibqp; | |
2595 | ibwc->status = ocrdma_to_ibwc_err(status); | |
2596 | ||
2597 | ocrdma_flush_qp(qp); | |
057729cb | 2598 | ocrdma_qp_state_change(qp, IB_QPS_ERR, NULL); |
fe2caefc PP |
2599 | |
2600 | /* if wqe/rqe pending for which cqe needs to be returned, | |
2601 | * trigger inflating it. | |
2602 | */ | |
2603 | if (!is_hw_rq_empty(qp) || !is_hw_sq_empty(qp)) { | |
2604 | expand = true; | |
2605 | ocrdma_set_cqe_status_flushed(qp, cqe); | |
2606 | } | |
2607 | return expand; | |
2608 | } | |
2609 | ||
2610 | static int ocrdma_update_err_rcqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe, | |
2611 | struct ocrdma_qp *qp, int status) | |
2612 | { | |
2613 | ibwc->opcode = IB_WC_RECV; | |
2614 | ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail]; | |
2615 | ocrdma_hwq_inc_tail(&qp->rq); | |
2616 | ||
2617 | return ocrdma_update_err_cqe(ibwc, cqe, qp, status); | |
2618 | } | |
2619 | ||
2620 | static int ocrdma_update_err_scqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe, | |
2621 | struct ocrdma_qp *qp, int status) | |
2622 | { | |
2623 | ocrdma_update_wc(qp, ibwc, qp->sq.tail); | |
2624 | ocrdma_hwq_inc_tail(&qp->sq); | |
2625 | ||
2626 | return ocrdma_update_err_cqe(ibwc, cqe, qp, status); | |
2627 | } | |
2628 | ||
2629 | ||
2630 | static bool ocrdma_poll_err_scqe(struct ocrdma_qp *qp, | |
2631 | struct ocrdma_cqe *cqe, struct ib_wc *ibwc, | |
2632 | bool *polled, bool *stop) | |
2633 | { | |
2634 | bool expand; | |
ad56ebb4 | 2635 | struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device); |
fe2caefc PP |
2636 | int status = (le32_to_cpu(cqe->flags_status_srcqpn) & |
2637 | OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT; | |
ad56ebb4 SX |
2638 | if (status < OCRDMA_MAX_CQE_ERR) |
2639 | atomic_inc(&dev->cqe_err_stats[status]); | |
fe2caefc PP |
2640 | |
2641 | /* when hw sq is empty, but rq is not empty, so we continue | |
2642 | * to keep the cqe in order to get the cq event again. | |
2643 | */ | |
2644 | if (is_hw_sq_empty(qp) && !is_hw_rq_empty(qp)) { | |
2645 | /* when cq for rq and sq is same, it is safe to return | |
2646 | * flush cqe for RQEs. | |
2647 | */ | |
2648 | if (!qp->srq && (qp->sq_cq == qp->rq_cq)) { | |
2649 | *polled = true; | |
2650 | status = OCRDMA_CQE_WR_FLUSH_ERR; | |
2651 | expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status); | |
2652 | } else { | |
2653 | /* stop processing further cqe as this cqe is used for | |
2654 | * triggering cq event on buddy cq of RQ. | |
2655 | * When QP is destroyed, this cqe will be removed | |
2656 | * from the cq's hardware q. | |
2657 | */ | |
2658 | *polled = false; | |
2659 | *stop = true; | |
2660 | expand = false; | |
2661 | } | |
a96ffb1d SX |
2662 | } else if (is_hw_sq_empty(qp)) { |
2663 | /* Do nothing */ | |
2664 | expand = false; | |
2665 | *polled = false; | |
2666 | *stop = false; | |
fe2caefc PP |
2667 | } else { |
2668 | *polled = true; | |
2669 | expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status); | |
2670 | } | |
2671 | return expand; | |
2672 | } | |
2673 | ||
2674 | static bool ocrdma_poll_success_scqe(struct ocrdma_qp *qp, | |
2675 | struct ocrdma_cqe *cqe, | |
2676 | struct ib_wc *ibwc, bool *polled) | |
2677 | { | |
2678 | bool expand = false; | |
2679 | int tail = qp->sq.tail; | |
2680 | u32 wqe_idx; | |
2681 | ||
2682 | if (!qp->wqe_wr_id_tbl[tail].signaled) { | |
fe2caefc PP |
2683 | *polled = false; /* WC cannot be consumed yet */ |
2684 | } else { | |
2685 | ibwc->status = IB_WC_SUCCESS; | |
2686 | ibwc->wc_flags = 0; | |
2687 | ibwc->qp = &qp->ibqp; | |
2688 | ocrdma_update_wc(qp, ibwc, tail); | |
2689 | *polled = true; | |
fe2caefc | 2690 | } |
43a6b402 NG |
2691 | wqe_idx = (le32_to_cpu(cqe->wq.wqeidx) & |
2692 | OCRDMA_CQE_WQEIDX_MASK) & qp->sq.max_wqe_idx; | |
ae3bca90 PP |
2693 | if (tail != wqe_idx) |
2694 | expand = true; /* Coalesced CQE can't be consumed yet */ | |
2695 | ||
fe2caefc PP |
2696 | ocrdma_hwq_inc_tail(&qp->sq); |
2697 | return expand; | |
2698 | } | |
2699 | ||
2700 | static bool ocrdma_poll_scqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe, | |
2701 | struct ib_wc *ibwc, bool *polled, bool *stop) | |
2702 | { | |
2703 | int status; | |
2704 | bool expand; | |
2705 | ||
2706 | status = (le32_to_cpu(cqe->flags_status_srcqpn) & | |
2707 | OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT; | |
2708 | ||
2709 | if (status == OCRDMA_CQE_SUCCESS) | |
2710 | expand = ocrdma_poll_success_scqe(qp, cqe, ibwc, polled); | |
2711 | else | |
2712 | expand = ocrdma_poll_err_scqe(qp, cqe, ibwc, polled, stop); | |
2713 | return expand; | |
2714 | } | |
2715 | ||
6b062667 DS |
2716 | static int ocrdma_update_ud_rcqe(struct ocrdma_dev *dev, struct ib_wc *ibwc, |
2717 | struct ocrdma_cqe *cqe) | |
fe2caefc PP |
2718 | { |
2719 | int status; | |
6b062667 | 2720 | u16 hdr_type = 0; |
fe2caefc PP |
2721 | |
2722 | status = (le32_to_cpu(cqe->flags_status_srcqpn) & | |
2723 | OCRDMA_CQE_UD_STATUS_MASK) >> OCRDMA_CQE_UD_STATUS_SHIFT; | |
2724 | ibwc->src_qp = le32_to_cpu(cqe->flags_status_srcqpn) & | |
2725 | OCRDMA_CQE_SRCQP_MASK; | |
aff3ead9 | 2726 | ibwc->pkey_index = 0; |
fe2caefc PP |
2727 | ibwc->wc_flags = IB_WC_GRH; |
2728 | ibwc->byte_len = (le32_to_cpu(cqe->ud.rxlen_pkey) >> | |
6b062667 DS |
2729 | OCRDMA_CQE_UD_XFER_LEN_SHIFT) & |
2730 | OCRDMA_CQE_UD_XFER_LEN_MASK; | |
2731 | ||
2732 | if (ocrdma_is_udp_encap_supported(dev)) { | |
2733 | hdr_type = (le32_to_cpu(cqe->ud.rxlen_pkey) >> | |
2734 | OCRDMA_CQE_UD_L3TYPE_SHIFT) & | |
2735 | OCRDMA_CQE_UD_L3TYPE_MASK; | |
2736 | ibwc->wc_flags |= IB_WC_WITH_NETWORK_HDR_TYPE; | |
2737 | ibwc->network_hdr_type = hdr_type; | |
2738 | } | |
2739 | ||
fe2caefc PP |
2740 | return status; |
2741 | } | |
2742 | ||
2743 | static void ocrdma_update_free_srq_cqe(struct ib_wc *ibwc, | |
2744 | struct ocrdma_cqe *cqe, | |
2745 | struct ocrdma_qp *qp) | |
2746 | { | |
2747 | unsigned long flags; | |
2748 | struct ocrdma_srq *srq; | |
2749 | u32 wqe_idx; | |
2750 | ||
2751 | srq = get_ocrdma_srq(qp->ibqp.srq); | |
43a6b402 | 2752 | wqe_idx = (le32_to_cpu(cqe->rq.buftag_qpn) >> |
cf5788ad | 2753 | OCRDMA_CQE_BUFTAG_SHIFT) & srq->rq.max_wqe_idx; |
db287ec5 | 2754 | BUG_ON(wqe_idx < 1); |
cf5788ad | 2755 | |
fe2caefc PP |
2756 | ibwc->wr_id = srq->rqe_wr_id_tbl[wqe_idx]; |
2757 | spin_lock_irqsave(&srq->q_lock, flags); | |
cf5788ad | 2758 | ocrdma_srq_toggle_bit(srq, wqe_idx - 1); |
fe2caefc PP |
2759 | spin_unlock_irqrestore(&srq->q_lock, flags); |
2760 | ocrdma_hwq_inc_tail(&srq->rq); | |
2761 | } | |
2762 | ||
2763 | static bool ocrdma_poll_err_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe, | |
2764 | struct ib_wc *ibwc, bool *polled, bool *stop, | |
2765 | int status) | |
2766 | { | |
2767 | bool expand; | |
ad56ebb4 SX |
2768 | struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device); |
2769 | ||
2770 | if (status < OCRDMA_MAX_CQE_ERR) | |
2771 | atomic_inc(&dev->cqe_err_stats[status]); | |
fe2caefc PP |
2772 | |
2773 | /* when hw_rq is empty, but wq is not empty, so continue | |
2774 | * to keep the cqe to get the cq event again. | |
2775 | */ | |
2776 | if (is_hw_rq_empty(qp) && !is_hw_sq_empty(qp)) { | |
2777 | if (!qp->srq && (qp->sq_cq == qp->rq_cq)) { | |
2778 | *polled = true; | |
2779 | status = OCRDMA_CQE_WR_FLUSH_ERR; | |
2780 | expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status); | |
2781 | } else { | |
2782 | *polled = false; | |
2783 | *stop = true; | |
2784 | expand = false; | |
2785 | } | |
a96ffb1d SX |
2786 | } else if (is_hw_rq_empty(qp)) { |
2787 | /* Do nothing */ | |
2788 | expand = false; | |
2789 | *polled = false; | |
2790 | *stop = false; | |
a3698a9b PP |
2791 | } else { |
2792 | *polled = true; | |
fe2caefc | 2793 | expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status); |
a3698a9b | 2794 | } |
fe2caefc PP |
2795 | return expand; |
2796 | } | |
2797 | ||
2798 | static void ocrdma_poll_success_rcqe(struct ocrdma_qp *qp, | |
2799 | struct ocrdma_cqe *cqe, struct ib_wc *ibwc) | |
2800 | { | |
6b062667 DS |
2801 | struct ocrdma_dev *dev; |
2802 | ||
2803 | dev = get_ocrdma_dev(qp->ibqp.device); | |
fe2caefc PP |
2804 | ibwc->opcode = IB_WC_RECV; |
2805 | ibwc->qp = &qp->ibqp; | |
2806 | ibwc->status = IB_WC_SUCCESS; | |
2807 | ||
2808 | if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) | |
6b062667 | 2809 | ocrdma_update_ud_rcqe(dev, ibwc, cqe); |
fe2caefc PP |
2810 | else |
2811 | ibwc->byte_len = le32_to_cpu(cqe->rq.rxlen); | |
2812 | ||
2813 | if (is_cqe_imm(cqe)) { | |
2814 | ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt)); | |
2815 | ibwc->wc_flags |= IB_WC_WITH_IMM; | |
2816 | } else if (is_cqe_wr_imm(cqe)) { | |
2817 | ibwc->opcode = IB_WC_RECV_RDMA_WITH_IMM; | |
2818 | ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt)); | |
2819 | ibwc->wc_flags |= IB_WC_WITH_IMM; | |
2820 | } else if (is_cqe_invalidated(cqe)) { | |
2821 | ibwc->ex.invalidate_rkey = le32_to_cpu(cqe->rq.lkey_immdt); | |
2822 | ibwc->wc_flags |= IB_WC_WITH_INVALIDATE; | |
2823 | } | |
f99b1649 | 2824 | if (qp->ibqp.srq) { |
fe2caefc | 2825 | ocrdma_update_free_srq_cqe(ibwc, cqe, qp); |
f99b1649 | 2826 | } else { |
fe2caefc PP |
2827 | ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail]; |
2828 | ocrdma_hwq_inc_tail(&qp->rq); | |
2829 | } | |
2830 | } | |
2831 | ||
2832 | static bool ocrdma_poll_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe, | |
2833 | struct ib_wc *ibwc, bool *polled, bool *stop) | |
2834 | { | |
2835 | int status; | |
2836 | bool expand = false; | |
2837 | ||
2838 | ibwc->wc_flags = 0; | |
f99b1649 | 2839 | if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) { |
fe2caefc PP |
2840 | status = (le32_to_cpu(cqe->flags_status_srcqpn) & |
2841 | OCRDMA_CQE_UD_STATUS_MASK) >> | |
2842 | OCRDMA_CQE_UD_STATUS_SHIFT; | |
f99b1649 | 2843 | } else { |
fe2caefc PP |
2844 | status = (le32_to_cpu(cqe->flags_status_srcqpn) & |
2845 | OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT; | |
f99b1649 | 2846 | } |
fe2caefc PP |
2847 | |
2848 | if (status == OCRDMA_CQE_SUCCESS) { | |
2849 | *polled = true; | |
2850 | ocrdma_poll_success_rcqe(qp, cqe, ibwc); | |
2851 | } else { | |
2852 | expand = ocrdma_poll_err_rcqe(qp, cqe, ibwc, polled, stop, | |
2853 | status); | |
2854 | } | |
2855 | return expand; | |
2856 | } | |
2857 | ||
2858 | static void ocrdma_change_cq_phase(struct ocrdma_cq *cq, struct ocrdma_cqe *cqe, | |
2859 | u16 cur_getp) | |
2860 | { | |
2861 | if (cq->phase_change) { | |
2862 | if (cur_getp == 0) | |
2863 | cq->phase = (~cq->phase & OCRDMA_CQE_VALID); | |
f99b1649 | 2864 | } else { |
fe2caefc PP |
2865 | /* clear valid bit */ |
2866 | cqe->flags_status_srcqpn = 0; | |
f99b1649 | 2867 | } |
fe2caefc PP |
2868 | } |
2869 | ||
2870 | static int ocrdma_poll_hwcq(struct ocrdma_cq *cq, int num_entries, | |
2871 | struct ib_wc *ibwc) | |
2872 | { | |
2873 | u16 qpn = 0; | |
2874 | int i = 0; | |
2875 | bool expand = false; | |
2876 | int polled_hw_cqes = 0; | |
2877 | struct ocrdma_qp *qp = NULL; | |
1afc0454 | 2878 | struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device); |
fe2caefc PP |
2879 | struct ocrdma_cqe *cqe; |
2880 | u16 cur_getp; bool polled = false; bool stop = false; | |
2881 | ||
2882 | cur_getp = cq->getp; | |
2883 | while (num_entries) { | |
2884 | cqe = cq->va + cur_getp; | |
2885 | /* check whether valid cqe or not */ | |
2886 | if (!is_cqe_valid(cq, cqe)) | |
2887 | break; | |
2888 | qpn = (le32_to_cpu(cqe->cmn.qpn) & OCRDMA_CQE_QPN_MASK); | |
2889 | /* ignore discarded cqe */ | |
2890 | if (qpn == 0) | |
2891 | goto skip_cqe; | |
2892 | qp = dev->qp_tbl[qpn]; | |
2893 | BUG_ON(qp == NULL); | |
2894 | ||
2895 | if (is_cqe_for_sq(cqe)) { | |
2896 | expand = ocrdma_poll_scqe(qp, cqe, ibwc, &polled, | |
2897 | &stop); | |
2898 | } else { | |
2899 | expand = ocrdma_poll_rcqe(qp, cqe, ibwc, &polled, | |
2900 | &stop); | |
2901 | } | |
2902 | if (expand) | |
2903 | goto expand_cqe; | |
2904 | if (stop) | |
2905 | goto stop_cqe; | |
2906 | /* clear qpn to avoid duplicate processing by discard_cqe() */ | |
2907 | cqe->cmn.qpn = 0; | |
2908 | skip_cqe: | |
2909 | polled_hw_cqes += 1; | |
2910 | cur_getp = (cur_getp + 1) % cq->max_hw_cqe; | |
2911 | ocrdma_change_cq_phase(cq, cqe, cur_getp); | |
2912 | expand_cqe: | |
2913 | if (polled) { | |
2914 | num_entries -= 1; | |
2915 | i += 1; | |
2916 | ibwc = ibwc + 1; | |
2917 | polled = false; | |
2918 | } | |
2919 | } | |
2920 | stop_cqe: | |
2921 | cq->getp = cur_getp; | |
b41f7852 DS |
2922 | |
2923 | if (polled_hw_cqes) | |
2924 | ocrdma_ring_cq_db(dev, cq->id, false, false, polled_hw_cqes); | |
ea617626 | 2925 | |
fe2caefc PP |
2926 | return i; |
2927 | } | |
2928 | ||
2929 | /* insert error cqe if the QP's SQ or RQ's CQ matches the CQ under poll. */ | |
2930 | static int ocrdma_add_err_cqe(struct ocrdma_cq *cq, int num_entries, | |
2931 | struct ocrdma_qp *qp, struct ib_wc *ibwc) | |
2932 | { | |
2933 | int err_cqes = 0; | |
2934 | ||
2935 | while (num_entries) { | |
2936 | if (is_hw_sq_empty(qp) && is_hw_rq_empty(qp)) | |
2937 | break; | |
2938 | if (!is_hw_sq_empty(qp) && qp->sq_cq == cq) { | |
2939 | ocrdma_update_wc(qp, ibwc, qp->sq.tail); | |
2940 | ocrdma_hwq_inc_tail(&qp->sq); | |
2941 | } else if (!is_hw_rq_empty(qp) && qp->rq_cq == cq) { | |
2942 | ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail]; | |
2943 | ocrdma_hwq_inc_tail(&qp->rq); | |
f99b1649 | 2944 | } else { |
fe2caefc | 2945 | return err_cqes; |
f99b1649 | 2946 | } |
fe2caefc PP |
2947 | ibwc->byte_len = 0; |
2948 | ibwc->status = IB_WC_WR_FLUSH_ERR; | |
2949 | ibwc = ibwc + 1; | |
2950 | err_cqes += 1; | |
2951 | num_entries -= 1; | |
2952 | } | |
2953 | return err_cqes; | |
2954 | } | |
2955 | ||
2956 | int ocrdma_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc) | |
2957 | { | |
2958 | int cqes_to_poll = num_entries; | |
1afc0454 NG |
2959 | struct ocrdma_cq *cq = get_ocrdma_cq(ibcq); |
2960 | struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device); | |
fe2caefc PP |
2961 | int num_os_cqe = 0, err_cqes = 0; |
2962 | struct ocrdma_qp *qp; | |
1afc0454 | 2963 | unsigned long flags; |
fe2caefc PP |
2964 | |
2965 | /* poll cqes from adapter CQ */ | |
2966 | spin_lock_irqsave(&cq->cq_lock, flags); | |
2967 | num_os_cqe = ocrdma_poll_hwcq(cq, cqes_to_poll, wc); | |
2968 | spin_unlock_irqrestore(&cq->cq_lock, flags); | |
2969 | cqes_to_poll -= num_os_cqe; | |
2970 | ||
2971 | if (cqes_to_poll) { | |
2972 | wc = wc + num_os_cqe; | |
2973 | /* adapter returns single error cqe when qp moves to | |
2974 | * error state. So insert error cqes with wc_status as | |
2975 | * FLUSHED for pending WQEs and RQEs of QP's SQ and RQ | |
2976 | * respectively which uses this CQ. | |
2977 | */ | |
2978 | spin_lock_irqsave(&dev->flush_q_lock, flags); | |
2979 | list_for_each_entry(qp, &cq->sq_head, sq_entry) { | |
2980 | if (cqes_to_poll == 0) | |
2981 | break; | |
2982 | err_cqes = ocrdma_add_err_cqe(cq, cqes_to_poll, qp, wc); | |
2983 | cqes_to_poll -= err_cqes; | |
2984 | num_os_cqe += err_cqes; | |
2985 | wc = wc + err_cqes; | |
2986 | } | |
2987 | spin_unlock_irqrestore(&dev->flush_q_lock, flags); | |
2988 | } | |
2989 | return num_os_cqe; | |
2990 | } | |
2991 | ||
2992 | int ocrdma_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags cq_flags) | |
2993 | { | |
1afc0454 NG |
2994 | struct ocrdma_cq *cq = get_ocrdma_cq(ibcq); |
2995 | struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device); | |
fe2caefc | 2996 | u16 cq_id; |
1afc0454 | 2997 | unsigned long flags; |
ea617626 | 2998 | bool arm_needed = false, sol_needed = false; |
fe2caefc | 2999 | |
fe2caefc | 3000 | cq_id = cq->id; |
fe2caefc PP |
3001 | |
3002 | spin_lock_irqsave(&cq->cq_lock, flags); | |
3003 | if (cq_flags & IB_CQ_NEXT_COMP || cq_flags & IB_CQ_SOLICITED) | |
ea617626 | 3004 | arm_needed = true; |
fe2caefc | 3005 | if (cq_flags & IB_CQ_SOLICITED) |
ea617626 | 3006 | sol_needed = true; |
fe2caefc | 3007 | |
b41f7852 | 3008 | ocrdma_ring_cq_db(dev, cq_id, arm_needed, sol_needed, 0); |
fe2caefc | 3009 | spin_unlock_irqrestore(&cq->cq_lock, flags); |
ea617626 | 3010 | |
fe2caefc PP |
3011 | return 0; |
3012 | } | |
7c33880c | 3013 | |
cacb7d59 SG |
3014 | struct ib_mr *ocrdma_alloc_mr(struct ib_pd *ibpd, |
3015 | enum ib_mr_type mr_type, | |
3016 | u32 max_num_sg) | |
7c33880c NG |
3017 | { |
3018 | int status; | |
3019 | struct ocrdma_mr *mr; | |
3020 | struct ocrdma_pd *pd = get_ocrdma_pd(ibpd); | |
3021 | struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device); | |
3022 | ||
cacb7d59 SG |
3023 | if (mr_type != IB_MR_TYPE_MEM_REG) |
3024 | return ERR_PTR(-EINVAL); | |
3025 | ||
3026 | if (max_num_sg > dev->attr.max_pages_per_frmr) | |
7c33880c NG |
3027 | return ERR_PTR(-EINVAL); |
3028 | ||
3029 | mr = kzalloc(sizeof(*mr), GFP_KERNEL); | |
3030 | if (!mr) | |
3031 | return ERR_PTR(-ENOMEM); | |
3032 | ||
2eaa1c56 SG |
3033 | mr->pages = kcalloc(max_num_sg, sizeof(u64), GFP_KERNEL); |
3034 | if (!mr->pages) { | |
3035 | status = -ENOMEM; | |
3036 | goto pl_err; | |
3037 | } | |
3038 | ||
cacb7d59 | 3039 | status = ocrdma_get_pbl_info(dev, mr, max_num_sg); |
7c33880c NG |
3040 | if (status) |
3041 | goto pbl_err; | |
3042 | mr->hwmr.fr_mr = 1; | |
3043 | mr->hwmr.remote_rd = 0; | |
3044 | mr->hwmr.remote_wr = 0; | |
3045 | mr->hwmr.local_rd = 0; | |
3046 | mr->hwmr.local_wr = 0; | |
3047 | mr->hwmr.mw_bind = 0; | |
3048 | status = ocrdma_build_pbl_tbl(dev, &mr->hwmr); | |
3049 | if (status) | |
3050 | goto pbl_err; | |
3051 | status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, 0); | |
3052 | if (status) | |
3053 | goto mbx_err; | |
3054 | mr->ibmr.rkey = mr->hwmr.lkey; | |
3055 | mr->ibmr.lkey = mr->hwmr.lkey; | |
7a1e89d8 RD |
3056 | dev->stag_arr[(mr->hwmr.lkey >> 8) & (OCRDMA_MAX_STAG - 1)] = |
3057 | (unsigned long) mr; | |
7c33880c NG |
3058 | return &mr->ibmr; |
3059 | mbx_err: | |
3060 | ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr); | |
3061 | pbl_err: | |
2eaa1c56 SG |
3062 | kfree(mr->pages); |
3063 | pl_err: | |
7c33880c NG |
3064 | kfree(mr); |
3065 | return ERR_PTR(-ENOMEM); | |
3066 | } | |
3067 | ||
2eaa1c56 SG |
3068 | static int ocrdma_set_page(struct ib_mr *ibmr, u64 addr) |
3069 | { | |
3070 | struct ocrdma_mr *mr = get_ocrdma_mr(ibmr); | |
3071 | ||
3072 | if (unlikely(mr->npages == mr->hwmr.num_pbes)) | |
3073 | return -ENOMEM; | |
3074 | ||
3075 | mr->pages[mr->npages++] = addr; | |
3076 | ||
3077 | return 0; | |
3078 | } | |
3079 | ||
ff2ba993 | 3080 | int ocrdma_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents, |
9aa8b321 | 3081 | unsigned int *sg_offset) |
2eaa1c56 SG |
3082 | { |
3083 | struct ocrdma_mr *mr = get_ocrdma_mr(ibmr); | |
3084 | ||
3085 | mr->npages = 0; | |
3086 | ||
ff2ba993 | 3087 | return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, ocrdma_set_page); |
2eaa1c56 | 3088 | } |