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RDMA: Globally allocate and release QP memory
[mirror_ubuntu-jammy-kernel.git] / drivers / infiniband / hw / ocrdma / ocrdma_verbs.c
CommitLineData
71ee6730
DS		 1/* This file is part of the Emulex RoCE Device Driver for
2 * RoCE (RDMA over Converged Ethernet) adapters.
3 * Copyright (C) 2012-2015 Emulex. All rights reserved.
4 * EMULEX and SLI are trademarks of Emulex.
5 * www.emulex.com
6 *
7 * This software is available to you under a choice of one of two licenses.
8 * You may choose to be licensed under the terms of the GNU General Public
9 * License (GPL) Version 2, available from the file COPYING in the main
10 * directory of this source tree, or the BSD license below:
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 *
16 * - Redistributions of source code must retain the above copyright notice,
17 * this list of conditions and the following disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in
21 * the documentation and/or other materials provided with the distribution.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
27 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
30 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
31 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
32 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
33 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
fe2caefc
PP		 34 *
35 * Contact Information:
36 * linux-drivers@emulex.com
37 *
38 * Emulex
39 * 3333 Susan Street
40 * Costa Mesa, CA 92626
71ee6730 41 */
fe2caefc
PP		 42
43#include <linux/dma-mapping.h>
44#include <rdma/ib_verbs.h>
45#include <rdma/ib_user_verbs.h>
46#include <rdma/iw_cm.h>
47#include <rdma/ib_umem.h>
48#include <rdma/ib_addr.h>
cc36929e 49#include <rdma/ib_cache.h>
ff23dfa1 50#include <rdma/uverbs_ioctl.h>
fe2caefc
PP		 51
52#include "ocrdma.h"
53#include "ocrdma_hw.h"
54#include "ocrdma_verbs.h"
a7fe7380 55#include <rdma/ocrdma-abi.h>
fe2caefc 56
1fb7f897 57int ocrdma_query_pkey(struct ib_device *ibdev, u32 port, u16 index, u16 *pkey)
fe2caefc 58{
b1889407 59 if (index > 0)
fe2caefc
PP		 60 return -EINVAL;
61
62 *pkey = 0xffff;
63 return 0;
64}
65
2528e33e
MB		 66int ocrdma_query_device(struct ib_device *ibdev, struct ib_device_attr *attr,
67 struct ib_udata *uhw)
fe2caefc
PP		 68{
69 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
70
2528e33e
MB		 71 if (uhw->inlen || uhw->outlen)
72 return -EINVAL;
73
fe2caefc
PP		 74 memset(attr, 0, sizeof *attr);
75 memcpy(&attr->fw_ver, &dev->attr.fw_ver[0],
76 min(sizeof(dev->attr.fw_ver), sizeof(attr->fw_ver)));
77 ocrdma_get_guid(dev, (u8 *)&attr->sys_image_guid);
033edd4d 78 attr->max_mr_size = dev->attr.max_mr_size;
fe2caefc
PP		 79 attr->page_size_cap = 0xffff000;
80 attr->vendor_id = dev->nic_info.pdev->vendor;
81 attr->vendor_part_id = dev->nic_info.pdev->device;
96c51abe 82 attr->hw_ver = dev->asic_id;
fe2caefc 83 attr->max_qp = dev->attr.max_qp;
d3cb6c0b 84 attr->max_ah = OCRDMA_MAX_AH;
fe2caefc
PP		 85 attr->max_qp_wr = dev->attr.max_wqe;
86
87 attr->device_cap_flags = IB_DEVICE_CURR_QP_STATE_MOD |
88 IB_DEVICE_RC_RNR_NAK_GEN |
89 IB_DEVICE_SHUTDOWN_PORT |
90 IB_DEVICE_SYS_IMAGE_GUID |
2b51a9b9
NG		 91 IB_DEVICE_LOCAL_DMA_LKEY |
92 IB_DEVICE_MEM_MGT_EXTENSIONS;
33023fb8
SW		 93 attr->max_send_sge = dev->attr.max_send_sge;
94 attr->max_recv_sge = dev->attr.max_recv_sge;
3c199b45 95 attr->max_sge_rd = dev->attr.max_rdma_sge;
fe2caefc
PP		 96 attr->max_cq = dev->attr.max_cq;
97 attr->max_cqe = dev->attr.max_cqe;
98 attr->max_mr = dev->attr.max_mr;
ac578aef 99 attr->max_mw = dev->attr.max_mw;
fe2caefc
PP		 100 attr->max_pd = dev->attr.max_pd;
101 attr->atomic_cap = 0;
fe2caefc
PP		 102 attr->max_qp_rd_atom =
103 min(dev->attr.max_ord_per_qp, dev->attr.max_ird_per_qp);
104 attr->max_qp_init_rd_atom = dev->attr.max_ord_per_qp;
7c33880c 105 attr->max_srq = dev->attr.max_srq;
d1e09ebf 106 attr->max_srq_sge = dev->attr.max_srq_sge;
fe2caefc
PP		 107 attr->max_srq_wr = dev->attr.max_rqe;
108 attr->local_ca_ack_delay = dev->attr.local_ca_ack_delay;
d6a488f2 109 attr->max_fast_reg_page_list_len = dev->attr.max_pages_per_frmr;
fe2caefc
PP		 110 attr->max_pkeys = 1;
111 return 0;
112}
113
f24ceba6 114static inline void get_link_speed_and_width(struct ocrdma_dev *dev,
376ceb31 115 u16 *ib_speed, u8 *ib_width)
f24ceba6
NG		 116{
117 int status;
118 u8 speed;
119
3b1ea430 120 status = ocrdma_mbx_get_link_speed(dev, &speed, NULL);
f24ceba6
NG		 121 if (status)
122 speed = OCRDMA_PHYS_LINK_SPEED_ZERO;
123
124 switch (speed) {
125 case OCRDMA_PHYS_LINK_SPEED_1GBPS:
126 *ib_speed = IB_SPEED_SDR;
127 *ib_width = IB_WIDTH_1X;
128 break;
129
130 case OCRDMA_PHYS_LINK_SPEED_10GBPS:
131 *ib_speed = IB_SPEED_QDR;
132 *ib_width = IB_WIDTH_1X;
133 break;
134
135 case OCRDMA_PHYS_LINK_SPEED_20GBPS:
136 *ib_speed = IB_SPEED_DDR;
137 *ib_width = IB_WIDTH_4X;
138 break;
139
140 case OCRDMA_PHYS_LINK_SPEED_40GBPS:
141 *ib_speed = IB_SPEED_QDR;
142 *ib_width = IB_WIDTH_4X;
143 break;
144
145 default:
146 /* Unsupported */
147 *ib_speed = IB_SPEED_SDR;
148 *ib_width = IB_WIDTH_1X;
2b50176d 149 }
f24ceba6
NG		 150}
151
fe2caefc 152int ocrdma_query_port(struct ib_device *ibdev,
1fb7f897 153 u32 port, struct ib_port_attr *props)
fe2caefc
PP		 154{
155 enum ib_port_state port_state;
156 struct ocrdma_dev *dev;
157 struct net_device *netdev;
158
c4550c63 159 /* props being zeroed by the caller, avoid zeroing it here */
fe2caefc 160 dev = get_ocrdma_dev(ibdev);
fe2caefc
PP		 161 netdev = dev->nic_info.netdev;
162 if (netif_running(netdev) && netif_oper_up(netdev)) {
163 port_state = IB_PORT_ACTIVE;
72a7720f 164 props->phys_state = IB_PORT_PHYS_STATE_LINK_UP;
fe2caefc
PP		 165 } else {
166 port_state = IB_PORT_DOWN;
72a7720f 167 props->phys_state = IB_PORT_PHYS_STATE_DISABLED;
fe2caefc
PP		 168 }
169 props->max_mtu = IB_MTU_4096;
170 props->active_mtu = iboe_get_mtu(netdev->mtu);
171 props->lid = 0;
172 props->lmc = 0;
173 props->sm_lid = 0;
174 props->sm_sl = 0;
175 props->state = port_state;
2f944c0f
JG		 176 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP |
177 IB_PORT_DEVICE_MGMT_SUP |
178 IB_PORT_VENDOR_CLASS_SUP;
179 props->ip_gids = true;
fe2caefc
PP		 180 props->gid_tbl_len = OCRDMA_MAX_SGID;
181 props->pkey_tbl_len = 1;
182 props->bad_pkey_cntr = 0;
183 props->qkey_viol_cntr = 0;
f24ceba6
NG		 184 get_link_speed_and_width(dev, &props->active_speed,
185 &props->active_width);
fe2caefc
PP		 186 props->max_msg_sz = 0x80000000;
187 props->max_vl_num = 4;
188 return 0;
189}
190
fe2caefc
PP		 191static int ocrdma_add_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
192 unsigned long len)
193{
194 struct ocrdma_mm *mm;
195
196 mm = kzalloc(sizeof(*mm), GFP_KERNEL);
197 if (mm == NULL)
198 return -ENOMEM;
199 mm->key.phy_addr = phy_addr;
200 mm->key.len = len;
201 INIT_LIST_HEAD(&mm->entry);
202
203 mutex_lock(&uctx->mm_list_lock);
204 list_add_tail(&mm->entry, &uctx->mm_head);
205 mutex_unlock(&uctx->mm_list_lock);
206 return 0;
207}
208
209static void ocrdma_del_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
210 unsigned long len)
211{
212 struct ocrdma_mm *mm, *tmp;
213
214 mutex_lock(&uctx->mm_list_lock);
215 list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) {
43a6b402 216 if (len != mm->key.len && phy_addr != mm->key.phy_addr)
fe2caefc
PP		 217 continue;
218
219 list_del(&mm->entry);
220 kfree(mm);
221 break;
222 }
223 mutex_unlock(&uctx->mm_list_lock);
224}
225
226static bool ocrdma_search_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
227 unsigned long len)
228{
229 bool found = false;
230 struct ocrdma_mm *mm;
231
232 mutex_lock(&uctx->mm_list_lock);
233 list_for_each_entry(mm, &uctx->mm_head, entry) {
43a6b402 234 if (len != mm->key.len && phy_addr != mm->key.phy_addr)
fe2caefc
PP		 235 continue;
236
237 found = true;
238 break;
239 }
240 mutex_unlock(&uctx->mm_list_lock);
241 return found;
242}
243
9ba1377d
MA		 244
245static u16 _ocrdma_pd_mgr_get_bitmap(struct ocrdma_dev *dev, bool dpp_pool)
246{
247 u16 pd_bitmap_idx = 0;
248 const unsigned long *pd_bitmap;
249
250 if (dpp_pool) {
251 pd_bitmap = dev->pd_mgr->pd_dpp_bitmap;
252 pd_bitmap_idx = find_first_zero_bit(pd_bitmap,
253 dev->pd_mgr->max_dpp_pd);
254 __set_bit(pd_bitmap_idx, dev->pd_mgr->pd_dpp_bitmap);
255 dev->pd_mgr->pd_dpp_count++;
256 if (dev->pd_mgr->pd_dpp_count > dev->pd_mgr->pd_dpp_thrsh)
257 dev->pd_mgr->pd_dpp_thrsh = dev->pd_mgr->pd_dpp_count;
258 } else {
259 pd_bitmap = dev->pd_mgr->pd_norm_bitmap;
260 pd_bitmap_idx = find_first_zero_bit(pd_bitmap,
261 dev->pd_mgr->max_normal_pd);
262 __set_bit(pd_bitmap_idx, dev->pd_mgr->pd_norm_bitmap);
263 dev->pd_mgr->pd_norm_count++;
264 if (dev->pd_mgr->pd_norm_count > dev->pd_mgr->pd_norm_thrsh)
265 dev->pd_mgr->pd_norm_thrsh = dev->pd_mgr->pd_norm_count;
266 }
267 return pd_bitmap_idx;
268}
269
270static int _ocrdma_pd_mgr_put_bitmap(struct ocrdma_dev *dev, u16 pd_id,
271 bool dpp_pool)
272{
273 u16 pd_count;
274 u16 pd_bit_index;
275
276 pd_count = dpp_pool ? dev->pd_mgr->pd_dpp_count :
277 dev->pd_mgr->pd_norm_count;
278 if (pd_count == 0)
279 return -EINVAL;
280
281 if (dpp_pool) {
282 pd_bit_index = pd_id - dev->pd_mgr->pd_dpp_start;
283 if (pd_bit_index >= dev->pd_mgr->max_dpp_pd) {
284 return -EINVAL;
285 } else {
286 __clear_bit(pd_bit_index, dev->pd_mgr->pd_dpp_bitmap);
287 dev->pd_mgr->pd_dpp_count--;
288 }
289 } else {
290 pd_bit_index = pd_id - dev->pd_mgr->pd_norm_start;
291 if (pd_bit_index >= dev->pd_mgr->max_normal_pd) {
292 return -EINVAL;
293 } else {
294 __clear_bit(pd_bit_index, dev->pd_mgr->pd_norm_bitmap);
295 dev->pd_mgr->pd_norm_count--;
296 }
297 }
298
299 return 0;
300}
301
004d18ea 302static int ocrdma_put_pd_num(struct ocrdma_dev *dev, u16 pd_id,
9ba1377d
MA		 303 bool dpp_pool)
304{
305 int status;
306
307 mutex_lock(&dev->dev_lock);
308 status = _ocrdma_pd_mgr_put_bitmap(dev, pd_id, dpp_pool);
309 mutex_unlock(&dev->dev_lock);
310 return status;
311}
312
313static int ocrdma_get_pd_num(struct ocrdma_dev *dev, struct ocrdma_pd *pd)
314{
315 u16 pd_idx = 0;
316 int status = 0;
317
318 mutex_lock(&dev->dev_lock);
319 if (pd->dpp_enabled) {
320 /* try allocating DPP PD, if not available then normal PD */
321 if (dev->pd_mgr->pd_dpp_count < dev->pd_mgr->max_dpp_pd) {
322 pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, true);
323 pd->id = dev->pd_mgr->pd_dpp_start + pd_idx;
324 pd->dpp_page = dev->pd_mgr->dpp_page_index + pd_idx;
325 } else if (dev->pd_mgr->pd_norm_count <
326 dev->pd_mgr->max_normal_pd) {
327 pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, false);
328 pd->id = dev->pd_mgr->pd_norm_start + pd_idx;
329 pd->dpp_enabled = false;
330 } else {
331 status = -EINVAL;
332 }
333 } else {
334 if (dev->pd_mgr->pd_norm_count < dev->pd_mgr->max_normal_pd) {
335 pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, false);
336 pd->id = dev->pd_mgr->pd_norm_start + pd_idx;
337 } else {
338 status = -EINVAL;
339 }
340 }
341 mutex_unlock(&dev->dev_lock);
342 return status;
343}
344
ff23dfa1
SR		 345/*
346 * NOTE:
347 *
348 * ocrdma_ucontext must be used here because this function is also
349 * called from ocrdma_alloc_ucontext where ib_udata does not have
350 * valid ib_ucontext pointer. ib_uverbs_get_context does not call
351 * uobj_{alloc|get_xxx} helpers which are used to store the
352 * ib_ucontext in uverbs_attr_bundle wrapping the ib_udata. so
353 * ib_udata does NOT imply valid ib_ucontext here!
354 */
21a428a0
LR		 355static int _ocrdma_alloc_pd(struct ocrdma_dev *dev, struct ocrdma_pd *pd,
356 struct ocrdma_ucontext *uctx,
357 struct ib_udata *udata)
cffce990 358{
0ca4c39f 359 int status;
cffce990 360
59582d86 361 if (udata && uctx && dev->attr.max_dpp_pds) {
cffce990 362 pd->dpp_enabled =
21c3391a 363 ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R;
cffce990 364 pd->num_dpp_qp =
a53d77a3
DS		 365 pd->dpp_enabled ? (dev->nic_info.db_page_size /
366 dev->attr.wqe_size) : 0;
cffce990
NG		 367 }
368
21a428a0
LR		 369 if (dev->pd_mgr->pd_prealloc_valid)
370 return ocrdma_get_pd_num(dev, pd);
9ba1377d 371
cffce990
NG		 372retry:
373 status = ocrdma_mbx_alloc_pd(dev, pd);
374 if (status) {
375 if (pd->dpp_enabled) {
376 pd->dpp_enabled = false;
377 pd->num_dpp_qp = 0;
378 goto retry;
cffce990 379 }
21a428a0 380 return status;
cffce990
NG		 381 }
382
21a428a0 383 return 0;
cffce990
NG		 384}
385
386static inline int is_ucontext_pd(struct ocrdma_ucontext *uctx,
387 struct ocrdma_pd *pd)
388{
8b0c05dc 389 return (uctx->cntxt_pd == pd);
cffce990
NG		 390}
391
21a428a0 392static void _ocrdma_dealloc_pd(struct ocrdma_dev *dev,
cffce990
NG		 393 struct ocrdma_pd *pd)
394{
9ba1377d 395 if (dev->pd_mgr->pd_prealloc_valid)
21a428a0 396 ocrdma_put_pd_num(dev, pd->id, pd->dpp_enabled);
9ba1377d 397 else
21a428a0 398 ocrdma_mbx_dealloc_pd(dev, pd);
cffce990
NG		 399}
400
401static int ocrdma_alloc_ucontext_pd(struct ocrdma_dev *dev,
402 struct ocrdma_ucontext *uctx,
403 struct ib_udata *udata)
404{
21a428a0
LR		 405 struct ib_device *ibdev = &dev->ibdev;
406 struct ib_pd *pd;
407 int status;
408
409 pd = rdma_zalloc_drv_obj(ibdev, ib_pd);
410 if (!pd)
411 return -ENOMEM;
cffce990 412
21a428a0
LR		 413 pd->device = ibdev;
414 uctx->cntxt_pd = get_ocrdma_pd(pd);
415
416 status = _ocrdma_alloc_pd(dev, uctx->cntxt_pd, uctx, udata);
417 if (status) {
418 kfree(uctx->cntxt_pd);
cffce990
NG		 419 goto err;
420 }
421
422 uctx->cntxt_pd->uctx = uctx;
423 uctx->cntxt_pd->ibpd.device = &dev->ibdev;
424err:
425 return status;
426}
427
a2a074ef 428static void ocrdma_dealloc_ucontext_pd(struct ocrdma_ucontext *uctx)
cffce990 429{
cffce990
NG		 430 struct ocrdma_pd *pd = uctx->cntxt_pd;
431 struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device);
432
6dab0264
MA		 433 if (uctx->pd_in_use) {
434 pr_err("%s(%d) Freeing in use pdid=0x%x.\n",
435 __func__, dev->id, pd->id);
436 }
cffce990 437 uctx->cntxt_pd = NULL;
a2a074ef 438 _ocrdma_dealloc_pd(dev, pd);
f2bc3af6 439 kfree(pd);
cffce990
NG		 440}
441
442static struct ocrdma_pd *ocrdma_get_ucontext_pd(struct ocrdma_ucontext *uctx)
443{
444 struct ocrdma_pd *pd = NULL;
445
446 mutex_lock(&uctx->mm_list_lock);
447 if (!uctx->pd_in_use) {
448 uctx->pd_in_use = true;
449 pd = uctx->cntxt_pd;
450 }
451 mutex_unlock(&uctx->mm_list_lock);
452
453 return pd;
454}
455
456static void ocrdma_release_ucontext_pd(struct ocrdma_ucontext *uctx)
457{
458 mutex_lock(&uctx->mm_list_lock);
459 uctx->pd_in_use = false;
460 mutex_unlock(&uctx->mm_list_lock);
461}
462
a2a074ef 463int ocrdma_alloc_ucontext(struct ib_ucontext *uctx, struct ib_udata *udata)
fe2caefc 464{
a2a074ef 465 struct ib_device *ibdev = uctx->device;
fe2caefc 466 int status;
a2a074ef
LR		 467 struct ocrdma_ucontext *ctx = get_ocrdma_ucontext(uctx);
468 struct ocrdma_alloc_ucontext_resp resp = {};
fe2caefc
PP		 469 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
470 struct pci_dev *pdev = dev->nic_info.pdev;
471 u32 map_len = roundup(sizeof(u32) * 2048, PAGE_SIZE);
472
473 if (!udata)
a2a074ef 474 return -EFAULT;
fe2caefc
PP		 475 INIT_LIST_HEAD(&ctx->mm_head);
476 mutex_init(&ctx->mm_list_lock);
477
750afb08
LC		 478 ctx->ah_tbl.va = dma_alloc_coherent(&pdev->dev, map_len,
479 &ctx->ah_tbl.pa, GFP_KERNEL);
a2a074ef
LR		 480 if (!ctx->ah_tbl.va)
481 return -ENOMEM;
482
fe2caefc
PP		 483 ctx->ah_tbl.len = map_len;
484
485 resp.ah_tbl_len = ctx->ah_tbl.len;
1b76d383 486 resp.ah_tbl_page = virt_to_phys(ctx->ah_tbl.va);
fe2caefc
PP		 487
488 status = ocrdma_add_mmap(ctx, resp.ah_tbl_page, resp.ah_tbl_len);
489 if (status)
490 goto map_err;
cffce990
NG		 491
492 status = ocrdma_alloc_ucontext_pd(dev, ctx, udata);
493 if (status)
494 goto pd_err;
495
fe2caefc
PP		 496 resp.dev_id = dev->id;
497 resp.max_inline_data = dev->attr.max_inline_data;
498 resp.wqe_size = dev->attr.wqe_size;
499 resp.rqe_size = dev->attr.rqe_size;
500 resp.dpp_wqe_size = dev->attr.wqe_size;
fe2caefc
PP		 501
502 memcpy(resp.fw_ver, dev->attr.fw_ver, sizeof(resp.fw_ver));
503 status = ib_copy_to_udata(udata, &resp, sizeof(resp));
504 if (status)
505 goto cpy_err;
a2a074ef 506 return 0;
fe2caefc
PP		 507
508cpy_err:
21a428a0 509 ocrdma_dealloc_ucontext_pd(ctx);
cffce990 510pd_err:
fe2caefc
PP		 511 ocrdma_del_mmap(ctx, ctx->ah_tbl.pa, ctx->ah_tbl.len);
512map_err:
513 dma_free_coherent(&pdev->dev, ctx->ah_tbl.len, ctx->ah_tbl.va,
514 ctx->ah_tbl.pa);
a2a074ef 515 return status;
fe2caefc
PP		 516}
517
a2a074ef 518void ocrdma_dealloc_ucontext(struct ib_ucontext *ibctx)
fe2caefc
PP		 519{
520 struct ocrdma_mm *mm, *tmp;
521 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ibctx);
1afc0454
NG		 522 struct ocrdma_dev *dev = get_ocrdma_dev(ibctx->device);
523 struct pci_dev *pdev = dev->nic_info.pdev;
fe2caefc 524
a2a074ef 525 ocrdma_dealloc_ucontext_pd(uctx);
cffce990 526
fe2caefc
PP		 527 ocrdma_del_mmap(uctx, uctx->ah_tbl.pa, uctx->ah_tbl.len);
528 dma_free_coherent(&pdev->dev, uctx->ah_tbl.len, uctx->ah_tbl.va,
529 uctx->ah_tbl.pa);
530
531 list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) {
532 list_del(&mm->entry);
533 kfree(mm);
534 }
fe2caefc
PP		 535}
536
537int ocrdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
538{
539 struct ocrdma_ucontext *ucontext = get_ocrdma_ucontext(context);
1afc0454 540 struct ocrdma_dev *dev = get_ocrdma_dev(context->device);
fe2caefc
PP		 541 unsigned long vm_page = vma->vm_pgoff << PAGE_SHIFT;
542 u64 unmapped_db = (u64) dev->nic_info.unmapped_db;
543 unsigned long len = (vma->vm_end - vma->vm_start);
0ca4c39f 544 int status;
fe2caefc
PP		 545 bool found;
546
547 if (vma->vm_start & (PAGE_SIZE - 1))
548 return -EINVAL;
549 found = ocrdma_search_mmap(ucontext, vma->vm_pgoff << PAGE_SHIFT, len);
550 if (!found)
551 return -EINVAL;
552
553 if ((vm_page >= unmapped_db) && (vm_page <= (unmapped_db +
554 dev->nic_info.db_total_size)) &&
555 (len <= dev->nic_info.db_page_size)) {
43a6b402
NG		 556 if (vma->vm_flags & VM_READ)
557 return -EPERM;
558
559 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
fe2caefc
PP		 560 status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
561 len, vma->vm_page_prot);
562 } else if (dev->nic_info.dpp_unmapped_len &&
563 (vm_page >= (u64) dev->nic_info.dpp_unmapped_addr) &&
564 (vm_page <= (u64) (dev->nic_info.dpp_unmapped_addr +
565 dev->nic_info.dpp_unmapped_len)) &&
566 (len <= dev->nic_info.dpp_unmapped_len)) {
43a6b402
NG		 567 if (vma->vm_flags & VM_READ)
568 return -EPERM;
569
fe2caefc
PP		 570 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
571 status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
572 len, vma->vm_page_prot);
573 } else {
fe2caefc
PP		 574 status = remap_pfn_range(vma, vma->vm_start,
575 vma->vm_pgoff, len, vma->vm_page_prot);
576 }
577 return status;
578}
579
45e86b33 580static int ocrdma_copy_pd_uresp(struct ocrdma_dev *dev, struct ocrdma_pd *pd,
fe2caefc
PP		 581 struct ib_udata *udata)
582{
583 int status;
584 u64 db_page_addr;
da496438 585 u64 dpp_page_addr = 0;
fe2caefc
PP		 586 u32 db_page_size;
587 struct ocrdma_alloc_pd_uresp rsp;
ff23dfa1
SR		 588 struct ocrdma_ucontext *uctx = rdma_udata_to_drv_context(
589 udata, struct ocrdma_ucontext, ibucontext);
fe2caefc 590
63ea3749 591 memset(&rsp, 0, sizeof(rsp));
fe2caefc
PP		 592 rsp.id = pd->id;
593 rsp.dpp_enabled = pd->dpp_enabled;
cffce990 594 db_page_addr = ocrdma_get_db_addr(dev, pd->id);
f99b1649 595 db_page_size = dev->nic_info.db_page_size;
fe2caefc
PP		 596
597 status = ocrdma_add_mmap(uctx, db_page_addr, db_page_size);
598 if (status)
599 return status;
600
601 if (pd->dpp_enabled) {
f99b1649 602 dpp_page_addr = dev->nic_info.dpp_unmapped_addr +
43a6b402 603 (pd->id * PAGE_SIZE);
fe2caefc 604 status = ocrdma_add_mmap(uctx, dpp_page_addr,
43a6b402 605 PAGE_SIZE);
fe2caefc
PP		 606 if (status)
607 goto dpp_map_err;
608 rsp.dpp_page_addr_hi = upper_32_bits(dpp_page_addr);
609 rsp.dpp_page_addr_lo = dpp_page_addr;
610 }
611
612 status = ib_copy_to_udata(udata, &rsp, sizeof(rsp));
613 if (status)
614 goto ucopy_err;
615
616 pd->uctx = uctx;
617 return 0;
618
619ucopy_err:
da496438 620 if (pd->dpp_enabled)
43a6b402 621 ocrdma_del_mmap(pd->uctx, dpp_page_addr, PAGE_SIZE);
fe2caefc
PP		 622dpp_map_err:
623 ocrdma_del_mmap(pd->uctx, db_page_addr, db_page_size);
624 return status;
625}
626
ff23dfa1 627int ocrdma_alloc_pd(struct ib_pd *ibpd, struct ib_udata *udata)
fe2caefc 628{
21a428a0 629 struct ib_device *ibdev = ibpd->device;
fe2caefc
PP		 630 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
631 struct ocrdma_pd *pd;
632 int status;
cffce990 633 u8 is_uctx_pd = false;
ff23dfa1
SR		 634 struct ocrdma_ucontext *uctx = rdma_udata_to_drv_context(
635 udata, struct ocrdma_ucontext, ibucontext);
fe2caefc 636
ff23dfa1 637 if (udata) {
cffce990
NG		 638 pd = ocrdma_get_ucontext_pd(uctx);
639 if (pd) {
640 is_uctx_pd = true;
641 goto pd_mapping;
43a6b402 642 }
fe2caefc 643 }
fe2caefc 644
21a428a0
LR		 645 pd = get_ocrdma_pd(ibpd);
646 status = _ocrdma_alloc_pd(dev, pd, uctx, udata);
647 if (status)
cffce990 648 goto exit;
cffce990
NG		 649
650pd_mapping:
ff23dfa1
SR		 651 if (udata) {
652 status = ocrdma_copy_pd_uresp(dev, pd, udata);
fe2caefc
PP		 653 if (status)
654 goto err;
655 }
21a428a0 656 return 0;
fe2caefc
PP		 657
658err:
21a428a0 659 if (is_uctx_pd)
cffce990 660 ocrdma_release_ucontext_pd(uctx);
21a428a0
LR		 661 else
662 _ocrdma_dealloc_pd(dev, pd);
cffce990 663exit:
21a428a0 664 return status;
fe2caefc
PP		 665}
666
91a7c58f 667int ocrdma_dealloc_pd(struct ib_pd *ibpd, struct ib_udata *udata)
fe2caefc
PP		 668{
669 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
f99b1649 670 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
cffce990 671 struct ocrdma_ucontext *uctx = NULL;
fe2caefc
PP		 672 u64 usr_db;
673
cffce990
NG		 674 uctx = pd->uctx;
675 if (uctx) {
fe2caefc 676 u64 dpp_db = dev->nic_info.dpp_unmapped_addr +
cffce990 677 (pd->id * PAGE_SIZE);
fe2caefc 678 if (pd->dpp_enabled)
43a6b402 679 ocrdma_del_mmap(pd->uctx, dpp_db, PAGE_SIZE);
cffce990 680 usr_db = ocrdma_get_db_addr(dev, pd->id);
fe2caefc 681 ocrdma_del_mmap(pd->uctx, usr_db, dev->nic_info.db_page_size);
cffce990
NG		 682
683 if (is_ucontext_pd(uctx, pd)) {
684 ocrdma_release_ucontext_pd(uctx);
91a7c58f 685 return 0;
cffce990 686 }
fe2caefc 687 }
21a428a0 688 _ocrdma_dealloc_pd(dev, pd);
91a7c58f 689 return 0;
fe2caefc
PP		 690}
691
1afc0454
NG		 692static int ocrdma_alloc_lkey(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
693 u32 pdid, int acc, u32 num_pbls, u32 addr_check)
fe2caefc
PP		 694{
695 int status;
fe2caefc 696
fe2caefc
PP		 697 mr->hwmr.fr_mr = 0;
698 mr->hwmr.local_rd = 1;
699 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
700 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
701 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
702 mr->hwmr.mw_bind = (acc & IB_ACCESS_MW_BIND) ? 1 : 0;
703 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
704 mr->hwmr.num_pbls = num_pbls;
705
f99b1649
NG		 706 status = ocrdma_mbx_alloc_lkey(dev, &mr->hwmr, pdid, addr_check);
707 if (status)
708 return status;
709
fe2caefc
PP		 710 mr->ibmr.lkey = mr->hwmr.lkey;
711 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
712 mr->ibmr.rkey = mr->hwmr.lkey;
f99b1649 713 return 0;
fe2caefc
PP		 714}
715
716struct ib_mr *ocrdma_get_dma_mr(struct ib_pd *ibpd, int acc)
717{
f99b1649 718 int status;
fe2caefc 719 struct ocrdma_mr *mr;
f99b1649
NG		 720 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
721 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
722
723 if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE)) {
724 pr_err("%s err, invalid access rights\n", __func__);
725 return ERR_PTR(-EINVAL);
726 }
fe2caefc 727
f99b1649
NG		 728 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
729 if (!mr)
730 return ERR_PTR(-ENOMEM);
731
1afc0454 732 status = ocrdma_alloc_lkey(dev, mr, pd->id, acc, 0,
f99b1649
NG		 733 OCRDMA_ADDR_CHECK_DISABLE);
734 if (status) {
735 kfree(mr);
736 return ERR_PTR(status);
737 }
fe2caefc
PP		 738
739 return &mr->ibmr;
740}
741
742static void ocrdma_free_mr_pbl_tbl(struct ocrdma_dev *dev,
743 struct ocrdma_hw_mr *mr)
744{
745 struct pci_dev *pdev = dev->nic_info.pdev;
746 int i = 0;
747
748 if (mr->pbl_table) {
749 for (i = 0; i < mr->num_pbls; i++) {
750 if (!mr->pbl_table[i].va)
751 continue;
752 dma_free_coherent(&pdev->dev, mr->pbl_size,
753 mr->pbl_table[i].va,
754 mr->pbl_table[i].pa);
755 }
756 kfree(mr->pbl_table);
757 mr->pbl_table = NULL;
758 }
759}
760
1afc0454
NG		 761static int ocrdma_get_pbl_info(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
762 u32 num_pbes)
fe2caefc
PP		 763{
764 u32 num_pbls = 0;
765 u32 idx = 0;
766 int status = 0;
767 u32 pbl_size;
768
769 do {
770 pbl_size = OCRDMA_MIN_HPAGE_SIZE * (1 << idx);
771 if (pbl_size > MAX_OCRDMA_PBL_SIZE) {
772 status = -EFAULT;
773 break;
774 }
775 num_pbls = roundup(num_pbes, (pbl_size / sizeof(u64)));
776 num_pbls = num_pbls / (pbl_size / sizeof(u64));
777 idx++;
1afc0454 778 } while (num_pbls >= dev->attr.max_num_mr_pbl);
fe2caefc
PP		 779
780 mr->hwmr.num_pbes = num_pbes;
781 mr->hwmr.num_pbls = num_pbls;
782 mr->hwmr.pbl_size = pbl_size;
783 return status;
784}
785
786static int ocrdma_build_pbl_tbl(struct ocrdma_dev *dev, struct ocrdma_hw_mr *mr)
787{
788 int status = 0;
789 int i;
790 u32 dma_len = mr->pbl_size;
791 struct pci_dev *pdev = dev->nic_info.pdev;
792 void *va;
793 dma_addr_t pa;
794
6396bb22
KC		 795 mr->pbl_table = kcalloc(mr->num_pbls, sizeof(struct ocrdma_pbl),
796 GFP_KERNEL);
fe2caefc
PP		 797
798 if (!mr->pbl_table)
799 return -ENOMEM;
800
801 for (i = 0; i < mr->num_pbls; i++) {
750afb08 802 va = dma_alloc_coherent(&pdev->dev, dma_len, &pa, GFP_KERNEL);
fe2caefc
PP		 803 if (!va) {
804 ocrdma_free_mr_pbl_tbl(dev, mr);
805 status = -ENOMEM;
806 break;
807 }
fe2caefc
PP		 808 mr->pbl_table[i].va = va;
809 mr->pbl_table[i].pa = pa;
810 }
811 return status;
812}
813
b8387f81 814static void build_user_pbes(struct ocrdma_dev *dev, struct ocrdma_mr *mr)
fe2caefc
PP		 815{
816 struct ocrdma_pbe *pbe;
89603f7e 817 struct ib_block_iter biter;
fe2caefc 818 struct ocrdma_pbl *pbl_tbl = mr->hwmr.pbl_table;
b8387f81 819 int pbe_cnt;
be8c456a 820 u64 pg_addr;
fe2caefc
PP		 821
822 if (!mr->hwmr.num_pbes)
823 return;
824
825 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
826 pbe_cnt = 0;
827
89603f7e 828 rdma_umem_for_each_dma_block (mr->umem, &biter, PAGE_SIZE) {
be8c456a 829 /* store the page address in pbe */
89603f7e 830 pg_addr = rdma_block_iter_dma_address(&biter);
be8c456a
SS		 831 pbe->pa_lo = cpu_to_le32(pg_addr);
832 pbe->pa_hi = cpu_to_le32(upper_32_bits(pg_addr));
833 pbe_cnt += 1;
be8c456a
SS		 834 pbe++;
835
be8c456a
SS		 836 /* if the given pbl is full storing the pbes,
837 * move to next pbl.
838 */
839 if (pbe_cnt == (mr->hwmr.pbl_size / sizeof(u64))) {
840 pbl_tbl++;
841 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
842 pbe_cnt = 0;
fe2caefc
PP		 843 }
844 }
845}
846
847struct ib_mr *ocrdma_reg_user_mr(struct ib_pd *ibpd, u64 start, u64 len,
848 u64 usr_addr, int acc, struct ib_udata *udata)
849{
850 int status = -ENOMEM;
f99b1649 851 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
fe2caefc
PP		 852 struct ocrdma_mr *mr;
853 struct ocrdma_pd *pd;
fe2caefc
PP		 854
855 pd = get_ocrdma_pd(ibpd);
fe2caefc
PP		 856
857 if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE))
858 return ERR_PTR(-EINVAL);
859
860 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
861 if (!mr)
862 return ERR_PTR(status);
c320e527 863 mr->umem = ib_umem_get(ibpd->device, start, len, acc);
fe2caefc
PP		 864 if (IS_ERR(mr->umem)) {
865 status = -EFAULT;
866 goto umem_err;
867 }
b8387f81
JG		 868 status = ocrdma_get_pbl_info(
869 dev, mr, ib_umem_num_dma_blocks(mr->umem, PAGE_SIZE));
fe2caefc
PP		 870 if (status)
871 goto umem_err;
872
be8c456a 873 mr->hwmr.pbe_size = PAGE_SIZE;
fe2caefc
PP		 874 mr->hwmr.va = usr_addr;
875 mr->hwmr.len = len;
876 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
877 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
878 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
879 mr->hwmr.local_rd = 1;
880 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
881 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
882 if (status)
883 goto umem_err;
b8387f81 884 build_user_pbes(dev, mr);
fe2caefc
PP		 885 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, acc);
886 if (status)
887 goto mbx_err;
fe2caefc
PP		 888 mr->ibmr.lkey = mr->hwmr.lkey;
889 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
890 mr->ibmr.rkey = mr->hwmr.lkey;
891
892 return &mr->ibmr;
893
894mbx_err:
895 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
896umem_err:
897 kfree(mr);
898 return ERR_PTR(status);
899}
900
c4367a26 901int ocrdma_dereg_mr(struct ib_mr *ib_mr, struct ib_udata *udata)
fe2caefc
PP		 902{
903 struct ocrdma_mr *mr = get_ocrdma_mr(ib_mr);
1afc0454 904 struct ocrdma_dev *dev = get_ocrdma_dev(ib_mr->device);
fe2caefc 905
4b8180aa 906 (void) ocrdma_mbx_dealloc_lkey(dev, mr->hwmr.fr_mr, mr->hwmr.lkey);
fe2caefc 907
2eaa1c56 908 kfree(mr->pages);
9d1878a3 909 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
fe2caefc 910
fe2caefc 911 /* it could be user registered memory. */
836a0fbb 912 ib_umem_release(mr->umem);
fe2caefc 913 kfree(mr);
6dab0264
MA		 914
915 /* Don't stop cleanup, in case FW is unresponsive */
916 if (dev->mqe_ctx.fw_error_state) {
6dab0264
MA		 917 pr_err("%s(%d) fw not responding.\n",
918 __func__, dev->id);
919 }
4b8180aa 920 return 0;
fe2caefc
PP		 921}
922
1afc0454 923static int ocrdma_copy_cq_uresp(struct ocrdma_dev *dev, struct ocrdma_cq *cq,
ff23dfa1 924 struct ib_udata *udata)
fe2caefc
PP		 925{
926 int status;
ff23dfa1
SR		 927 struct ocrdma_ucontext *uctx = rdma_udata_to_drv_context(
928 udata, struct ocrdma_ucontext, ibucontext);
fe2caefc
PP		 929 struct ocrdma_create_cq_uresp uresp;
930
ff23dfa1
SR		 931 /* this must be user flow! */
932 if (!udata)
933 return -EINVAL;
934
63ea3749 935 memset(&uresp, 0, sizeof(uresp));
fe2caefc 936 uresp.cq_id = cq->id;
43a6b402 937 uresp.page_size = PAGE_ALIGN(cq->len);
fe2caefc
PP		 938 uresp.num_pages = 1;
939 uresp.max_hw_cqe = cq->max_hw_cqe;
1b76d383 940 uresp.page_addr[0] = virt_to_phys(cq->va);
cffce990 941 uresp.db_page_addr = ocrdma_get_db_addr(dev, uctx->cntxt_pd->id);
1afc0454 942 uresp.db_page_size = dev->nic_info.db_page_size;
fe2caefc
PP		 943 uresp.phase_change = cq->phase_change ? 1 : 0;
944 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
945 if (status) {
ef99c4c2 946 pr_err("%s(%d) copy error cqid=0x%x.\n",
1afc0454 947 __func__, dev->id, cq->id);
fe2caefc
PP		 948 goto err;
949 }
fe2caefc
PP		 950 status = ocrdma_add_mmap(uctx, uresp.db_page_addr, uresp.db_page_size);
951 if (status)
952 goto err;
953 status = ocrdma_add_mmap(uctx, uresp.page_addr[0], uresp.page_size);
954 if (status) {
955 ocrdma_del_mmap(uctx, uresp.db_page_addr, uresp.db_page_size);
956 goto err;
957 }
958 cq->ucontext = uctx;
959err:
960 return status;
961}
962
e39afe3d
LR		 963int ocrdma_create_cq(struct ib_cq *ibcq, const struct ib_cq_init_attr *attr,
964 struct ib_udata *udata)
fe2caefc 965{
e39afe3d 966 struct ib_device *ibdev = ibcq->device;
bcf4c1ea 967 int entries = attr->cqe;
e39afe3d 968 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
fe2caefc 969 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
ff23dfa1
SR		 970 struct ocrdma_ucontext *uctx = rdma_udata_to_drv_context(
971 udata, struct ocrdma_ucontext, ibucontext);
cffce990 972 u16 pd_id = 0;
fe2caefc
PP		 973 int status;
974 struct ocrdma_create_cq_ureq ureq;
975
bcf4c1ea 976 if (attr->flags)
1c407cb5 977 return -EOPNOTSUPP;
bcf4c1ea 978
fe2caefc
PP		 979 if (udata) {
980 if (ib_copy_from_udata(&ureq, udata, sizeof(ureq)))
e39afe3d 981 return -EFAULT;
fe2caefc
PP		 982 } else
983 ureq.dpp_cq = 0;
fe2caefc
PP		 984
985 spin_lock_init(&cq->cq_lock);
986 spin_lock_init(&cq->comp_handler_lock);
fe2caefc
PP		 987 INIT_LIST_HEAD(&cq->sq_head);
988 INIT_LIST_HEAD(&cq->rq_head);
fe2caefc 989
ff23dfa1 990 if (udata)
cffce990 991 pd_id = uctx->cntxt_pd->id;
cffce990
NG		 992
993 status = ocrdma_mbx_create_cq(dev, cq, entries, ureq.dpp_cq, pd_id);
e39afe3d
LR		 994 if (status)
995 return status;
996
ff23dfa1
SR		 997 if (udata) {
998 status = ocrdma_copy_cq_uresp(dev, cq, udata);
fe2caefc
PP		 999 if (status)
1000 goto ctx_err;
1001 }
1002 cq->phase = OCRDMA_CQE_VALID;
fe2caefc 1003 dev->cq_tbl[cq->id] = cq;
e39afe3d 1004 return 0;
fe2caefc
PP		 1005
1006ctx_err:
1007 ocrdma_mbx_destroy_cq(dev, cq);
e39afe3d 1008 return status;
fe2caefc
PP		 1009}
1010
1011int ocrdma_resize_cq(struct ib_cq *ibcq, int new_cnt,
1012 struct ib_udata *udata)
1013{
1014 int status = 0;
1015 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
1016
1017 if (new_cnt < 1 || new_cnt > cq->max_hw_cqe) {
1018 status = -EINVAL;
1019 return status;
1020 }
1021 ibcq->cqe = new_cnt;
1022 return status;
1023}
1024
ea617626
DS		 1025static void ocrdma_flush_cq(struct ocrdma_cq *cq)
1026{
1027 int cqe_cnt;
1028 int valid_count = 0;
1029 unsigned long flags;
1030
1031 struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device);
1032 struct ocrdma_cqe *cqe = NULL;
1033
1034 cqe = cq->va;
1035 cqe_cnt = cq->cqe_cnt;
1036
1037 /* Last irq might have scheduled a polling thread
1038 * sync-up with it before hard flushing.
1039 */
1040 spin_lock_irqsave(&cq->cq_lock, flags);
1041 while (cqe_cnt) {
1042 if (is_cqe_valid(cq, cqe))
1043 valid_count++;
1044 cqe++;
1045 cqe_cnt--;
1046 }
1047 ocrdma_ring_cq_db(dev, cq->id, false, false, valid_count);
1048 spin_unlock_irqrestore(&cq->cq_lock, flags);
1049}
1050
43d781b9 1051int ocrdma_destroy_cq(struct ib_cq *ibcq, struct ib_udata *udata)
fe2caefc 1052{
fe2caefc 1053 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
ea617626 1054 struct ocrdma_eq *eq = NULL;
1afc0454 1055 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
cffce990 1056 int pdid = 0;
ea617626 1057 u32 irq, indx;
fe2caefc 1058
ea617626
DS		 1059 dev->cq_tbl[cq->id] = NULL;
1060 indx = ocrdma_get_eq_table_index(dev, cq->eqn);
fe2caefc 1061
ea617626
DS		 1062 eq = &dev->eq_tbl[indx];
1063 irq = ocrdma_get_irq(dev, eq);
1064 synchronize_irq(irq);
1065 ocrdma_flush_cq(cq);
fe2caefc 1066
a52c8e24 1067 ocrdma_mbx_destroy_cq(dev, cq);
fe2caefc 1068 if (cq->ucontext) {
cffce990 1069 pdid = cq->ucontext->cntxt_pd->id;
43a6b402
NG		 1070 ocrdma_del_mmap(cq->ucontext, (u64) cq->pa,
1071 PAGE_ALIGN(cq->len));
cffce990
NG		 1072 ocrdma_del_mmap(cq->ucontext,
1073 ocrdma_get_db_addr(dev, pdid),
fe2caefc
PP		 1074 dev->nic_info.db_page_size);
1075 }
43d781b9 1076 return 0;
fe2caefc
PP		 1077}
1078
1079static int ocrdma_add_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp)
1080{
1081 int status = -EINVAL;
1082
1083 if (qp->id < OCRDMA_MAX_QP && dev->qp_tbl[qp->id] == NULL) {
1084 dev->qp_tbl[qp->id] = qp;
1085 status = 0;
1086 }
1087 return status;
1088}
1089
1090static void ocrdma_del_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp)
1091{
1092 dev->qp_tbl[qp->id] = NULL;
1093}
1094
1095static int ocrdma_check_qp_params(struct ib_pd *ibpd, struct ocrdma_dev *dev,
e00b64f7
SR		 1096 struct ib_qp_init_attr *attrs,
1097 struct ib_udata *udata)
fe2caefc 1098{
43a6b402
NG		 1099 if ((attrs->qp_type != IB_QPT_GSI) &&
1100 (attrs->qp_type != IB_QPT_RC) &&
1101 (attrs->qp_type != IB_QPT_UC) &&
1102 (attrs->qp_type != IB_QPT_UD)) {
ef99c4c2
NG		 1103 pr_err("%s(%d) unsupported qp type=0x%x requested\n",
1104 __func__, dev->id, attrs->qp_type);
bb8865f4 1105 return -EOPNOTSUPP;
fe2caefc 1106 }
43a6b402
NG		 1107 /* Skip the check for QP1 to support CM size of 128 */
1108 if ((attrs->qp_type != IB_QPT_GSI) &&
1109 (attrs->cap.max_send_wr > dev->attr.max_wqe)) {
ef99c4c2
NG		 1110 pr_err("%s(%d) unsupported send_wr=0x%x requested\n",
1111 __func__, dev->id, attrs->cap.max_send_wr);
1112 pr_err("%s(%d) supported send_wr=0x%x\n",
1113 __func__, dev->id, dev->attr.max_wqe);
fe2caefc
PP		 1114 return -EINVAL;
1115 }
1116 if (!attrs->srq && (attrs->cap.max_recv_wr > dev->attr.max_rqe)) {
ef99c4c2
NG		 1117 pr_err("%s(%d) unsupported recv_wr=0x%x requested\n",
1118 __func__, dev->id, attrs->cap.max_recv_wr);
1119 pr_err("%s(%d) supported recv_wr=0x%x\n",
1120 __func__, dev->id, dev->attr.max_rqe);
fe2caefc
PP		 1121 return -EINVAL;
1122 }
1123 if (attrs->cap.max_inline_data > dev->attr.max_inline_data) {
ef99c4c2
NG		 1124 pr_err("%s(%d) unsupported inline data size=0x%x requested\n",
1125 __func__, dev->id, attrs->cap.max_inline_data);
1126 pr_err("%s(%d) supported inline data size=0x%x\n",
1127 __func__, dev->id, dev->attr.max_inline_data);
fe2caefc
PP		 1128 return -EINVAL;
1129 }
1130 if (attrs->cap.max_send_sge > dev->attr.max_send_sge) {
ef99c4c2
NG		 1131 pr_err("%s(%d) unsupported send_sge=0x%x requested\n",
1132 __func__, dev->id, attrs->cap.max_send_sge);
1133 pr_err("%s(%d) supported send_sge=0x%x\n",
1134 __func__, dev->id, dev->attr.max_send_sge);
fe2caefc
PP		 1135 return -EINVAL;
1136 }
1137 if (attrs->cap.max_recv_sge > dev->attr.max_recv_sge) {
ef99c4c2
NG		 1138 pr_err("%s(%d) unsupported recv_sge=0x%x requested\n",
1139 __func__, dev->id, attrs->cap.max_recv_sge);
1140 pr_err("%s(%d) supported recv_sge=0x%x\n",
1141 __func__, dev->id, dev->attr.max_recv_sge);
fe2caefc
PP		 1142 return -EINVAL;
1143 }
1144 /* unprivileged user space cannot create special QP */
e00b64f7 1145 if (udata && attrs->qp_type == IB_QPT_GSI) {
ef99c4c2 1146 pr_err
fe2caefc
PP		 1147 ("%s(%d) Userspace can't create special QPs of type=0x%x\n",
1148 __func__, dev->id, attrs->qp_type);
1149 return -EINVAL;
1150 }
1151 /* allow creating only one GSI type of QP */
1152 if (attrs->qp_type == IB_QPT_GSI && dev->gsi_qp_created) {
ef99c4c2
NG		 1153 pr_err("%s(%d) GSI special QPs already created.\n",
1154 __func__, dev->id);
fe2caefc
PP		 1155 return -EINVAL;
1156 }
1157 /* verify consumer QPs are not trying to use GSI QP's CQ */
1158 if ((attrs->qp_type != IB_QPT_GSI) && (dev->gsi_qp_created)) {
1159 if ((dev->gsi_sqcq == get_ocrdma_cq(attrs->send_cq)) ||
43a6b402 1160 (dev->gsi_rqcq == get_ocrdma_cq(attrs->recv_cq))) {
ef99c4c2 1161 pr_err("%s(%d) Consumer QP cannot use GSI CQs.\n",
43a6b402 1162 __func__, dev->id);
fe2caefc
PP		 1163 return -EINVAL;
1164 }
1165 }
1166 return 0;
1167}
1168
1169static int ocrdma_copy_qp_uresp(struct ocrdma_qp *qp,
1170 struct ib_udata *udata, int dpp_offset,
1171 int dpp_credit_lmt, int srq)
1172{
0ca4c39f 1173 int status;
fe2caefc
PP		 1174 u64 usr_db;
1175 struct ocrdma_create_qp_uresp uresp;
fe2caefc 1176 struct ocrdma_pd *pd = qp->pd;
d2b8f7b1 1177 struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device);
fe2caefc
PP		 1178
1179 memset(&uresp, 0, sizeof(uresp));
1180 usr_db = dev->nic_info.unmapped_db +
1181 (pd->id * dev->nic_info.db_page_size);
1182 uresp.qp_id = qp->id;
1183 uresp.sq_dbid = qp->sq.dbid;
1184 uresp.num_sq_pages = 1;
43a6b402 1185 uresp.sq_page_size = PAGE_ALIGN(qp->sq.len);
1b76d383 1186 uresp.sq_page_addr[0] = virt_to_phys(qp->sq.va);
fe2caefc
PP		 1187 uresp.num_wqe_allocated = qp->sq.max_cnt;
1188 if (!srq) {
1189 uresp.rq_dbid = qp->rq.dbid;
1190 uresp.num_rq_pages = 1;
43a6b402 1191 uresp.rq_page_size = PAGE_ALIGN(qp->rq.len);
1b76d383 1192 uresp.rq_page_addr[0] = virt_to_phys(qp->rq.va);
fe2caefc
PP		 1193 uresp.num_rqe_allocated = qp->rq.max_cnt;
1194 }
1195 uresp.db_page_addr = usr_db;
1196 uresp.db_page_size = dev->nic_info.db_page_size;
2df84fa8
DS		 1197 uresp.db_sq_offset = OCRDMA_DB_GEN2_SQ_OFFSET;
1198 uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET;
1199 uresp.db_shift = OCRDMA_DB_RQ_SHIFT;
fe2caefc
PP		 1200
1201 if (qp->dpp_enabled) {
1202 uresp.dpp_credit = dpp_credit_lmt;
1203 uresp.dpp_offset = dpp_offset;
1204 }
1205 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1206 if (status) {
ef99c4c2 1207 pr_err("%s(%d) user copy error.\n", __func__, dev->id);
fe2caefc
PP		 1208 goto err;
1209 }
1210 status = ocrdma_add_mmap(pd->uctx, uresp.sq_page_addr[0],
1211 uresp.sq_page_size);
1212 if (status)
1213 goto err;
1214
1215 if (!srq) {
1216 status = ocrdma_add_mmap(pd->uctx, uresp.rq_page_addr[0],
1217 uresp.rq_page_size);
1218 if (status)
1219 goto rq_map_err;
1220 }
1221 return status;
1222rq_map_err:
1223 ocrdma_del_mmap(pd->uctx, uresp.sq_page_addr[0], uresp.sq_page_size);
1224err:
1225 return status;
1226}
1227
1228static void ocrdma_set_qp_db(struct ocrdma_dev *dev, struct ocrdma_qp *qp,
1229 struct ocrdma_pd *pd)
1230{
21c3391a 1231 if (ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R) {
fe2caefc
PP		 1232 qp->sq_db = dev->nic_info.db +
1233 (pd->id * dev->nic_info.db_page_size) +
1234 OCRDMA_DB_GEN2_SQ_OFFSET;
1235 qp->rq_db = dev->nic_info.db +
1236 (pd->id * dev->nic_info.db_page_size) +
f11220ee 1237 OCRDMA_DB_GEN2_RQ_OFFSET;
fe2caefc
PP		 1238 } else {
1239 qp->sq_db = dev->nic_info.db +
1240 (pd->id * dev->nic_info.db_page_size) +
1241 OCRDMA_DB_SQ_OFFSET;
1242 qp->rq_db = dev->nic_info.db +
1243 (pd->id * dev->nic_info.db_page_size) +
1244 OCRDMA_DB_RQ_OFFSET;
1245 }
1246}
1247
1248static int ocrdma_alloc_wr_id_tbl(struct ocrdma_qp *qp)
1249{
1250 qp->wqe_wr_id_tbl =
6396bb22 1251 kcalloc(qp->sq.max_cnt, sizeof(*(qp->wqe_wr_id_tbl)),
fe2caefc
PP		 1252 GFP_KERNEL);
1253 if (qp->wqe_wr_id_tbl == NULL)
1254 return -ENOMEM;
1255 qp->rqe_wr_id_tbl =
6396bb22 1256 kcalloc(qp->rq.max_cnt, sizeof(u64), GFP_KERNEL);
fe2caefc
PP		 1257 if (qp->rqe_wr_id_tbl == NULL)
1258 return -ENOMEM;
1259
1260 return 0;
1261}
1262
1263static void ocrdma_set_qp_init_params(struct ocrdma_qp *qp,
1264 struct ocrdma_pd *pd,
1265 struct ib_qp_init_attr *attrs)
1266{
1267 qp->pd = pd;
1268 spin_lock_init(&qp->q_lock);
1269 INIT_LIST_HEAD(&qp->sq_entry);
1270 INIT_LIST_HEAD(&qp->rq_entry);
1271
1272 qp->qp_type = attrs->qp_type;
1273 qp->cap_flags = OCRDMA_QP_INB_RD | OCRDMA_QP_INB_WR;
1274 qp->max_inline_data = attrs->cap.max_inline_data;
1275 qp->sq.max_sges = attrs->cap.max_send_sge;
1276 qp->rq.max_sges = attrs->cap.max_recv_sge;
1277 qp->state = OCRDMA_QPS_RST;
2b51a9b9 1278 qp->signaled = (attrs->sq_sig_type == IB_SIGNAL_ALL_WR) ? true : false;
fe2caefc
PP		 1279}
1280
fe2caefc
PP		 1281static void ocrdma_store_gsi_qp_cq(struct ocrdma_dev *dev,
1282 struct ib_qp_init_attr *attrs)
1283{
1284 if (attrs->qp_type == IB_QPT_GSI) {
1285 dev->gsi_qp_created = 1;
1286 dev->gsi_sqcq = get_ocrdma_cq(attrs->send_cq);
1287 dev->gsi_rqcq = get_ocrdma_cq(attrs->recv_cq);
1288 }
1289}
1290
514aee66
LR		 1291int ocrdma_create_qp(struct ib_qp *ibqp, struct ib_qp_init_attr *attrs,
1292 struct ib_udata *udata)
fe2caefc
PP		 1293{
1294 int status;
514aee66 1295 struct ib_pd *ibpd = ibqp->pd;
fe2caefc 1296 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
514aee66
LR		 1297 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
1298 struct ocrdma_dev *dev = get_ocrdma_dev(ibqp->device);
fe2caefc
PP		 1299 struct ocrdma_create_qp_ureq ureq;
1300 u16 dpp_credit_lmt, dpp_offset;
1301
1f11a761 1302 if (attrs->create_flags)
514aee66 1303 return -EOPNOTSUPP;
1f11a761 1304
e00b64f7 1305 status = ocrdma_check_qp_params(ibpd, dev, attrs, udata);
fe2caefc
PP		 1306 if (status)
1307 goto gen_err;
1308
1309 memset(&ureq, 0, sizeof(ureq));
1310 if (udata) {
1311 if (ib_copy_from_udata(&ureq, udata, sizeof(ureq)))
514aee66 1312 return -EFAULT;
fe2caefc 1313 }
fe2caefc 1314 ocrdma_set_qp_init_params(qp, pd, attrs);
43a6b402
NG		 1315 if (udata == NULL)
1316 qp->cap_flags |= (OCRDMA_QP_MW_BIND | OCRDMA_QP_LKEY0 |
1317 OCRDMA_QP_FAST_REG);
fe2caefc
PP		 1318
1319 mutex_lock(&dev->dev_lock);
1320 status = ocrdma_mbx_create_qp(qp, attrs, ureq.enable_dpp_cq,
1321 ureq.dpp_cq_id,
1322 &dpp_offset, &dpp_credit_lmt);
1323 if (status)
1324 goto mbx_err;
1325
1326 /* user space QP's wr_id table are managed in library */
1327 if (udata == NULL) {
fe2caefc
PP		 1328 status = ocrdma_alloc_wr_id_tbl(qp);
1329 if (status)
1330 goto map_err;
1331 }
1332
1333 status = ocrdma_add_qpn_map(dev, qp);
1334 if (status)
1335 goto map_err;
1336 ocrdma_set_qp_db(dev, qp, pd);
1337 if (udata) {
1338 status = ocrdma_copy_qp_uresp(qp, udata, dpp_offset,
1339 dpp_credit_lmt,
1340 (attrs->srq != NULL));
1341 if (status)
1342 goto cpy_err;
1343 }
1344 ocrdma_store_gsi_qp_cq(dev, attrs);
27159f50 1345 qp->ibqp.qp_num = qp->id;
fe2caefc 1346 mutex_unlock(&dev->dev_lock);
514aee66 1347 return 0;
fe2caefc
PP		 1348
1349cpy_err:
1350 ocrdma_del_qpn_map(dev, qp);
1351map_err:
1352 ocrdma_mbx_destroy_qp(dev, qp);
1353mbx_err:
1354 mutex_unlock(&dev->dev_lock);
1355 kfree(qp->wqe_wr_id_tbl);
1356 kfree(qp->rqe_wr_id_tbl);
ef99c4c2 1357 pr_err("%s(%d) error=%d\n", __func__, dev->id, status);
fe2caefc 1358gen_err:
514aee66 1359 return status;
fe2caefc
PP		 1360}
1361
1362int _ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1363 int attr_mask)
1364{
1365 int status = 0;
1366 struct ocrdma_qp *qp;
1367 struct ocrdma_dev *dev;
1368 enum ib_qp_state old_qps;
1369
1370 qp = get_ocrdma_qp(ibqp);
d2b8f7b1 1371 dev = get_ocrdma_dev(ibqp->device);
fe2caefc 1372 if (attr_mask & IB_QP_STATE)
057729cb 1373 status = ocrdma_qp_state_change(qp, attr->qp_state, &old_qps);
fe2caefc
PP		 1374 /* if new and previous states are same hw doesn't need to
1375 * know about it.
1376 */
1377 if (status < 0)
1378 return status;
95f60bb8 1379 return ocrdma_mbx_modify_qp(dev, qp, attr, attr_mask);
fe2caefc
PP		 1380}
1381
1382int ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1383 int attr_mask, struct ib_udata *udata)
1384{
1385 unsigned long flags;
1386 int status = -EINVAL;
1387 struct ocrdma_qp *qp;
1388 struct ocrdma_dev *dev;
1389 enum ib_qp_state old_qps, new_qps;
1390
26e990ba
JG		 1391 if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
1392 return -EOPNOTSUPP;
1393
fe2caefc 1394 qp = get_ocrdma_qp(ibqp);
d2b8f7b1 1395 dev = get_ocrdma_dev(ibqp->device);
fe2caefc
PP		 1396
1397 /* syncronize with multiple context trying to change, retrive qps */
1398 mutex_lock(&dev->dev_lock);
1399 /* syncronize with wqe, rqe posting and cqe processing contexts */
1400 spin_lock_irqsave(&qp->q_lock, flags);
1401 old_qps = get_ibqp_state(qp->state);
1402 if (attr_mask & IB_QP_STATE)
1403 new_qps = attr->qp_state;
1404 else
1405 new_qps = old_qps;
1406 spin_unlock_irqrestore(&qp->q_lock, flags);
1407
d31131bb 1408 if (!ib_modify_qp_is_ok(old_qps, new_qps, ibqp->qp_type, attr_mask)) {
ef99c4c2
NG		 1409 pr_err("%s(%d) invalid attribute mask=0x%x specified for\n"
1410 "qpn=0x%x of type=0x%x old_qps=0x%x, new_qps=0x%x\n",
1411 __func__, dev->id, attr_mask, qp->id, ibqp->qp_type,
1412 old_qps, new_qps);
fe2caefc
PP		 1413 goto param_err;
1414 }
1415
1416 status = _ocrdma_modify_qp(ibqp, attr, attr_mask);
1417 if (status > 0)
1418 status = 0;
1419param_err:
1420 mutex_unlock(&dev->dev_lock);
1421 return status;
1422}
1423
1424static enum ib_mtu ocrdma_mtu_int_to_enum(u16 mtu)
1425{
1426 switch (mtu) {
1427 case 256:
1428 return IB_MTU_256;
1429 case 512:
1430 return IB_MTU_512;
1431 case 1024:
1432 return IB_MTU_1024;
1433 case 2048:
1434 return IB_MTU_2048;
1435 case 4096:
1436 return IB_MTU_4096;
1437 default:
1438 return IB_MTU_1024;
1439 }
1440}
1441
1442static int ocrdma_to_ib_qp_acc_flags(int qp_cap_flags)
1443{
1444 int ib_qp_acc_flags = 0;
1445
1446 if (qp_cap_flags & OCRDMA_QP_INB_WR)
1447 ib_qp_acc_flags |= IB_ACCESS_REMOTE_WRITE;
1448 if (qp_cap_flags & OCRDMA_QP_INB_RD)
1449 ib_qp_acc_flags |= IB_ACCESS_LOCAL_WRITE;
1450 return ib_qp_acc_flags;
1451}
1452
1453int ocrdma_query_qp(struct ib_qp *ibqp,
1454 struct ib_qp_attr *qp_attr,
1455 int attr_mask, struct ib_qp_init_attr *qp_init_attr)
1456{
1457 int status;
1458 u32 qp_state;
1459 struct ocrdma_qp_params params;
1460 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
d2b8f7b1 1461 struct ocrdma_dev *dev = get_ocrdma_dev(ibqp->device);
fe2caefc
PP		 1462
1463 memset(&params, 0, sizeof(params));
1464 mutex_lock(&dev->dev_lock);
1465 status = ocrdma_mbx_query_qp(dev, qp, &params);
1466 mutex_unlock(&dev->dev_lock);
1467 if (status)
1468 goto mbx_err;
95bf0093
MA		 1469 if (qp->qp_type == IB_QPT_UD)
1470 qp_attr->qkey = params.qkey;
fe2caefc
PP		 1471 qp_attr->path_mtu =
1472 ocrdma_mtu_int_to_enum(params.path_mtu_pkey_indx &
1473 OCRDMA_QP_PARAMS_PATH_MTU_MASK) >>
1474 OCRDMA_QP_PARAMS_PATH_MTU_SHIFT;
1475 qp_attr->path_mig_state = IB_MIG_MIGRATED;
1476 qp_attr->rq_psn = params.hop_lmt_rq_psn & OCRDMA_QP_PARAMS_RQ_PSN_MASK;
1477 qp_attr->sq_psn = params.tclass_sq_psn & OCRDMA_QP_PARAMS_SQ_PSN_MASK;
1478 qp_attr->dest_qp_num =
1479 params.ack_to_rnr_rtc_dest_qpn & OCRDMA_QP_PARAMS_DEST_QPN_MASK;
1480
1481 qp_attr->qp_access_flags = ocrdma_to_ib_qp_acc_flags(qp->cap_flags);
1482 qp_attr->cap.max_send_wr = qp->sq.max_cnt - 1;
1483 qp_attr->cap.max_recv_wr = qp->rq.max_cnt - 1;
1484 qp_attr->cap.max_send_sge = qp->sq.max_sges;
1485 qp_attr->cap.max_recv_sge = qp->rq.max_sges;
c43e9ab8 1486 qp_attr->cap.max_inline_data = qp->max_inline_data;
fe2caefc 1487 qp_init_attr->cap = qp_attr->cap;
44c58487 1488 qp_attr->ah_attr.type = RDMA_AH_ATTR_TYPE_ROCE;
d8966fcd
DC		 1489
1490 rdma_ah_set_grh(&qp_attr->ah_attr, NULL,
1491 params.rnt_rc_sl_fl &
1492 OCRDMA_QP_PARAMS_FLOW_LABEL_MASK,
1493 qp->sgid_idx,
1494 (params.hop_lmt_rq_psn &
1495 OCRDMA_QP_PARAMS_HOP_LMT_MASK) >>
1496 OCRDMA_QP_PARAMS_HOP_LMT_SHIFT,
1497 (params.tclass_sq_psn &
1498 OCRDMA_QP_PARAMS_TCLASS_MASK) >>
1499 OCRDMA_QP_PARAMS_TCLASS_SHIFT);
1500 rdma_ah_set_dgid_raw(&qp_attr->ah_attr, &params.dgid[0]);
1501
1502 rdma_ah_set_port_num(&qp_attr->ah_attr, 1);
1503 rdma_ah_set_sl(&qp_attr->ah_attr, (params.rnt_rc_sl_fl &
1504 OCRDMA_QP_PARAMS_SL_MASK) >>
1505 OCRDMA_QP_PARAMS_SL_SHIFT);
fe2caefc
PP		 1506 qp_attr->timeout = (params.ack_to_rnr_rtc_dest_qpn &
1507 OCRDMA_QP_PARAMS_ACK_TIMEOUT_MASK) >>
1508 OCRDMA_QP_PARAMS_ACK_TIMEOUT_SHIFT;
1509 qp_attr->rnr_retry = (params.ack_to_rnr_rtc_dest_qpn &
1510 OCRDMA_QP_PARAMS_RNR_RETRY_CNT_MASK) >>
1511 OCRDMA_QP_PARAMS_RNR_RETRY_CNT_SHIFT;
1512 qp_attr->retry_cnt =
1513 (params.rnt_rc_sl_fl & OCRDMA_QP_PARAMS_RETRY_CNT_MASK) >>
1514 OCRDMA_QP_PARAMS_RETRY_CNT_SHIFT;
1515 qp_attr->min_rnr_timer = 0;
1516 qp_attr->pkey_index = 0;
1517 qp_attr->port_num = 1;
d8966fcd
DC		 1518 rdma_ah_set_path_bits(&qp_attr->ah_attr, 0);
1519 rdma_ah_set_static_rate(&qp_attr->ah_attr, 0);
fe2caefc
PP		 1520 qp_attr->alt_pkey_index = 0;
1521 qp_attr->alt_port_num = 0;
1522 qp_attr->alt_timeout = 0;
1523 memset(&qp_attr->alt_ah_attr, 0, sizeof(qp_attr->alt_ah_attr));
1524 qp_state = (params.max_sge_recv_flags & OCRDMA_QP_PARAMS_STATE_MASK) >>
1525 OCRDMA_QP_PARAMS_STATE_SHIFT;
43c706b1
PR		 1526 qp_attr->qp_state = get_ibqp_state(qp_state);
1527 qp_attr->cur_qp_state = qp_attr->qp_state;
fe2caefc
PP		 1528 qp_attr->sq_draining = (qp_state == OCRDMA_QPS_SQ_DRAINING) ? 1 : 0;
1529 qp_attr->max_dest_rd_atomic =
1530 params.max_ord_ird >> OCRDMA_QP_PARAMS_MAX_ORD_SHIFT;
1531 qp_attr->max_rd_atomic =
1532 params.max_ord_ird & OCRDMA_QP_PARAMS_MAX_IRD_MASK;
1533 qp_attr->en_sqd_async_notify = (params.max_sge_recv_flags &
1534 OCRDMA_QP_PARAMS_FLAGS_SQD_ASYNC) ? 1 : 0;
43c706b1
PR		 1535 /* Sync driver QP state with FW */
1536 ocrdma_qp_state_change(qp, qp_attr->qp_state, NULL);
fe2caefc
PP		 1537mbx_err:
1538 return status;
1539}
1540
f3070e7e 1541static void ocrdma_srq_toggle_bit(struct ocrdma_srq *srq, unsigned int idx)
fe2caefc 1542{
f3070e7e
RV		 1543 unsigned int i = idx / 32;
1544 u32 mask = (1U << (idx % 32));
fe2caefc 1545
ba64fdca 1546 srq->idx_bit_fields[i] ^= mask;
fe2caefc
PP		 1547}
1548
1549static int ocrdma_hwq_free_cnt(struct ocrdma_qp_hwq_info *q)
1550{
43a6b402 1551 return ((q->max_wqe_idx - q->head) + q->tail) % q->max_cnt;
fe2caefc
PP		 1552}
1553
1554static int is_hw_sq_empty(struct ocrdma_qp *qp)
1555{
43a6b402 1556 return (qp->sq.tail == qp->sq.head);
fe2caefc
PP		 1557}
1558
1559static int is_hw_rq_empty(struct ocrdma_qp *qp)
1560{
43a6b402 1561 return (qp->rq.tail == qp->rq.head);
fe2caefc
PP		 1562}
1563
1564static void *ocrdma_hwq_head(struct ocrdma_qp_hwq_info *q)
1565{
1566 return q->va + (q->head * q->entry_size);
1567}
1568
1569static void *ocrdma_hwq_head_from_idx(struct ocrdma_qp_hwq_info *q,
1570 u32 idx)
1571{
1572 return q->va + (idx * q->entry_size);
1573}
1574
1575static void ocrdma_hwq_inc_head(struct ocrdma_qp_hwq_info *q)
1576{
1577 q->head = (q->head + 1) & q->max_wqe_idx;
1578}
1579
1580static void ocrdma_hwq_inc_tail(struct ocrdma_qp_hwq_info *q)
1581{
1582 q->tail = (q->tail + 1) & q->max_wqe_idx;
1583}
1584
1585/* discard the cqe for a given QP */
1586static void ocrdma_discard_cqes(struct ocrdma_qp *qp, struct ocrdma_cq *cq)
1587{
1588 unsigned long cq_flags;
1589 unsigned long flags;
1590 int discard_cnt = 0;
1591 u32 cur_getp, stop_getp;
1592 struct ocrdma_cqe *cqe;
cf5788ad 1593 u32 qpn = 0, wqe_idx = 0;
fe2caefc
PP		 1594
1595 spin_lock_irqsave(&cq->cq_lock, cq_flags);
1596
1597 /* traverse through the CQEs in the hw CQ,
1598 * find the matching CQE for a given qp,
1599 * mark the matching one discarded by clearing qpn.
1600 * ring the doorbell in the poll_cq() as
1601 * we don't complete out of order cqe.
1602 */
1603
1604 cur_getp = cq->getp;
1605 /* find upto when do we reap the cq. */
1606 stop_getp = cur_getp;
1607 do {
1608 if (is_hw_sq_empty(qp) && (!qp->srq && is_hw_rq_empty(qp)))
1609 break;
1610
1611 cqe = cq->va + cur_getp;
1612 /* if (a) done reaping whole hw cq, or
1613 * (b) qp_xq becomes empty.
1614 * then exit
1615 */
1616 qpn = cqe->cmn.qpn & OCRDMA_CQE_QPN_MASK;
1617 /* if previously discarded cqe found, skip that too. */
1618 /* check for matching qp */
1619 if (qpn == 0 || qpn != qp->id)
1620 goto skip_cqe;
1621
f99b1649 1622 if (is_cqe_for_sq(cqe)) {
fe2caefc 1623 ocrdma_hwq_inc_tail(&qp->sq);
f99b1649 1624 } else {
fe2caefc 1625 if (qp->srq) {
cf5788ad
SX		 1626 wqe_idx = (le32_to_cpu(cqe->rq.buftag_qpn) >>
1627 OCRDMA_CQE_BUFTAG_SHIFT) &
1628 qp->srq->rq.max_wqe_idx;
db287ec5 1629 BUG_ON(wqe_idx < 1);
fe2caefc
PP		 1630 spin_lock_irqsave(&qp->srq->q_lock, flags);
1631 ocrdma_hwq_inc_tail(&qp->srq->rq);
cf5788ad 1632 ocrdma_srq_toggle_bit(qp->srq, wqe_idx - 1);
fe2caefc
PP		 1633 spin_unlock_irqrestore(&qp->srq->q_lock, flags);
1634
f99b1649 1635 } else {
fe2caefc 1636 ocrdma_hwq_inc_tail(&qp->rq);
f99b1649 1637 }
fe2caefc 1638 }
cf5788ad
SX		 1639 /* mark cqe discarded so that it is not picked up later
1640 * in the poll_cq().
1641 */
1642 discard_cnt += 1;
1643 cqe->cmn.qpn = 0;
fe2caefc
PP		 1644skip_cqe:
1645 cur_getp = (cur_getp + 1) % cq->max_hw_cqe;
1646 } while (cur_getp != stop_getp);
1647 spin_unlock_irqrestore(&cq->cq_lock, cq_flags);
1648}
1649
f11220ee 1650void ocrdma_del_flush_qp(struct ocrdma_qp *qp)
fe2caefc
PP		 1651{
1652 int found = false;
1653 unsigned long flags;
d2b8f7b1 1654 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
fe2caefc
PP		 1655 /* sync with any active CQ poll */
1656
1657 spin_lock_irqsave(&dev->flush_q_lock, flags);
1658 found = ocrdma_is_qp_in_sq_flushlist(qp->sq_cq, qp);
1659 if (found)
1660 list_del(&qp->sq_entry);
1661 if (!qp->srq) {
1662 found = ocrdma_is_qp_in_rq_flushlist(qp->rq_cq, qp);
1663 if (found)
1664 list_del(&qp->rq_entry);
1665 }
1666 spin_unlock_irqrestore(&dev->flush_q_lock, flags);
1667}
1668
c4367a26 1669int ocrdma_destroy_qp(struct ib_qp *ibqp, struct ib_udata *udata)
fe2caefc 1670{
fe2caefc
PP		 1671 struct ocrdma_pd *pd;
1672 struct ocrdma_qp *qp;
1673 struct ocrdma_dev *dev;
1674 struct ib_qp_attr attrs;
fe48822b 1675 int attr_mask;
d19081e0 1676 unsigned long flags;
fe2caefc
PP		 1677
1678 qp = get_ocrdma_qp(ibqp);
d2b8f7b1 1679 dev = get_ocrdma_dev(ibqp->device);
fe2caefc 1680
fe2caefc
PP		 1681 pd = qp->pd;
1682
1683 /* change the QP state to ERROR */
fe48822b
DS		 1684 if (qp->state != OCRDMA_QPS_RST) {
1685 attrs.qp_state = IB_QPS_ERR;
1686 attr_mask = IB_QP_STATE;
1687 _ocrdma_modify_qp(ibqp, &attrs, attr_mask);
1688 }
fe2caefc
PP		 1689 /* ensure that CQEs for newly created QP (whose id may be same with
1690 * one which just getting destroyed are same), dont get
1691 * discarded until the old CQEs are discarded.
1692 */
1693 mutex_lock(&dev->dev_lock);
4b8180aa 1694 (void) ocrdma_mbx_destroy_qp(dev, qp);
fe2caefc
PP		 1695
1696 /*
1697 * acquire CQ lock while destroy is in progress, in order to
1698 * protect against proessing in-flight CQEs for this QP.
1699 */
d19081e0 1700 spin_lock_irqsave(&qp->sq_cq->cq_lock, flags);
beae9eb5 1701 if (qp->rq_cq && (qp->rq_cq != qp->sq_cq)) {
d19081e0 1702 spin_lock(&qp->rq_cq->cq_lock);
beae9eb5 1703 ocrdma_del_qpn_map(dev, qp);
d19081e0 1704 spin_unlock(&qp->rq_cq->cq_lock);
beae9eb5
BVA		 1705 } else {
1706 ocrdma_del_qpn_map(dev, qp);
1707 }
d19081e0 1708 spin_unlock_irqrestore(&qp->sq_cq->cq_lock, flags);
fe2caefc
PP		 1709
1710 if (!pd->uctx) {
1711 ocrdma_discard_cqes(qp, qp->sq_cq);
1712 ocrdma_discard_cqes(qp, qp->rq_cq);
1713 }
1714 mutex_unlock(&dev->dev_lock);
1715
1716 if (pd->uctx) {
43a6b402
NG		 1717 ocrdma_del_mmap(pd->uctx, (u64) qp->sq.pa,
1718 PAGE_ALIGN(qp->sq.len));
fe2caefc 1719 if (!qp->srq)
43a6b402
NG		 1720 ocrdma_del_mmap(pd->uctx, (u64) qp->rq.pa,
1721 PAGE_ALIGN(qp->rq.len));
fe2caefc
PP		 1722 }
1723
1724 ocrdma_del_flush_qp(qp);
1725
fe2caefc
PP		 1726 kfree(qp->wqe_wr_id_tbl);
1727 kfree(qp->rqe_wr_id_tbl);
4b8180aa 1728 return 0;
fe2caefc
PP		 1729}
1730
1afc0454
NG		 1731static int ocrdma_copy_srq_uresp(struct ocrdma_dev *dev, struct ocrdma_srq *srq,
1732 struct ib_udata *udata)
fe2caefc
PP		 1733{
1734 int status;
1735 struct ocrdma_create_srq_uresp uresp;
1736
63ea3749 1737 memset(&uresp, 0, sizeof(uresp));
fe2caefc
PP		 1738 uresp.rq_dbid = srq->rq.dbid;
1739 uresp.num_rq_pages = 1;
1b76d383 1740 uresp.rq_page_addr[0] = virt_to_phys(srq->rq.va);
fe2caefc 1741 uresp.rq_page_size = srq->rq.len;
1afc0454
NG		 1742 uresp.db_page_addr = dev->nic_info.unmapped_db +
1743 (srq->pd->id * dev->nic_info.db_page_size);
1744 uresp.db_page_size = dev->nic_info.db_page_size;
fe2caefc 1745 uresp.num_rqe_allocated = srq->rq.max_cnt;
21c3391a 1746 if (ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R) {
f11220ee 1747 uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET;
fe2caefc
PP		 1748 uresp.db_shift = 24;
1749 } else {
1750 uresp.db_rq_offset = OCRDMA_DB_RQ_OFFSET;
1751 uresp.db_shift = 16;
1752 }
1753
1754 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1755 if (status)
1756 return status;
1757 status = ocrdma_add_mmap(srq->pd->uctx, uresp.rq_page_addr[0],
1758 uresp.rq_page_size);
1759 if (status)
1760 return status;
1761 return status;
1762}
1763
68e326de
LR		 1764int ocrdma_create_srq(struct ib_srq *ibsrq, struct ib_srq_init_attr *init_attr,
1765 struct ib_udata *udata)
fe2caefc 1766{
68e326de
LR		 1767 int status;
1768 struct ocrdma_pd *pd = get_ocrdma_pd(ibsrq->pd);
1769 struct ocrdma_dev *dev = get_ocrdma_dev(ibsrq->device);
1770 struct ocrdma_srq *srq = get_ocrdma_srq(ibsrq);
fe2caefc 1771
652caba5
JG		 1772 if (init_attr->srq_type != IB_SRQT_BASIC)
1773 return -EOPNOTSUPP;
1774
fe2caefc 1775 if (init_attr->attr.max_sge > dev->attr.max_recv_sge)
68e326de 1776 return -EINVAL;
fe2caefc 1777 if (init_attr->attr.max_wr > dev->attr.max_rqe)
68e326de 1778 return -EINVAL;
fe2caefc
PP		 1779
1780 spin_lock_init(&srq->q_lock);
fe2caefc
PP		 1781 srq->pd = pd;
1782 srq->db = dev->nic_info.db + (pd->id * dev->nic_info.db_page_size);
1afc0454 1783 status = ocrdma_mbx_create_srq(dev, srq, init_attr, pd);
fe2caefc 1784 if (status)
68e326de 1785 return status;
fe2caefc 1786
68e326de 1787 if (!udata) {
6396bb22
KC		 1788 srq->rqe_wr_id_tbl = kcalloc(srq->rq.max_cnt, sizeof(u64),
1789 GFP_KERNEL);
68e326de
LR		 1790 if (!srq->rqe_wr_id_tbl) {
1791 status = -ENOMEM;
fe2caefc 1792 goto arm_err;
68e326de 1793 }
fe2caefc
PP		 1794
1795 srq->bit_fields_len = (srq->rq.max_cnt / 32) +
1796 (srq->rq.max_cnt % 32 ? 1 : 0);
1797 srq->idx_bit_fields =
6da2ec56
KC		 1798 kmalloc_array(srq->bit_fields_len, sizeof(u32),
1799 GFP_KERNEL);
68e326de
LR		 1800 if (!srq->idx_bit_fields) {
1801 status = -ENOMEM;
fe2caefc 1802 goto arm_err;
68e326de 1803 }
fe2caefc
PP		 1804 memset(srq->idx_bit_fields, 0xff,
1805 srq->bit_fields_len * sizeof(u32));
1806 }
1807
1808 if (init_attr->attr.srq_limit) {
1809 status = ocrdma_mbx_modify_srq(srq, &init_attr->attr);
1810 if (status)
1811 goto arm_err;
1812 }
1813
fe2caefc 1814 if (udata) {
1afc0454 1815 status = ocrdma_copy_srq_uresp(dev, srq, udata);
fe2caefc
PP		 1816 if (status)
1817 goto arm_err;
1818 }
1819
68e326de 1820 return 0;
fe2caefc
PP		 1821
1822arm_err:
1823 ocrdma_mbx_destroy_srq(dev, srq);
fe2caefc
PP		 1824 kfree(srq->rqe_wr_id_tbl);
1825 kfree(srq->idx_bit_fields);
68e326de 1826 return status;
fe2caefc
PP		 1827}
1828
1829int ocrdma_modify_srq(struct ib_srq *ibsrq,
1830 struct ib_srq_attr *srq_attr,
1831 enum ib_srq_attr_mask srq_attr_mask,
1832 struct ib_udata *udata)
1833{
0ca4c39f 1834 int status;
fe2caefc 1835 struct ocrdma_srq *srq;
fe2caefc
PP		 1836
1837 srq = get_ocrdma_srq(ibsrq);
fe2caefc
PP		 1838 if (srq_attr_mask & IB_SRQ_MAX_WR)
1839 status = -EINVAL;
1840 else
1841 status = ocrdma_mbx_modify_srq(srq, srq_attr);
1842 return status;
1843}
1844
1845int ocrdma_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *srq_attr)
1846{
1847 int status;
1848 struct ocrdma_srq *srq;
fe2caefc
PP		 1849
1850 srq = get_ocrdma_srq(ibsrq);
fe2caefc
PP		 1851 status = ocrdma_mbx_query_srq(srq, srq_attr);
1852 return status;
1853}
1854
119181d1 1855int ocrdma_destroy_srq(struct ib_srq *ibsrq, struct ib_udata *udata)
fe2caefc 1856{
fe2caefc 1857 struct ocrdma_srq *srq;
1afc0454 1858 struct ocrdma_dev *dev = get_ocrdma_dev(ibsrq->device);
fe2caefc
PP		 1859
1860 srq = get_ocrdma_srq(ibsrq);
fe2caefc 1861
68e326de 1862 ocrdma_mbx_destroy_srq(dev, srq);
fe2caefc
PP		 1863
1864 if (srq->pd->uctx)
43a6b402
NG		 1865 ocrdma_del_mmap(srq->pd->uctx, (u64) srq->rq.pa,
1866 PAGE_ALIGN(srq->rq.len));
fe2caefc 1867
fe2caefc
PP		 1868 kfree(srq->idx_bit_fields);
1869 kfree(srq->rqe_wr_id_tbl);
119181d1 1870 return 0;
fe2caefc
PP		 1871}
1872
1873/* unprivileged verbs and their support functions. */
1874static void ocrdma_build_ud_hdr(struct ocrdma_qp *qp,
1875 struct ocrdma_hdr_wqe *hdr,
f696bf6d 1876 const struct ib_send_wr *wr)
fe2caefc
PP		 1877{
1878 struct ocrdma_ewqe_ud_hdr *ud_hdr =
1879 (struct ocrdma_ewqe_ud_hdr *)(hdr + 1);
e622f2f4 1880 struct ocrdma_ah *ah = get_ocrdma_ah(ud_wr(wr)->ah);
fe2caefc 1881
e622f2f4 1882 ud_hdr->rsvd_dest_qpn = ud_wr(wr)->remote_qpn;
fe2caefc
PP		 1883 if (qp->qp_type == IB_QPT_GSI)
1884 ud_hdr->qkey = qp->qkey;
1885 else
e622f2f4 1886 ud_hdr->qkey = ud_wr(wr)->remote_qkey;
fe2caefc 1887 ud_hdr->rsvd_ahid = ah->id;
6b062667 1888 ud_hdr->hdr_type = ah->hdr_type;
29565f2f
DS		 1889 if (ah->av->valid & OCRDMA_AV_VLAN_VALID)
1890 hdr->cw |= (OCRDMA_FLAG_AH_VLAN_PR << OCRDMA_WQE_FLAGS_SHIFT);
fe2caefc
PP		 1891}
1892
1893static void ocrdma_build_sges(struct ocrdma_hdr_wqe *hdr,
1894 struct ocrdma_sge *sge, int num_sge,
1895 struct ib_sge *sg_list)
1896{
1897 int i;
1898
1899 for (i = 0; i < num_sge; i++) {
1900 sge[i].lrkey = sg_list[i].lkey;
1901 sge[i].addr_lo = sg_list[i].addr;
1902 sge[i].addr_hi = upper_32_bits(sg_list[i].addr);
1903 sge[i].len = sg_list[i].length;
1904 hdr->total_len += sg_list[i].length;
1905 }
1906 if (num_sge == 0)
1907 memset(sge, 0, sizeof(*sge));
1908}
1909
117e6dd1
NG		 1910static inline uint32_t ocrdma_sglist_len(struct ib_sge *sg_list, int num_sge)
1911{
1912 uint32_t total_len = 0, i;
1913
1914 for (i = 0; i < num_sge; i++)
1915 total_len += sg_list[i].length;
1916 return total_len;
1917}
1918
1919
fe2caefc
PP		 1920static int ocrdma_build_inline_sges(struct ocrdma_qp *qp,
1921 struct ocrdma_hdr_wqe *hdr,
1922 struct ocrdma_sge *sge,
f696bf6d 1923 const struct ib_send_wr *wr, u32 wqe_size)
fe2caefc 1924{
117e6dd1
NG		 1925 int i;
1926 char *dpp_addr;
1927
43a6b402 1928 if (wr->send_flags & IB_SEND_INLINE && qp->qp_type != IB_QPT_UD) {
117e6dd1
NG		 1929 hdr->total_len = ocrdma_sglist_len(wr->sg_list, wr->num_sge);
1930 if (unlikely(hdr->total_len > qp->max_inline_data)) {
ef99c4c2 1931 pr_err("%s() supported_len=0x%x,\n"
1a84db56 1932 " unsupported len req=0x%x\n", __func__,
117e6dd1 1933 qp->max_inline_data, hdr->total_len);
fe2caefc
PP		 1934 return -EINVAL;
1935 }
117e6dd1
NG		 1936 dpp_addr = (char *)sge;
1937 for (i = 0; i < wr->num_sge; i++) {
1938 memcpy(dpp_addr,
1939 (void *)(unsigned long)wr->sg_list[i].addr,
1940 wr->sg_list[i].length);
1941 dpp_addr += wr->sg_list[i].length;
1942 }
1943
fe2caefc 1944 wqe_size += roundup(hdr->total_len, OCRDMA_WQE_ALIGN_BYTES);
117e6dd1 1945 if (0 == hdr->total_len)
43a6b402 1946 wqe_size += sizeof(struct ocrdma_sge);
fe2caefc
PP		 1947 hdr->cw |= (OCRDMA_TYPE_INLINE << OCRDMA_WQE_TYPE_SHIFT);
1948 } else {
1949 ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list);
1950 if (wr->num_sge)
1951 wqe_size += (wr->num_sge * sizeof(struct ocrdma_sge));
1952 else
1953 wqe_size += sizeof(struct ocrdma_sge);
1954 hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
1955 }
1956 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
1957 return 0;
1958}
1959
1960static int ocrdma_build_send(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
f696bf6d 1961 const struct ib_send_wr *wr)
fe2caefc
PP		 1962{
1963 int status;
1964 struct ocrdma_sge *sge;
1965 u32 wqe_size = sizeof(*hdr);
1966
1967 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
1968 ocrdma_build_ud_hdr(qp, hdr, wr);
1969 sge = (struct ocrdma_sge *)(hdr + 2);
1970 wqe_size += sizeof(struct ocrdma_ewqe_ud_hdr);
f99b1649 1971 } else {
fe2caefc 1972 sge = (struct ocrdma_sge *)(hdr + 1);
f99b1649 1973 }
fe2caefc
PP		 1974
1975 status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size);
1976 return status;
1977}
1978
1979static int ocrdma_build_write(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
f696bf6d 1980 const struct ib_send_wr *wr)
fe2caefc
PP		 1981{
1982 int status;
1983 struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1);
1984 struct ocrdma_sge *sge = ext_rw + 1;
1985 u32 wqe_size = sizeof(*hdr) + sizeof(*ext_rw);
1986
1987 status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size);
1988 if (status)
1989 return status;
e622f2f4
CH		 1990 ext_rw->addr_lo = rdma_wr(wr)->remote_addr;
1991 ext_rw->addr_hi = upper_32_bits(rdma_wr(wr)->remote_addr);
1992 ext_rw->lrkey = rdma_wr(wr)->rkey;
fe2caefc
PP		 1993 ext_rw->len = hdr->total_len;
1994 return 0;
1995}
1996
1997static void ocrdma_build_read(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
f696bf6d 1998 const struct ib_send_wr *wr)
fe2caefc
PP		 1999{
2000 struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1);
2001 struct ocrdma_sge *sge = ext_rw + 1;
2002 u32 wqe_size = ((wr->num_sge + 1) * sizeof(struct ocrdma_sge)) +
2003 sizeof(struct ocrdma_hdr_wqe);
2004
2005 ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list);
2006 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
2007 hdr->cw |= (OCRDMA_READ << OCRDMA_WQE_OPCODE_SHIFT);
2008 hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
2009
e622f2f4
CH		 2010 ext_rw->addr_lo = rdma_wr(wr)->remote_addr;
2011 ext_rw->addr_hi = upper_32_bits(rdma_wr(wr)->remote_addr);
2012 ext_rw->lrkey = rdma_wr(wr)->rkey;
fe2caefc
PP		 2013 ext_rw->len = hdr->total_len;
2014}
2015
7c33880c
NG		 2016static int get_encoded_page_size(int pg_sz)
2017{
2018 /* Max size is 256M 4096 << 16 */
2019 int i = 0;
2020 for (; i < 17; i++)
2021 if (pg_sz == (4096 << i))
2022 break;
2023 return i;
2024}
2025
2eaa1c56
SG		 2026static int ocrdma_build_reg(struct ocrdma_qp *qp,
2027 struct ocrdma_hdr_wqe *hdr,
f696bf6d 2028 const struct ib_reg_wr *wr)
2eaa1c56
SG		 2029{
2030 u64 fbo;
2031 struct ocrdma_ewqe_fr *fast_reg = (struct ocrdma_ewqe_fr *)(hdr + 1);
2032 struct ocrdma_mr *mr = get_ocrdma_mr(wr->mr);
2033 struct ocrdma_pbl *pbl_tbl = mr->hwmr.pbl_table;
2034 struct ocrdma_pbe *pbe;
2035 u32 wqe_size = sizeof(*fast_reg) + sizeof(*hdr);
2036 int num_pbes = 0, i;
2037
2038 wqe_size = roundup(wqe_size, OCRDMA_WQE_ALIGN_BYTES);
2039
2040 hdr->cw |= (OCRDMA_FR_MR << OCRDMA_WQE_OPCODE_SHIFT);
2041 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
2042
2043 if (wr->access & IB_ACCESS_LOCAL_WRITE)
2044 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_LOCAL_WR;
2045 if (wr->access & IB_ACCESS_REMOTE_WRITE)
2046 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_WR;
2047 if (wr->access & IB_ACCESS_REMOTE_READ)
2048 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_RD;
2049 hdr->lkey = wr->key;
2050 hdr->total_len = mr->ibmr.length;
2051
2052 fbo = mr->ibmr.iova - mr->pages[0];
2053
2054 fast_reg->va_hi = upper_32_bits(mr->ibmr.iova);
2055 fast_reg->va_lo = (u32) (mr->ibmr.iova & 0xffffffff);
2056 fast_reg->fbo_hi = upper_32_bits(fbo);
2057 fast_reg->fbo_lo = (u32) fbo & 0xffffffff;
2058 fast_reg->num_sges = mr->npages;
2059 fast_reg->size_sge = get_encoded_page_size(mr->ibmr.page_size);
2060
2061 pbe = pbl_tbl->va;
2062 for (i = 0; i < mr->npages; i++) {
2063 u64 buf_addr = mr->pages[i];
2064
2065 pbe->pa_lo = cpu_to_le32((u32) (buf_addr & PAGE_MASK));
2066 pbe->pa_hi = cpu_to_le32((u32) upper_32_bits(buf_addr));
2067 num_pbes += 1;
2068 pbe++;
2069
2070 /* if the pbl is full storing the pbes,
2071 * move to next pbl.
2072 */
2073 if (num_pbes == (mr->hwmr.pbl_size/sizeof(u64))) {
2074 pbl_tbl++;
2075 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
2076 }
2077 }
2078
2079 return 0;
2080}
7c33880c 2081
fe2caefc
PP		 2082static void ocrdma_ring_sq_db(struct ocrdma_qp *qp)
2083{
2df84fa8 2084 u32 val = qp->sq.dbid | (1 << OCRDMA_DB_SQ_SHIFT);
fe2caefc
PP		 2085
2086 iowrite32(val, qp->sq_db);
2087}
2088
d34ac5cd
BVA		 2089int ocrdma_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr,
2090 const struct ib_send_wr **bad_wr)
fe2caefc
PP		 2091{
2092 int status = 0;
2093 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
2094 struct ocrdma_hdr_wqe *hdr;
2095 unsigned long flags;
2096
2097 spin_lock_irqsave(&qp->q_lock, flags);
2098 if (qp->state != OCRDMA_QPS_RTS && qp->state != OCRDMA_QPS_SQD) {
2099 spin_unlock_irqrestore(&qp->q_lock, flags);
f6ddcf71 2100 *bad_wr = wr;
fe2caefc
PP		 2101 return -EINVAL;
2102 }
2103
2104 while (wr) {
f252b5dc
MA		 2105 if (qp->qp_type == IB_QPT_UD &&
2106 (wr->opcode != IB_WR_SEND &&
2107 wr->opcode != IB_WR_SEND_WITH_IMM)) {
2108 *bad_wr = wr;
2109 status = -EINVAL;
2110 break;
2111 }
fe2caefc
PP		 2112 if (ocrdma_hwq_free_cnt(&qp->sq) == 0 ||
2113 wr->num_sge > qp->sq.max_sges) {
f6ddcf71 2114 *bad_wr = wr;
fe2caefc
PP		 2115 status = -ENOMEM;
2116 break;
2117 }
2118 hdr = ocrdma_hwq_head(&qp->sq);
2119 hdr->cw = 0;
2b51a9b9 2120 if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled)
fe2caefc
PP		 2121 hdr->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT);
2122 if (wr->send_flags & IB_SEND_FENCE)
2123 hdr->cw |=
2124 (OCRDMA_FLAG_FENCE_L << OCRDMA_WQE_FLAGS_SHIFT);
2125 if (wr->send_flags & IB_SEND_SOLICITED)
2126 hdr->cw |=
2127 (OCRDMA_FLAG_SOLICIT << OCRDMA_WQE_FLAGS_SHIFT);
2128 hdr->total_len = 0;
2129 switch (wr->opcode) {
2130 case IB_WR_SEND_WITH_IMM:
2131 hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
2132 hdr->immdt = ntohl(wr->ex.imm_data);
df561f66 2133 fallthrough;
fe2caefc
PP		 2134 case IB_WR_SEND:
2135 hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT);
2136 ocrdma_build_send(qp, hdr, wr);
2137 break;
2138 case IB_WR_SEND_WITH_INV:
2139 hdr->cw |= (OCRDMA_FLAG_INV << OCRDMA_WQE_FLAGS_SHIFT);
2140 hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT);
2141 hdr->lkey = wr->ex.invalidate_rkey;
2142 status = ocrdma_build_send(qp, hdr, wr);
2143 break;
2144 case IB_WR_RDMA_WRITE_WITH_IMM:
2145 hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
2146 hdr->immdt = ntohl(wr->ex.imm_data);
df561f66 2147 fallthrough;
fe2caefc
PP		 2148 case IB_WR_RDMA_WRITE:
2149 hdr->cw |= (OCRDMA_WRITE << OCRDMA_WQE_OPCODE_SHIFT);
2150 status = ocrdma_build_write(qp, hdr, wr);
2151 break;
fe2caefc
PP		 2152 case IB_WR_RDMA_READ:
2153 ocrdma_build_read(qp, hdr, wr);
2154 break;
2155 case IB_WR_LOCAL_INV:
2156 hdr->cw |=
2157 (OCRDMA_LKEY_INV << OCRDMA_WQE_OPCODE_SHIFT);
7c33880c
NG		 2158 hdr->cw |= ((sizeof(struct ocrdma_hdr_wqe) +
2159 sizeof(struct ocrdma_sge)) /
fe2caefc
PP		 2160 OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT;
2161 hdr->lkey = wr->ex.invalidate_rkey;
2162 break;
2eaa1c56
SG		 2163 case IB_WR_REG_MR:
2164 status = ocrdma_build_reg(qp, hdr, reg_wr(wr));
2165 break;
fe2caefc
PP		 2166 default:
2167 status = -EINVAL;
2168 break;
2169 }
2170 if (status) {
2171 *bad_wr = wr;
2172 break;
2173 }
2b51a9b9 2174 if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled)
fe2caefc
PP		 2175 qp->wqe_wr_id_tbl[qp->sq.head].signaled = 1;
2176 else
2177 qp->wqe_wr_id_tbl[qp->sq.head].signaled = 0;
2178 qp->wqe_wr_id_tbl[qp->sq.head].wrid = wr->wr_id;
2179 ocrdma_cpu_to_le32(hdr, ((hdr->cw >> OCRDMA_WQE_SIZE_SHIFT) &
2180 OCRDMA_WQE_SIZE_MASK) * OCRDMA_WQE_STRIDE);
2181 /* make sure wqe is written before adapter can access it */
2182 wmb();
2183 /* inform hw to start processing it */
2184 ocrdma_ring_sq_db(qp);
2185
2186 /* update pointer, counter for next wr */
2187 ocrdma_hwq_inc_head(&qp->sq);
2188 wr = wr->next;
2189 }
2190 spin_unlock_irqrestore(&qp->q_lock, flags);
2191 return status;
2192}
2193
2194static void ocrdma_ring_rq_db(struct ocrdma_qp *qp)
2195{
2df84fa8 2196 u32 val = qp->rq.dbid | (1 << OCRDMA_DB_RQ_SHIFT);
fe2caefc 2197
2df84fa8 2198 iowrite32(val, qp->rq_db);
fe2caefc
PP		 2199}
2200
d34ac5cd
BVA		 2201static void ocrdma_build_rqe(struct ocrdma_hdr_wqe *rqe,
2202 const struct ib_recv_wr *wr, u16 tag)
fe2caefc
PP		 2203{
2204 u32 wqe_size = 0;
2205 struct ocrdma_sge *sge;
2206 if (wr->num_sge)
2207 wqe_size = (wr->num_sge * sizeof(*sge)) + sizeof(*rqe);
2208 else
2209 wqe_size = sizeof(*sge) + sizeof(*rqe);
2210
2211 rqe->cw = ((wqe_size / OCRDMA_WQE_STRIDE) <<
2212 OCRDMA_WQE_SIZE_SHIFT);
2213 rqe->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT);
2214 rqe->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
2215 rqe->total_len = 0;
2216 rqe->rsvd_tag = tag;
2217 sge = (struct ocrdma_sge *)(rqe + 1);
2218 ocrdma_build_sges(rqe, sge, wr->num_sge, wr->sg_list);
2219 ocrdma_cpu_to_le32(rqe, wqe_size);
2220}
2221
d34ac5cd
BVA		 2222int ocrdma_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr,
2223 const struct ib_recv_wr **bad_wr)
fe2caefc
PP		 2224{
2225 int status = 0;
2226 unsigned long flags;
2227 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
2228 struct ocrdma_hdr_wqe *rqe;
2229
2230 spin_lock_irqsave(&qp->q_lock, flags);
2231 if (qp->state == OCRDMA_QPS_RST || qp->state == OCRDMA_QPS_ERR) {
2232 spin_unlock_irqrestore(&qp->q_lock, flags);
2233 *bad_wr = wr;
2234 return -EINVAL;
2235 }
2236 while (wr) {
2237 if (ocrdma_hwq_free_cnt(&qp->rq) == 0 ||
2238 wr->num_sge > qp->rq.max_sges) {
2239 *bad_wr = wr;
2240 status = -ENOMEM;
2241 break;
2242 }
2243 rqe = ocrdma_hwq_head(&qp->rq);
2244 ocrdma_build_rqe(rqe, wr, 0);
2245
2246 qp->rqe_wr_id_tbl[qp->rq.head] = wr->wr_id;
2247 /* make sure rqe is written before adapter can access it */
2248 wmb();
2249
2250 /* inform hw to start processing it */
2251 ocrdma_ring_rq_db(qp);
2252
2253 /* update pointer, counter for next wr */
2254 ocrdma_hwq_inc_head(&qp->rq);
2255 wr = wr->next;
2256 }
2257 spin_unlock_irqrestore(&qp->q_lock, flags);
2258 return status;
2259}
2260
2261/* cqe for srq's rqe can potentially arrive out of order.
2262 * index gives the entry in the shadow table where to store
2263 * the wr_id. tag/index is returned in cqe to reference back
2264 * for a given rqe.
2265 */
2266static int ocrdma_srq_get_idx(struct ocrdma_srq *srq)
2267{
2268 int row = 0;
2269 int indx = 0;
2270
2271 for (row = 0; row < srq->bit_fields_len; row++) {
2272 if (srq->idx_bit_fields[row]) {
2273 indx = ffs(srq->idx_bit_fields[row]);
2274 indx = (row * 32) + (indx - 1);
db287ec5 2275 BUG_ON(indx >= srq->rq.max_cnt);
fe2caefc
PP		 2276 ocrdma_srq_toggle_bit(srq, indx);
2277 break;
2278 }
2279 }
2280
db287ec5 2281 BUG_ON(row == srq->bit_fields_len);
cf5788ad 2282 return indx + 1; /* Use from index 1 */
fe2caefc
PP		 2283}
2284
2285static void ocrdma_ring_srq_db(struct ocrdma_srq *srq)
2286{
2287 u32 val = srq->rq.dbid | (1 << 16);
2288
2289 iowrite32(val, srq->db + OCRDMA_DB_GEN2_SRQ_OFFSET);
2290}
2291
d34ac5cd
BVA		 2292int ocrdma_post_srq_recv(struct ib_srq *ibsrq, const struct ib_recv_wr *wr,
2293 const struct ib_recv_wr **bad_wr)
fe2caefc
PP		 2294{
2295 int status = 0;
2296 unsigned long flags;
2297 struct ocrdma_srq *srq;
2298 struct ocrdma_hdr_wqe *rqe;
2299 u16 tag;
2300
2301 srq = get_ocrdma_srq(ibsrq);
2302
2303 spin_lock_irqsave(&srq->q_lock, flags);
2304 while (wr) {
2305 if (ocrdma_hwq_free_cnt(&srq->rq) == 0 ||
2306 wr->num_sge > srq->rq.max_sges) {
2307 status = -ENOMEM;
2308 *bad_wr = wr;
2309 break;
2310 }
2311 tag = ocrdma_srq_get_idx(srq);
2312 rqe = ocrdma_hwq_head(&srq->rq);
2313 ocrdma_build_rqe(rqe, wr, tag);
2314
2315 srq->rqe_wr_id_tbl[tag] = wr->wr_id;
2316 /* make sure rqe is written before adapter can perform DMA */
2317 wmb();
2318 /* inform hw to start processing it */
2319 ocrdma_ring_srq_db(srq);
2320 /* update pointer, counter for next wr */
2321 ocrdma_hwq_inc_head(&srq->rq);
2322 wr = wr->next;
2323 }
2324 spin_unlock_irqrestore(&srq->q_lock, flags);
2325 return status;
2326}
2327
2328static enum ib_wc_status ocrdma_to_ibwc_err(u16 status)
2329{
f99b1649 2330 enum ib_wc_status ibwc_status;
fe2caefc
PP		 2331
2332 switch (status) {
2333 case OCRDMA_CQE_GENERAL_ERR:
2334 ibwc_status = IB_WC_GENERAL_ERR;
2335 break;
2336 case OCRDMA_CQE_LOC_LEN_ERR:
2337 ibwc_status = IB_WC_LOC_LEN_ERR;
2338 break;
2339 case OCRDMA_CQE_LOC_QP_OP_ERR:
2340 ibwc_status = IB_WC_LOC_QP_OP_ERR;
2341 break;
2342 case OCRDMA_CQE_LOC_EEC_OP_ERR:
2343 ibwc_status = IB_WC_LOC_EEC_OP_ERR;
2344 break;
2345 case OCRDMA_CQE_LOC_PROT_ERR:
2346 ibwc_status = IB_WC_LOC_PROT_ERR;
2347 break;
2348 case OCRDMA_CQE_WR_FLUSH_ERR:
2349 ibwc_status = IB_WC_WR_FLUSH_ERR;
2350 break;
2351 case OCRDMA_CQE_MW_BIND_ERR:
2352 ibwc_status = IB_WC_MW_BIND_ERR;
2353 break;
2354 case OCRDMA_CQE_BAD_RESP_ERR:
2355 ibwc_status = IB_WC_BAD_RESP_ERR;
2356 break;
2357 case OCRDMA_CQE_LOC_ACCESS_ERR:
2358 ibwc_status = IB_WC_LOC_ACCESS_ERR;
2359 break;
2360 case OCRDMA_CQE_REM_INV_REQ_ERR:
2361 ibwc_status = IB_WC_REM_INV_REQ_ERR;
2362 break;
2363 case OCRDMA_CQE_REM_ACCESS_ERR:
2364 ibwc_status = IB_WC_REM_ACCESS_ERR;
2365 break;
2366 case OCRDMA_CQE_REM_OP_ERR:
2367 ibwc_status = IB_WC_REM_OP_ERR;
2368 break;
2369 case OCRDMA_CQE_RETRY_EXC_ERR:
2370 ibwc_status = IB_WC_RETRY_EXC_ERR;
2371 break;
2372 case OCRDMA_CQE_RNR_RETRY_EXC_ERR:
2373 ibwc_status = IB_WC_RNR_RETRY_EXC_ERR;
2374 break;
2375 case OCRDMA_CQE_LOC_RDD_VIOL_ERR:
2376 ibwc_status = IB_WC_LOC_RDD_VIOL_ERR;
2377 break;
2378 case OCRDMA_CQE_REM_INV_RD_REQ_ERR:
2379 ibwc_status = IB_WC_REM_INV_RD_REQ_ERR;
2380 break;
2381 case OCRDMA_CQE_REM_ABORT_ERR:
2382 ibwc_status = IB_WC_REM_ABORT_ERR;
2383 break;
2384 case OCRDMA_CQE_INV_EECN_ERR:
2385 ibwc_status = IB_WC_INV_EECN_ERR;
2386 break;
2387 case OCRDMA_CQE_INV_EEC_STATE_ERR:
2388 ibwc_status = IB_WC_INV_EEC_STATE_ERR;
2389 break;
2390 case OCRDMA_CQE_FATAL_ERR:
2391 ibwc_status = IB_WC_FATAL_ERR;
2392 break;
2393 case OCRDMA_CQE_RESP_TIMEOUT_ERR:
2394 ibwc_status = IB_WC_RESP_TIMEOUT_ERR;
2395 break;
2396 default:
2397 ibwc_status = IB_WC_GENERAL_ERR;
2398 break;
2b50176d 2399 }
fe2caefc
PP		 2400 return ibwc_status;
2401}
2402
2403static void ocrdma_update_wc(struct ocrdma_qp *qp, struct ib_wc *ibwc,
2404 u32 wqe_idx)
2405{
2406 struct ocrdma_hdr_wqe *hdr;
2407 struct ocrdma_sge *rw;
2408 int opcode;
2409
2410 hdr = ocrdma_hwq_head_from_idx(&qp->sq, wqe_idx);
2411
2412 ibwc->wr_id = qp->wqe_wr_id_tbl[wqe_idx].wrid;
2413 /* Undo the hdr->cw swap */
2414 opcode = le32_to_cpu(hdr->cw) & OCRDMA_WQE_OPCODE_MASK;
2415 switch (opcode) {
2416 case OCRDMA_WRITE:
2417 ibwc->opcode = IB_WC_RDMA_WRITE;
2418 break;
2419 case OCRDMA_READ:
2420 rw = (struct ocrdma_sge *)(hdr + 1);
2421 ibwc->opcode = IB_WC_RDMA_READ;
2422 ibwc->byte_len = rw->len;
2423 break;
2424 case OCRDMA_SEND:
2425 ibwc->opcode = IB_WC_SEND;
2426 break;
7c33880c 2427 case OCRDMA_FR_MR:
191cfed5 2428 ibwc->opcode = IB_WC_REG_MR;
7c33880c 2429 break;
fe2caefc
PP		 2430 case OCRDMA_LKEY_INV:
2431 ibwc->opcode = IB_WC_LOCAL_INV;
2432 break;
2433 default:
2434 ibwc->status = IB_WC_GENERAL_ERR;
ef99c4c2
NG		 2435 pr_err("%s() invalid opcode received = 0x%x\n",
2436 __func__, hdr->cw & OCRDMA_WQE_OPCODE_MASK);
fe2caefc 2437 break;
2b50176d 2438 }
fe2caefc
PP		 2439}
2440
2441static void ocrdma_set_cqe_status_flushed(struct ocrdma_qp *qp,
2442 struct ocrdma_cqe *cqe)
2443{
2444 if (is_cqe_for_sq(cqe)) {
2445 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2446 cqe->flags_status_srcqpn) &
2447 ~OCRDMA_CQE_STATUS_MASK);
2448 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2449 cqe->flags_status_srcqpn) |
2450 (OCRDMA_CQE_WR_FLUSH_ERR <<
2451 OCRDMA_CQE_STATUS_SHIFT));
2452 } else {
2453 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
2454 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2455 cqe->flags_status_srcqpn) &
2456 ~OCRDMA_CQE_UD_STATUS_MASK);
2457 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2458 cqe->flags_status_srcqpn) |
2459 (OCRDMA_CQE_WR_FLUSH_ERR <<
2460 OCRDMA_CQE_UD_STATUS_SHIFT));
2461 } else {
2462 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2463 cqe->flags_status_srcqpn) &
2464 ~OCRDMA_CQE_STATUS_MASK);
2465 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2466 cqe->flags_status_srcqpn) |
2467 (OCRDMA_CQE_WR_FLUSH_ERR <<
2468 OCRDMA_CQE_STATUS_SHIFT));
2469 }
2470 }
2471}
2472
2473static bool ocrdma_update_err_cqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2474 struct ocrdma_qp *qp, int status)
2475{
2476 bool expand = false;
2477
2478 ibwc->byte_len = 0;
2479 ibwc->qp = &qp->ibqp;
2480 ibwc->status = ocrdma_to_ibwc_err(status);
2481
2482 ocrdma_flush_qp(qp);
057729cb 2483 ocrdma_qp_state_change(qp, IB_QPS_ERR, NULL);
fe2caefc
PP		 2484
2485 /* if wqe/rqe pending for which cqe needs to be returned,
2486 * trigger inflating it.
2487 */
2488 if (!is_hw_rq_empty(qp) || !is_hw_sq_empty(qp)) {
2489 expand = true;
2490 ocrdma_set_cqe_status_flushed(qp, cqe);
2491 }
2492 return expand;
2493}
2494
2495static int ocrdma_update_err_rcqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2496 struct ocrdma_qp *qp, int status)
2497{
2498 ibwc->opcode = IB_WC_RECV;
2499 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2500 ocrdma_hwq_inc_tail(&qp->rq);
2501
2502 return ocrdma_update_err_cqe(ibwc, cqe, qp, status);
2503}
2504
2505static int ocrdma_update_err_scqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2506 struct ocrdma_qp *qp, int status)
2507{
2508 ocrdma_update_wc(qp, ibwc, qp->sq.tail);
2509 ocrdma_hwq_inc_tail(&qp->sq);
2510
2511 return ocrdma_update_err_cqe(ibwc, cqe, qp, status);
2512}
2513
2514
2515static bool ocrdma_poll_err_scqe(struct ocrdma_qp *qp,
2516 struct ocrdma_cqe *cqe, struct ib_wc *ibwc,
2517 bool *polled, bool *stop)
2518{
2519 bool expand;
ad56ebb4 2520 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
fe2caefc
PP		 2521 int status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2522 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
ad56ebb4
SX		 2523 if (status < OCRDMA_MAX_CQE_ERR)
2524 atomic_inc(&dev->cqe_err_stats[status]);
fe2caefc
PP		 2525
2526 /* when hw sq is empty, but rq is not empty, so we continue
2527 * to keep the cqe in order to get the cq event again.
2528 */
2529 if (is_hw_sq_empty(qp) && !is_hw_rq_empty(qp)) {
2530 /* when cq for rq and sq is same, it is safe to return
2531 * flush cqe for RQEs.
2532 */
2533 if (!qp->srq && (qp->sq_cq == qp->rq_cq)) {
2534 *polled = true;
2535 status = OCRDMA_CQE_WR_FLUSH_ERR;
2536 expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status);
2537 } else {
2538 /* stop processing further cqe as this cqe is used for
2539 * triggering cq event on buddy cq of RQ.
2540 * When QP is destroyed, this cqe will be removed
2541 * from the cq's hardware q.
2542 */
2543 *polled = false;
2544 *stop = true;
2545 expand = false;
2546 }
a96ffb1d
SX		 2547 } else if (is_hw_sq_empty(qp)) {
2548 /* Do nothing */
2549 expand = false;
2550 *polled = false;
2551 *stop = false;
fe2caefc
PP		 2552 } else {
2553 *polled = true;
2554 expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status);
2555 }
2556 return expand;
2557}
2558
2559static bool ocrdma_poll_success_scqe(struct ocrdma_qp *qp,
2560 struct ocrdma_cqe *cqe,
2561 struct ib_wc *ibwc, bool *polled)
2562{
2563 bool expand = false;
2564 int tail = qp->sq.tail;
2565 u32 wqe_idx;
2566
2567 if (!qp->wqe_wr_id_tbl[tail].signaled) {
fe2caefc
PP		 2568 *polled = false; /* WC cannot be consumed yet */
2569 } else {
2570 ibwc->status = IB_WC_SUCCESS;
2571 ibwc->wc_flags = 0;
2572 ibwc->qp = &qp->ibqp;
2573 ocrdma_update_wc(qp, ibwc, tail);
2574 *polled = true;
fe2caefc 2575 }
43a6b402
NG		 2576 wqe_idx = (le32_to_cpu(cqe->wq.wqeidx) &
2577 OCRDMA_CQE_WQEIDX_MASK) & qp->sq.max_wqe_idx;
ae3bca90
PP		 2578 if (tail != wqe_idx)
2579 expand = true; /* Coalesced CQE can't be consumed yet */
2580
fe2caefc
PP		 2581 ocrdma_hwq_inc_tail(&qp->sq);
2582 return expand;
2583}
2584
2585static bool ocrdma_poll_scqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2586 struct ib_wc *ibwc, bool *polled, bool *stop)
2587{
2588 int status;
2589 bool expand;
2590
2591 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2592 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
2593
2594 if (status == OCRDMA_CQE_SUCCESS)
2595 expand = ocrdma_poll_success_scqe(qp, cqe, ibwc, polled);
2596 else
2597 expand = ocrdma_poll_err_scqe(qp, cqe, ibwc, polled, stop);
2598 return expand;
2599}
2600
6b062667
DS		 2601static int ocrdma_update_ud_rcqe(struct ocrdma_dev *dev, struct ib_wc *ibwc,
2602 struct ocrdma_cqe *cqe)
fe2caefc
PP		 2603{
2604 int status;
6b062667 2605 u16 hdr_type = 0;
fe2caefc
PP		 2606
2607 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2608 OCRDMA_CQE_UD_STATUS_MASK) >> OCRDMA_CQE_UD_STATUS_SHIFT;
2609 ibwc->src_qp = le32_to_cpu(cqe->flags_status_srcqpn) &
2610 OCRDMA_CQE_SRCQP_MASK;
aff3ead9 2611 ibwc->pkey_index = 0;
fe2caefc
PP		 2612 ibwc->wc_flags = IB_WC_GRH;
2613 ibwc->byte_len = (le32_to_cpu(cqe->ud.rxlen_pkey) >>
6b062667
DS		 2614 OCRDMA_CQE_UD_XFER_LEN_SHIFT) &
2615 OCRDMA_CQE_UD_XFER_LEN_MASK;
2616
2617 if (ocrdma_is_udp_encap_supported(dev)) {
2618 hdr_type = (le32_to_cpu(cqe->ud.rxlen_pkey) >>
2619 OCRDMA_CQE_UD_L3TYPE_SHIFT) &
2620 OCRDMA_CQE_UD_L3TYPE_MASK;
2621 ibwc->wc_flags |= IB_WC_WITH_NETWORK_HDR_TYPE;
2622 ibwc->network_hdr_type = hdr_type;
2623 }
2624
fe2caefc
PP		 2625 return status;
2626}
2627
2628static void ocrdma_update_free_srq_cqe(struct ib_wc *ibwc,
2629 struct ocrdma_cqe *cqe,
2630 struct ocrdma_qp *qp)
2631{
2632 unsigned long flags;
2633 struct ocrdma_srq *srq;
2634 u32 wqe_idx;
2635
2636 srq = get_ocrdma_srq(qp->ibqp.srq);
43a6b402 2637 wqe_idx = (le32_to_cpu(cqe->rq.buftag_qpn) >>
cf5788ad 2638 OCRDMA_CQE_BUFTAG_SHIFT) & srq->rq.max_wqe_idx;
db287ec5 2639 BUG_ON(wqe_idx < 1);
cf5788ad 2640
fe2caefc
PP		 2641 ibwc->wr_id = srq->rqe_wr_id_tbl[wqe_idx];
2642 spin_lock_irqsave(&srq->q_lock, flags);
cf5788ad 2643 ocrdma_srq_toggle_bit(srq, wqe_idx - 1);
fe2caefc
PP		 2644 spin_unlock_irqrestore(&srq->q_lock, flags);
2645 ocrdma_hwq_inc_tail(&srq->rq);
2646}
2647
2648static bool ocrdma_poll_err_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2649 struct ib_wc *ibwc, bool *polled, bool *stop,
2650 int status)
2651{
2652 bool expand;
ad56ebb4
SX		 2653 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
2654
2655 if (status < OCRDMA_MAX_CQE_ERR)
2656 atomic_inc(&dev->cqe_err_stats[status]);
fe2caefc
PP		 2657
2658 /* when hw_rq is empty, but wq is not empty, so continue
2659 * to keep the cqe to get the cq event again.
2660 */
2661 if (is_hw_rq_empty(qp) && !is_hw_sq_empty(qp)) {
2662 if (!qp->srq && (qp->sq_cq == qp->rq_cq)) {
2663 *polled = true;
2664 status = OCRDMA_CQE_WR_FLUSH_ERR;
2665 expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status);
2666 } else {
2667 *polled = false;
2668 *stop = true;
2669 expand = false;
2670 }
a96ffb1d
SX		 2671 } else if (is_hw_rq_empty(qp)) {
2672 /* Do nothing */
2673 expand = false;
2674 *polled = false;
2675 *stop = false;
a3698a9b
PP		 2676 } else {
2677 *polled = true;
fe2caefc 2678 expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status);
a3698a9b 2679 }
fe2caefc
PP		 2680 return expand;
2681}
2682
2683static void ocrdma_poll_success_rcqe(struct ocrdma_qp *qp,
2684 struct ocrdma_cqe *cqe, struct ib_wc *ibwc)
2685{
6b062667
DS		 2686 struct ocrdma_dev *dev;
2687
2688 dev = get_ocrdma_dev(qp->ibqp.device);
fe2caefc
PP		 2689 ibwc->opcode = IB_WC_RECV;
2690 ibwc->qp = &qp->ibqp;
2691 ibwc->status = IB_WC_SUCCESS;
2692
2693 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI)
6b062667 2694 ocrdma_update_ud_rcqe(dev, ibwc, cqe);
fe2caefc
PP		 2695 else
2696 ibwc->byte_len = le32_to_cpu(cqe->rq.rxlen);
2697
2698 if (is_cqe_imm(cqe)) {
2699 ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt));
2700 ibwc->wc_flags |= IB_WC_WITH_IMM;
2701 } else if (is_cqe_wr_imm(cqe)) {
2702 ibwc->opcode = IB_WC_RECV_RDMA_WITH_IMM;
2703 ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt));
2704 ibwc->wc_flags |= IB_WC_WITH_IMM;
2705 } else if (is_cqe_invalidated(cqe)) {
2706 ibwc->ex.invalidate_rkey = le32_to_cpu(cqe->rq.lkey_immdt);
2707 ibwc->wc_flags |= IB_WC_WITH_INVALIDATE;
2708 }
f99b1649 2709 if (qp->ibqp.srq) {
fe2caefc 2710 ocrdma_update_free_srq_cqe(ibwc, cqe, qp);
f99b1649 2711 } else {
fe2caefc
PP		 2712 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2713 ocrdma_hwq_inc_tail(&qp->rq);
2714 }
2715}
2716
2717static bool ocrdma_poll_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2718 struct ib_wc *ibwc, bool *polled, bool *stop)
2719{
2720 int status;
2721 bool expand = false;
2722
2723 ibwc->wc_flags = 0;
f99b1649 2724 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
fe2caefc
PP		 2725 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2726 OCRDMA_CQE_UD_STATUS_MASK) >>
2727 OCRDMA_CQE_UD_STATUS_SHIFT;
f99b1649 2728 } else {
fe2caefc
PP		 2729 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2730 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
f99b1649 2731 }
fe2caefc
PP		 2732
2733 if (status == OCRDMA_CQE_SUCCESS) {
2734 *polled = true;
2735 ocrdma_poll_success_rcqe(qp, cqe, ibwc);
2736 } else {
2737 expand = ocrdma_poll_err_rcqe(qp, cqe, ibwc, polled, stop,
2738 status);
2739 }
2740 return expand;
2741}
2742
2743static void ocrdma_change_cq_phase(struct ocrdma_cq *cq, struct ocrdma_cqe *cqe,
2744 u16 cur_getp)
2745{
2746 if (cq->phase_change) {
2747 if (cur_getp == 0)
2748 cq->phase = (~cq->phase & OCRDMA_CQE_VALID);
f99b1649 2749 } else {
fe2caefc
PP		 2750 /* clear valid bit */
2751 cqe->flags_status_srcqpn = 0;
f99b1649 2752 }
fe2caefc
PP		 2753}
2754
2755static int ocrdma_poll_hwcq(struct ocrdma_cq *cq, int num_entries,
2756 struct ib_wc *ibwc)
2757{
2758 u16 qpn = 0;
2759 int i = 0;
2760 bool expand = false;
2761 int polled_hw_cqes = 0;
2762 struct ocrdma_qp *qp = NULL;
1afc0454 2763 struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device);
fe2caefc
PP		 2764 struct ocrdma_cqe *cqe;
2765 u16 cur_getp; bool polled = false; bool stop = false;
2766
2767 cur_getp = cq->getp;
2768 while (num_entries) {
2769 cqe = cq->va + cur_getp;
2770 /* check whether valid cqe or not */
2771 if (!is_cqe_valid(cq, cqe))
2772 break;
2773 qpn = (le32_to_cpu(cqe->cmn.qpn) & OCRDMA_CQE_QPN_MASK);
2774 /* ignore discarded cqe */
2775 if (qpn == 0)
2776 goto skip_cqe;
2777 qp = dev->qp_tbl[qpn];
2778 BUG_ON(qp == NULL);
2779
2780 if (is_cqe_for_sq(cqe)) {
2781 expand = ocrdma_poll_scqe(qp, cqe, ibwc, &polled,
2782 &stop);
2783 } else {
2784 expand = ocrdma_poll_rcqe(qp, cqe, ibwc, &polled,
2785 &stop);
2786 }
2787 if (expand)
2788 goto expand_cqe;
2789 if (stop)
2790 goto stop_cqe;
2791 /* clear qpn to avoid duplicate processing by discard_cqe() */
2792 cqe->cmn.qpn = 0;
2793skip_cqe:
2794 polled_hw_cqes += 1;
2795 cur_getp = (cur_getp + 1) % cq->max_hw_cqe;
2796 ocrdma_change_cq_phase(cq, cqe, cur_getp);
2797expand_cqe:
2798 if (polled) {
2799 num_entries -= 1;
2800 i += 1;
2801 ibwc = ibwc + 1;
2802 polled = false;
2803 }
2804 }
2805stop_cqe:
2806 cq->getp = cur_getp;
b41f7852
DS		 2807
2808 if (polled_hw_cqes)
2809 ocrdma_ring_cq_db(dev, cq->id, false, false, polled_hw_cqes);
ea617626 2810
fe2caefc
PP		 2811 return i;
2812}
2813
2814/* insert error cqe if the QP's SQ or RQ's CQ matches the CQ under poll. */
2815static int ocrdma_add_err_cqe(struct ocrdma_cq *cq, int num_entries,
2816 struct ocrdma_qp *qp, struct ib_wc *ibwc)
2817{
2818 int err_cqes = 0;
2819
2820 while (num_entries) {
2821 if (is_hw_sq_empty(qp) && is_hw_rq_empty(qp))
2822 break;
2823 if (!is_hw_sq_empty(qp) && qp->sq_cq == cq) {
2824 ocrdma_update_wc(qp, ibwc, qp->sq.tail);
2825 ocrdma_hwq_inc_tail(&qp->sq);
2826 } else if (!is_hw_rq_empty(qp) && qp->rq_cq == cq) {
2827 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2828 ocrdma_hwq_inc_tail(&qp->rq);
f99b1649 2829 } else {
fe2caefc 2830 return err_cqes;
f99b1649 2831 }
fe2caefc
PP		 2832 ibwc->byte_len = 0;
2833 ibwc->status = IB_WC_WR_FLUSH_ERR;
2834 ibwc = ibwc + 1;
2835 err_cqes += 1;
2836 num_entries -= 1;
2837 }
2838 return err_cqes;
2839}
2840
2841int ocrdma_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc)
2842{
2843 int cqes_to_poll = num_entries;
1afc0454
NG		 2844 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
2845 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
fe2caefc
PP		 2846 int num_os_cqe = 0, err_cqes = 0;
2847 struct ocrdma_qp *qp;
1afc0454 2848 unsigned long flags;
fe2caefc
PP		 2849
2850 /* poll cqes from adapter CQ */
2851 spin_lock_irqsave(&cq->cq_lock, flags);
2852 num_os_cqe = ocrdma_poll_hwcq(cq, cqes_to_poll, wc);
2853 spin_unlock_irqrestore(&cq->cq_lock, flags);
2854 cqes_to_poll -= num_os_cqe;
2855
2856 if (cqes_to_poll) {
2857 wc = wc + num_os_cqe;
2858 /* adapter returns single error cqe when qp moves to
2859 * error state. So insert error cqes with wc_status as
2860 * FLUSHED for pending WQEs and RQEs of QP's SQ and RQ
2861 * respectively which uses this CQ.
2862 */
2863 spin_lock_irqsave(&dev->flush_q_lock, flags);
2864 list_for_each_entry(qp, &cq->sq_head, sq_entry) {
2865 if (cqes_to_poll == 0)
2866 break;
2867 err_cqes = ocrdma_add_err_cqe(cq, cqes_to_poll, qp, wc);
2868 cqes_to_poll -= err_cqes;
2869 num_os_cqe += err_cqes;
2870 wc = wc + err_cqes;
2871 }
2872 spin_unlock_irqrestore(&dev->flush_q_lock, flags);
2873 }
2874 return num_os_cqe;
2875}
2876
2877int ocrdma_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags cq_flags)
2878{
1afc0454
NG		 2879 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
2880 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
fe2caefc 2881 u16 cq_id;
1afc0454 2882 unsigned long flags;
ea617626 2883 bool arm_needed = false, sol_needed = false;
fe2caefc 2884
fe2caefc 2885 cq_id = cq->id;
fe2caefc
PP		 2886
2887 spin_lock_irqsave(&cq->cq_lock, flags);
2888 if (cq_flags & IB_CQ_NEXT_COMP || cq_flags & IB_CQ_SOLICITED)
ea617626 2889 arm_needed = true;
fe2caefc 2890 if (cq_flags & IB_CQ_SOLICITED)
ea617626 2891 sol_needed = true;
fe2caefc 2892
b41f7852 2893 ocrdma_ring_cq_db(dev, cq_id, arm_needed, sol_needed, 0);
fe2caefc 2894 spin_unlock_irqrestore(&cq->cq_lock, flags);
ea617626 2895
fe2caefc
PP		 2896 return 0;
2897}
7c33880c 2898
c4367a26 2899struct ib_mr *ocrdma_alloc_mr(struct ib_pd *ibpd, enum ib_mr_type mr_type,
42a3b153 2900 u32 max_num_sg)
7c33880c
NG		 2901{
2902 int status;
2903 struct ocrdma_mr *mr;
2904 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
2905 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
2906
cacb7d59
SG		 2907 if (mr_type != IB_MR_TYPE_MEM_REG)
2908 return ERR_PTR(-EINVAL);
2909
2910 if (max_num_sg > dev->attr.max_pages_per_frmr)
7c33880c
NG		 2911 return ERR_PTR(-EINVAL);
2912
2913 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
2914 if (!mr)
2915 return ERR_PTR(-ENOMEM);
2916
2eaa1c56
SG		 2917 mr->pages = kcalloc(max_num_sg, sizeof(u64), GFP_KERNEL);
2918 if (!mr->pages) {
2919 status = -ENOMEM;
2920 goto pl_err;
2921 }
2922
cacb7d59 2923 status = ocrdma_get_pbl_info(dev, mr, max_num_sg);
7c33880c
NG		 2924 if (status)
2925 goto pbl_err;
2926 mr->hwmr.fr_mr = 1;
2927 mr->hwmr.remote_rd = 0;
2928 mr->hwmr.remote_wr = 0;
2929 mr->hwmr.local_rd = 0;
2930 mr->hwmr.local_wr = 0;
2931 mr->hwmr.mw_bind = 0;
2932 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
2933 if (status)
2934 goto pbl_err;
2935 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, 0);
2936 if (status)
2937 goto mbx_err;
2938 mr->ibmr.rkey = mr->hwmr.lkey;
2939 mr->ibmr.lkey = mr->hwmr.lkey;
7a1e89d8
RD		 2940 dev->stag_arr[(mr->hwmr.lkey >> 8) & (OCRDMA_MAX_STAG - 1)] =
2941 (unsigned long) mr;
7c33880c
NG		 2942 return &mr->ibmr;
2943mbx_err:
2944 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
2945pbl_err:
2eaa1c56
SG		 2946 kfree(mr->pages);
2947pl_err:
7c33880c
NG		 2948 kfree(mr);
2949 return ERR_PTR(-ENOMEM);
2950}
2951
2eaa1c56
SG		 2952static int ocrdma_set_page(struct ib_mr *ibmr, u64 addr)
2953{
2954 struct ocrdma_mr *mr = get_ocrdma_mr(ibmr);
2955
2956 if (unlikely(mr->npages == mr->hwmr.num_pbes))
2957 return -ENOMEM;
2958
2959 mr->pages[mr->npages++] = addr;
2960
2961 return 0;
2962}
2963
ff2ba993 2964int ocrdma_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents,
9aa8b321 2965 unsigned int *sg_offset)
2eaa1c56
SG		 2966{
2967 struct ocrdma_mr *mr = get_ocrdma_mr(ibmr);
2968
2969 mr->npages = 0;
2970
ff2ba993 2971 return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, ocrdma_set_page);
2eaa1c56 2972}
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