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[mirror_ubuntu-jammy-kernel.git] / drivers / infiniband / hw / vmw_pvrdma / pvrdma_main.c
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1/*
2 * Copyright (c) 2012-2016 VMware, Inc. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of EITHER the GNU General Public License
6 * version 2 as published by the Free Software Foundation or the BSD
7 * 2-Clause License. This program is distributed in the hope that it
8 * will be useful, but WITHOUT ANY WARRANTY; WITHOUT EVEN THE IMPLIED
9 * WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
10 * See the GNU General Public License version 2 for more details at
11 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program available in the file COPYING in the main
15 * directory of this source tree.
16 *
17 * The BSD 2-Clause License
18 *
19 * Redistribution and use in source and binary forms, with or
20 * without modification, are permitted provided that the following
21 * conditions are met:
22 *
23 * - Redistributions of source code must retain the above
24 * copyright notice, this list of conditions and the following
25 * disclaimer.
26 *
27 * - Redistributions in binary form must reproduce the above
28 * copyright notice, this list of conditions and the following
29 * disclaimer in the documentation and/or other materials
30 * provided with the distribution.
31 *
32 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
33 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
34 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
35 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
36 * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
37 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
38 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
39 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
40 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
41 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
42 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
43 * OF THE POSSIBILITY OF SUCH DAMAGE.
44 */
45
46#include <linux/errno.h>
47#include <linux/inetdevice.h>
48#include <linux/init.h>
49#include <linux/module.h>
50#include <linux/slab.h>
51#include <rdma/ib_addr.h>
52#include <rdma/ib_smi.h>
53#include <rdma/ib_user_verbs.h>
54#include <net/addrconf.h>
55
56#include "pvrdma.h"
57
58#define DRV_NAME "vmw_pvrdma"
b172679b 59#define DRV_VERSION "1.0.1.0-k"
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60
61static DEFINE_MUTEX(pvrdma_device_list_lock);
62static LIST_HEAD(pvrdma_device_list);
63static struct workqueue_struct *event_wq;
64
65static int pvrdma_add_gid(struct ib_device *ibdev,
66 u8 port_num,
67 unsigned int index,
68 const union ib_gid *gid,
69 const struct ib_gid_attr *attr,
70 void **context);
71static int pvrdma_del_gid(struct ib_device *ibdev,
72 u8 port_num,
73 unsigned int index,
74 void **context);
75
76
77static ssize_t show_hca(struct device *device, struct device_attribute *attr,
78 char *buf)
79{
80 return sprintf(buf, "VMW_PVRDMA-%s\n", DRV_VERSION);
81}
82
83static ssize_t show_rev(struct device *device, struct device_attribute *attr,
84 char *buf)
85{
86 return sprintf(buf, "%d\n", PVRDMA_REV_ID);
87}
88
89static ssize_t show_board(struct device *device, struct device_attribute *attr,
90 char *buf)
91{
92 return sprintf(buf, "%d\n", PVRDMA_BOARD_ID);
93}
94
95static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
96static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
97static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
98
99static struct device_attribute *pvrdma_class_attributes[] = {
100 &dev_attr_hw_rev,
101 &dev_attr_hca_type,
102 &dev_attr_board_id
103};
104
9abb0d1b 105static void pvrdma_get_fw_ver_str(struct ib_device *device, char *str)
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106{
107 struct pvrdma_dev *dev =
108 container_of(device, struct pvrdma_dev, ib_dev);
9abb0d1b 109 snprintf(str, IB_FW_VERSION_NAME_MAX, "%d.%d.%d\n",
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110 (int) (dev->dsr->caps.fw_ver >> 32),
111 (int) (dev->dsr->caps.fw_ver >> 16) & 0xffff,
112 (int) dev->dsr->caps.fw_ver & 0xffff);
113}
114
115static int pvrdma_init_device(struct pvrdma_dev *dev)
116{
117 /* Initialize some device related stuff */
118 spin_lock_init(&dev->cmd_lock);
119 sema_init(&dev->cmd_sema, 1);
120 atomic_set(&dev->num_qps, 0);
8b10ba78 121 atomic_set(&dev->num_srqs, 0);
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122 atomic_set(&dev->num_cqs, 0);
123 atomic_set(&dev->num_pds, 0);
124 atomic_set(&dev->num_ahs, 0);
125
126 return 0;
127}
128
129static int pvrdma_port_immutable(struct ib_device *ibdev, u8 port_num,
130 struct ib_port_immutable *immutable)
131{
05297b66 132 struct pvrdma_dev *dev = to_vdev(ibdev);
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133 struct ib_port_attr attr;
134 int err;
135
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136 if (dev->dsr->caps.gid_types == PVRDMA_GID_TYPE_FLAG_ROCE_V1)
137 immutable->core_cap_flags |= RDMA_CORE_PORT_IBA_ROCE;
138 else if (dev->dsr->caps.gid_types == PVRDMA_GID_TYPE_FLAG_ROCE_V2)
139 immutable->core_cap_flags |= RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;
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140
141 err = ib_query_port(ibdev, port_num, &attr);
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142 if (err)
143 return err;
144
145 immutable->pkey_tbl_len = attr.pkey_tbl_len;
146 immutable->gid_tbl_len = attr.gid_tbl_len;
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147 immutable->max_mad_size = IB_MGMT_MAD_SIZE;
148 return 0;
149}
150
151static struct net_device *pvrdma_get_netdev(struct ib_device *ibdev,
152 u8 port_num)
153{
154 struct net_device *netdev;
155 struct pvrdma_dev *dev = to_vdev(ibdev);
156
157 if (port_num != 1)
158 return NULL;
159
160 rcu_read_lock();
161 netdev = dev->netdev;
162 if (netdev)
163 dev_hold(netdev);
164 rcu_read_unlock();
165
166 return netdev;
167}
168
169static int pvrdma_register_device(struct pvrdma_dev *dev)
170{
171 int ret = -1;
172 int i = 0;
173
174 strlcpy(dev->ib_dev.name, "vmw_pvrdma%d", IB_DEVICE_NAME_MAX);
175 dev->ib_dev.node_guid = dev->dsr->caps.node_guid;
176 dev->sys_image_guid = dev->dsr->caps.sys_image_guid;
177 dev->flags = 0;
178 dev->ib_dev.owner = THIS_MODULE;
179 dev->ib_dev.num_comp_vectors = 1;
a62ef9a7 180 dev->ib_dev.dev.parent = &dev->pdev->dev;
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181 dev->ib_dev.uverbs_abi_ver = PVRDMA_UVERBS_ABI_VERSION;
182 dev->ib_dev.uverbs_cmd_mask =
183 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
184 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
185 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
186 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
187 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
188 (1ull << IB_USER_VERBS_CMD_REG_MR) |
189 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
190 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
191 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
192 (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
193 (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
194 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
195 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
196 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
197 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
198 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
199 (1ull << IB_USER_VERBS_CMD_POST_SEND) |
200 (1ull << IB_USER_VERBS_CMD_POST_RECV) |
201 (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
202 (1ull << IB_USER_VERBS_CMD_DESTROY_AH);
203
204 dev->ib_dev.node_type = RDMA_NODE_IB_CA;
205 dev->ib_dev.phys_port_cnt = dev->dsr->caps.phys_port_cnt;
206
207 dev->ib_dev.query_device = pvrdma_query_device;
208 dev->ib_dev.query_port = pvrdma_query_port;
209 dev->ib_dev.query_gid = pvrdma_query_gid;
210 dev->ib_dev.query_pkey = pvrdma_query_pkey;
211 dev->ib_dev.modify_port = pvrdma_modify_port;
212 dev->ib_dev.alloc_ucontext = pvrdma_alloc_ucontext;
213 dev->ib_dev.dealloc_ucontext = pvrdma_dealloc_ucontext;
214 dev->ib_dev.mmap = pvrdma_mmap;
215 dev->ib_dev.alloc_pd = pvrdma_alloc_pd;
216 dev->ib_dev.dealloc_pd = pvrdma_dealloc_pd;
217 dev->ib_dev.create_ah = pvrdma_create_ah;
218 dev->ib_dev.destroy_ah = pvrdma_destroy_ah;
219 dev->ib_dev.create_qp = pvrdma_create_qp;
220 dev->ib_dev.modify_qp = pvrdma_modify_qp;
221 dev->ib_dev.query_qp = pvrdma_query_qp;
222 dev->ib_dev.destroy_qp = pvrdma_destroy_qp;
223 dev->ib_dev.post_send = pvrdma_post_send;
224 dev->ib_dev.post_recv = pvrdma_post_recv;
225 dev->ib_dev.create_cq = pvrdma_create_cq;
226 dev->ib_dev.modify_cq = pvrdma_modify_cq;
227 dev->ib_dev.resize_cq = pvrdma_resize_cq;
228 dev->ib_dev.destroy_cq = pvrdma_destroy_cq;
229 dev->ib_dev.poll_cq = pvrdma_poll_cq;
230 dev->ib_dev.req_notify_cq = pvrdma_req_notify_cq;
231 dev->ib_dev.get_dma_mr = pvrdma_get_dma_mr;
232 dev->ib_dev.reg_user_mr = pvrdma_reg_user_mr;
233 dev->ib_dev.dereg_mr = pvrdma_dereg_mr;
234 dev->ib_dev.alloc_mr = pvrdma_alloc_mr;
235 dev->ib_dev.map_mr_sg = pvrdma_map_mr_sg;
236 dev->ib_dev.add_gid = pvrdma_add_gid;
237 dev->ib_dev.del_gid = pvrdma_del_gid;
238 dev->ib_dev.get_netdev = pvrdma_get_netdev;
239 dev->ib_dev.get_port_immutable = pvrdma_port_immutable;
240 dev->ib_dev.get_link_layer = pvrdma_port_link_layer;
241 dev->ib_dev.get_dev_fw_str = pvrdma_get_fw_ver_str;
242
243 mutex_init(&dev->port_mutex);
244 spin_lock_init(&dev->desc_lock);
245
246 dev->cq_tbl = kcalloc(dev->dsr->caps.max_cq, sizeof(void *),
247 GFP_KERNEL);
248 if (!dev->cq_tbl)
249 return ret;
250 spin_lock_init(&dev->cq_tbl_lock);
251
252 dev->qp_tbl = kcalloc(dev->dsr->caps.max_qp, sizeof(void *),
253 GFP_KERNEL);
254 if (!dev->qp_tbl)
255 goto err_cq_free;
256 spin_lock_init(&dev->qp_tbl_lock);
257
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258 /* Check if SRQ is supported by backend */
259 if (dev->dsr->caps.max_srq) {
260 dev->ib_dev.uverbs_cmd_mask |=
261 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
262 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
263 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
264 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
265 (1ull << IB_USER_VERBS_CMD_POST_SRQ_RECV);
266
267 dev->ib_dev.create_srq = pvrdma_create_srq;
268 dev->ib_dev.modify_srq = pvrdma_modify_srq;
269 dev->ib_dev.query_srq = pvrdma_query_srq;
270 dev->ib_dev.destroy_srq = pvrdma_destroy_srq;
271 dev->ib_dev.post_srq_recv = pvrdma_post_srq_recv;
272
273 dev->srq_tbl = kcalloc(dev->dsr->caps.max_srq,
274 sizeof(struct pvrdma_srq *),
275 GFP_KERNEL);
276 if (!dev->srq_tbl)
277 goto err_qp_free;
278 }
279 spin_lock_init(&dev->srq_tbl_lock);
280
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281 ret = ib_register_device(&dev->ib_dev, NULL);
282 if (ret)
8b10ba78 283 goto err_srq_free;
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284
285 for (i = 0; i < ARRAY_SIZE(pvrdma_class_attributes); ++i) {
286 ret = device_create_file(&dev->ib_dev.dev,
287 pvrdma_class_attributes[i]);
288 if (ret)
289 goto err_class;
290 }
291
292 dev->ib_active = true;
293
294 return 0;
295
296err_class:
297 ib_unregister_device(&dev->ib_dev);
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298err_srq_free:
299 kfree(dev->srq_tbl);
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300err_qp_free:
301 kfree(dev->qp_tbl);
302err_cq_free:
303 kfree(dev->cq_tbl);
304
305 return ret;
306}
307
308static irqreturn_t pvrdma_intr0_handler(int irq, void *dev_id)
309{
310 u32 icr = PVRDMA_INTR_CAUSE_RESPONSE;
311 struct pvrdma_dev *dev = dev_id;
312
313 dev_dbg(&dev->pdev->dev, "interrupt 0 (response) handler\n");
314
7bf3976d 315 if (!dev->pdev->msix_enabled) {
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316 /* Legacy intr */
317 icr = pvrdma_read_reg(dev, PVRDMA_REG_ICR);
318 if (icr == 0)
319 return IRQ_NONE;
320 }
321
322 if (icr == PVRDMA_INTR_CAUSE_RESPONSE)
323 complete(&dev->cmd_done);
324
325 return IRQ_HANDLED;
326}
327
328static void pvrdma_qp_event(struct pvrdma_dev *dev, u32 qpn, int type)
329{
330 struct pvrdma_qp *qp;
331 unsigned long flags;
332
333 spin_lock_irqsave(&dev->qp_tbl_lock, flags);
334 qp = dev->qp_tbl[qpn % dev->dsr->caps.max_qp];
335 if (qp)
336 atomic_inc(&qp->refcnt);
337 spin_unlock_irqrestore(&dev->qp_tbl_lock, flags);
338
339 if (qp && qp->ibqp.event_handler) {
340 struct ib_qp *ibqp = &qp->ibqp;
341 struct ib_event e;
342
343 e.device = ibqp->device;
344 e.element.qp = ibqp;
345 e.event = type; /* 1:1 mapping for now. */
346 ibqp->event_handler(&e, ibqp->qp_context);
347 }
348 if (qp) {
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349 if (atomic_dec_and_test(&qp->refcnt))
350 complete(&qp->free);
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351 }
352}
353
354static void pvrdma_cq_event(struct pvrdma_dev *dev, u32 cqn, int type)
355{
356 struct pvrdma_cq *cq;
357 unsigned long flags;
358
359 spin_lock_irqsave(&dev->cq_tbl_lock, flags);
360 cq = dev->cq_tbl[cqn % dev->dsr->caps.max_cq];
361 if (cq)
362 atomic_inc(&cq->refcnt);
363 spin_unlock_irqrestore(&dev->cq_tbl_lock, flags);
364
365 if (cq && cq->ibcq.event_handler) {
366 struct ib_cq *ibcq = &cq->ibcq;
367 struct ib_event e;
368
369 e.device = ibcq->device;
370 e.element.cq = ibcq;
371 e.event = type; /* 1:1 mapping for now. */
372 ibcq->event_handler(&e, ibcq->cq_context);
373 }
374 if (cq) {
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BT
375 if (atomic_dec_and_test(&cq->refcnt))
376 complete(&cq->free);
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377 }
378}
379
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380static void pvrdma_srq_event(struct pvrdma_dev *dev, u32 srqn, int type)
381{
382 struct pvrdma_srq *srq;
383 unsigned long flags;
384
385 spin_lock_irqsave(&dev->srq_tbl_lock, flags);
386 if (dev->srq_tbl)
387 srq = dev->srq_tbl[srqn % dev->dsr->caps.max_srq];
388 else
389 srq = NULL;
390 if (srq)
391 refcount_inc(&srq->refcnt);
392 spin_unlock_irqrestore(&dev->srq_tbl_lock, flags);
393
394 if (srq && srq->ibsrq.event_handler) {
395 struct ib_srq *ibsrq = &srq->ibsrq;
396 struct ib_event e;
397
398 e.device = ibsrq->device;
399 e.element.srq = ibsrq;
400 e.event = type; /* 1:1 mapping for now. */
401 ibsrq->event_handler(&e, ibsrq->srq_context);
402 }
403 if (srq) {
404 if (refcount_dec_and_test(&srq->refcnt))
e3524b26 405 complete(&srq->free);
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406 }
407}
408
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409static void pvrdma_dispatch_event(struct pvrdma_dev *dev, int port,
410 enum ib_event_type event)
411{
412 struct ib_event ib_event;
413
414 memset(&ib_event, 0, sizeof(ib_event));
415 ib_event.device = &dev->ib_dev;
416 ib_event.element.port_num = port;
417 ib_event.event = event;
418 ib_dispatch_event(&ib_event);
419}
420
421static void pvrdma_dev_event(struct pvrdma_dev *dev, u8 port, int type)
422{
423 if (port < 1 || port > dev->dsr->caps.phys_port_cnt) {
424 dev_warn(&dev->pdev->dev, "event on port %d\n", port);
425 return;
426 }
427
428 pvrdma_dispatch_event(dev, port, type);
429}
430
431static inline struct pvrdma_eqe *get_eqe(struct pvrdma_dev *dev, unsigned int i)
432{
433 return (struct pvrdma_eqe *)pvrdma_page_dir_get_ptr(
434 &dev->async_pdir,
435 PAGE_SIZE +
436 sizeof(struct pvrdma_eqe) * i);
437}
438
439static irqreturn_t pvrdma_intr1_handler(int irq, void *dev_id)
440{
441 struct pvrdma_dev *dev = dev_id;
442 struct pvrdma_ring *ring = &dev->async_ring_state->rx;
443 int ring_slots = (dev->dsr->async_ring_pages.num_pages - 1) *
444 PAGE_SIZE / sizeof(struct pvrdma_eqe);
445 unsigned int head;
446
447 dev_dbg(&dev->pdev->dev, "interrupt 1 (async event) handler\n");
448
449 /*
450 * Don't process events until the IB device is registered. Otherwise
451 * we'll try to ib_dispatch_event() on an invalid device.
452 */
453 if (!dev->ib_active)
454 return IRQ_HANDLED;
455
456 while (pvrdma_idx_ring_has_data(ring, ring_slots, &head) > 0) {
457 struct pvrdma_eqe *eqe;
458
459 eqe = get_eqe(dev, head);
460
461 switch (eqe->type) {
462 case PVRDMA_EVENT_QP_FATAL:
463 case PVRDMA_EVENT_QP_REQ_ERR:
464 case PVRDMA_EVENT_QP_ACCESS_ERR:
465 case PVRDMA_EVENT_COMM_EST:
466 case PVRDMA_EVENT_SQ_DRAINED:
467 case PVRDMA_EVENT_PATH_MIG:
468 case PVRDMA_EVENT_PATH_MIG_ERR:
469 case PVRDMA_EVENT_QP_LAST_WQE_REACHED:
470 pvrdma_qp_event(dev, eqe->info, eqe->type);
471 break;
472
473 case PVRDMA_EVENT_CQ_ERR:
474 pvrdma_cq_event(dev, eqe->info, eqe->type);
475 break;
476
477 case PVRDMA_EVENT_SRQ_ERR:
478 case PVRDMA_EVENT_SRQ_LIMIT_REACHED:
8b10ba78 479 pvrdma_srq_event(dev, eqe->info, eqe->type);
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480 break;
481
482 case PVRDMA_EVENT_PORT_ACTIVE:
483 case PVRDMA_EVENT_PORT_ERR:
484 case PVRDMA_EVENT_LID_CHANGE:
485 case PVRDMA_EVENT_PKEY_CHANGE:
486 case PVRDMA_EVENT_SM_CHANGE:
487 case PVRDMA_EVENT_CLIENT_REREGISTER:
488 case PVRDMA_EVENT_GID_CHANGE:
489 pvrdma_dev_event(dev, eqe->info, eqe->type);
490 break;
491
492 case PVRDMA_EVENT_DEVICE_FATAL:
493 pvrdma_dev_event(dev, 1, eqe->type);
494 break;
495
496 default:
497 break;
498 }
499
500 pvrdma_idx_ring_inc(&ring->cons_head, ring_slots);
501 }
502
503 return IRQ_HANDLED;
504}
505
506static inline struct pvrdma_cqne *get_cqne(struct pvrdma_dev *dev,
507 unsigned int i)
508{
509 return (struct pvrdma_cqne *)pvrdma_page_dir_get_ptr(
510 &dev->cq_pdir,
511 PAGE_SIZE +
512 sizeof(struct pvrdma_cqne) * i);
513}
514
515static irqreturn_t pvrdma_intrx_handler(int irq, void *dev_id)
516{
517 struct pvrdma_dev *dev = dev_id;
518 struct pvrdma_ring *ring = &dev->cq_ring_state->rx;
519 int ring_slots = (dev->dsr->cq_ring_pages.num_pages - 1) * PAGE_SIZE /
520 sizeof(struct pvrdma_cqne);
521 unsigned int head;
522 unsigned long flags;
523
524 dev_dbg(&dev->pdev->dev, "interrupt x (completion) handler\n");
525
526 while (pvrdma_idx_ring_has_data(ring, ring_slots, &head) > 0) {
527 struct pvrdma_cqne *cqne;
528 struct pvrdma_cq *cq;
529
530 cqne = get_cqne(dev, head);
531 spin_lock_irqsave(&dev->cq_tbl_lock, flags);
532 cq = dev->cq_tbl[cqne->info % dev->dsr->caps.max_cq];
533 if (cq)
534 atomic_inc(&cq->refcnt);
535 spin_unlock_irqrestore(&dev->cq_tbl_lock, flags);
536
537 if (cq && cq->ibcq.comp_handler)
538 cq->ibcq.comp_handler(&cq->ibcq, cq->ibcq.cq_context);
539 if (cq) {
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540 if (atomic_dec_and_test(&cq->refcnt))
541 complete(&cq->free);
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542 }
543 pvrdma_idx_ring_inc(&ring->cons_head, ring_slots);
544 }
545
546 return IRQ_HANDLED;
547}
548
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549static void pvrdma_free_irq(struct pvrdma_dev *dev)
550{
551 int i;
552
553 dev_dbg(&dev->pdev->dev, "freeing interrupts\n");
7bf3976d
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554 for (i = 0; i < dev->nr_vectors; i++)
555 free_irq(pci_irq_vector(dev->pdev, i), dev);
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556}
557
558static void pvrdma_enable_intrs(struct pvrdma_dev *dev)
559{
560 dev_dbg(&dev->pdev->dev, "enable interrupts\n");
561 pvrdma_write_reg(dev, PVRDMA_REG_IMR, 0);
562}
563
564static void pvrdma_disable_intrs(struct pvrdma_dev *dev)
565{
566 dev_dbg(&dev->pdev->dev, "disable interrupts\n");
567 pvrdma_write_reg(dev, PVRDMA_REG_IMR, ~0);
568}
569
29c8d9eb
AR
570static int pvrdma_alloc_intrs(struct pvrdma_dev *dev)
571{
7bf3976d
CH
572 struct pci_dev *pdev = dev->pdev;
573 int ret = 0, i;
29c8d9eb 574
7bf3976d
CH
575 ret = pci_alloc_irq_vectors(pdev, 1, PVRDMA_MAX_INTERRUPTS,
576 PCI_IRQ_MSIX);
577 if (ret < 0) {
578 ret = pci_alloc_irq_vectors(pdev, 1, 1,
579 PCI_IRQ_MSI | PCI_IRQ_LEGACY);
580 if (ret < 0)
581 return ret;
29c8d9eb 582 }
7bf3976d 583 dev->nr_vectors = ret;
29c8d9eb 584
7bf3976d
CH
585 ret = request_irq(pci_irq_vector(dev->pdev, 0), pvrdma_intr0_handler,
586 pdev->msix_enabled ? 0 : IRQF_SHARED, DRV_NAME, dev);
587 if (ret) {
588 dev_err(&dev->pdev->dev,
589 "failed to request interrupt 0\n");
590 goto out_free_vectors;
29c8d9eb
AR
591 }
592
7bf3976d
CH
593 for (i = 1; i < dev->nr_vectors; i++) {
594 ret = request_irq(pci_irq_vector(dev->pdev, i),
595 i == 1 ? pvrdma_intr1_handler :
596 pvrdma_intrx_handler,
597 0, DRV_NAME, dev);
29c8d9eb
AR
598 if (ret) {
599 dev_err(&dev->pdev->dev,
7bf3976d
CH
600 "failed to request interrupt %d\n", i);
601 goto free_irqs;
29c8d9eb
AR
602 }
603 }
604
605 return 0;
606
7bf3976d
CH
607free_irqs:
608 while (--i >= 0)
609 free_irq(pci_irq_vector(dev->pdev, i), dev);
610out_free_vectors:
611 pci_free_irq_vectors(pdev);
29c8d9eb
AR
612 return ret;
613}
614
615static void pvrdma_free_slots(struct pvrdma_dev *dev)
616{
617 struct pci_dev *pdev = dev->pdev;
618
619 if (dev->resp_slot)
620 dma_free_coherent(&pdev->dev, PAGE_SIZE, dev->resp_slot,
621 dev->dsr->resp_slot_dma);
622 if (dev->cmd_slot)
623 dma_free_coherent(&pdev->dev, PAGE_SIZE, dev->cmd_slot,
624 dev->dsr->cmd_slot_dma);
625}
626
627static int pvrdma_add_gid_at_index(struct pvrdma_dev *dev,
628 const union ib_gid *gid,
05297b66 629 u8 gid_type,
29c8d9eb
AR
630 int index)
631{
632 int ret;
633 union pvrdma_cmd_req req;
634 struct pvrdma_cmd_create_bind *cmd_bind = &req.create_bind;
635
636 if (!dev->sgid_tbl) {
637 dev_warn(&dev->pdev->dev, "sgid table not initialized\n");
638 return -EINVAL;
639 }
640
641 memset(cmd_bind, 0, sizeof(*cmd_bind));
642 cmd_bind->hdr.cmd = PVRDMA_CMD_CREATE_BIND;
643 memcpy(cmd_bind->new_gid, gid->raw, 16);
644 cmd_bind->mtu = ib_mtu_enum_to_int(IB_MTU_1024);
645 cmd_bind->vlan = 0xfff;
646 cmd_bind->index = index;
05297b66 647 cmd_bind->gid_type = gid_type;
29c8d9eb
AR
648
649 ret = pvrdma_cmd_post(dev, &req, NULL, 0);
650 if (ret < 0) {
651 dev_warn(&dev->pdev->dev,
652 "could not create binding, error: %d\n", ret);
653 return -EFAULT;
654 }
655 memcpy(&dev->sgid_tbl[index], gid, sizeof(*gid));
656 return 0;
657}
658
659static int pvrdma_add_gid(struct ib_device *ibdev,
660 u8 port_num,
661 unsigned int index,
662 const union ib_gid *gid,
663 const struct ib_gid_attr *attr,
664 void **context)
665{
666 struct pvrdma_dev *dev = to_vdev(ibdev);
667
05297b66
BT
668 return pvrdma_add_gid_at_index(dev, gid,
669 ib_gid_type_to_pvrdma(attr->gid_type),
670 index);
29c8d9eb
AR
671}
672
673static int pvrdma_del_gid_at_index(struct pvrdma_dev *dev, int index)
674{
675 int ret;
676 union pvrdma_cmd_req req;
677 struct pvrdma_cmd_destroy_bind *cmd_dest = &req.destroy_bind;
678
679 /* Update sgid table. */
680 if (!dev->sgid_tbl) {
681 dev_warn(&dev->pdev->dev, "sgid table not initialized\n");
682 return -EINVAL;
683 }
684
685 memset(cmd_dest, 0, sizeof(*cmd_dest));
686 cmd_dest->hdr.cmd = PVRDMA_CMD_DESTROY_BIND;
687 memcpy(cmd_dest->dest_gid, &dev->sgid_tbl[index], 16);
688 cmd_dest->index = index;
689
690 ret = pvrdma_cmd_post(dev, &req, NULL, 0);
691 if (ret < 0) {
692 dev_warn(&dev->pdev->dev,
693 "could not destroy binding, error: %d\n", ret);
694 return ret;
695 }
696 memset(&dev->sgid_tbl[index], 0, 16);
697 return 0;
698}
699
700static int pvrdma_del_gid(struct ib_device *ibdev,
701 u8 port_num,
702 unsigned int index,
703 void **context)
704{
705 struct pvrdma_dev *dev = to_vdev(ibdev);
706
707 dev_dbg(&dev->pdev->dev, "removing gid at index %u from %s",
708 index, dev->netdev->name);
709
710 return pvrdma_del_gid_at_index(dev, index);
711}
712
713static void pvrdma_netdevice_event_handle(struct pvrdma_dev *dev,
714 unsigned long event)
715{
716 switch (event) {
717 case NETDEV_REBOOT:
718 case NETDEV_DOWN:
719 pvrdma_dispatch_event(dev, 1, IB_EVENT_PORT_ERR);
720 break;
721 case NETDEV_UP:
b172679b
AS
722 pvrdma_write_reg(dev, PVRDMA_REG_CTL,
723 PVRDMA_DEVICE_CTL_UNQUIESCE);
724
725 mb();
726
727 if (pvrdma_read_reg(dev, PVRDMA_REG_ERR))
728 dev_err(&dev->pdev->dev,
729 "failed to activate device during link up\n");
730 else
731 pvrdma_dispatch_event(dev, 1, IB_EVENT_PORT_ACTIVE);
29c8d9eb
AR
732 break;
733 default:
734 dev_dbg(&dev->pdev->dev, "ignore netdevice event %ld on %s\n",
735 event, dev->ib_dev.name);
736 break;
737 }
738}
739
740static void pvrdma_netdevice_event_work(struct work_struct *work)
741{
742 struct pvrdma_netdevice_work *netdev_work;
743 struct pvrdma_dev *dev;
744
745 netdev_work = container_of(work, struct pvrdma_netdevice_work, work);
746
747 mutex_lock(&pvrdma_device_list_lock);
748 list_for_each_entry(dev, &pvrdma_device_list, device_link) {
749 if (dev->netdev == netdev_work->event_netdev) {
750 pvrdma_netdevice_event_handle(dev, netdev_work->event);
751 break;
752 }
753 }
754 mutex_unlock(&pvrdma_device_list_lock);
755
756 kfree(netdev_work);
757}
758
759static int pvrdma_netdevice_event(struct notifier_block *this,
760 unsigned long event, void *ptr)
761{
762 struct net_device *event_netdev = netdev_notifier_info_to_dev(ptr);
763 struct pvrdma_netdevice_work *netdev_work;
764
765 netdev_work = kmalloc(sizeof(*netdev_work), GFP_ATOMIC);
766 if (!netdev_work)
767 return NOTIFY_BAD;
768
769 INIT_WORK(&netdev_work->work, pvrdma_netdevice_event_work);
770 netdev_work->event_netdev = event_netdev;
771 netdev_work->event = event;
772 queue_work(event_wq, &netdev_work->work);
773
774 return NOTIFY_DONE;
775}
776
777static int pvrdma_pci_probe(struct pci_dev *pdev,
778 const struct pci_device_id *id)
779{
780 struct pci_dev *pdev_net;
781 struct pvrdma_dev *dev;
782 int ret;
783 unsigned long start;
784 unsigned long len;
29c8d9eb
AR
785 dma_addr_t slot_dma = 0;
786
787 dev_dbg(&pdev->dev, "initializing driver %s\n", pci_name(pdev));
788
789 /* Allocate zero-out device */
790 dev = (struct pvrdma_dev *)ib_alloc_device(sizeof(*dev));
791 if (!dev) {
792 dev_err(&pdev->dev, "failed to allocate IB device\n");
793 return -ENOMEM;
794 }
795
796 mutex_lock(&pvrdma_device_list_lock);
797 list_add(&dev->device_link, &pvrdma_device_list);
798 mutex_unlock(&pvrdma_device_list_lock);
799
800 ret = pvrdma_init_device(dev);
801 if (ret)
802 goto err_free_device;
803
804 dev->pdev = pdev;
805 pci_set_drvdata(pdev, dev);
806
807 ret = pci_enable_device(pdev);
808 if (ret) {
809 dev_err(&pdev->dev, "cannot enable PCI device\n");
810 goto err_free_device;
811 }
812
813 dev_dbg(&pdev->dev, "PCI resource flags BAR0 %#lx\n",
814 pci_resource_flags(pdev, 0));
815 dev_dbg(&pdev->dev, "PCI resource len %#llx\n",
816 (unsigned long long)pci_resource_len(pdev, 0));
817 dev_dbg(&pdev->dev, "PCI resource start %#llx\n",
818 (unsigned long long)pci_resource_start(pdev, 0));
819 dev_dbg(&pdev->dev, "PCI resource flags BAR1 %#lx\n",
820 pci_resource_flags(pdev, 1));
821 dev_dbg(&pdev->dev, "PCI resource len %#llx\n",
822 (unsigned long long)pci_resource_len(pdev, 1));
823 dev_dbg(&pdev->dev, "PCI resource start %#llx\n",
824 (unsigned long long)pci_resource_start(pdev, 1));
825
826 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) ||
827 !(pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
828 dev_err(&pdev->dev, "PCI BAR region not MMIO\n");
829 ret = -ENOMEM;
830 goto err_free_device;
831 }
832
833 ret = pci_request_regions(pdev, DRV_NAME);
834 if (ret) {
835 dev_err(&pdev->dev, "cannot request PCI resources\n");
836 goto err_disable_pdev;
837 }
838
839 /* Enable 64-Bit DMA */
840 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) == 0) {
841 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
842 if (ret != 0) {
843 dev_err(&pdev->dev,
844 "pci_set_consistent_dma_mask failed\n");
845 goto err_free_resource;
846 }
847 } else {
848 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
849 if (ret != 0) {
850 dev_err(&pdev->dev,
851 "pci_set_dma_mask failed\n");
852 goto err_free_resource;
853 }
854 }
855
856 pci_set_master(pdev);
857
858 /* Map register space */
859 start = pci_resource_start(dev->pdev, PVRDMA_PCI_RESOURCE_REG);
860 len = pci_resource_len(dev->pdev, PVRDMA_PCI_RESOURCE_REG);
861 dev->regs = ioremap(start, len);
862 if (!dev->regs) {
863 dev_err(&pdev->dev, "register mapping failed\n");
864 ret = -ENOMEM;
865 goto err_free_resource;
866 }
867
868 /* Setup per-device UAR. */
869 dev->driver_uar.index = 0;
870 dev->driver_uar.pfn =
871 pci_resource_start(dev->pdev, PVRDMA_PCI_RESOURCE_UAR) >>
872 PAGE_SHIFT;
873 dev->driver_uar.map =
874 ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
875 if (!dev->driver_uar.map) {
876 dev_err(&pdev->dev, "failed to remap UAR pages\n");
877 ret = -ENOMEM;
878 goto err_unmap_regs;
879 }
880
05297b66 881 dev->dsr_version = pvrdma_read_reg(dev, PVRDMA_REG_VERSION);
29c8d9eb 882 dev_info(&pdev->dev, "device version %d, driver version %d\n",
05297b66 883 dev->dsr_version, PVRDMA_VERSION);
29c8d9eb
AR
884
885 dev->dsr = dma_alloc_coherent(&pdev->dev, sizeof(*dev->dsr),
886 &dev->dsrbase, GFP_KERNEL);
887 if (!dev->dsr) {
888 dev_err(&pdev->dev, "failed to allocate shared region\n");
889 ret = -ENOMEM;
890 goto err_uar_unmap;
891 }
892
893 /* Setup the shared region */
894 memset(dev->dsr, 0, sizeof(*dev->dsr));
895 dev->dsr->driver_version = PVRDMA_VERSION;
896 dev->dsr->gos_info.gos_bits = sizeof(void *) == 4 ?
897 PVRDMA_GOS_BITS_32 :
898 PVRDMA_GOS_BITS_64;
899 dev->dsr->gos_info.gos_type = PVRDMA_GOS_TYPE_LINUX;
900 dev->dsr->gos_info.gos_ver = 1;
901 dev->dsr->uar_pfn = dev->driver_uar.pfn;
902
903 /* Command slot. */
904 dev->cmd_slot = dma_alloc_coherent(&pdev->dev, PAGE_SIZE,
905 &slot_dma, GFP_KERNEL);
906 if (!dev->cmd_slot) {
907 ret = -ENOMEM;
908 goto err_free_dsr;
909 }
910
911 dev->dsr->cmd_slot_dma = (u64)slot_dma;
912
913 /* Response slot. */
914 dev->resp_slot = dma_alloc_coherent(&pdev->dev, PAGE_SIZE,
915 &slot_dma, GFP_KERNEL);
916 if (!dev->resp_slot) {
917 ret = -ENOMEM;
918 goto err_free_slots;
919 }
920
921 dev->dsr->resp_slot_dma = (u64)slot_dma;
922
923 /* Async event ring */
6332dee8 924 dev->dsr->async_ring_pages.num_pages = PVRDMA_NUM_RING_PAGES;
29c8d9eb
AR
925 ret = pvrdma_page_dir_init(dev, &dev->async_pdir,
926 dev->dsr->async_ring_pages.num_pages, true);
927 if (ret)
928 goto err_free_slots;
929 dev->async_ring_state = dev->async_pdir.pages[0];
930 dev->dsr->async_ring_pages.pdir_dma = dev->async_pdir.dir_dma;
931
932 /* CQ notification ring */
6332dee8 933 dev->dsr->cq_ring_pages.num_pages = PVRDMA_NUM_RING_PAGES;
29c8d9eb
AR
934 ret = pvrdma_page_dir_init(dev, &dev->cq_pdir,
935 dev->dsr->cq_ring_pages.num_pages, true);
936 if (ret)
937 goto err_free_async_ring;
938 dev->cq_ring_state = dev->cq_pdir.pages[0];
939 dev->dsr->cq_ring_pages.pdir_dma = dev->cq_pdir.dir_dma;
940
941 /*
942 * Write the PA of the shared region to the device. The writes must be
943 * ordered such that the high bits are written last. When the writes
944 * complete, the device will have filled out the capabilities.
945 */
946
947 pvrdma_write_reg(dev, PVRDMA_REG_DSRLOW, (u32)dev->dsrbase);
948 pvrdma_write_reg(dev, PVRDMA_REG_DSRHIGH,
949 (u32)((u64)(dev->dsrbase) >> 32));
950
951 /* Make sure the write is complete before reading status. */
952 mb();
953
05297b66
BT
954 /* The driver supports RoCE V1 and V2. */
955 if (!PVRDMA_SUPPORTED(dev)) {
956 dev_err(&pdev->dev, "driver needs RoCE v1 or v2 support\n");
29c8d9eb
AR
957 ret = -EFAULT;
958 goto err_free_cq_ring;
959 }
960
961 /* Paired vmxnet3 will have same bus, slot. But func will be 0 */
962 pdev_net = pci_get_slot(pdev->bus, PCI_DEVFN(PCI_SLOT(pdev->devfn), 0));
963 if (!pdev_net) {
964 dev_err(&pdev->dev, "failed to find paired net device\n");
965 ret = -ENODEV;
966 goto err_free_cq_ring;
967 }
968
969 if (pdev_net->vendor != PCI_VENDOR_ID_VMWARE ||
970 pdev_net->device != PCI_DEVICE_ID_VMWARE_VMXNET3) {
971 dev_err(&pdev->dev, "failed to find paired vmxnet3 device\n");
972 pci_dev_put(pdev_net);
973 ret = -ENODEV;
974 goto err_free_cq_ring;
975 }
976
977 dev->netdev = pci_get_drvdata(pdev_net);
978 pci_dev_put(pdev_net);
979 if (!dev->netdev) {
980 dev_err(&pdev->dev, "failed to get vmxnet3 device\n");
981 ret = -ENODEV;
982 goto err_free_cq_ring;
983 }
984
985 dev_info(&pdev->dev, "paired device to %s\n", dev->netdev->name);
986
987 /* Interrupt setup */
988 ret = pvrdma_alloc_intrs(dev);
989 if (ret) {
990 dev_err(&pdev->dev, "failed to allocate interrupts\n");
991 ret = -ENOMEM;
ff89b070 992 goto err_free_cq_ring;
29c8d9eb
AR
993 }
994
995 /* Allocate UAR table. */
996 ret = pvrdma_uar_table_init(dev);
997 if (ret) {
998 dev_err(&pdev->dev, "failed to allocate UAR table\n");
999 ret = -ENOMEM;
1000 goto err_free_intrs;
1001 }
1002
1003 /* Allocate GID table */
1004 dev->sgid_tbl = kcalloc(dev->dsr->caps.gid_tbl_len,
1005 sizeof(union ib_gid), GFP_KERNEL);
1006 if (!dev->sgid_tbl) {
1007 ret = -ENOMEM;
1008 goto err_free_uar_table;
1009 }
1010 dev_dbg(&pdev->dev, "gid table len %d\n", dev->dsr->caps.gid_tbl_len);
1011
1012 pvrdma_enable_intrs(dev);
1013
1014 /* Activate pvrdma device */
1015 pvrdma_write_reg(dev, PVRDMA_REG_CTL, PVRDMA_DEVICE_CTL_ACTIVATE);
1016
1017 /* Make sure the write is complete before reading status. */
1018 mb();
1019
1020 /* Check if device was successfully activated */
1021 ret = pvrdma_read_reg(dev, PVRDMA_REG_ERR);
1022 if (ret != 0) {
1023 dev_err(&pdev->dev, "failed to activate device\n");
1024 ret = -EFAULT;
1025 goto err_disable_intr;
1026 }
1027
1028 /* Register IB device */
1029 ret = pvrdma_register_device(dev);
1030 if (ret) {
1031 dev_err(&pdev->dev, "failed to register IB device\n");
1032 goto err_disable_intr;
1033 }
1034
1035 dev->nb_netdev.notifier_call = pvrdma_netdevice_event;
1036 ret = register_netdevice_notifier(&dev->nb_netdev);
1037 if (ret) {
1038 dev_err(&pdev->dev, "failed to register netdevice events\n");
1039 goto err_unreg_ibdev;
1040 }
1041
1042 dev_info(&pdev->dev, "attached to device\n");
1043 return 0;
1044
1045err_unreg_ibdev:
1046 ib_unregister_device(&dev->ib_dev);
1047err_disable_intr:
1048 pvrdma_disable_intrs(dev);
1049 kfree(dev->sgid_tbl);
1050err_free_uar_table:
1051 pvrdma_uar_table_cleanup(dev);
1052err_free_intrs:
1053 pvrdma_free_irq(dev);
7bf3976d 1054 pci_free_irq_vectors(pdev);
29c8d9eb
AR
1055err_free_cq_ring:
1056 pvrdma_page_dir_cleanup(dev, &dev->cq_pdir);
1057err_free_async_ring:
1058 pvrdma_page_dir_cleanup(dev, &dev->async_pdir);
1059err_free_slots:
1060 pvrdma_free_slots(dev);
1061err_free_dsr:
1062 dma_free_coherent(&pdev->dev, sizeof(*dev->dsr), dev->dsr,
1063 dev->dsrbase);
1064err_uar_unmap:
1065 iounmap(dev->driver_uar.map);
1066err_unmap_regs:
1067 iounmap(dev->regs);
1068err_free_resource:
1069 pci_release_regions(pdev);
1070err_disable_pdev:
1071 pci_disable_device(pdev);
1072 pci_set_drvdata(pdev, NULL);
1073err_free_device:
1074 mutex_lock(&pvrdma_device_list_lock);
1075 list_del(&dev->device_link);
1076 mutex_unlock(&pvrdma_device_list_lock);
1077 ib_dealloc_device(&dev->ib_dev);
1078 return ret;
1079}
1080
1081static void pvrdma_pci_remove(struct pci_dev *pdev)
1082{
1083 struct pvrdma_dev *dev = pci_get_drvdata(pdev);
1084
1085 if (!dev)
1086 return;
1087
1088 dev_info(&pdev->dev, "detaching from device\n");
1089
1090 unregister_netdevice_notifier(&dev->nb_netdev);
1091 dev->nb_netdev.notifier_call = NULL;
1092
1093 flush_workqueue(event_wq);
1094
1095 /* Unregister ib device */
1096 ib_unregister_device(&dev->ib_dev);
1097
1098 mutex_lock(&pvrdma_device_list_lock);
1099 list_del(&dev->device_link);
1100 mutex_unlock(&pvrdma_device_list_lock);
1101
1102 pvrdma_disable_intrs(dev);
1103 pvrdma_free_irq(dev);
7bf3976d 1104 pci_free_irq_vectors(pdev);
29c8d9eb
AR
1105
1106 /* Deactivate pvrdma device */
1107 pvrdma_write_reg(dev, PVRDMA_REG_CTL, PVRDMA_DEVICE_CTL_RESET);
1108 pvrdma_page_dir_cleanup(dev, &dev->cq_pdir);
1109 pvrdma_page_dir_cleanup(dev, &dev->async_pdir);
1110 pvrdma_free_slots(dev);
1111
1112 iounmap(dev->regs);
1113 kfree(dev->sgid_tbl);
1114 kfree(dev->cq_tbl);
8b10ba78 1115 kfree(dev->srq_tbl);
29c8d9eb
AR
1116 kfree(dev->qp_tbl);
1117 pvrdma_uar_table_cleanup(dev);
1118 iounmap(dev->driver_uar.map);
1119
1120 ib_dealloc_device(&dev->ib_dev);
1121
1122 /* Free pci resources */
1123 pci_release_regions(pdev);
1124 pci_disable_device(pdev);
1125 pci_set_drvdata(pdev, NULL);
1126}
1127
7806def0 1128static const struct pci_device_id pvrdma_pci_table[] = {
29c8d9eb
AR
1129 { PCI_DEVICE(PCI_VENDOR_ID_VMWARE, PCI_DEVICE_ID_VMWARE_PVRDMA), },
1130 { 0 },
1131};
1132
1133MODULE_DEVICE_TABLE(pci, pvrdma_pci_table);
1134
1135static struct pci_driver pvrdma_driver = {
1136 .name = DRV_NAME,
1137 .id_table = pvrdma_pci_table,
1138 .probe = pvrdma_pci_probe,
1139 .remove = pvrdma_pci_remove,
1140};
1141
1142static int __init pvrdma_init(void)
1143{
1144 int err;
1145
1146 event_wq = alloc_ordered_workqueue("pvrdma_event_wq", WQ_MEM_RECLAIM);
1147 if (!event_wq)
1148 return -ENOMEM;
1149
1150 err = pci_register_driver(&pvrdma_driver);
1151 if (err)
1152 destroy_workqueue(event_wq);
1153
1154 return err;
1155}
1156
1157static void __exit pvrdma_cleanup(void)
1158{
1159 pci_unregister_driver(&pvrdma_driver);
1160
1161 destroy_workqueue(event_wq);
1162}
1163
1164module_init(pvrdma_init);
1165module_exit(pvrdma_cleanup);
1166
1167MODULE_AUTHOR("VMware, Inc");
1168MODULE_DESCRIPTION("VMware Paravirtual RDMA driver");
29c8d9eb 1169MODULE_LICENSE("Dual BSD/GPL");