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1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | // | |
3 | // Driver for the IMX SNVS ON/OFF Power Key | |
4 | // Copyright (C) 2015 Freescale Semiconductor, Inc. All Rights Reserved. | |
d3dc6e23 | 5 | |
d997cc17 | 6 | #include <linux/clk.h> |
d3dc6e23 RG |
7 | #include <linux/device.h> |
8 | #include <linux/err.h> | |
9 | #include <linux/init.h> | |
10 | #include <linux/input.h> | |
11 | #include <linux/interrupt.h> | |
12 | #include <linux/io.h> | |
13 | #include <linux/jiffies.h> | |
14 | #include <linux/kernel.h> | |
15 | #include <linux/module.h> | |
16 | #include <linux/of.h> | |
17 | #include <linux/of_address.h> | |
18 | #include <linux/platform_device.h> | |
fb3c09ba | 19 | #include <linux/pm_wakeirq.h> |
d3dc6e23 RG |
20 | #include <linux/mfd/syscon.h> |
21 | #include <linux/regmap.h> | |
22 | ||
1a26c920 RG |
23 | #define SNVS_HPVIDR1_REG 0xF8 |
24 | #define SNVS_LPSR_REG 0x4C /* LP Status Register */ | |
25 | #define SNVS_LPCR_REG 0x38 /* LP Control Register */ | |
26 | #define SNVS_HPSR_REG 0x14 | |
27 | #define SNVS_HPSR_BTN BIT(6) | |
28 | #define SNVS_LPSR_SPO BIT(18) | |
29 | #define SNVS_LPCR_DEP_EN BIT(5) | |
d3dc6e23 | 30 | |
1a26c920 RG |
31 | #define DEBOUNCE_TIME 30 |
32 | #define REPEAT_INTERVAL 60 | |
d3dc6e23 RG |
33 | |
34 | struct pwrkey_drv_data { | |
35 | struct regmap *snvs; | |
36 | int irq; | |
37 | int keycode; | |
38 | int keystate; /* 1:pressed */ | |
39 | int wakeup; | |
40 | struct timer_list check_timer; | |
41 | struct input_dev *input; | |
1a26c920 | 42 | u8 minor_rev; |
d3dc6e23 RG |
43 | }; |
44 | ||
4ea40278 | 45 | static void imx_imx_snvs_check_for_events(struct timer_list *t) |
d3dc6e23 | 46 | { |
4ea40278 | 47 | struct pwrkey_drv_data *pdata = from_timer(pdata, t, check_timer); |
d3dc6e23 RG |
48 | struct input_dev *input = pdata->input; |
49 | u32 state; | |
50 | ||
51 | regmap_read(pdata->snvs, SNVS_HPSR_REG, &state); | |
52 | state = state & SNVS_HPSR_BTN ? 1 : 0; | |
53 | ||
54 | /* only report new event if status changed */ | |
55 | if (state ^ pdata->keystate) { | |
56 | pdata->keystate = state; | |
57 | input_event(input, EV_KEY, pdata->keycode, state); | |
58 | input_sync(input); | |
59 | pm_relax(pdata->input->dev.parent); | |
60 | } | |
61 | ||
62 | /* repeat check if pressed long */ | |
63 | if (state) { | |
64 | mod_timer(&pdata->check_timer, | |
65 | jiffies + msecs_to_jiffies(REPEAT_INTERVAL)); | |
66 | } | |
67 | } | |
68 | ||
69 | static irqreturn_t imx_snvs_pwrkey_interrupt(int irq, void *dev_id) | |
70 | { | |
71 | struct platform_device *pdev = dev_id; | |
72 | struct pwrkey_drv_data *pdata = platform_get_drvdata(pdev); | |
1a26c920 | 73 | struct input_dev *input = pdata->input; |
d3dc6e23 RG |
74 | u32 lp_status; |
75 | ||
1a26c920 | 76 | pm_wakeup_event(input->dev.parent, 0); |
d3dc6e23 RG |
77 | |
78 | regmap_read(pdata->snvs, SNVS_LPSR_REG, &lp_status); | |
1a26c920 RG |
79 | if (lp_status & SNVS_LPSR_SPO) { |
80 | if (pdata->minor_rev == 0) { | |
81 | /* | |
82 | * The first generation i.MX6 SoCs only sends an | |
83 | * interrupt on button release. To mimic power-key | |
84 | * usage, we'll prepend a press event. | |
85 | */ | |
86 | input_report_key(input, pdata->keycode, 1); | |
87 | input_sync(input); | |
88 | input_report_key(input, pdata->keycode, 0); | |
89 | input_sync(input); | |
90 | pm_relax(input->dev.parent); | |
91 | } else { | |
92 | mod_timer(&pdata->check_timer, | |
93 | jiffies + msecs_to_jiffies(DEBOUNCE_TIME)); | |
94 | } | |
95 | } | |
d3dc6e23 RG |
96 | |
97 | /* clear SPO status */ | |
98 | regmap_write(pdata->snvs, SNVS_LPSR_REG, SNVS_LPSR_SPO); | |
99 | ||
100 | return IRQ_HANDLED; | |
101 | } | |
102 | ||
d997cc17 UKK |
103 | static void imx_snvs_pwrkey_disable_clk(void *data) |
104 | { | |
105 | clk_disable_unprepare(data); | |
106 | } | |
107 | ||
d3dc6e23 RG |
108 | static void imx_snvs_pwrkey_act(void *pdata) |
109 | { | |
110 | struct pwrkey_drv_data *pd = pdata; | |
111 | ||
112 | del_timer_sync(&pd->check_timer); | |
113 | } | |
114 | ||
115 | static int imx_snvs_pwrkey_probe(struct platform_device *pdev) | |
116 | { | |
1e55c176 DT |
117 | struct pwrkey_drv_data *pdata; |
118 | struct input_dev *input; | |
d3dc6e23 | 119 | struct device_node *np; |
d997cc17 | 120 | struct clk *clk; |
d3dc6e23 | 121 | int error; |
1a26c920 | 122 | u32 vid; |
d3dc6e23 RG |
123 | |
124 | /* Get SNVS register Page */ | |
125 | np = pdev->dev.of_node; | |
126 | if (!np) | |
127 | return -ENODEV; | |
128 | ||
129 | pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); | |
130 | if (!pdata) | |
131 | return -ENOMEM; | |
132 | ||
9ace41ad | 133 | pdata->snvs = syscon_regmap_lookup_by_phandle(np, "regmap"); |
9979c1c7 | 134 | if (IS_ERR(pdata->snvs)) { |
d3dc6e23 | 135 | dev_err(&pdev->dev, "Can't get snvs syscon\n"); |
9979c1c7 | 136 | return PTR_ERR(pdata->snvs); |
d3dc6e23 RG |
137 | } |
138 | ||
139 | if (of_property_read_u32(np, "linux,keycode", &pdata->keycode)) { | |
140 | pdata->keycode = KEY_POWER; | |
141 | dev_warn(&pdev->dev, "KEY_POWER without setting in dts\n"); | |
142 | } | |
143 | ||
d997cc17 UKK |
144 | clk = devm_clk_get_optional(&pdev->dev, NULL); |
145 | if (IS_ERR(clk)) { | |
146 | dev_err(&pdev->dev, "Failed to get snvs clock (%pe)\n", clk); | |
147 | return PTR_ERR(clk); | |
148 | } | |
149 | ||
150 | error = clk_prepare_enable(clk); | |
151 | if (error) { | |
152 | dev_err(&pdev->dev, "Failed to enable snvs clock (%pe)\n", | |
153 | ERR_PTR(error)); | |
154 | return error; | |
155 | } | |
156 | ||
157 | error = devm_add_action_or_reset(&pdev->dev, | |
158 | imx_snvs_pwrkey_disable_clk, clk); | |
159 | if (error) { | |
160 | dev_err(&pdev->dev, | |
161 | "Failed to register clock cleanup handler (%pe)\n", | |
162 | ERR_PTR(error)); | |
163 | return error; | |
164 | } | |
165 | ||
def56bba | 166 | pdata->wakeup = of_property_read_bool(np, "wakeup-source"); |
d3dc6e23 RG |
167 | |
168 | pdata->irq = platform_get_irq(pdev, 0); | |
0bec8b7e | 169 | if (pdata->irq < 0) |
d3dc6e23 | 170 | return -EINVAL; |
d3dc6e23 | 171 | |
1a26c920 RG |
172 | regmap_read(pdata->snvs, SNVS_HPVIDR1_REG, &vid); |
173 | pdata->minor_rev = vid & 0xff; | |
174 | ||
d3dc6e23 RG |
175 | regmap_update_bits(pdata->snvs, SNVS_LPCR_REG, SNVS_LPCR_DEP_EN, SNVS_LPCR_DEP_EN); |
176 | ||
177 | /* clear the unexpected interrupt before driver ready */ | |
178 | regmap_write(pdata->snvs, SNVS_LPSR_REG, SNVS_LPSR_SPO); | |
179 | ||
4ea40278 | 180 | timer_setup(&pdata->check_timer, imx_imx_snvs_check_for_events, 0); |
d3dc6e23 RG |
181 | |
182 | input = devm_input_allocate_device(&pdev->dev); | |
183 | if (!input) { | |
184 | dev_err(&pdev->dev, "failed to allocate the input device\n"); | |
185 | return -ENOMEM; | |
186 | } | |
187 | ||
188 | input->name = pdev->name; | |
189 | input->phys = "snvs-pwrkey/input0"; | |
190 | input->id.bustype = BUS_HOST; | |
191 | ||
192 | input_set_capability(input, EV_KEY, pdata->keycode); | |
193 | ||
194 | /* input customer action to cancel release timer */ | |
195 | error = devm_add_action(&pdev->dev, imx_snvs_pwrkey_act, pdata); | |
196 | if (error) { | |
197 | dev_err(&pdev->dev, "failed to register remove action\n"); | |
198 | return error; | |
199 | } | |
200 | ||
bf2a7ca3 AH |
201 | pdata->input = input; |
202 | platform_set_drvdata(pdev, pdata); | |
203 | ||
d3dc6e23 RG |
204 | error = devm_request_irq(&pdev->dev, pdata->irq, |
205 | imx_snvs_pwrkey_interrupt, | |
206 | 0, pdev->name, pdev); | |
207 | ||
208 | if (error) { | |
209 | dev_err(&pdev->dev, "interrupt not available.\n"); | |
210 | return error; | |
211 | } | |
212 | ||
213 | error = input_register_device(input); | |
214 | if (error < 0) { | |
215 | dev_err(&pdev->dev, "failed to register input device\n"); | |
d3dc6e23 RG |
216 | return error; |
217 | } | |
218 | ||
d3dc6e23 | 219 | device_init_wakeup(&pdev->dev, pdata->wakeup); |
fb3c09ba AH |
220 | error = dev_pm_set_wake_irq(&pdev->dev, pdata->irq); |
221 | if (error) | |
222 | dev_err(&pdev->dev, "irq wake enable failed.\n"); | |
d3dc6e23 RG |
223 | |
224 | return 0; | |
225 | } | |
226 | ||
227 | static const struct of_device_id imx_snvs_pwrkey_ids[] = { | |
228 | { .compatible = "fsl,sec-v4.0-pwrkey" }, | |
229 | { /* sentinel */ } | |
230 | }; | |
231 | MODULE_DEVICE_TABLE(of, imx_snvs_pwrkey_ids); | |
232 | ||
d3dc6e23 RG |
233 | static struct platform_driver imx_snvs_pwrkey_driver = { |
234 | .driver = { | |
235 | .name = "snvs_pwrkey", | |
d3dc6e23 RG |
236 | .of_match_table = imx_snvs_pwrkey_ids, |
237 | }, | |
238 | .probe = imx_snvs_pwrkey_probe, | |
239 | }; | |
240 | module_platform_driver(imx_snvs_pwrkey_driver); | |
241 | ||
242 | MODULE_AUTHOR("Freescale Semiconductor"); | |
243 | MODULE_DESCRIPTION("i.MX snvs power key Driver"); | |
244 | MODULE_LICENSE("GPL"); |