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1da177e4 LT |
1 | /* |
2 | * i8042 keyboard and mouse controller driver for Linux | |
3 | * | |
4 | * Copyright (c) 1999-2004 Vojtech Pavlik | |
5 | */ | |
6 | ||
7 | /* | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License version 2 as published by | |
10 | * the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/delay.h> | |
14 | #include <linux/module.h> | |
15 | #include <linux/moduleparam.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/ioport.h> | |
1da177e4 LT |
18 | #include <linux/init.h> |
19 | #include <linux/serio.h> | |
20 | #include <linux/err.h> | |
21 | #include <linux/rcupdate.h> | |
d052d1be | 22 | #include <linux/platform_device.h> |
1da177e4 LT |
23 | |
24 | #include <asm/io.h> | |
25 | ||
26 | MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>"); | |
27 | MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver"); | |
28 | MODULE_LICENSE("GPL"); | |
29 | ||
945ef0d4 DT |
30 | static unsigned int i8042_nokbd; |
31 | module_param_named(nokbd, i8042_nokbd, bool, 0); | |
32 | MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port."); | |
33 | ||
1da177e4 LT |
34 | static unsigned int i8042_noaux; |
35 | module_param_named(noaux, i8042_noaux, bool, 0); | |
36 | MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port."); | |
37 | ||
38 | static unsigned int i8042_nomux; | |
39 | module_param_named(nomux, i8042_nomux, bool, 0); | |
40 | MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing conrtoller is present."); | |
41 | ||
42 | static unsigned int i8042_unlock; | |
43 | module_param_named(unlock, i8042_unlock, bool, 0); | |
44 | MODULE_PARM_DESC(unlock, "Ignore keyboard lock."); | |
45 | ||
46 | static unsigned int i8042_reset; | |
47 | module_param_named(reset, i8042_reset, bool, 0); | |
48 | MODULE_PARM_DESC(reset, "Reset controller during init and cleanup."); | |
49 | ||
50 | static unsigned int i8042_direct; | |
51 | module_param_named(direct, i8042_direct, bool, 0); | |
52 | MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode."); | |
53 | ||
54 | static unsigned int i8042_dumbkbd; | |
55 | module_param_named(dumbkbd, i8042_dumbkbd, bool, 0); | |
56 | MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard"); | |
57 | ||
58 | static unsigned int i8042_noloop; | |
59 | module_param_named(noloop, i8042_noloop, bool, 0); | |
60 | MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port"); | |
61 | ||
62 | static unsigned int i8042_blink_frequency = 500; | |
63 | module_param_named(panicblink, i8042_blink_frequency, uint, 0600); | |
64 | MODULE_PARM_DESC(panicblink, "Frequency with which keyboard LEDs should blink when kernel panics"); | |
65 | ||
66 | #ifdef CONFIG_PNP | |
67 | static int i8042_nopnp; | |
68 | module_param_named(nopnp, i8042_nopnp, bool, 0); | |
69 | MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings"); | |
70 | #endif | |
71 | ||
72 | #define DEBUG | |
73 | #ifdef DEBUG | |
74 | static int i8042_debug; | |
75 | module_param_named(debug, i8042_debug, bool, 0600); | |
76 | MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off"); | |
77 | #endif | |
78 | ||
1da177e4 LT |
79 | #include "i8042.h" |
80 | ||
81 | static DEFINE_SPINLOCK(i8042_lock); | |
82 | ||
83 | struct i8042_port { | |
84 | struct serio *serio; | |
85 | int irq; | |
1da177e4 LT |
86 | unsigned char exists; |
87 | signed char mux; | |
1da177e4 LT |
88 | }; |
89 | ||
90 | #define I8042_KBD_PORT_NO 0 | |
91 | #define I8042_AUX_PORT_NO 1 | |
92 | #define I8042_MUX_PORT_NO 2 | |
93 | #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2) | |
de9ce703 DT |
94 | |
95 | static struct i8042_port i8042_ports[I8042_NUM_PORTS]; | |
1da177e4 LT |
96 | |
97 | static unsigned char i8042_initial_ctr; | |
98 | static unsigned char i8042_ctr; | |
1da177e4 | 99 | static unsigned char i8042_mux_present; |
de9ce703 DT |
100 | static unsigned char i8042_kbd_irq_registered; |
101 | static unsigned char i8042_aux_irq_registered; | |
817e6ba3 | 102 | static unsigned char i8042_suppress_kbd_ack; |
1da177e4 LT |
103 | static struct platform_device *i8042_platform_device; |
104 | ||
7d12e780 | 105 | static irqreturn_t i8042_interrupt(int irq, void *dev_id); |
1da177e4 LT |
106 | |
107 | /* | |
108 | * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to | |
109 | * be ready for reading values from it / writing values to it. | |
110 | * Called always with i8042_lock held. | |
111 | */ | |
112 | ||
113 | static int i8042_wait_read(void) | |
114 | { | |
115 | int i = 0; | |
de9ce703 | 116 | |
1da177e4 LT |
117 | while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) { |
118 | udelay(50); | |
119 | i++; | |
120 | } | |
121 | return -(i == I8042_CTL_TIMEOUT); | |
122 | } | |
123 | ||
124 | static int i8042_wait_write(void) | |
125 | { | |
126 | int i = 0; | |
de9ce703 | 127 | |
1da177e4 LT |
128 | while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) { |
129 | udelay(50); | |
130 | i++; | |
131 | } | |
132 | return -(i == I8042_CTL_TIMEOUT); | |
133 | } | |
134 | ||
135 | /* | |
136 | * i8042_flush() flushes all data that may be in the keyboard and mouse buffers | |
137 | * of the i8042 down the toilet. | |
138 | */ | |
139 | ||
140 | static int i8042_flush(void) | |
141 | { | |
142 | unsigned long flags; | |
143 | unsigned char data, str; | |
144 | int i = 0; | |
145 | ||
146 | spin_lock_irqsave(&i8042_lock, flags); | |
147 | ||
148 | while (((str = i8042_read_status()) & I8042_STR_OBF) && (i < I8042_BUFFER_SIZE)) { | |
149 | udelay(50); | |
150 | data = i8042_read_data(); | |
151 | i++; | |
152 | dbg("%02x <- i8042 (flush, %s)", data, | |
153 | str & I8042_STR_AUXDATA ? "aux" : "kbd"); | |
154 | } | |
155 | ||
156 | spin_unlock_irqrestore(&i8042_lock, flags); | |
157 | ||
158 | return i; | |
159 | } | |
160 | ||
161 | /* | |
162 | * i8042_command() executes a command on the i8042. It also sends the input | |
163 | * parameter(s) of the commands to it, and receives the output value(s). The | |
164 | * parameters are to be stored in the param array, and the output is placed | |
165 | * into the same array. The number of the parameters and output values is | |
166 | * encoded in bits 8-11 of the command number. | |
167 | */ | |
168 | ||
de9ce703 | 169 | static int __i8042_command(unsigned char *param, int command) |
1da177e4 | 170 | { |
de9ce703 | 171 | int i, error; |
1da177e4 LT |
172 | |
173 | if (i8042_noloop && command == I8042_CMD_AUX_LOOP) | |
174 | return -1; | |
175 | ||
de9ce703 DT |
176 | error = i8042_wait_write(); |
177 | if (error) | |
178 | return error; | |
463a4f76 DT |
179 | |
180 | dbg("%02x -> i8042 (command)", command & 0xff); | |
181 | i8042_write_command(command & 0xff); | |
182 | ||
183 | for (i = 0; i < ((command >> 12) & 0xf); i++) { | |
de9ce703 DT |
184 | error = i8042_wait_write(); |
185 | if (error) | |
186 | return error; | |
463a4f76 DT |
187 | dbg("%02x -> i8042 (parameter)", param[i]); |
188 | i8042_write_data(param[i]); | |
1da177e4 LT |
189 | } |
190 | ||
463a4f76 | 191 | for (i = 0; i < ((command >> 8) & 0xf); i++) { |
de9ce703 DT |
192 | error = i8042_wait_read(); |
193 | if (error) { | |
194 | dbg(" -- i8042 (timeout)"); | |
195 | return error; | |
196 | } | |
1da177e4 | 197 | |
463a4f76 DT |
198 | if (command == I8042_CMD_AUX_LOOP && |
199 | !(i8042_read_status() & I8042_STR_AUXDATA)) { | |
de9ce703 DT |
200 | dbg(" -- i8042 (auxerr)"); |
201 | return -1; | |
1da177e4 LT |
202 | } |
203 | ||
463a4f76 DT |
204 | param[i] = i8042_read_data(); |
205 | dbg("%02x <- i8042 (return)", param[i]); | |
206 | } | |
1da177e4 | 207 | |
de9ce703 DT |
208 | return 0; |
209 | } | |
1da177e4 | 210 | |
de9ce703 DT |
211 | static int i8042_command(unsigned char *param, int command) |
212 | { | |
213 | unsigned long flags; | |
214 | int retval; | |
215 | ||
216 | spin_lock_irqsave(&i8042_lock, flags); | |
217 | retval = __i8042_command(param, command); | |
463a4f76 | 218 | spin_unlock_irqrestore(&i8042_lock, flags); |
de9ce703 | 219 | |
1da177e4 LT |
220 | return retval; |
221 | } | |
222 | ||
223 | /* | |
224 | * i8042_kbd_write() sends a byte out through the keyboard interface. | |
225 | */ | |
226 | ||
227 | static int i8042_kbd_write(struct serio *port, unsigned char c) | |
228 | { | |
229 | unsigned long flags; | |
230 | int retval = 0; | |
231 | ||
232 | spin_lock_irqsave(&i8042_lock, flags); | |
233 | ||
de9ce703 | 234 | if (!(retval = i8042_wait_write())) { |
1da177e4 LT |
235 | dbg("%02x -> i8042 (kbd-data)", c); |
236 | i8042_write_data(c); | |
237 | } | |
238 | ||
239 | spin_unlock_irqrestore(&i8042_lock, flags); | |
240 | ||
241 | return retval; | |
242 | } | |
243 | ||
244 | /* | |
245 | * i8042_aux_write() sends a byte out through the aux interface. | |
246 | */ | |
247 | ||
248 | static int i8042_aux_write(struct serio *serio, unsigned char c) | |
249 | { | |
250 | struct i8042_port *port = serio->port_data; | |
1da177e4 | 251 | |
f4e3c711 DT |
252 | return i8042_command(&c, port->mux == -1 ? |
253 | I8042_CMD_AUX_SEND : | |
254 | I8042_CMD_MUX_SEND + port->mux); | |
1da177e4 LT |
255 | } |
256 | ||
1da177e4 LT |
257 | /* |
258 | * i8042_start() is called by serio core when port is about to finish | |
259 | * registering. It will mark port as existing so i8042_interrupt can | |
260 | * start sending data through it. | |
261 | */ | |
262 | static int i8042_start(struct serio *serio) | |
263 | { | |
264 | struct i8042_port *port = serio->port_data; | |
265 | ||
266 | port->exists = 1; | |
267 | mb(); | |
268 | return 0; | |
269 | } | |
270 | ||
271 | /* | |
272 | * i8042_stop() marks serio port as non-existing so i8042_interrupt | |
273 | * will not try to send data to the port that is about to go away. | |
274 | * The function is called by serio core as part of unregister procedure. | |
275 | */ | |
276 | static void i8042_stop(struct serio *serio) | |
277 | { | |
278 | struct i8042_port *port = serio->port_data; | |
279 | ||
280 | port->exists = 0; | |
b2b18660 | 281 | synchronize_sched(); |
1da177e4 LT |
282 | port->serio = NULL; |
283 | } | |
284 | ||
285 | /* | |
286 | * i8042_interrupt() is the most important function in this driver - | |
287 | * it handles the interrupts from the i8042, and sends incoming bytes | |
288 | * to the upper layers. | |
289 | */ | |
290 | ||
7d12e780 | 291 | static irqreturn_t i8042_interrupt(int irq, void *dev_id) |
1da177e4 LT |
292 | { |
293 | struct i8042_port *port; | |
294 | unsigned long flags; | |
295 | unsigned char str, data; | |
296 | unsigned int dfl; | |
297 | unsigned int port_no; | |
817e6ba3 | 298 | int ret = 1; |
1da177e4 | 299 | |
1da177e4 LT |
300 | spin_lock_irqsave(&i8042_lock, flags); |
301 | str = i8042_read_status(); | |
302 | if (unlikely(~str & I8042_STR_OBF)) { | |
303 | spin_unlock_irqrestore(&i8042_lock, flags); | |
304 | if (irq) dbg("Interrupt %d, without any data", irq); | |
305 | ret = 0; | |
306 | goto out; | |
307 | } | |
308 | data = i8042_read_data(); | |
309 | spin_unlock_irqrestore(&i8042_lock, flags); | |
310 | ||
311 | if (i8042_mux_present && (str & I8042_STR_AUXDATA)) { | |
312 | static unsigned long last_transmit; | |
313 | static unsigned char last_str; | |
314 | ||
315 | dfl = 0; | |
316 | if (str & I8042_STR_MUXERR) { | |
317 | dbg("MUX error, status is %02x, data is %02x", str, data); | |
1da177e4 LT |
318 | /* |
319 | * When MUXERR condition is signalled the data register can only contain | |
320 | * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately | |
a216a4b6 DT |
321 | * it is not always the case. Some KBCs also report 0xfc when there is |
322 | * nothing connected to the port while others sometimes get confused which | |
323 | * port the data came from and signal error leaving the data intact. They | |
324 | * _do not_ revert to legacy mode (actually I've never seen KBC reverting | |
325 | * to legacy mode yet, when we see one we'll add proper handling). | |
326 | * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the | |
327 | * rest assume that the data came from the same serio last byte | |
1da177e4 LT |
328 | * was transmitted (if transmission happened not too long ago). |
329 | */ | |
a216a4b6 DT |
330 | |
331 | switch (data) { | |
332 | default: | |
1da177e4 LT |
333 | if (time_before(jiffies, last_transmit + HZ/10)) { |
334 | str = last_str; | |
335 | break; | |
336 | } | |
337 | /* fall through - report timeout */ | |
a216a4b6 | 338 | case 0xfc: |
1da177e4 LT |
339 | case 0xfd: |
340 | case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break; | |
341 | case 0xff: dfl = SERIO_PARITY; data = 0xfe; break; | |
342 | } | |
343 | } | |
344 | ||
345 | port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3); | |
346 | last_str = str; | |
347 | last_transmit = jiffies; | |
348 | } else { | |
349 | ||
350 | dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) | | |
351 | ((str & I8042_STR_TIMEOUT) ? SERIO_TIMEOUT : 0); | |
352 | ||
353 | port_no = (str & I8042_STR_AUXDATA) ? | |
354 | I8042_AUX_PORT_NO : I8042_KBD_PORT_NO; | |
355 | } | |
356 | ||
357 | port = &i8042_ports[port_no]; | |
358 | ||
de9ce703 DT |
359 | dbg("%02x <- i8042 (interrupt, %d, %d%s%s)", |
360 | data, port_no, irq, | |
1da177e4 LT |
361 | dfl & SERIO_PARITY ? ", bad parity" : "", |
362 | dfl & SERIO_TIMEOUT ? ", timeout" : ""); | |
363 | ||
817e6ba3 DT |
364 | if (unlikely(i8042_suppress_kbd_ack)) |
365 | if (port_no == I8042_KBD_PORT_NO && | |
366 | (data == 0xfa || data == 0xfe)) { | |
19f3c3e3 | 367 | i8042_suppress_kbd_ack--; |
817e6ba3 DT |
368 | goto out; |
369 | } | |
370 | ||
1da177e4 | 371 | if (likely(port->exists)) |
7d12e780 | 372 | serio_interrupt(port->serio, data, dfl); |
1da177e4 | 373 | |
0854e52d | 374 | out: |
1da177e4 LT |
375 | return IRQ_RETVAL(ret); |
376 | } | |
377 | ||
de9ce703 DT |
378 | /* |
379 | * i8042_enable_kbd_port enables keybaord port on chip | |
380 | */ | |
381 | ||
382 | static int i8042_enable_kbd_port(void) | |
383 | { | |
384 | i8042_ctr &= ~I8042_CTR_KBDDIS; | |
385 | i8042_ctr |= I8042_CTR_KBDINT; | |
386 | ||
387 | if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { | |
388 | printk(KERN_ERR "i8042.c: Failed to enable KBD port.\n"); | |
389 | return -EIO; | |
390 | } | |
391 | ||
392 | return 0; | |
393 | } | |
394 | ||
395 | /* | |
396 | * i8042_enable_aux_port enables AUX (mouse) port on chip | |
397 | */ | |
398 | ||
399 | static int i8042_enable_aux_port(void) | |
400 | { | |
401 | i8042_ctr &= ~I8042_CTR_AUXDIS; | |
402 | i8042_ctr |= I8042_CTR_AUXINT; | |
403 | ||
404 | if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { | |
405 | printk(KERN_ERR "i8042.c: Failed to enable AUX port.\n"); | |
406 | return -EIO; | |
407 | } | |
408 | ||
409 | return 0; | |
410 | } | |
411 | ||
412 | /* | |
413 | * i8042_enable_mux_ports enables 4 individual AUX ports after | |
414 | * the controller has been switched into Multiplexed mode | |
415 | */ | |
416 | ||
417 | static int i8042_enable_mux_ports(void) | |
418 | { | |
419 | unsigned char param; | |
420 | int i; | |
421 | ||
422 | for (i = 0; i < I8042_NUM_MUX_PORTS; i++) { | |
423 | i8042_command(¶m, I8042_CMD_MUX_PFX + i); | |
424 | i8042_command(¶m, I8042_CMD_AUX_ENABLE); | |
425 | } | |
426 | ||
427 | return i8042_enable_aux_port(); | |
428 | } | |
429 | ||
1da177e4 LT |
430 | /* |
431 | * i8042_set_mux_mode checks whether the controller has an active | |
432 | * multiplexor and puts the chip into Multiplexed (1) or Legacy (0) mode. | |
433 | */ | |
434 | ||
435 | static int i8042_set_mux_mode(unsigned int mode, unsigned char *mux_version) | |
436 | { | |
437 | ||
438 | unsigned char param; | |
439 | /* | |
440 | * Get rid of bytes in the queue. | |
441 | */ | |
442 | ||
443 | i8042_flush(); | |
444 | ||
445 | /* | |
446 | * Internal loopback test - send three bytes, they should come back from the | |
de9ce703 | 447 | * mouse interface, the last should be version. |
1da177e4 LT |
448 | */ |
449 | ||
450 | param = 0xf0; | |
463a4f76 | 451 | if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != 0xf0) |
1da177e4 LT |
452 | return -1; |
453 | param = mode ? 0x56 : 0xf6; | |
463a4f76 | 454 | if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != (mode ? 0x56 : 0xf6)) |
1da177e4 LT |
455 | return -1; |
456 | param = mode ? 0xa4 : 0xa5; | |
463a4f76 | 457 | if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == (mode ? 0xa4 : 0xa5)) |
1da177e4 LT |
458 | return -1; |
459 | ||
460 | if (mux_version) | |
463a4f76 | 461 | *mux_version = param; |
1da177e4 LT |
462 | |
463 | return 0; | |
464 | } | |
465 | ||
1da177e4 | 466 | /* |
de9ce703 DT |
467 | * i8042_check_mux() checks whether the controller supports the PS/2 Active |
468 | * Multiplexing specification by Synaptics, Phoenix, Insyde and | |
469 | * LCS/Telegraphics. | |
1da177e4 LT |
470 | */ |
471 | ||
de9ce703 | 472 | static int __devinit i8042_check_mux(void) |
1da177e4 | 473 | { |
de9ce703 DT |
474 | unsigned char mux_version; |
475 | ||
476 | if (i8042_set_mux_mode(1, &mux_version)) | |
477 | return -1; | |
478 | ||
1da177e4 | 479 | /* |
de9ce703 DT |
480 | * Workaround for interference with USB Legacy emulation |
481 | * that causes a v10.12 MUX to be found. | |
1da177e4 | 482 | */ |
de9ce703 DT |
483 | if (mux_version == 0xAC) |
484 | return -1; | |
485 | ||
486 | printk(KERN_INFO "i8042.c: Detected active multiplexing controller, rev %d.%d.\n", | |
487 | (mux_version >> 4) & 0xf, mux_version & 0xf); | |
1da177e4 | 488 | |
de9ce703 DT |
489 | /* |
490 | * Disable all muxed ports by disabling AUX. | |
491 | */ | |
1da177e4 LT |
492 | i8042_ctr |= I8042_CTR_AUXDIS; |
493 | i8042_ctr &= ~I8042_CTR_AUXINT; | |
494 | ||
495 | if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { | |
496 | printk(KERN_ERR "i8042.c: Failed to disable AUX port, can't use MUX.\n"); | |
de9ce703 | 497 | return -EIO; |
1da177e4 LT |
498 | } |
499 | ||
de9ce703 | 500 | i8042_mux_present = 1; |
1da177e4 LT |
501 | |
502 | return 0; | |
503 | } | |
504 | ||
1da177e4 | 505 | /* |
de9ce703 | 506 | * The following is used to test AUX IRQ delivery. |
1da177e4 | 507 | */ |
de9ce703 DT |
508 | static struct completion i8042_aux_irq_delivered __devinitdata; |
509 | static int i8042_irq_being_tested __devinitdata; | |
1da177e4 | 510 | |
7d12e780 | 511 | static irqreturn_t __devinit i8042_aux_test_irq(int irq, void *dev_id) |
1da177e4 | 512 | { |
de9ce703 DT |
513 | unsigned long flags; |
514 | unsigned char str, data; | |
1da177e4 | 515 | |
de9ce703 DT |
516 | spin_lock_irqsave(&i8042_lock, flags); |
517 | str = i8042_read_status(); | |
518 | if (str & I8042_STR_OBF) { | |
519 | data = i8042_read_data(); | |
520 | if (i8042_irq_being_tested && | |
521 | data == 0xa5 && (str & I8042_STR_AUXDATA)) | |
522 | complete(&i8042_aux_irq_delivered); | |
523 | } | |
524 | spin_unlock_irqrestore(&i8042_lock, flags); | |
1da177e4 | 525 | |
de9ce703 | 526 | return IRQ_HANDLED; |
1da177e4 LT |
527 | } |
528 | ||
d2ada559 RS |
529 | /* |
530 | * i8042_toggle_aux - enables or disables AUX port on i8042 via command and | |
531 | * verifies success by readinng CTR. Used when testing for presence of AUX | |
532 | * port. | |
533 | */ | |
534 | static int __devinit i8042_toggle_aux(int on) | |
535 | { | |
536 | unsigned char param; | |
537 | int i; | |
538 | ||
539 | if (i8042_command(¶m, | |
540 | on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE)) | |
541 | return -1; | |
542 | ||
543 | /* some chips need some time to set the I8042_CTR_AUXDIS bit */ | |
544 | for (i = 0; i < 100; i++) { | |
545 | udelay(50); | |
546 | ||
547 | if (i8042_command(¶m, I8042_CMD_CTL_RCTR)) | |
548 | return -1; | |
549 | ||
550 | if (!(param & I8042_CTR_AUXDIS) == on) | |
551 | return 0; | |
552 | } | |
553 | ||
554 | return -1; | |
555 | } | |
1da177e4 LT |
556 | |
557 | /* | |
558 | * i8042_check_aux() applies as much paranoia as it can at detecting | |
559 | * the presence of an AUX interface. | |
560 | */ | |
561 | ||
87fd6318 | 562 | static int __devinit i8042_check_aux(void) |
1da177e4 | 563 | { |
de9ce703 DT |
564 | int retval = -1; |
565 | int irq_registered = 0; | |
1e4865f8 | 566 | int aux_loop_broken = 0; |
de9ce703 | 567 | unsigned long flags; |
1da177e4 | 568 | unsigned char param; |
1da177e4 LT |
569 | |
570 | /* | |
571 | * Get rid of bytes in the queue. | |
572 | */ | |
573 | ||
574 | i8042_flush(); | |
575 | ||
576 | /* | |
577 | * Internal loopback test - filters out AT-type i8042's. Unfortunately | |
578 | * SiS screwed up and their 5597 doesn't support the LOOP command even | |
579 | * though it has an AUX port. | |
580 | */ | |
581 | ||
582 | param = 0x5a; | |
3ca5de6d DT |
583 | retval = i8042_command(¶m, I8042_CMD_AUX_LOOP); |
584 | if (retval || param != 0x5a) { | |
1da177e4 LT |
585 | |
586 | /* | |
587 | * External connection test - filters out AT-soldered PS/2 i8042's | |
588 | * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error | |
589 | * 0xfa - no error on some notebooks which ignore the spec | |
590 | * Because it's common for chipsets to return error on perfectly functioning | |
591 | * AUX ports, we test for this only when the LOOP command failed. | |
592 | */ | |
593 | ||
de9ce703 DT |
594 | if (i8042_command(¶m, I8042_CMD_AUX_TEST) || |
595 | (param && param != 0xfa && param != 0xff)) | |
596 | return -1; | |
1e4865f8 | 597 | |
3ca5de6d DT |
598 | /* |
599 | * If AUX_LOOP completed without error but returned unexpected data | |
600 | * mark it as broken | |
601 | */ | |
602 | if (!retval) | |
603 | aux_loop_broken = 1; | |
1da177e4 LT |
604 | } |
605 | ||
606 | /* | |
607 | * Bit assignment test - filters out PS/2 i8042's in AT mode | |
608 | */ | |
609 | ||
d2ada559 | 610 | if (i8042_toggle_aux(0)) { |
1da177e4 LT |
611 | printk(KERN_WARNING "Failed to disable AUX port, but continuing anyway... Is this a SiS?\n"); |
612 | printk(KERN_WARNING "If AUX port is really absent please use the 'i8042.noaux' option.\n"); | |
613 | } | |
614 | ||
d2ada559 | 615 | if (i8042_toggle_aux(1)) |
1da177e4 LT |
616 | return -1; |
617 | ||
618 | /* | |
de9ce703 DT |
619 | * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and |
620 | * used it for a PCI card or somethig else. | |
1da177e4 LT |
621 | */ |
622 | ||
1e4865f8 | 623 | if (i8042_noloop || aux_loop_broken) { |
de9ce703 DT |
624 | /* |
625 | * Without LOOP command we can't test AUX IRQ delivery. Assume the port | |
626 | * is working and hope we are right. | |
627 | */ | |
628 | retval = 0; | |
629 | goto out; | |
630 | } | |
1da177e4 | 631 | |
de9ce703 DT |
632 | if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED, |
633 | "i8042", i8042_platform_device)) | |
634 | goto out; | |
1da177e4 | 635 | |
de9ce703 DT |
636 | irq_registered = 1; |
637 | ||
638 | if (i8042_enable_aux_port()) | |
639 | goto out; | |
640 | ||
641 | spin_lock_irqsave(&i8042_lock, flags); | |
1da177e4 | 642 | |
de9ce703 DT |
643 | init_completion(&i8042_aux_irq_delivered); |
644 | i8042_irq_being_tested = 1; | |
645 | ||
646 | param = 0xa5; | |
647 | retval = __i8042_command(¶m, I8042_CMD_AUX_LOOP & 0xf0ff); | |
648 | ||
649 | spin_unlock_irqrestore(&i8042_lock, flags); | |
650 | ||
651 | if (retval) | |
652 | goto out; | |
1da177e4 | 653 | |
de9ce703 DT |
654 | if (wait_for_completion_timeout(&i8042_aux_irq_delivered, |
655 | msecs_to_jiffies(250)) == 0) { | |
1da177e4 | 656 | /* |
de9ce703 DT |
657 | * AUX IRQ was never delivered so we need to flush the controller to |
658 | * get rid of the byte we put there; otherwise keyboard may not work. | |
1da177e4 | 659 | */ |
de9ce703 DT |
660 | i8042_flush(); |
661 | retval = -1; | |
662 | } | |
1da177e4 | 663 | |
de9ce703 | 664 | out: |
1da177e4 | 665 | |
de9ce703 DT |
666 | /* |
667 | * Disable the interface. | |
668 | */ | |
1da177e4 | 669 | |
de9ce703 DT |
670 | i8042_ctr |= I8042_CTR_AUXDIS; |
671 | i8042_ctr &= ~I8042_CTR_AUXINT; | |
1da177e4 | 672 | |
de9ce703 DT |
673 | if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) |
674 | retval = -1; | |
1da177e4 | 675 | |
de9ce703 DT |
676 | if (irq_registered) |
677 | free_irq(I8042_AUX_IRQ, i8042_platform_device); | |
1da177e4 | 678 | |
de9ce703 DT |
679 | return retval; |
680 | } | |
1da177e4 | 681 | |
de9ce703 | 682 | static int i8042_controller_check(void) |
1da177e4 | 683 | { |
de9ce703 DT |
684 | if (i8042_flush() == I8042_BUFFER_SIZE) { |
685 | printk(KERN_ERR "i8042.c: No controller found.\n"); | |
686 | return -ENODEV; | |
687 | } | |
688 | ||
689 | return 0; | |
1da177e4 LT |
690 | } |
691 | ||
de9ce703 | 692 | static int i8042_controller_selftest(void) |
2673c836 VP |
693 | { |
694 | unsigned char param; | |
695 | ||
696 | if (!i8042_reset) | |
697 | return 0; | |
698 | ||
699 | if (i8042_command(¶m, I8042_CMD_CTL_TEST)) { | |
700 | printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n"); | |
de9ce703 | 701 | return -ENODEV; |
2673c836 VP |
702 | } |
703 | ||
704 | if (param != I8042_RET_CTL_TEST) { | |
705 | printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n", | |
706 | param, I8042_RET_CTL_TEST); | |
de9ce703 | 707 | return -EIO; |
2673c836 VP |
708 | } |
709 | ||
710 | return 0; | |
711 | } | |
1da177e4 LT |
712 | |
713 | /* | |
714 | * i8042_controller init initializes the i8042 controller, and, | |
715 | * most importantly, sets it into non-xlated mode if that's | |
716 | * desired. | |
717 | */ | |
718 | ||
719 | static int i8042_controller_init(void) | |
720 | { | |
721 | unsigned long flags; | |
722 | ||
1da177e4 LT |
723 | /* |
724 | * Save the CTR for restoral on unload / reboot. | |
725 | */ | |
726 | ||
727 | if (i8042_command(&i8042_ctr, I8042_CMD_CTL_RCTR)) { | |
728 | printk(KERN_ERR "i8042.c: Can't read CTR while initializing i8042.\n"); | |
de9ce703 | 729 | return -EIO; |
1da177e4 LT |
730 | } |
731 | ||
732 | i8042_initial_ctr = i8042_ctr; | |
733 | ||
734 | /* | |
735 | * Disable the keyboard interface and interrupt. | |
736 | */ | |
737 | ||
738 | i8042_ctr |= I8042_CTR_KBDDIS; | |
739 | i8042_ctr &= ~I8042_CTR_KBDINT; | |
740 | ||
741 | /* | |
742 | * Handle keylock. | |
743 | */ | |
744 | ||
745 | spin_lock_irqsave(&i8042_lock, flags); | |
746 | if (~i8042_read_status() & I8042_STR_KEYLOCK) { | |
747 | if (i8042_unlock) | |
748 | i8042_ctr |= I8042_CTR_IGNKEYLOCK; | |
82dd9eff | 749 | else |
1da177e4 LT |
750 | printk(KERN_WARNING "i8042.c: Warning: Keylock active.\n"); |
751 | } | |
752 | spin_unlock_irqrestore(&i8042_lock, flags); | |
753 | ||
754 | /* | |
755 | * If the chip is configured into nontranslated mode by the BIOS, don't | |
756 | * bother enabling translating and be happy. | |
757 | */ | |
758 | ||
759 | if (~i8042_ctr & I8042_CTR_XLATE) | |
760 | i8042_direct = 1; | |
761 | ||
762 | /* | |
763 | * Set nontranslated mode for the kbd interface if requested by an option. | |
764 | * After this the kbd interface becomes a simple serial in/out, like the aux | |
765 | * interface is. We don't do this by default, since it can confuse notebook | |
766 | * BIOSes. | |
767 | */ | |
768 | ||
769 | if (i8042_direct) | |
770 | i8042_ctr &= ~I8042_CTR_XLATE; | |
771 | ||
772 | /* | |
773 | * Write CTR back. | |
774 | */ | |
775 | ||
776 | if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { | |
777 | printk(KERN_ERR "i8042.c: Can't write CTR while initializing i8042.\n"); | |
de9ce703 | 778 | return -EIO; |
1da177e4 LT |
779 | } |
780 | ||
781 | return 0; | |
782 | } | |
783 | ||
784 | ||
785 | /* | |
de9ce703 | 786 | * Reset the controller and reset CRT to the original value set by BIOS. |
1da177e4 | 787 | */ |
de9ce703 | 788 | |
1da177e4 LT |
789 | static void i8042_controller_reset(void) |
790 | { | |
de9ce703 | 791 | i8042_flush(); |
1da177e4 | 792 | |
8d04ddb6 DT |
793 | /* |
794 | * Disable both KBD and AUX interfaces so they don't get in the way | |
795 | */ | |
796 | ||
797 | i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS; | |
798 | i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT); | |
799 | ||
1da177e4 LT |
800 | /* |
801 | * Disable MUX mode if present. | |
802 | */ | |
803 | ||
804 | if (i8042_mux_present) | |
805 | i8042_set_mux_mode(0, NULL); | |
806 | ||
807 | /* | |
de9ce703 | 808 | * Reset the controller if requested. |
1da177e4 LT |
809 | */ |
810 | ||
de9ce703 | 811 | i8042_controller_selftest(); |
1da177e4 | 812 | |
de9ce703 DT |
813 | /* |
814 | * Restore the original control register setting. | |
815 | */ | |
816 | ||
817 | if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR)) | |
1da177e4 LT |
818 | printk(KERN_WARNING "i8042.c: Can't restore CTR.\n"); |
819 | } | |
820 | ||
821 | ||
1da177e4 LT |
822 | /* |
823 | * i8042_panic_blink() will flash the keyboard LEDs and is called when | |
824 | * kernel panics. Flashing LEDs is useful for users running X who may | |
825 | * not see the console and will help distingushing panics from "real" | |
826 | * lockups. | |
827 | * | |
828 | * Note that DELAY has a limit of 10ms so we will not get stuck here | |
829 | * waiting for KBC to free up even if KBD interrupt is off | |
830 | */ | |
831 | ||
832 | #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0) | |
833 | ||
834 | static long i8042_panic_blink(long count) | |
835 | { | |
836 | long delay = 0; | |
837 | static long last_blink; | |
838 | static char led; | |
839 | ||
840 | /* | |
841 | * We expect frequency to be about 1/2s. KDB uses about 1s. | |
842 | * Make sure they are different. | |
843 | */ | |
844 | if (!i8042_blink_frequency) | |
845 | return 0; | |
846 | if (count - last_blink < i8042_blink_frequency) | |
847 | return 0; | |
848 | ||
849 | led ^= 0x01 | 0x04; | |
850 | while (i8042_read_status() & I8042_STR_IBF) | |
851 | DELAY; | |
19f3c3e3 DT |
852 | dbg("%02x -> i8042 (panic blink)", 0xed); |
853 | i8042_suppress_kbd_ack = 2; | |
1da177e4 LT |
854 | i8042_write_data(0xed); /* set leds */ |
855 | DELAY; | |
856 | while (i8042_read_status() & I8042_STR_IBF) | |
857 | DELAY; | |
858 | DELAY; | |
19f3c3e3 | 859 | dbg("%02x -> i8042 (panic blink)", led); |
1da177e4 LT |
860 | i8042_write_data(led); |
861 | DELAY; | |
862 | last_blink = count; | |
863 | return delay; | |
864 | } | |
865 | ||
866 | #undef DELAY | |
867 | ||
82dd9eff | 868 | #ifdef CONFIG_PM |
1da177e4 | 869 | /* |
82dd9eff DT |
870 | * Here we try to restore the original BIOS settings. We only want to |
871 | * do that once, when we really suspend, not when we taking memory | |
872 | * snapshot for swsusp (in this case we'll perform required cleanup | |
873 | * as part of shutdown process). | |
1da177e4 LT |
874 | */ |
875 | ||
3ae5eaec | 876 | static int i8042_suspend(struct platform_device *dev, pm_message_t state) |
1da177e4 | 877 | { |
82dd9eff DT |
878 | if (dev->dev.power.power_state.event != state.event) { |
879 | if (state.event == PM_EVENT_SUSPEND) | |
880 | i8042_controller_reset(); | |
881 | ||
882 | dev->dev.power.power_state = state; | |
883 | } | |
1da177e4 LT |
884 | |
885 | return 0; | |
886 | } | |
887 | ||
888 | ||
889 | /* | |
890 | * Here we try to reset everything back to a state in which suspended | |
891 | */ | |
892 | ||
3ae5eaec | 893 | static int i8042_resume(struct platform_device *dev) |
1da177e4 | 894 | { |
de9ce703 | 895 | int error; |
1da177e4 | 896 | |
82dd9eff DT |
897 | /* |
898 | * Do not bother with restoring state if we haven't suspened yet | |
899 | */ | |
900 | if (dev->dev.power.power_state.event == PM_EVENT_ON) | |
901 | return 0; | |
902 | ||
de9ce703 DT |
903 | error = i8042_controller_check(); |
904 | if (error) | |
905 | return error; | |
2673c836 | 906 | |
de9ce703 DT |
907 | error = i8042_controller_selftest(); |
908 | if (error) | |
909 | return error; | |
1da177e4 LT |
910 | |
911 | /* | |
82dd9eff | 912 | * Restore original CTR value and disable all ports |
1da177e4 LT |
913 | */ |
914 | ||
82dd9eff DT |
915 | i8042_ctr = i8042_initial_ctr; |
916 | if (i8042_direct) | |
917 | i8042_ctr &= ~I8042_CTR_XLATE; | |
de9ce703 DT |
918 | i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS; |
919 | i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT); | |
920 | if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { | |
921 | printk(KERN_ERR "i8042: Can't write CTR to resume\n"); | |
922 | return -EIO; | |
923 | } | |
1da177e4 | 924 | |
de9ce703 DT |
925 | if (i8042_mux_present) { |
926 | if (i8042_set_mux_mode(1, NULL) || i8042_enable_mux_ports()) | |
927 | printk(KERN_WARNING | |
928 | "i8042: failed to resume active multiplexor, " | |
929 | "mouse won't work.\n"); | |
930 | } else if (i8042_ports[I8042_AUX_PORT_NO].serio) | |
931 | i8042_enable_aux_port(); | |
1da177e4 | 932 | |
de9ce703 DT |
933 | if (i8042_ports[I8042_KBD_PORT_NO].serio) |
934 | i8042_enable_kbd_port(); | |
935 | ||
7d12e780 | 936 | i8042_interrupt(0, NULL); |
1da177e4 | 937 | |
82dd9eff DT |
938 | dev->dev.power.power_state = PMSG_ON; |
939 | ||
1da177e4 | 940 | return 0; |
1da177e4 | 941 | } |
82dd9eff | 942 | #endif /* CONFIG_PM */ |
1da177e4 LT |
943 | |
944 | /* | |
945 | * We need to reset the 8042 back to original mode on system shutdown, | |
946 | * because otherwise BIOSes will be confused. | |
947 | */ | |
948 | ||
3ae5eaec | 949 | static void i8042_shutdown(struct platform_device *dev) |
1da177e4 | 950 | { |
82dd9eff | 951 | i8042_controller_reset(); |
1da177e4 LT |
952 | } |
953 | ||
87fd6318 | 954 | static int __devinit i8042_create_kbd_port(void) |
1da177e4 LT |
955 | { |
956 | struct serio *serio; | |
957 | struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO]; | |
958 | ||
d39969de | 959 | serio = kzalloc(sizeof(struct serio), GFP_KERNEL); |
0854e52d DT |
960 | if (!serio) |
961 | return -ENOMEM; | |
962 | ||
963 | serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL; | |
964 | serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write; | |
0854e52d DT |
965 | serio->start = i8042_start; |
966 | serio->stop = i8042_stop; | |
967 | serio->port_data = port; | |
968 | serio->dev.parent = &i8042_platform_device->dev; | |
de9ce703 | 969 | strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name)); |
0854e52d DT |
970 | strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys)); |
971 | ||
972 | port->serio = serio; | |
de9ce703 | 973 | port->irq = I8042_KBD_IRQ; |
0854e52d | 974 | |
de9ce703 | 975 | return 0; |
1da177e4 LT |
976 | } |
977 | ||
de9ce703 | 978 | static int __devinit i8042_create_aux_port(int idx) |
1da177e4 LT |
979 | { |
980 | struct serio *serio; | |
de9ce703 DT |
981 | int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx; |
982 | struct i8042_port *port = &i8042_ports[port_no]; | |
1da177e4 | 983 | |
d39969de | 984 | serio = kzalloc(sizeof(struct serio), GFP_KERNEL); |
0854e52d DT |
985 | if (!serio) |
986 | return -ENOMEM; | |
987 | ||
988 | serio->id.type = SERIO_8042; | |
989 | serio->write = i8042_aux_write; | |
0854e52d DT |
990 | serio->start = i8042_start; |
991 | serio->stop = i8042_stop; | |
992 | serio->port_data = port; | |
993 | serio->dev.parent = &i8042_platform_device->dev; | |
de9ce703 DT |
994 | if (idx < 0) { |
995 | strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name)); | |
996 | strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys)); | |
997 | } else { | |
998 | snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx); | |
999 | snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1); | |
1000 | } | |
0854e52d DT |
1001 | |
1002 | port->serio = serio; | |
de9ce703 DT |
1003 | port->mux = idx; |
1004 | port->irq = I8042_AUX_IRQ; | |
0854e52d | 1005 | |
de9ce703 | 1006 | return 0; |
1da177e4 LT |
1007 | } |
1008 | ||
de9ce703 | 1009 | static void __devinit i8042_free_kbd_port(void) |
1da177e4 | 1010 | { |
de9ce703 DT |
1011 | kfree(i8042_ports[I8042_KBD_PORT_NO].serio); |
1012 | i8042_ports[I8042_KBD_PORT_NO].serio = NULL; | |
1013 | } | |
1da177e4 | 1014 | |
de9ce703 DT |
1015 | static void __devinit i8042_free_aux_ports(void) |
1016 | { | |
1017 | int i; | |
0854e52d | 1018 | |
de9ce703 DT |
1019 | for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) { |
1020 | kfree(i8042_ports[i].serio); | |
1021 | i8042_ports[i].serio = NULL; | |
1022 | } | |
1023 | } | |
0854e52d | 1024 | |
de9ce703 DT |
1025 | static void __devinit i8042_register_ports(void) |
1026 | { | |
1027 | int i; | |
0854e52d | 1028 | |
de9ce703 DT |
1029 | for (i = 0; i < I8042_NUM_PORTS; i++) { |
1030 | if (i8042_ports[i].serio) { | |
1031 | printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n", | |
1032 | i8042_ports[i].serio->name, | |
1033 | (unsigned long) I8042_DATA_REG, | |
1034 | (unsigned long) I8042_COMMAND_REG, | |
1035 | i8042_ports[i].irq); | |
1036 | serio_register_port(i8042_ports[i].serio); | |
1037 | } | |
1038 | } | |
1da177e4 LT |
1039 | } |
1040 | ||
de9ce703 | 1041 | static void __devinit i8042_unregister_ports(void) |
1da177e4 | 1042 | { |
de9ce703 | 1043 | int i; |
1da177e4 | 1044 | |
de9ce703 DT |
1045 | for (i = 0; i < I8042_NUM_PORTS; i++) { |
1046 | if (i8042_ports[i].serio) { | |
1047 | serio_unregister_port(i8042_ports[i].serio); | |
1048 | i8042_ports[i].serio = NULL; | |
1049 | } | |
1050 | } | |
1051 | } | |
1052 | ||
1053 | static void i8042_free_irqs(void) | |
1054 | { | |
1055 | if (i8042_aux_irq_registered) | |
1056 | free_irq(I8042_AUX_IRQ, i8042_platform_device); | |
1057 | if (i8042_kbd_irq_registered) | |
1058 | free_irq(I8042_KBD_IRQ, i8042_platform_device); | |
1059 | ||
1060 | i8042_aux_irq_registered = i8042_kbd_irq_registered = 0; | |
1061 | } | |
1062 | ||
1063 | static int __devinit i8042_setup_aux(void) | |
1064 | { | |
1065 | int (*aux_enable)(void); | |
1066 | int error; | |
1067 | int i; | |
1da177e4 | 1068 | |
de9ce703 | 1069 | if (i8042_check_aux()) |
87fd6318 | 1070 | return -ENODEV; |
1da177e4 | 1071 | |
de9ce703 DT |
1072 | if (i8042_nomux || i8042_check_mux()) { |
1073 | error = i8042_create_aux_port(-1); | |
1074 | if (error) | |
1075 | goto err_free_ports; | |
1076 | aux_enable = i8042_enable_aux_port; | |
1077 | } else { | |
1078 | for (i = 0; i < I8042_NUM_MUX_PORTS; i++) { | |
1079 | error = i8042_create_aux_port(i); | |
1080 | if (error) | |
1081 | goto err_free_ports; | |
0854e52d | 1082 | } |
de9ce703 | 1083 | aux_enable = i8042_enable_mux_ports; |
1da177e4 LT |
1084 | } |
1085 | ||
de9ce703 DT |
1086 | error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED, |
1087 | "i8042", i8042_platform_device); | |
1088 | if (error) | |
1089 | goto err_free_ports; | |
945ef0d4 | 1090 | |
de9ce703 DT |
1091 | if (aux_enable()) |
1092 | goto err_free_irq; | |
1da177e4 | 1093 | |
de9ce703 | 1094 | i8042_aux_irq_registered = 1; |
1da177e4 | 1095 | return 0; |
0854e52d | 1096 | |
de9ce703 DT |
1097 | err_free_irq: |
1098 | free_irq(I8042_AUX_IRQ, i8042_platform_device); | |
1099 | err_free_ports: | |
1100 | i8042_free_aux_ports(); | |
1101 | return error; | |
1102 | } | |
0854e52d | 1103 | |
de9ce703 DT |
1104 | static int __devinit i8042_setup_kbd(void) |
1105 | { | |
1106 | int error; | |
1107 | ||
1108 | error = i8042_create_kbd_port(); | |
1109 | if (error) | |
1110 | return error; | |
1111 | ||
1112 | error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED, | |
1113 | "i8042", i8042_platform_device); | |
1114 | if (error) | |
1115 | goto err_free_port; | |
1116 | ||
1117 | error = i8042_enable_kbd_port(); | |
1118 | if (error) | |
1119 | goto err_free_irq; | |
1120 | ||
1121 | i8042_kbd_irq_registered = 1; | |
1122 | return 0; | |
1123 | ||
1124 | err_free_irq: | |
1125 | free_irq(I8042_KBD_IRQ, i8042_platform_device); | |
1126 | err_free_port: | |
1127 | i8042_free_kbd_port(); | |
1128 | return error; | |
1da177e4 LT |
1129 | } |
1130 | ||
de9ce703 | 1131 | static int __devinit i8042_probe(struct platform_device *dev) |
1da177e4 | 1132 | { |
de9ce703 | 1133 | int error; |
1da177e4 | 1134 | |
de9ce703 DT |
1135 | error = i8042_controller_selftest(); |
1136 | if (error) | |
1137 | return error; | |
1da177e4 | 1138 | |
de9ce703 DT |
1139 | error = i8042_controller_init(); |
1140 | if (error) | |
1141 | return error; | |
1142 | ||
1143 | if (!i8042_noaux) { | |
1144 | error = i8042_setup_aux(); | |
1145 | if (error && error != -ENODEV && error != -EBUSY) | |
1146 | goto out_fail; | |
1147 | } | |
1148 | ||
1149 | if (!i8042_nokbd) { | |
1150 | error = i8042_setup_kbd(); | |
1151 | if (error) | |
1152 | goto out_fail; | |
1153 | } | |
1da177e4 | 1154 | |
de9ce703 DT |
1155 | /* |
1156 | * Ok, everything is ready, let's register all serio ports | |
1157 | */ | |
1158 | i8042_register_ports(); | |
1159 | ||
1160 | return 0; | |
1161 | ||
1162 | out_fail: | |
1163 | i8042_free_aux_ports(); /* in case KBD failed but AUX not */ | |
1164 | i8042_free_irqs(); | |
1165 | i8042_controller_reset(); | |
1166 | ||
1167 | return error; | |
1168 | } | |
1169 | ||
1170 | static int __devexit i8042_remove(struct platform_device *dev) | |
1171 | { | |
1172 | i8042_unregister_ports(); | |
1173 | i8042_free_irqs(); | |
1174 | i8042_controller_reset(); | |
1da177e4 | 1175 | |
87fd6318 DT |
1176 | return 0; |
1177 | } | |
1178 | ||
1179 | static struct platform_driver i8042_driver = { | |
1180 | .driver = { | |
1181 | .name = "i8042", | |
1182 | .owner = THIS_MODULE, | |
1183 | }, | |
1184 | .probe = i8042_probe, | |
1185 | .remove = __devexit_p(i8042_remove), | |
82dd9eff DT |
1186 | .shutdown = i8042_shutdown, |
1187 | #ifdef CONFIG_PM | |
87fd6318 DT |
1188 | .suspend = i8042_suspend, |
1189 | .resume = i8042_resume, | |
82dd9eff | 1190 | #endif |
87fd6318 DT |
1191 | }; |
1192 | ||
1193 | static int __init i8042_init(void) | |
1194 | { | |
1195 | int err; | |
1196 | ||
1197 | dbg_init(); | |
1198 | ||
1199 | err = i8042_platform_init(); | |
1200 | if (err) | |
1201 | return err; | |
1202 | ||
de9ce703 DT |
1203 | err = i8042_controller_check(); |
1204 | if (err) | |
1205 | goto err_platform_exit; | |
87fd6318 DT |
1206 | |
1207 | err = platform_driver_register(&i8042_driver); | |
1208 | if (err) | |
1209 | goto err_platform_exit; | |
1210 | ||
1211 | i8042_platform_device = platform_device_alloc("i8042", -1); | |
1212 | if (!i8042_platform_device) { | |
1213 | err = -ENOMEM; | |
1214 | goto err_unregister_driver; | |
1215 | } | |
1216 | ||
1217 | err = platform_device_add(i8042_platform_device); | |
1218 | if (err) | |
1219 | goto err_free_device; | |
1220 | ||
de9ce703 DT |
1221 | panic_blink = i8042_panic_blink; |
1222 | ||
87fd6318 DT |
1223 | return 0; |
1224 | ||
1225 | err_free_device: | |
1226 | platform_device_put(i8042_platform_device); | |
1227 | err_unregister_driver: | |
1228 | platform_driver_unregister(&i8042_driver); | |
1229 | err_platform_exit: | |
1230 | i8042_platform_exit(); | |
1231 | ||
1232 | return err; | |
1233 | } | |
1234 | ||
1235 | static void __exit i8042_exit(void) | |
1236 | { | |
1da177e4 | 1237 | platform_device_unregister(i8042_platform_device); |
3ae5eaec | 1238 | platform_driver_unregister(&i8042_driver); |
1da177e4 LT |
1239 | i8042_platform_exit(); |
1240 | ||
1241 | panic_blink = NULL; | |
1242 | } | |
1243 | ||
1244 | module_init(i8042_init); | |
1245 | module_exit(i8042_exit); |