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Commit | Line | Data |
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ab493a0f OBC |
1 | # IOMMU_API always gets selected by whoever wants it. |
2 | config IOMMU_API | |
3 | bool | |
b10f127e | 4 | |
68255b62 JR |
5 | menuconfig IOMMU_SUPPORT |
6 | bool "IOMMU Hardware Support" | |
e5144c93 | 7 | depends on MMU |
68255b62 JR |
8 | default y |
9 | ---help--- | |
10 | Say Y here if you want to compile device drivers for IO Memory | |
11 | Management Units into the kernel. These devices usually allow to | |
12 | remap DMA requests and/or remap interrupts from other devices on the | |
13 | system. | |
14 | ||
15 | if IOMMU_SUPPORT | |
16 | ||
fdb1d7be WD |
17 | menu "Generic IOMMU Pagetable Support" |
18 | ||
19 | # Selected by the actual pagetable implementations | |
20 | config IOMMU_IO_PGTABLE | |
21 | bool | |
22 | ||
e1d3c0fd WD |
23 | config IOMMU_IO_PGTABLE_LPAE |
24 | bool "ARMv7/v8 Long Descriptor Format" | |
25 | select IOMMU_IO_PGTABLE | |
c1004803 | 26 | depends on HAS_DMA && (ARM || ARM64 || (COMPILE_TEST && !GENERIC_ATOMIC64)) |
e1d3c0fd WD |
27 | help |
28 | Enable support for the ARM long descriptor pagetable format. | |
29 | This allocator supports 4K/2M/1G, 16K/32M and 64K/512M page | |
30 | sizes at both stage-1 and stage-2, as well as address spaces | |
31 | up to 48-bits in size. | |
32 | ||
fe4b991d WD |
33 | config IOMMU_IO_PGTABLE_LPAE_SELFTEST |
34 | bool "LPAE selftests" | |
35 | depends on IOMMU_IO_PGTABLE_LPAE | |
36 | help | |
37 | Enable self-tests for LPAE page table allocator. This performs | |
38 | a series of page-table consistency checks during boot. | |
39 | ||
40 | If unsure, say N here. | |
41 | ||
e5fc9753 RM |
42 | config IOMMU_IO_PGTABLE_ARMV7S |
43 | bool "ARMv7/v8 Short Descriptor Format" | |
44 | select IOMMU_IO_PGTABLE | |
45 | depends on HAS_DMA && (ARM || ARM64 || COMPILE_TEST) | |
46 | help | |
47 | Enable support for the ARM Short-descriptor pagetable format. | |
48 | This supports 32-bit virtual and physical addresses mapped using | |
49 | 2-level tables with 4KB pages/1MB sections, and contiguous entries | |
50 | for 64KB pages/16MB supersections if indicated by the IOMMU driver. | |
51 | ||
52 | config IOMMU_IO_PGTABLE_ARMV7S_SELFTEST | |
53 | bool "ARMv7s selftests" | |
54 | depends on IOMMU_IO_PGTABLE_ARMV7S | |
55 | help | |
56 | Enable self-tests for ARMv7s page table allocator. This performs | |
57 | a series of page-table consistency checks during boot. | |
58 | ||
59 | If unsure, say N here. | |
60 | ||
fdb1d7be WD |
61 | endmenu |
62 | ||
114150d8 | 63 | config IOMMU_IOVA |
15bbdec3 | 64 | tristate |
114150d8 | 65 | |
4e0ee78f HD |
66 | config OF_IOMMU |
67 | def_bool y | |
7eba1d51 | 68 | depends on OF && IOMMU_API |
4e0ee78f | 69 | |
0db2e5d1 RM |
70 | # IOMMU-agnostic DMA-mapping layer |
71 | config IOMMU_DMA | |
72 | bool | |
0db2e5d1 RM |
73 | select IOMMU_API |
74 | select IOMMU_IOVA | |
59a68eb8 | 75 | select NEED_SG_DMA_LENGTH |
0db2e5d1 | 76 | |
695093e3 VS |
77 | config FSL_PAMU |
78 | bool "Freescale IOMMU support" | |
a4d98fb3 | 79 | depends on PCI |
af29d9fa | 80 | depends on PHYS_64BIT |
a0d284d2 | 81 | depends on PPC_E500MC || (COMPILE_TEST && PPC) |
695093e3 VS |
82 | select IOMMU_API |
83 | select GENERIC_ALLOCATOR | |
84 | help | |
85 | Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms. | |
86 | PAMU can authorize memory access, remap the memory address, and remap I/O | |
87 | transaction types. | |
88 | ||
b10f127e OBC |
89 | # MSM IOMMU support |
90 | config MSM_IOMMU | |
91 | bool "MSM IOMMU Support" | |
477ab7a1 JR |
92 | depends on ARM |
93 | depends on ARCH_MSM8X60 || ARCH_MSM8960 || COMPILE_TEST | |
b10f127e | 94 | select IOMMU_API |
c9220fbd | 95 | select IOMMU_IO_PGTABLE_ARMV7S |
b10f127e OBC |
96 | help |
97 | Support for the IOMMUs found on certain Qualcomm SOCs. | |
98 | These IOMMUs allow virtualization of the address space used by most | |
99 | cores within the multimedia subsystem. | |
100 | ||
101 | If unsure, say N here. | |
102 | ||
103 | config IOMMU_PGTABLES_L2 | |
104 | def_bool y | |
105 | depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n | |
29b68415 OBC |
106 | |
107 | # AMD IOMMU support | |
108 | config AMD_IOMMU | |
109 | bool "AMD IOMMU support" | |
110 | select SWIOTLB | |
111 | select PCI_MSI | |
52815b75 JR |
112 | select PCI_ATS |
113 | select PCI_PRI | |
114 | select PCI_PASID | |
29b68415 | 115 | select IOMMU_API |
a72c4225 | 116 | select IOMMU_IOVA |
0dbc6078 | 117 | depends on X86_64 && PCI && ACPI |
29b68415 OBC |
118 | ---help--- |
119 | With this option you can enable support for AMD IOMMU hardware in | |
120 | your system. An IOMMU is a hardware component which provides | |
121 | remapping of DMA memory accesses from devices. With an AMD IOMMU you | |
59bf8964 | 122 | can isolate the DMA memory of different devices and protect the |
29b68415 OBC |
123 | system from misbehaving device drivers or hardware. |
124 | ||
125 | You can find out if your system has an AMD IOMMU if you look into | |
126 | your BIOS for an option to enable it or if you have an IVRS ACPI | |
127 | table. | |
128 | ||
e3c495c7 | 129 | config AMD_IOMMU_V2 |
a446e219 | 130 | tristate "AMD IOMMU Version 2 driver" |
e5cac32c | 131 | depends on AMD_IOMMU |
8736b2c3 | 132 | select MMU_NOTIFIER |
e3c495c7 JR |
133 | ---help--- |
134 | This option enables support for the AMD IOMMUv2 features of the IOMMU | |
135 | hardware. Select this option if you want to use devices that support | |
59bf8964 | 136 | the PCI PRI and PASID interface. |
e3c495c7 | 137 | |
166e9278 | 138 | # Intel IOMMU support |
d3f13810 SS |
139 | config DMAR_TABLE |
140 | bool | |
141 | ||
142 | config INTEL_IOMMU | |
143 | bool "Support for Intel IOMMU using DMA Remapping Devices" | |
166e9278 OBC |
144 | depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC) |
145 | select IOMMU_API | |
114150d8 | 146 | select IOMMU_IOVA |
d3f13810 | 147 | select DMAR_TABLE |
166e9278 OBC |
148 | help |
149 | DMA remapping (DMAR) devices support enables independent address | |
150 | translations for Direct Memory Access (DMA) from devices. | |
151 | These DMA remapping devices are reported via ACPI tables | |
152 | and include PCI device scope covered by these DMA | |
153 | remapping devices. | |
154 | ||
8a94ade4 DW |
155 | config INTEL_IOMMU_SVM |
156 | bool "Support for Shared Virtual Memory with Intel IOMMU" | |
157 | depends on INTEL_IOMMU && X86 | |
b16d0cb9 | 158 | select PCI_PASID |
2f26e0a9 | 159 | select MMU_NOTIFIER |
8a94ade4 DW |
160 | help |
161 | Shared Virtual Memory (SVM) provides a facility for devices | |
162 | to access DMA resources through process address space by | |
163 | means of a Process Address Space ID (PASID). | |
164 | ||
d3f13810 | 165 | config INTEL_IOMMU_DEFAULT_ON |
166e9278 | 166 | def_bool y |
d3f13810 SS |
167 | prompt "Enable Intel DMA Remapping Devices by default" |
168 | depends on INTEL_IOMMU | |
166e9278 OBC |
169 | help |
170 | Selecting this option will enable a DMAR device at boot time if | |
171 | one is found. If this option is not selected, DMAR support can | |
172 | be enabled by passing intel_iommu=on to the kernel. | |
173 | ||
d3f13810 | 174 | config INTEL_IOMMU_BROKEN_GFX_WA |
166e9278 | 175 | bool "Workaround broken graphics drivers (going away soon)" |
d3f13810 | 176 | depends on INTEL_IOMMU && BROKEN && X86 |
166e9278 OBC |
177 | ---help--- |
178 | Current Graphics drivers tend to use physical address | |
179 | for DMA and avoid using DMA APIs. Setting this config | |
180 | option permits the IOMMU driver to set a unity map for | |
181 | all the OS-visible memory. Hence the driver can continue | |
182 | to use physical addresses for DMA, at least until this | |
183 | option is removed in the 2.6.32 kernel. | |
184 | ||
d3f13810 | 185 | config INTEL_IOMMU_FLOPPY_WA |
166e9278 | 186 | def_bool y |
d3f13810 | 187 | depends on INTEL_IOMMU && X86 |
166e9278 OBC |
188 | ---help--- |
189 | Floppy disk drivers are known to bypass DMA API calls | |
190 | thereby failing to work when IOMMU is enabled. This | |
191 | workaround will setup a 1:1 mapping for the first | |
192 | 16MiB to make floppy (an ISA device) work. | |
193 | ||
d3f13810 | 194 | config IRQ_REMAP |
a446e219 KC |
195 | bool "Support for Interrupt Remapping" |
196 | depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI | |
d3f13810 | 197 | select DMAR_TABLE |
166e9278 OBC |
198 | ---help--- |
199 | Supports Interrupt remapping for IO-APIC and MSI devices. | |
200 | To use x2apic mode in the CPU's which support x2APIC enhancements or | |
201 | to support platforms with CPU's having > 8 bit APIC ID, say Y. | |
68255b62 | 202 | |
fcf3a6ef OBC |
203 | # OMAP IOMMU support |
204 | config OMAP_IOMMU | |
205 | bool "OMAP IOMMU Support" | |
477ab7a1 JR |
206 | depends on ARM && MMU |
207 | depends on ARCH_OMAP2PLUS || COMPILE_TEST | |
fcf3a6ef | 208 | select IOMMU_API |
06b718c0 GH |
209 | ---help--- |
210 | The OMAP3 media platform drivers depend on iommu support, | |
211 | if you need them say Y here. | |
fcf3a6ef | 212 | |
fcf3a6ef | 213 | config OMAP_IOMMU_DEBUG |
61c75352 SA |
214 | bool "Export OMAP IOMMU internals in DebugFS" |
215 | depends on OMAP_IOMMU && DEBUG_FS | |
216 | ---help--- | |
217 | Select this to see extensive information about | |
218 | the internal state of OMAP IOMMU in debugfs. | |
fcf3a6ef | 219 | |
61c75352 | 220 | Say N unless you know you need this. |
fcf3a6ef | 221 | |
c68a2921 DK |
222 | config ROCKCHIP_IOMMU |
223 | bool "Rockchip IOMMU Support" | |
4f1fcfe9 | 224 | depends on ARM || ARM64 |
11175886 | 225 | depends on ARCH_ROCKCHIP || COMPILE_TEST |
c68a2921 DK |
226 | select IOMMU_API |
227 | select ARM_DMA_USE_IOMMU | |
228 | help | |
229 | Support for IOMMUs found on Rockchip rk32xx SOCs. | |
230 | These IOMMUs allow virtualization of the address space used by most | |
231 | cores within the multimedia subsystem. | |
232 | Say Y here if you are using a Rockchip SoC that includes an IOMMU | |
233 | device. | |
fcf3a6ef | 234 | |
d53e54b4 HD |
235 | config TEGRA_IOMMU_GART |
236 | bool "Tegra GART IOMMU Support" | |
237 | depends on ARCH_TEGRA_2x_SOC | |
238 | select IOMMU_API | |
239 | help | |
240 | Enables support for remapping discontiguous physical memory | |
241 | shared with the operating system into contiguous I/O virtual | |
242 | space through the GART (Graphics Address Relocation Table) | |
243 | hardware included on Tegra SoCs. | |
244 | ||
7a31f6f4 | 245 | config TEGRA_IOMMU_SMMU |
89184651 TR |
246 | bool "NVIDIA Tegra SMMU Support" |
247 | depends on ARCH_TEGRA | |
248 | depends on TEGRA_AHB | |
249 | depends on TEGRA_MC | |
7a31f6f4 HD |
250 | select IOMMU_API |
251 | help | |
89184651 | 252 | This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra |
588c43a7 | 253 | SoCs (Tegra30 up to Tegra210). |
7a31f6f4 | 254 | |
2a96536e KC |
255 | config EXYNOS_IOMMU |
256 | bool "Exynos IOMMU Support" | |
740a01ee | 257 | depends on ARCH_EXYNOS && MMU |
db3a7fd7 | 258 | depends on !CPU_BIG_ENDIAN # revisit driver if we can enable big-endian ptes |
2a96536e | 259 | select IOMMU_API |
4802c1d0 | 260 | select ARM_DMA_USE_IOMMU |
2a96536e | 261 | help |
5455d700 SK |
262 | Support for the IOMMU (System MMU) of Samsung Exynos application |
263 | processor family. This enables H/W multimedia accelerators to see | |
264 | non-linear physical memory chunks as linear memory in their | |
265 | address space. | |
2a96536e KC |
266 | |
267 | If unsure, say N here. | |
268 | ||
269 | config EXYNOS_IOMMU_DEBUG | |
270 | bool "Debugging log for Exynos IOMMU" | |
271 | depends on EXYNOS_IOMMU | |
272 | help | |
273 | Select this to see the detailed log message that shows what | |
5455d700 | 274 | happens in the IOMMU driver. |
2a96536e | 275 | |
5455d700 | 276 | Say N unless you need kernel log message for IOMMU debugging. |
2a96536e | 277 | |
d25a2a16 LP |
278 | config IPMMU_VMSA |
279 | bool "Renesas VMSA-compatible IPMMU" | |
3ae47292 | 280 | depends on ARM || IOMMU_DMA |
a4aaeccc | 281 | depends on ARCH_RENESAS || (COMPILE_TEST && !GENERIC_ATOMIC64) |
d25a2a16 | 282 | select IOMMU_API |
f20ed39f | 283 | select IOMMU_IO_PGTABLE_LPAE |
d25a2a16 LP |
284 | select ARM_DMA_USE_IOMMU |
285 | help | |
286 | Support for the Renesas VMSA-compatible IPMMU Renesas found in the | |
287 | R-Mobile APE6 and R-Car H2/M2 SoCs. | |
288 | ||
289 | If unsure, say N. | |
290 | ||
4e13c1ac AK |
291 | config SPAPR_TCE_IOMMU |
292 | bool "sPAPR TCE IOMMU Support" | |
5b25199e | 293 | depends on PPC_POWERNV || PPC_PSERIES |
4e13c1ac AK |
294 | select IOMMU_API |
295 | help | |
296 | Enables bits of IOMMU API required by VFIO. The iommu_ops | |
297 | is not implemented as it is not necessary for VFIO. | |
298 | ||
48ec83bc | 299 | # ARM IOMMU support |
45ae7cff WD |
300 | config ARM_SMMU |
301 | bool "ARM Ltd. System MMU (SMMU) Support" | |
a20cc76b | 302 | depends on (ARM64 || ARM) && MMU |
45ae7cff | 303 | select IOMMU_API |
518f7136 | 304 | select IOMMU_IO_PGTABLE_LPAE |
45ae7cff WD |
305 | select ARM_DMA_USE_IOMMU if ARM |
306 | help | |
307 | Support for implementations of the ARM System MMU architecture | |
518f7136 | 308 | versions 1 and 2. |
45ae7cff WD |
309 | |
310 | Say Y here if your SoC includes an IOMMU device implementing | |
311 | the ARM SMMU architecture. | |
312 | ||
48ec83bc WD |
313 | config ARM_SMMU_V3 |
314 | bool "ARM Ltd. System MMU Version 3 (SMMUv3) Support" | |
08d4ca2a | 315 | depends on ARM64 |
48ec83bc WD |
316 | select IOMMU_API |
317 | select IOMMU_IO_PGTABLE_LPAE | |
166bdbd2 | 318 | select GENERIC_MSI_IRQ_DOMAIN |
48ec83bc WD |
319 | help |
320 | Support for implementations of the ARM System MMU architecture | |
321 | version 3 providing translation support to a PCIe root complex. | |
322 | ||
323 | Say Y here if your system includes an IOMMU device implementing | |
324 | the ARM SMMUv3 architecture. | |
325 | ||
8128f23c GS |
326 | config S390_IOMMU |
327 | def_bool y if S390 && PCI | |
328 | depends on S390 && PCI | |
329 | select IOMMU_API | |
330 | help | |
331 | Support for the IOMMU API for s390 PCI devices. | |
332 | ||
63f1934d DJS |
333 | config S390_CCW_IOMMU |
334 | bool "S390 CCW IOMMU Support" | |
335 | depends on S390 && CCW | |
336 | select IOMMU_API | |
337 | help | |
338 | Enables bits of IOMMU API required by VFIO. The iommu_ops | |
339 | is not implemented as it is not necessary for VFIO. | |
340 | ||
0df4fabe YW |
341 | config MTK_IOMMU |
342 | bool "MTK IOMMU Support" | |
343 | depends on ARM || ARM64 | |
344 | depends on ARCH_MEDIATEK || COMPILE_TEST | |
1928832f | 345 | select ARM_DMA_USE_IOMMU |
0df4fabe YW |
346 | select IOMMU_API |
347 | select IOMMU_DMA | |
348 | select IOMMU_IO_PGTABLE_ARMV7S | |
349 | select MEMORY | |
350 | select MTK_SMI | |
351 | help | |
352 | Support for the M4U on certain Mediatek SOCs. M4U is MultiMedia | |
353 | Memory Management Unit. This option enables remapping of DMA memory | |
354 | accesses for the multimedia subsystem. | |
355 | ||
356 | If unsure, say N here. | |
357 | ||
b17336c5 HZ |
358 | config MTK_IOMMU_V1 |
359 | bool "MTK IOMMU Version 1 (M4U gen1) Support" | |
360 | depends on ARM | |
361 | depends on ARCH_MEDIATEK || COMPILE_TEST | |
362 | select ARM_DMA_USE_IOMMU | |
363 | select IOMMU_API | |
364 | select MEMORY | |
365 | select MTK_SMI | |
b17336c5 HZ |
366 | help |
367 | Support for the M4U on certain Mediatek SoCs. M4U generation 1 HW is | |
368 | Multimedia Memory Managememt Unit. This option enables remapping of | |
369 | DMA memory accesses for the multimedia subsystem. | |
370 | ||
371 | if unsure, say N here. | |
372 | ||
0ae349a0 RC |
373 | config QCOM_IOMMU |
374 | # Note: iommu drivers cannot (yet?) be built as modules | |
375 | bool "Qualcomm IOMMU Support" | |
a4aaeccc | 376 | depends on ARCH_QCOM || (COMPILE_TEST && !GENERIC_ATOMIC64) |
986a5f70 | 377 | depends on HAS_DMA |
0ae349a0 RC |
378 | select IOMMU_API |
379 | select IOMMU_IO_PGTABLE_LPAE | |
380 | select ARM_DMA_USE_IOMMU | |
381 | help | |
382 | Support for IOMMU on certain Qualcomm SoCs. | |
383 | ||
68255b62 | 384 | endif # IOMMU_SUPPORT |