]> git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/blame - drivers/iommu/Kconfig
Merge remote-tracking branches 'asoc/topic/wm8904', 'asoc/topic/wm8955' and 'asoc...
[mirror_ubuntu-zesty-kernel.git] / drivers / iommu / Kconfig
CommitLineData
ab493a0f
OBC
1# IOMMU_API always gets selected by whoever wants it.
2config IOMMU_API
3 bool
b10f127e 4
68255b62
JR
5menuconfig IOMMU_SUPPORT
6 bool "IOMMU Hardware Support"
e5144c93 7 depends on MMU
68255b62
JR
8 default y
9 ---help---
10 Say Y here if you want to compile device drivers for IO Memory
11 Management Units into the kernel. These devices usually allow to
12 remap DMA requests and/or remap interrupts from other devices on the
13 system.
14
15if IOMMU_SUPPORT
16
fdb1d7be
WD
17menu "Generic IOMMU Pagetable Support"
18
19# Selected by the actual pagetable implementations
20config IOMMU_IO_PGTABLE
21 bool
22
e1d3c0fd
WD
23config IOMMU_IO_PGTABLE_LPAE
24 bool "ARMv7/v8 Long Descriptor Format"
25 select IOMMU_IO_PGTABLE
ffcb6d16 26 depends on HAS_DMA && (ARM || ARM64 || COMPILE_TEST)
e1d3c0fd
WD
27 help
28 Enable support for the ARM long descriptor pagetable format.
29 This allocator supports 4K/2M/1G, 16K/32M and 64K/512M page
30 sizes at both stage-1 and stage-2, as well as address spaces
31 up to 48-bits in size.
32
fe4b991d
WD
33config IOMMU_IO_PGTABLE_LPAE_SELFTEST
34 bool "LPAE selftests"
35 depends on IOMMU_IO_PGTABLE_LPAE
36 help
37 Enable self-tests for LPAE page table allocator. This performs
38 a series of page-table consistency checks during boot.
39
40 If unsure, say N here.
41
fdb1d7be
WD
42endmenu
43
114150d8 44config IOMMU_IOVA
15bbdec3 45 tristate
114150d8 46
4e0ee78f
HD
47config OF_IOMMU
48 def_bool y
7eba1d51 49 depends on OF && IOMMU_API
4e0ee78f 50
695093e3
VS
51config FSL_PAMU
52 bool "Freescale IOMMU support"
477ab7a1
JR
53 depends on PPC32
54 depends on PPC_E500MC || COMPILE_TEST
695093e3
VS
55 select IOMMU_API
56 select GENERIC_ALLOCATOR
57 help
58 Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms.
59 PAMU can authorize memory access, remap the memory address, and remap I/O
60 transaction types.
61
b10f127e
OBC
62# MSM IOMMU support
63config MSM_IOMMU
64 bool "MSM IOMMU Support"
477ab7a1
JR
65 depends on ARM
66 depends on ARCH_MSM8X60 || ARCH_MSM8960 || COMPILE_TEST
a3f447a4 67 depends on BROKEN
b10f127e
OBC
68 select IOMMU_API
69 help
70 Support for the IOMMUs found on certain Qualcomm SOCs.
71 These IOMMUs allow virtualization of the address space used by most
72 cores within the multimedia subsystem.
73
74 If unsure, say N here.
75
76config IOMMU_PGTABLES_L2
77 def_bool y
78 depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n
29b68415
OBC
79
80# AMD IOMMU support
81config AMD_IOMMU
82 bool "AMD IOMMU support"
83 select SWIOTLB
84 select PCI_MSI
52815b75
JR
85 select PCI_ATS
86 select PCI_PRI
87 select PCI_PASID
29b68415 88 select IOMMU_API
0dbc6078 89 depends on X86_64 && PCI && ACPI
29b68415
OBC
90 ---help---
91 With this option you can enable support for AMD IOMMU hardware in
92 your system. An IOMMU is a hardware component which provides
93 remapping of DMA memory accesses from devices. With an AMD IOMMU you
59bf8964 94 can isolate the DMA memory of different devices and protect the
29b68415
OBC
95 system from misbehaving device drivers or hardware.
96
97 You can find out if your system has an AMD IOMMU if you look into
98 your BIOS for an option to enable it or if you have an IVRS ACPI
99 table.
100
101config AMD_IOMMU_STATS
102 bool "Export AMD IOMMU statistics to debugfs"
103 depends on AMD_IOMMU
104 select DEBUG_FS
105 ---help---
106 This option enables code in the AMD IOMMU driver to collect various
107 statistics about whats happening in the driver and exports that
108 information to userspace via debugfs.
109 If unsure, say N.
166e9278 110
e3c495c7 111config AMD_IOMMU_V2
a446e219 112 tristate "AMD IOMMU Version 2 driver"
e5cac32c 113 depends on AMD_IOMMU
8736b2c3 114 select MMU_NOTIFIER
e3c495c7
JR
115 ---help---
116 This option enables support for the AMD IOMMUv2 features of the IOMMU
117 hardware. Select this option if you want to use devices that support
59bf8964 118 the PCI PRI and PASID interface.
e3c495c7 119
166e9278 120# Intel IOMMU support
d3f13810
SS
121config DMAR_TABLE
122 bool
123
124config INTEL_IOMMU
125 bool "Support for Intel IOMMU using DMA Remapping Devices"
166e9278
OBC
126 depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC)
127 select IOMMU_API
114150d8 128 select IOMMU_IOVA
d3f13810 129 select DMAR_TABLE
166e9278
OBC
130 help
131 DMA remapping (DMAR) devices support enables independent address
132 translations for Direct Memory Access (DMA) from devices.
133 These DMA remapping devices are reported via ACPI tables
134 and include PCI device scope covered by these DMA
135 remapping devices.
136
d3f13810 137config INTEL_IOMMU_DEFAULT_ON
166e9278 138 def_bool y
d3f13810
SS
139 prompt "Enable Intel DMA Remapping Devices by default"
140 depends on INTEL_IOMMU
166e9278
OBC
141 help
142 Selecting this option will enable a DMAR device at boot time if
143 one is found. If this option is not selected, DMAR support can
144 be enabled by passing intel_iommu=on to the kernel.
145
d3f13810 146config INTEL_IOMMU_BROKEN_GFX_WA
166e9278 147 bool "Workaround broken graphics drivers (going away soon)"
d3f13810 148 depends on INTEL_IOMMU && BROKEN && X86
166e9278
OBC
149 ---help---
150 Current Graphics drivers tend to use physical address
151 for DMA and avoid using DMA APIs. Setting this config
152 option permits the IOMMU driver to set a unity map for
153 all the OS-visible memory. Hence the driver can continue
154 to use physical addresses for DMA, at least until this
155 option is removed in the 2.6.32 kernel.
156
d3f13810 157config INTEL_IOMMU_FLOPPY_WA
166e9278 158 def_bool y
d3f13810 159 depends on INTEL_IOMMU && X86
166e9278
OBC
160 ---help---
161 Floppy disk drivers are known to bypass DMA API calls
162 thereby failing to work when IOMMU is enabled. This
163 workaround will setup a 1:1 mapping for the first
164 16MiB to make floppy (an ISA device) work.
165
d3f13810 166config IRQ_REMAP
a446e219
KC
167 bool "Support for Interrupt Remapping"
168 depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI
d3f13810 169 select DMAR_TABLE
166e9278
OBC
170 ---help---
171 Supports Interrupt remapping for IO-APIC and MSI devices.
172 To use x2apic mode in the CPU's which support x2APIC enhancements or
173 to support platforms with CPU's having > 8 bit APIC ID, say Y.
68255b62 174
fcf3a6ef
OBC
175# OMAP IOMMU support
176config OMAP_IOMMU
177 bool "OMAP IOMMU Support"
477ab7a1
JR
178 depends on ARM && MMU
179 depends on ARCH_OMAP2PLUS || COMPILE_TEST
fcf3a6ef 180 select IOMMU_API
06b718c0
GH
181 ---help---
182 The OMAP3 media platform drivers depend on iommu support,
183 if you need them say Y here.
fcf3a6ef 184
fcf3a6ef 185config OMAP_IOMMU_DEBUG
61c75352
SA
186 bool "Export OMAP IOMMU internals in DebugFS"
187 depends on OMAP_IOMMU && DEBUG_FS
188 ---help---
189 Select this to see extensive information about
190 the internal state of OMAP IOMMU in debugfs.
fcf3a6ef 191
61c75352 192 Say N unless you know you need this.
fcf3a6ef 193
c68a2921
DK
194config ROCKCHIP_IOMMU
195 bool "Rockchip IOMMU Support"
11175886
JR
196 depends on ARM
197 depends on ARCH_ROCKCHIP || COMPILE_TEST
c68a2921
DK
198 select IOMMU_API
199 select ARM_DMA_USE_IOMMU
200 help
201 Support for IOMMUs found on Rockchip rk32xx SOCs.
202 These IOMMUs allow virtualization of the address space used by most
203 cores within the multimedia subsystem.
204 Say Y here if you are using a Rockchip SoC that includes an IOMMU
205 device.
fcf3a6ef 206
d53e54b4
HD
207config TEGRA_IOMMU_GART
208 bool "Tegra GART IOMMU Support"
209 depends on ARCH_TEGRA_2x_SOC
210 select IOMMU_API
211 help
212 Enables support for remapping discontiguous physical memory
213 shared with the operating system into contiguous I/O virtual
214 space through the GART (Graphics Address Relocation Table)
215 hardware included on Tegra SoCs.
216
7a31f6f4 217config TEGRA_IOMMU_SMMU
89184651
TR
218 bool "NVIDIA Tegra SMMU Support"
219 depends on ARCH_TEGRA
220 depends on TEGRA_AHB
221 depends on TEGRA_MC
7a31f6f4
HD
222 select IOMMU_API
223 help
89184651 224 This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra
588c43a7 225 SoCs (Tegra30 up to Tegra210).
7a31f6f4 226
2a96536e
KC
227config EXYNOS_IOMMU
228 bool "Exynos IOMMU Support"
e5144c93 229 depends on ARCH_EXYNOS && ARM && MMU
2a96536e 230 select IOMMU_API
4802c1d0 231 select ARM_DMA_USE_IOMMU
2a96536e 232 help
5455d700
SK
233 Support for the IOMMU (System MMU) of Samsung Exynos application
234 processor family. This enables H/W multimedia accelerators to see
235 non-linear physical memory chunks as linear memory in their
236 address space.
2a96536e
KC
237
238 If unsure, say N here.
239
240config EXYNOS_IOMMU_DEBUG
241 bool "Debugging log for Exynos IOMMU"
242 depends on EXYNOS_IOMMU
243 help
244 Select this to see the detailed log message that shows what
5455d700 245 happens in the IOMMU driver.
2a96536e 246
5455d700 247 Say N unless you need kernel log message for IOMMU debugging.
2a96536e 248
c2c460f7
HE
249config SHMOBILE_IPMMU
250 bool
251
252config SHMOBILE_IPMMU_TLB
253 bool
254
255config SHMOBILE_IOMMU
256 bool "IOMMU for Renesas IPMMU/IPMMUI"
257 default n
e5144c93 258 depends on ARM && MMU
b8354439 259 depends on ARCH_SHMOBILE || COMPILE_TEST
c2c460f7
HE
260 select IOMMU_API
261 select ARM_DMA_USE_IOMMU
262 select SHMOBILE_IPMMU
263 select SHMOBILE_IPMMU_TLB
264 help
265 Support for Renesas IPMMU/IPMMUI. This option enables
266 remapping of DMA memory accesses from all of the IP blocks
267 on the ICB.
268
269 Warning: Drivers (including userspace drivers of UIO
270 devices) of the IP blocks on the ICB *must* use addresses
271 allocated from the IPMMU (iova) for DMA with this option
272 enabled.
273
274 If unsure, say N.
275
276choice
277 prompt "IPMMU/IPMMUI address space size"
278 default SHMOBILE_IOMMU_ADDRSIZE_2048MB
279 depends on SHMOBILE_IOMMU
280 help
281 This option sets IPMMU/IPMMUI address space size by
282 adjusting the 1st level page table size. The page table size
283 is calculated as follows:
284
285 page table size = number of page table entries * 4 bytes
286 number of page table entries = address space size / 1 MiB
287
288 For example, when the address space size is 2048 MiB, the
289 1st level page table size is 8192 bytes.
290
291 config SHMOBILE_IOMMU_ADDRSIZE_2048MB
292 bool "2 GiB"
293
294 config SHMOBILE_IOMMU_ADDRSIZE_1024MB
295 bool "1 GiB"
296
297 config SHMOBILE_IOMMU_ADDRSIZE_512MB
298 bool "512 MiB"
299
300 config SHMOBILE_IOMMU_ADDRSIZE_256MB
301 bool "256 MiB"
302
303 config SHMOBILE_IOMMU_ADDRSIZE_128MB
304 bool "128 MiB"
305
306 config SHMOBILE_IOMMU_ADDRSIZE_64MB
307 bool "64 MiB"
308
309 config SHMOBILE_IOMMU_ADDRSIZE_32MB
310 bool "32 MiB"
311
312endchoice
313
314config SHMOBILE_IOMMU_L1SIZE
315 int
316 default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB
317 default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB
318 default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB
319 default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB
320 default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB
321 default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB
322 default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB
323
d25a2a16
LP
324config IPMMU_VMSA
325 bool "Renesas VMSA-compatible IPMMU"
326 depends on ARM_LPAE
327 depends on ARCH_SHMOBILE || COMPILE_TEST
328 select IOMMU_API
f20ed39f 329 select IOMMU_IO_PGTABLE_LPAE
d25a2a16
LP
330 select ARM_DMA_USE_IOMMU
331 help
332 Support for the Renesas VMSA-compatible IPMMU Renesas found in the
333 R-Mobile APE6 and R-Car H2/M2 SoCs.
334
335 If unsure, say N.
336
4e13c1ac
AK
337config SPAPR_TCE_IOMMU
338 bool "sPAPR TCE IOMMU Support"
5b25199e 339 depends on PPC_POWERNV || PPC_PSERIES
4e13c1ac
AK
340 select IOMMU_API
341 help
342 Enables bits of IOMMU API required by VFIO. The iommu_ops
343 is not implemented as it is not necessary for VFIO.
344
48ec83bc 345# ARM IOMMU support
45ae7cff
WD
346config ARM_SMMU
347 bool "ARM Ltd. System MMU (SMMU) Support"
a20cc76b 348 depends on (ARM64 || ARM) && MMU
45ae7cff 349 select IOMMU_API
518f7136 350 select IOMMU_IO_PGTABLE_LPAE
45ae7cff
WD
351 select ARM_DMA_USE_IOMMU if ARM
352 help
353 Support for implementations of the ARM System MMU architecture
518f7136 354 versions 1 and 2.
45ae7cff
WD
355
356 Say Y here if your SoC includes an IOMMU device implementing
357 the ARM SMMU architecture.
358
48ec83bc
WD
359config ARM_SMMU_V3
360 bool "ARM Ltd. System MMU Version 3 (SMMUv3) Support"
361 depends on ARM64 && PCI
362 select IOMMU_API
363 select IOMMU_IO_PGTABLE_LPAE
364 help
365 Support for implementations of the ARM System MMU architecture
366 version 3 providing translation support to a PCIe root complex.
367
368 Say Y here if your system includes an IOMMU device implementing
369 the ARM SMMUv3 architecture.
370
68255b62 371endif # IOMMU_SUPPORT