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Commit | Line | Data |
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ab493a0f OBC |
1 | # IOMMU_API always gets selected by whoever wants it. |
2 | config IOMMU_API | |
3 | bool | |
b10f127e | 4 | |
68255b62 JR |
5 | menuconfig IOMMU_SUPPORT |
6 | bool "IOMMU Hardware Support" | |
7 | default y | |
8 | ---help--- | |
9 | Say Y here if you want to compile device drivers for IO Memory | |
10 | Management Units into the kernel. These devices usually allow to | |
11 | remap DMA requests and/or remap interrupts from other devices on the | |
12 | system. | |
13 | ||
14 | if IOMMU_SUPPORT | |
15 | ||
4e0ee78f HD |
16 | config OF_IOMMU |
17 | def_bool y | |
7eba1d51 | 18 | depends on OF && IOMMU_API |
4e0ee78f | 19 | |
695093e3 VS |
20 | config FSL_PAMU |
21 | bool "Freescale IOMMU support" | |
22 | depends on PPC_E500MC | |
23 | select IOMMU_API | |
24 | select GENERIC_ALLOCATOR | |
25 | help | |
26 | Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms. | |
27 | PAMU can authorize memory access, remap the memory address, and remap I/O | |
28 | transaction types. | |
29 | ||
b10f127e OBC |
30 | # MSM IOMMU support |
31 | config MSM_IOMMU | |
32 | bool "MSM IOMMU Support" | |
33 | depends on ARCH_MSM8X60 || ARCH_MSM8960 | |
34 | select IOMMU_API | |
35 | help | |
36 | Support for the IOMMUs found on certain Qualcomm SOCs. | |
37 | These IOMMUs allow virtualization of the address space used by most | |
38 | cores within the multimedia subsystem. | |
39 | ||
40 | If unsure, say N here. | |
41 | ||
42 | config IOMMU_PGTABLES_L2 | |
43 | def_bool y | |
44 | depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n | |
29b68415 OBC |
45 | |
46 | # AMD IOMMU support | |
47 | config AMD_IOMMU | |
48 | bool "AMD IOMMU support" | |
49 | select SWIOTLB | |
50 | select PCI_MSI | |
52815b75 JR |
51 | select PCI_ATS |
52 | select PCI_PRI | |
53 | select PCI_PASID | |
29b68415 | 54 | select IOMMU_API |
0dbc6078 | 55 | depends on X86_64 && PCI && ACPI |
29b68415 OBC |
56 | ---help--- |
57 | With this option you can enable support for AMD IOMMU hardware in | |
58 | your system. An IOMMU is a hardware component which provides | |
59 | remapping of DMA memory accesses from devices. With an AMD IOMMU you | |
59bf8964 | 60 | can isolate the DMA memory of different devices and protect the |
29b68415 OBC |
61 | system from misbehaving device drivers or hardware. |
62 | ||
63 | You can find out if your system has an AMD IOMMU if you look into | |
64 | your BIOS for an option to enable it or if you have an IVRS ACPI | |
65 | table. | |
66 | ||
67 | config AMD_IOMMU_STATS | |
68 | bool "Export AMD IOMMU statistics to debugfs" | |
69 | depends on AMD_IOMMU | |
70 | select DEBUG_FS | |
71 | ---help--- | |
72 | This option enables code in the AMD IOMMU driver to collect various | |
73 | statistics about whats happening in the driver and exports that | |
74 | information to userspace via debugfs. | |
75 | If unsure, say N. | |
166e9278 | 76 | |
e3c495c7 | 77 | config AMD_IOMMU_V2 |
a446e219 | 78 | tristate "AMD IOMMU Version 2 driver" |
e5cac32c | 79 | depends on AMD_IOMMU |
8736b2c3 | 80 | select MMU_NOTIFIER |
e3c495c7 JR |
81 | ---help--- |
82 | This option enables support for the AMD IOMMUv2 features of the IOMMU | |
83 | hardware. Select this option if you want to use devices that support | |
59bf8964 | 84 | the PCI PRI and PASID interface. |
e3c495c7 | 85 | |
166e9278 | 86 | # Intel IOMMU support |
d3f13810 SS |
87 | config DMAR_TABLE |
88 | bool | |
89 | ||
90 | config INTEL_IOMMU | |
91 | bool "Support for Intel IOMMU using DMA Remapping Devices" | |
166e9278 OBC |
92 | depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC) |
93 | select IOMMU_API | |
d3f13810 | 94 | select DMAR_TABLE |
166e9278 OBC |
95 | help |
96 | DMA remapping (DMAR) devices support enables independent address | |
97 | translations for Direct Memory Access (DMA) from devices. | |
98 | These DMA remapping devices are reported via ACPI tables | |
99 | and include PCI device scope covered by these DMA | |
100 | remapping devices. | |
101 | ||
d3f13810 | 102 | config INTEL_IOMMU_DEFAULT_ON |
166e9278 | 103 | def_bool y |
d3f13810 SS |
104 | prompt "Enable Intel DMA Remapping Devices by default" |
105 | depends on INTEL_IOMMU | |
166e9278 OBC |
106 | help |
107 | Selecting this option will enable a DMAR device at boot time if | |
108 | one is found. If this option is not selected, DMAR support can | |
109 | be enabled by passing intel_iommu=on to the kernel. | |
110 | ||
d3f13810 | 111 | config INTEL_IOMMU_BROKEN_GFX_WA |
166e9278 | 112 | bool "Workaround broken graphics drivers (going away soon)" |
d3f13810 | 113 | depends on INTEL_IOMMU && BROKEN && X86 |
166e9278 OBC |
114 | ---help--- |
115 | Current Graphics drivers tend to use physical address | |
116 | for DMA and avoid using DMA APIs. Setting this config | |
117 | option permits the IOMMU driver to set a unity map for | |
118 | all the OS-visible memory. Hence the driver can continue | |
119 | to use physical addresses for DMA, at least until this | |
120 | option is removed in the 2.6.32 kernel. | |
121 | ||
d3f13810 | 122 | config INTEL_IOMMU_FLOPPY_WA |
166e9278 | 123 | def_bool y |
d3f13810 | 124 | depends on INTEL_IOMMU && X86 |
166e9278 OBC |
125 | ---help--- |
126 | Floppy disk drivers are known to bypass DMA API calls | |
127 | thereby failing to work when IOMMU is enabled. This | |
128 | workaround will setup a 1:1 mapping for the first | |
129 | 16MiB to make floppy (an ISA device) work. | |
130 | ||
d3f13810 | 131 | config IRQ_REMAP |
a446e219 KC |
132 | bool "Support for Interrupt Remapping" |
133 | depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI | |
d3f13810 | 134 | select DMAR_TABLE |
166e9278 OBC |
135 | ---help--- |
136 | Supports Interrupt remapping for IO-APIC and MSI devices. | |
137 | To use x2apic mode in the CPU's which support x2APIC enhancements or | |
138 | to support platforms with CPU's having > 8 bit APIC ID, say Y. | |
68255b62 | 139 | |
fcf3a6ef OBC |
140 | # OMAP IOMMU support |
141 | config OMAP_IOMMU | |
142 | bool "OMAP IOMMU Support" | |
ae191589 | 143 | depends on ARCH_OMAP2PLUS |
fcf3a6ef OBC |
144 | select IOMMU_API |
145 | ||
fcf3a6ef | 146 | config OMAP_IOMMU_DEBUG |
61c75352 SA |
147 | bool "Export OMAP IOMMU internals in DebugFS" |
148 | depends on OMAP_IOMMU && DEBUG_FS | |
149 | ---help--- | |
150 | Select this to see extensive information about | |
151 | the internal state of OMAP IOMMU in debugfs. | |
fcf3a6ef | 152 | |
61c75352 | 153 | Say N unless you know you need this. |
fcf3a6ef | 154 | |
c68a2921 DK |
155 | config ROCKCHIP_IOMMU |
156 | bool "Rockchip IOMMU Support" | |
11175886 JR |
157 | depends on ARM |
158 | depends on ARCH_ROCKCHIP || COMPILE_TEST | |
c68a2921 DK |
159 | select IOMMU_API |
160 | select ARM_DMA_USE_IOMMU | |
161 | help | |
162 | Support for IOMMUs found on Rockchip rk32xx SOCs. | |
163 | These IOMMUs allow virtualization of the address space used by most | |
164 | cores within the multimedia subsystem. | |
165 | Say Y here if you are using a Rockchip SoC that includes an IOMMU | |
166 | device. | |
fcf3a6ef | 167 | |
d53e54b4 HD |
168 | config TEGRA_IOMMU_GART |
169 | bool "Tegra GART IOMMU Support" | |
170 | depends on ARCH_TEGRA_2x_SOC | |
171 | select IOMMU_API | |
172 | help | |
173 | Enables support for remapping discontiguous physical memory | |
174 | shared with the operating system into contiguous I/O virtual | |
175 | space through the GART (Graphics Address Relocation Table) | |
176 | hardware included on Tegra SoCs. | |
177 | ||
7a31f6f4 | 178 | config TEGRA_IOMMU_SMMU |
89184651 TR |
179 | bool "NVIDIA Tegra SMMU Support" |
180 | depends on ARCH_TEGRA | |
181 | depends on TEGRA_AHB | |
182 | depends on TEGRA_MC | |
7a31f6f4 HD |
183 | select IOMMU_API |
184 | help | |
89184651 TR |
185 | This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra |
186 | SoCs (Tegra30 up to Tegra124). | |
7a31f6f4 | 187 | |
2a96536e KC |
188 | config EXYNOS_IOMMU |
189 | bool "Exynos IOMMU Support" | |
20911ce6 | 190 | depends on ARCH_EXYNOS && ARM |
2a96536e | 191 | select IOMMU_API |
4802c1d0 | 192 | select ARM_DMA_USE_IOMMU |
2a96536e | 193 | help |
5455d700 SK |
194 | Support for the IOMMU (System MMU) of Samsung Exynos application |
195 | processor family. This enables H/W multimedia accelerators to see | |
196 | non-linear physical memory chunks as linear memory in their | |
197 | address space. | |
2a96536e KC |
198 | |
199 | If unsure, say N here. | |
200 | ||
201 | config EXYNOS_IOMMU_DEBUG | |
202 | bool "Debugging log for Exynos IOMMU" | |
203 | depends on EXYNOS_IOMMU | |
204 | help | |
205 | Select this to see the detailed log message that shows what | |
5455d700 | 206 | happens in the IOMMU driver. |
2a96536e | 207 | |
5455d700 | 208 | Say N unless you need kernel log message for IOMMU debugging. |
2a96536e | 209 | |
c2c460f7 HE |
210 | config SHMOBILE_IPMMU |
211 | bool | |
212 | ||
213 | config SHMOBILE_IPMMU_TLB | |
214 | bool | |
215 | ||
216 | config SHMOBILE_IOMMU | |
217 | bool "IOMMU for Renesas IPMMU/IPMMUI" | |
218 | default n | |
f63c4824 | 219 | depends on ARM |
b8354439 | 220 | depends on ARCH_SHMOBILE || COMPILE_TEST |
c2c460f7 HE |
221 | select IOMMU_API |
222 | select ARM_DMA_USE_IOMMU | |
223 | select SHMOBILE_IPMMU | |
224 | select SHMOBILE_IPMMU_TLB | |
225 | help | |
226 | Support for Renesas IPMMU/IPMMUI. This option enables | |
227 | remapping of DMA memory accesses from all of the IP blocks | |
228 | on the ICB. | |
229 | ||
230 | Warning: Drivers (including userspace drivers of UIO | |
231 | devices) of the IP blocks on the ICB *must* use addresses | |
232 | allocated from the IPMMU (iova) for DMA with this option | |
233 | enabled. | |
234 | ||
235 | If unsure, say N. | |
236 | ||
237 | choice | |
238 | prompt "IPMMU/IPMMUI address space size" | |
239 | default SHMOBILE_IOMMU_ADDRSIZE_2048MB | |
240 | depends on SHMOBILE_IOMMU | |
241 | help | |
242 | This option sets IPMMU/IPMMUI address space size by | |
243 | adjusting the 1st level page table size. The page table size | |
244 | is calculated as follows: | |
245 | ||
246 | page table size = number of page table entries * 4 bytes | |
247 | number of page table entries = address space size / 1 MiB | |
248 | ||
249 | For example, when the address space size is 2048 MiB, the | |
250 | 1st level page table size is 8192 bytes. | |
251 | ||
252 | config SHMOBILE_IOMMU_ADDRSIZE_2048MB | |
253 | bool "2 GiB" | |
254 | ||
255 | config SHMOBILE_IOMMU_ADDRSIZE_1024MB | |
256 | bool "1 GiB" | |
257 | ||
258 | config SHMOBILE_IOMMU_ADDRSIZE_512MB | |
259 | bool "512 MiB" | |
260 | ||
261 | config SHMOBILE_IOMMU_ADDRSIZE_256MB | |
262 | bool "256 MiB" | |
263 | ||
264 | config SHMOBILE_IOMMU_ADDRSIZE_128MB | |
265 | bool "128 MiB" | |
266 | ||
267 | config SHMOBILE_IOMMU_ADDRSIZE_64MB | |
268 | bool "64 MiB" | |
269 | ||
270 | config SHMOBILE_IOMMU_ADDRSIZE_32MB | |
271 | bool "32 MiB" | |
272 | ||
273 | endchoice | |
274 | ||
275 | config SHMOBILE_IOMMU_L1SIZE | |
276 | int | |
277 | default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB | |
278 | default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB | |
279 | default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB | |
280 | default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB | |
281 | default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB | |
282 | default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB | |
283 | default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB | |
284 | ||
d25a2a16 LP |
285 | config IPMMU_VMSA |
286 | bool "Renesas VMSA-compatible IPMMU" | |
287 | depends on ARM_LPAE | |
288 | depends on ARCH_SHMOBILE || COMPILE_TEST | |
289 | select IOMMU_API | |
290 | select ARM_DMA_USE_IOMMU | |
291 | help | |
292 | Support for the Renesas VMSA-compatible IPMMU Renesas found in the | |
293 | R-Mobile APE6 and R-Car H2/M2 SoCs. | |
294 | ||
295 | If unsure, say N. | |
296 | ||
4e13c1ac AK |
297 | config SPAPR_TCE_IOMMU |
298 | bool "sPAPR TCE IOMMU Support" | |
5b25199e | 299 | depends on PPC_POWERNV || PPC_PSERIES |
4e13c1ac AK |
300 | select IOMMU_API |
301 | help | |
302 | Enables bits of IOMMU API required by VFIO. The iommu_ops | |
303 | is not implemented as it is not necessary for VFIO. | |
304 | ||
45ae7cff WD |
305 | config ARM_SMMU |
306 | bool "ARM Ltd. System MMU (SMMU) Support" | |
307 | depends on ARM64 || (ARM_LPAE && OF) | |
308 | select IOMMU_API | |
309 | select ARM_DMA_USE_IOMMU if ARM | |
310 | help | |
311 | Support for implementations of the ARM System MMU architecture | |
312 | versions 1 and 2. The driver supports both v7l and v8l table | |
313 | formats with 4k and 64k page sizes. | |
314 | ||
315 | Say Y here if your SoC includes an IOMMU device implementing | |
316 | the ARM SMMU architecture. | |
317 | ||
68255b62 | 318 | endif # IOMMU_SUPPORT |