[mirror_ubuntu-bionic-kernel.git] / drivers / iommu / irq_remapping.c

#include <linux/seq_file.h>
#include <linux/cpumask.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/errno.h>
#include <linux/msi.h>
#include <linux/irq.h>
#include <linux/pci.h>

#include <asm/hw_irq.h>
#include <asm/irq_remapping.h>
#include <asm/processor.h>
#include <asm/x86_init.h>
#include <asm/apic.h>

#include "irq_remapping.h"

int irq_remapping_enabled;

int disable_irq_remap;
int irq_remap_broken;
int disable_sourceid_checking;
int no_x2apic_optout;

static struct irq_remap_ops *remap_ops;

static int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec);
static int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq,
				  int index, int sub_handle);
static int set_remapped_irq_affinity(struct irq_data *data,
				     const struct cpumask *mask,
				     bool force);

static bool irq_remapped(struct irq_cfg *cfg)
{
	return (cfg->remapped == 1);
}

static void irq_remapping_disable_io_apic(void)
{
	/*
	 * With interrupt-remapping, for now we will use virtual wire A
	 * mode, as virtual wire B is little complex (need to configure
	 * both IOAPIC RTE as well as interrupt-remapping table entry).
	 * As this gets called during crash dump, keep this simple for
	 * now.
	 */
	if (cpu_has_apic || apic_from_smp_config())
		disconnect_bsp_APIC(0);
}

static int do_setup_msi_irqs(struct pci_dev *dev, int nvec)
{
	int node, ret, sub_handle, nvec_pow2, index = 0;
	unsigned int irq;
	struct msi_desc *msidesc;

	WARN_ON(!list_is_singular(&dev->msi_list));
	msidesc = list_entry(dev->msi_list.next, struct msi_desc, list);
	WARN_ON(msidesc->irq);
	WARN_ON(msidesc->msi_attrib.multiple);
	WARN_ON(msidesc->nvec_used);

	node = dev_to_node(&dev->dev);
	irq = __create_irqs(get_nr_irqs_gsi(), nvec, node);
	if (irq == 0)
		return -ENOSPC;

	nvec_pow2 = __roundup_pow_of_two(nvec);
	msidesc->nvec_used = nvec;
	msidesc->msi_attrib.multiple = ilog2(nvec_pow2);
	for (sub_handle = 0; sub_handle < nvec; sub_handle++) {
		if (!sub_handle) {
			index = msi_alloc_remapped_irq(dev, irq, nvec_pow2);
			if (index < 0) {
				ret = index;
				goto error;
			}
		} else {
			ret = msi_setup_remapped_irq(dev, irq + sub_handle,
						     index, sub_handle);
			if (ret < 0)
				goto error;
		}
		ret = setup_msi_irq(dev, msidesc, irq, sub_handle);
		if (ret < 0)
			goto error;
	}
	return 0;

error:
	destroy_irqs(irq, nvec);

	/*
	 * Restore altered MSI descriptor fields and prevent just destroyed
	 * IRQs from tearing down again in default_teardown_msi_irqs()
	 */
	msidesc->irq = 0;
	msidesc->nvec_used = 0;
	msidesc->msi_attrib.multiple = 0;

	return ret;
}

static int do_setup_msix_irqs(struct pci_dev *dev, int nvec)
{
	int node, ret, sub_handle, index = 0;
	struct msi_desc *msidesc;
	unsigned int irq;

	node		= dev_to_node(&dev->dev);
	irq		= get_nr_irqs_gsi();
	sub_handle	= 0;

	list_for_each_entry(msidesc, &dev->msi_list, list) {

		irq = create_irq_nr(irq, node);
		if (irq == 0)
			return -1;

		if (sub_handle == 0)
			ret = index = msi_alloc_remapped_irq(dev, irq, nvec);
		else
			ret = msi_setup_remapped_irq(dev, irq, index, sub_handle);

		if (ret < 0)
			goto error;

		ret = setup_msi_irq(dev, msidesc, irq, 0);
		if (ret < 0)
			goto error;

		sub_handle += 1;
		irq        += 1;
	}

	return 0;

error:
	destroy_irq(irq);
	return ret;
}

static int irq_remapping_setup_msi_irqs(struct pci_dev *dev,
					int nvec, int type)
{
	if (type == PCI_CAP_ID_MSI)
		return do_setup_msi_irqs(dev, nvec);
	else
		return do_setup_msix_irqs(dev, nvec);
}

void eoi_ioapic_pin_remapped(int apic, int pin, int vector)
{
	/*
	 * Intr-remapping uses pin number as the virtual vector
	 * in the RTE. Actual vector is programmed in
	 * intr-remapping table entry. Hence for the io-apic
	 * EOI we use the pin number.
	 */
	io_apic_eoi(apic, pin);
}

static void __init irq_remapping_modify_x86_ops(void)
{
	x86_io_apic_ops.disable		= irq_remapping_disable_io_apic;
	x86_io_apic_ops.set_affinity	= set_remapped_irq_affinity;
	x86_io_apic_ops.setup_entry	= setup_ioapic_remapped_entry;
	x86_io_apic_ops.eoi_ioapic_pin	= eoi_ioapic_pin_remapped;
	x86_msi.setup_msi_irqs		= irq_remapping_setup_msi_irqs;
	x86_msi.setup_hpet_msi		= setup_hpet_msi_remapped;
	x86_msi.compose_msi_msg		= compose_remapped_msi_msg;
}

static __init int setup_nointremap(char *str)
{
	disable_irq_remap = 1;
	return 0;
}
early_param("nointremap", setup_nointremap);

static __init int setup_irqremap(char *str)
{
	if (!str)
		return -EINVAL;

	while (*str) {
		if (!strncmp(str, "on", 2))
			disable_irq_remap = 0;
		else if (!strncmp(str, "off", 3))
			disable_irq_remap = 1;
		else if (!strncmp(str, "nosid", 5))
			disable_sourceid_checking = 1;
		else if (!strncmp(str, "no_x2apic_optout", 16))
			no_x2apic_optout = 1;

		str += strcspn(str, ",");
		while (*str == ',')
			str++;
	}

	return 0;
}
early_param("intremap", setup_irqremap);

void __init setup_irq_remapping_ops(void)
{
	remap_ops = &intel_irq_remap_ops;

#ifdef CONFIG_AMD_IOMMU
	if (amd_iommu_irq_ops.prepare() == 0)
		remap_ops = &amd_iommu_irq_ops;
#endif
}

void set_irq_remapping_broken(void)
{
	irq_remap_broken = 1;
}

int irq_remapping_supported(void)
{
	if (disable_irq_remap)
		return 0;

	if (!remap_ops || !remap_ops->supported)
		return 0;

	return remap_ops->supported();
}

int __init irq_remapping_prepare(void)
{
	if (!remap_ops || !remap_ops->prepare)
		return -ENODEV;

	return remap_ops->prepare();
}

int __init irq_remapping_enable(void)
{
	int ret;

	if (!remap_ops || !remap_ops->enable)
		return -ENODEV;

	ret = remap_ops->enable();

	if (irq_remapping_enabled)
		irq_remapping_modify_x86_ops();

	return ret;
}

void irq_remapping_disable(void)
{
	if (!irq_remapping_enabled ||
	    !remap_ops ||
	    !remap_ops->disable)
		return;

	remap_ops->disable();
}

int irq_remapping_reenable(int mode)
{
	if (!irq_remapping_enabled ||
	    !remap_ops ||
	    !remap_ops->reenable)
		return 0;

	return remap_ops->reenable(mode);
}

int __init irq_remap_enable_fault_handling(void)
{
	if (!irq_remapping_enabled)
		return 0;

	if (!remap_ops || !remap_ops->enable_faulting)
		return -ENODEV;

	return remap_ops->enable_faulting();
}

int setup_ioapic_remapped_entry(int irq,
				struct IO_APIC_route_entry *entry,
				unsigned int destination, int vector,
				struct io_apic_irq_attr *attr)
{
	if (!remap_ops || !remap_ops->setup_ioapic_entry)
		return -ENODEV;

	return remap_ops->setup_ioapic_entry(irq, entry, destination,
					     vector, attr);
}

int set_remapped_irq_affinity(struct irq_data *data, const struct cpumask *mask,
			      bool force)
{
	if (!config_enabled(CONFIG_SMP) || !remap_ops ||
	    !remap_ops->set_affinity)
		return 0;

	return remap_ops->set_affinity(data, mask, force);
}

void free_remapped_irq(int irq)
{
	struct irq_cfg *cfg = irq_get_chip_data(irq);

	if (!remap_ops || !remap_ops->free_irq)
		return;

	if (irq_remapped(cfg))
		remap_ops->free_irq(irq);
}

void compose_remapped_msi_msg(struct pci_dev *pdev,
			      unsigned int irq, unsigned int dest,
			      struct msi_msg *msg, u8 hpet_id)
{
	struct irq_cfg *cfg = irq_get_chip_data(irq);

	if (!irq_remapped(cfg))
		native_compose_msi_msg(pdev, irq, dest, msg, hpet_id);
	else if (remap_ops && remap_ops->compose_msi_msg)
		remap_ops->compose_msi_msg(pdev, irq, dest, msg, hpet_id);
}

static int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec)
{
	if (!remap_ops || !remap_ops->msi_alloc_irq)
		return -ENODEV;

	return remap_ops->msi_alloc_irq(pdev, irq, nvec);
}

static int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq,
				  int index, int sub_handle)
{
	if (!remap_ops || !remap_ops->msi_setup_irq)
		return -ENODEV;

	return remap_ops->msi_setup_irq(pdev, irq, index, sub_handle);
}

int setup_hpet_msi_remapped(unsigned int irq, unsigned int id)
{
	if (!remap_ops || !remap_ops->setup_hpet_msi)
		return -ENODEV;

	return remap_ops->setup_hpet_msi(irq, id);
}

void panic_if_irq_remap(const char *msg)
{
	if (irq_remapping_enabled)
		panic(msg);
}

static void ir_ack_apic_edge(struct irq_data *data)
{
	ack_APIC_irq();
}

static void ir_ack_apic_level(struct irq_data *data)
{
	ack_APIC_irq();
	eoi_ioapic_irq(data->irq, data->chip_data);
}

static void ir_print_prefix(struct irq_data *data, struct seq_file *p)
{
	seq_printf(p, " IR-%s", data->chip->name);
}

void irq_remap_modify_chip_defaults(struct irq_chip *chip)
{
	chip->irq_print_chip = ir_print_prefix;
	chip->irq_ack = ir_ack_apic_edge;
	chip->irq_eoi = ir_ack_apic_level;
	chip->irq_set_affinity = x86_io_apic_ops.set_affinity;
}

bool setup_remapped_irq(int irq, struct irq_cfg *cfg, struct irq_chip *chip)
{
	if (!irq_remapped(cfg))
		return false;
	irq_set_status_flags(irq, IRQ_MOVE_PCNTXT);
	irq_remap_modify_chip_defaults(chip);
	return true;
}
Commit	Line	Data
9b1b0e42	1	#include <linux/seq_file.h>
1c4248ca	2	#include <linux/cpumask.h>
736baef4 JR	3	#include <linux/kernel.h>
	4	#include <linux/string.h>
	5	#include <linux/errno.h>
98f1ad25	6	#include <linux/msi.h>
5afba62c JR	7	#include <linux/irq.h>
5afba62c JR	8	#include <linux/pci.h>
98f1ad25 JR	9
	10	#include <asm/hw_irq.h>
	11	#include <asm/irq_remapping.h>
1c4248ca JR	12	#include <asm/processor.h>
	13	#include <asm/x86_init.h>
	14	#include <asm/apic.h>
736baef4	15
8a8f422d	16	#include "irq_remapping.h"
736baef4	17
95a02e97	18	int irq_remapping_enabled;
736baef4	19
95a02e97	20	int disable_irq_remap;
03bbcb2e	21	int irq_remap_broken;
736baef4 JR	22	int disable_sourceid_checking;
	23	int no_x2apic_optout;
	24
	25	static struct irq_remap_ops *remap_ops;
	26
5afba62c JR	27	static int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec);
	28	static int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq,
	29	int index, int sub_handle);
373dd7a2 JR	30	static int set_remapped_irq_affinity(struct irq_data *data,
	31	const struct cpumask *mask,
	32	bool force);
5afba62c	33
a1bb20c2 JR	34	static bool irq_remapped(struct irq_cfg *cfg)
	35	{
	36	return (cfg->remapped == 1);
	37	}
	38
1c4248ca JR	39	static void irq_remapping_disable_io_apic(void)
	40	{
	41	/*
	42	* With interrupt-remapping, for now we will use virtual wire A
	43	* mode, as virtual wire B is little complex (need to configure
	44	* both IOAPIC RTE as well as interrupt-remapping table entry).
	45	* As this gets called during crash dump, keep this simple for
	46	* now.
	47	*/
	48	if (cpu_has_apic \|\| apic_from_smp_config())
	49	disconnect_bsp_APIC(0);
	50	}
	51
5afba62c JR	52	static int do_setup_msi_irqs(struct pci_dev *dev, int nvec)
5afba62c JR	53	{
5fec9451	54	int node, ret, sub_handle, nvec_pow2, index = 0;
5afba62c JR	55	unsigned int irq;
	56	struct msi_desc *msidesc;
	57
5afba62c JR	58	WARN_ON(!list_is_singular(&dev->msi_list));
	59	msidesc = list_entry(dev->msi_list.next, struct msi_desc, list);
	60	WARN_ON(msidesc->irq);
	61	WARN_ON(msidesc->msi_attrib.multiple);
5fec9451	62	WARN_ON(msidesc->nvec_used);
5afba62c JR	63
	64	node = dev_to_node(&dev->dev);
	65	irq = __create_irqs(get_nr_irqs_gsi(), nvec, node);
	66	if (irq == 0)
	67	return -ENOSPC;
	68
5fec9451 AG	69	nvec_pow2 = __roundup_pow_of_two(nvec);
	70	msidesc->nvec_used = nvec;
	71	msidesc->msi_attrib.multiple = ilog2(nvec_pow2);
5afba62c JR	72	for (sub_handle = 0; sub_handle < nvec; sub_handle++) {
5afba62c JR	73	if (!sub_handle) {
5fec9451	74	index = msi_alloc_remapped_irq(dev, irq, nvec_pow2);
5afba62c JR	75	if (index < 0) {
	76	ret = index;
	77	goto error;
	78	}
	79	} else {
	80	ret = msi_setup_remapped_irq(dev, irq + sub_handle,
	81	index, sub_handle);
	82	if (ret < 0)
	83	goto error;
	84	}
	85	ret = setup_msi_irq(dev, msidesc, irq, sub_handle);
	86	if (ret < 0)
	87	goto error;
	88	}
	89	return 0;
	90
	91	error:
	92	destroy_irqs(irq, nvec);
	93
	94	/*
	95	* Restore altered MSI descriptor fields and prevent just destroyed
	96	* IRQs from tearing down again in default_teardown_msi_irqs()
	97	*/
	98	msidesc->irq = 0;
5fec9451	99	msidesc->nvec_used = 0;
5afba62c JR	100	msidesc->msi_attrib.multiple = 0;
	101
	102	return ret;
	103	}
	104
	105	static int do_setup_msix_irqs(struct pci_dev *dev, int nvec)
	106	{
	107	int node, ret, sub_handle, index = 0;
	108	struct msi_desc *msidesc;
	109	unsigned int irq;
	110
	111	node = dev_to_node(&dev->dev);
	112	irq = get_nr_irqs_gsi();
	113	sub_handle = 0;
	114
	115	list_for_each_entry(msidesc, &dev->msi_list, list) {
	116
	117	irq = create_irq_nr(irq, node);
	118	if (irq == 0)
	119	return -1;
	120
	121	if (sub_handle == 0)
	122	ret = index = msi_alloc_remapped_irq(dev, irq, nvec);
	123	else
	124	ret = msi_setup_remapped_irq(dev, irq, index, sub_handle);
	125
	126	if (ret < 0)
	127	goto error;
	128
	129	ret = setup_msi_irq(dev, msidesc, irq, 0);
	130	if (ret < 0)
	131	goto error;
	132
	133	sub_handle += 1;
	134	irq += 1;
	135	}
	136
	137	return 0;
	138
	139	error:
	140	destroy_irq(irq);
	141	return ret;
	142	}
	143
	144	static int irq_remapping_setup_msi_irqs(struct pci_dev *dev,
	145	int nvec, int type)
	146	{
	147	if (type == PCI_CAP_ID_MSI)
	148	return do_setup_msi_irqs(dev, nvec);
	149	else
	150	return do_setup_msix_irqs(dev, nvec);
	151	}
	152
da165322 JR	153	void eoi_ioapic_pin_remapped(int apic, int pin, int vector)
	154	{
	155	/*
	156	* Intr-remapping uses pin number as the virtual vector
	157	* in the RTE. Actual vector is programmed in
	158	* intr-remapping table entry. Hence for the io-apic
	159	* EOI we use the pin number.
	160	*/
	161	io_apic_eoi(apic, pin);
	162	}
	163
1c4248ca JR	164	static void __init irq_remapping_modify_x86_ops(void)
1c4248ca JR	165	{
71054d88	166	x86_io_apic_ops.disable = irq_remapping_disable_io_apic;
373dd7a2	167	x86_io_apic_ops.set_affinity = set_remapped_irq_affinity;
a6a25dd3	168	x86_io_apic_ops.setup_entry = setup_ioapic_remapped_entry;
da165322	169	x86_io_apic_ops.eoi_ioapic_pin = eoi_ioapic_pin_remapped;
5afba62c	170	x86_msi.setup_msi_irqs = irq_remapping_setup_msi_irqs;
71054d88	171	x86_msi.setup_hpet_msi = setup_hpet_msi_remapped;
7601384f	172	x86_msi.compose_msi_msg = compose_remapped_msi_msg;
1c4248ca JR	173	}
1c4248ca JR	174
736baef4 JR	175	static __init int setup_nointremap(char *str)
736baef4 JR	176	{
95a02e97	177	disable_irq_remap = 1;
736baef4 JR	178	return 0;
	179	}
	180	early_param("nointremap", setup_nointremap);
	181
95a02e97	182	static __init int setup_irqremap(char *str)
736baef4 JR	183	{
	184	if (!str)
	185	return -EINVAL;
	186
	187	while (*str) {
	188	if (!strncmp(str, "on", 2))
95a02e97	189	disable_irq_remap = 0;
736baef4	190	else if (!strncmp(str, "off", 3))
95a02e97	191	disable_irq_remap = 1;
736baef4 JR	192	else if (!strncmp(str, "nosid", 5))
	193	disable_sourceid_checking = 1;
	194	else if (!strncmp(str, "no_x2apic_optout", 16))
	195	no_x2apic_optout = 1;
	196
	197	str += strcspn(str, ",");
	198	while (*str == ',')
	199	str++;
	200	}
	201
	202	return 0;
	203	}
95a02e97	204	early_param("intremap", setup_irqremap);
736baef4	205
95a02e97	206	void __init setup_irq_remapping_ops(void)
736baef4 JR	207	{
736baef4 JR	208	remap_ops = &intel_irq_remap_ops;
c18d2388 JR	209
	210	#ifdef CONFIG_AMD_IOMMU
	211	if (amd_iommu_irq_ops.prepare() == 0)
	212	remap_ops = &amd_iommu_irq_ops;
	213	#endif
736baef4 JR	214	}
736baef4 JR	215
03bbcb2e NH	216	void set_irq_remapping_broken(void)
	217	{
	218	irq_remap_broken = 1;
	219	}
	220
95a02e97	221	int irq_remapping_supported(void)
736baef4	222	{
95a02e97	223	if (disable_irq_remap)
736baef4 JR	224	return 0;
	225
	226	if (!remap_ops \|\| !remap_ops->supported)
	227	return 0;
	228
	229	return remap_ops->supported();
	230	}
	231
95a02e97	232	int __init irq_remapping_prepare(void)
736baef4	233	{
95a02e97	234	if (!remap_ops \|\| !remap_ops->prepare)
736baef4 JR	235	return -ENODEV;
736baef4 JR	236
95a02e97	237	return remap_ops->prepare();
736baef4 JR	238	}
736baef4 JR	239
95a02e97	240	int __init irq_remapping_enable(void)
736baef4	241	{
1c4248ca JR	242	int ret;
1c4248ca JR	243
95a02e97	244	if (!remap_ops \|\| !remap_ops->enable)
736baef4 JR	245	return -ENODEV;
736baef4 JR	246
1c4248ca JR	247	ret = remap_ops->enable();
	248
	249	if (irq_remapping_enabled)
	250	irq_remapping_modify_x86_ops();
	251
	252	return ret;
736baef4	253	}
4f3d8b67	254
95a02e97	255	void irq_remapping_disable(void)
4f3d8b67	256	{
70733e0c JR	257	if (!irq_remapping_enabled \|\|
	258	!remap_ops \|\|
	259	!remap_ops->disable)
4f3d8b67 JR	260	return;
4f3d8b67 JR	261
95a02e97	262	remap_ops->disable();
4f3d8b67 JR	263	}
4f3d8b67 JR	264
95a02e97	265	int irq_remapping_reenable(int mode)
4f3d8b67	266	{
70733e0c JR	267	if (!irq_remapping_enabled \|\|
	268	!remap_ops \|\|
	269	!remap_ops->reenable)
4f3d8b67 JR	270	return 0;
4f3d8b67 JR	271
95a02e97	272	return remap_ops->reenable(mode);
4f3d8b67 JR	273	}
4f3d8b67 JR	274
95a02e97	275	int __init irq_remap_enable_fault_handling(void)
4f3d8b67	276	{
70733e0c JR	277	if (!irq_remapping_enabled)
	278	return 0;
	279
4f3d8b67 JR	280	if (!remap_ops \|\| !remap_ops->enable_faulting)
	281	return -ENODEV;
	282
	283	return remap_ops->enable_faulting();
	284	}
0c3f173a	285
95a02e97 SS	286	int setup_ioapic_remapped_entry(int irq,
	287	struct IO_APIC_route_entry *entry,
	288	unsigned int destination, int vector,
	289	struct io_apic_irq_attr *attr)
0c3f173a JR	290	{
	291	if (!remap_ops \|\| !remap_ops->setup_ioapic_entry)
	292	return -ENODEV;
	293
	294	return remap_ops->setup_ioapic_entry(irq, entry, destination,
	295	vector, attr);
	296	}
4c1bad6a	297
95a02e97 SS	298	int set_remapped_irq_affinity(struct irq_data data, const struct cpumask mask,
95a02e97 SS	299	bool force)
4c1bad6a	300	{
7eb9ae07 SS	301	if (!config_enabled(CONFIG_SMP) \|\| !remap_ops \|\|
7eb9ae07 SS	302	!remap_ops->set_affinity)
4c1bad6a JR	303	return 0;
	304
	305	return remap_ops->set_affinity(data, mask, force);
	306	}
9d619f65	307
95a02e97	308	void free_remapped_irq(int irq)
9d619f65	309	{
11b4a1cc JR	310	struct irq_cfg *cfg = irq_get_chip_data(irq);
11b4a1cc JR	311
9d619f65 JR	312	if (!remap_ops \|\| !remap_ops->free_irq)
	313	return;
	314
11b4a1cc JR	315	if (irq_remapped(cfg))
11b4a1cc JR	316	remap_ops->free_irq(irq);
9d619f65	317	}
5e2b930b	318
95a02e97 SS	319	void compose_remapped_msi_msg(struct pci_dev *pdev,
	320	unsigned int irq, unsigned int dest,
	321	struct msi_msg *msg, u8 hpet_id)
5e2b930b	322	{
7601384f	323	struct irq_cfg *cfg = irq_get_chip_data(irq);
5e2b930b	324
7601384f JR	325	if (!irq_remapped(cfg))
	326	native_compose_msi_msg(pdev, irq, dest, msg, hpet_id);
	327	else if (remap_ops && remap_ops->compose_msi_msg)
	328	remap_ops->compose_msi_msg(pdev, irq, dest, msg, hpet_id);
5e2b930b JR	329	}
5e2b930b JR	330
5afba62c	331	static int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec)
5e2b930b JR	332	{
	333	if (!remap_ops \|\| !remap_ops->msi_alloc_irq)
	334	return -ENODEV;
	335
	336	return remap_ops->msi_alloc_irq(pdev, irq, nvec);
	337	}
	338
5afba62c JR	339	static int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq,
5afba62c JR	340	int index, int sub_handle)
5e2b930b JR	341	{
	342	if (!remap_ops \|\| !remap_ops->msi_setup_irq)
	343	return -ENODEV;
	344
	345	return remap_ops->msi_setup_irq(pdev, irq, index, sub_handle);
	346	}
	347
95a02e97	348	int setup_hpet_msi_remapped(unsigned int irq, unsigned int id)
5e2b930b JR	349	{
	350	if (!remap_ops \|\| !remap_ops->setup_hpet_msi)
	351	return -ENODEV;
	352
	353	return remap_ops->setup_hpet_msi(irq, id);
	354	}
6a9f5de2 JR	355
	356	void panic_if_irq_remap(const char *msg)
	357	{
	358	if (irq_remapping_enabled)
	359	panic(msg);
	360	}
9b1b0e42 JR	361
	362	static void ir_ack_apic_edge(struct irq_data *data)
	363	{
	364	ack_APIC_irq();
	365	}
	366
	367	static void ir_ack_apic_level(struct irq_data *data)
	368	{
	369	ack_APIC_irq();
	370	eoi_ioapic_irq(data->irq, data->chip_data);
	371	}
	372
	373	static void ir_print_prefix(struct irq_data data, struct seq_file p)
	374	{
	375	seq_printf(p, " IR-%s", data->chip->name);
	376	}
	377
	378	void irq_remap_modify_chip_defaults(struct irq_chip *chip)
	379	{
	380	chip->irq_print_chip = ir_print_prefix;
	381	chip->irq_ack = ir_ack_apic_edge;
	382	chip->irq_eoi = ir_ack_apic_level;
	383	chip->irq_set_affinity = x86_io_apic_ops.set_affinity;
	384	}
2976fd84 JR	385
	386	bool setup_remapped_irq(int irq, struct irq_cfg cfg, struct irq_chip chip)
	387	{
	388	if (!irq_remapped(cfg))
	389	return false;
	390	irq_set_status_flags(irq, IRQ_MOVE_PCNTXT);
	391	irq_remap_modify_chip_defaults(chip);
	392	return true;
	393	}