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Commit | Line | Data |
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9b1b0e42 | 1 | #include <linux/seq_file.h> |
1c4248ca | 2 | #include <linux/cpumask.h> |
736baef4 JR |
3 | #include <linux/kernel.h> |
4 | #include <linux/string.h> | |
98f1ad25 | 5 | #include <linux/cpumask.h> |
736baef4 | 6 | #include <linux/errno.h> |
98f1ad25 | 7 | #include <linux/msi.h> |
5afba62c JR |
8 | #include <linux/irq.h> |
9 | #include <linux/pci.h> | |
98f1ad25 JR |
10 | |
11 | #include <asm/hw_irq.h> | |
12 | #include <asm/irq_remapping.h> | |
1c4248ca JR |
13 | #include <asm/processor.h> |
14 | #include <asm/x86_init.h> | |
15 | #include <asm/apic.h> | |
736baef4 | 16 | |
8a8f422d | 17 | #include "irq_remapping.h" |
736baef4 | 18 | |
95a02e97 | 19 | int irq_remapping_enabled; |
736baef4 | 20 | |
95a02e97 | 21 | int disable_irq_remap; |
736baef4 JR |
22 | int disable_sourceid_checking; |
23 | int no_x2apic_optout; | |
24 | ||
25 | static struct irq_remap_ops *remap_ops; | |
26 | ||
5afba62c JR |
27 | static int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec); |
28 | static int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq, | |
29 | int index, int sub_handle); | |
373dd7a2 JR |
30 | static int set_remapped_irq_affinity(struct irq_data *data, |
31 | const struct cpumask *mask, | |
32 | bool force); | |
5afba62c | 33 | |
a1bb20c2 JR |
34 | static bool irq_remapped(struct irq_cfg *cfg) |
35 | { | |
36 | return (cfg->remapped == 1); | |
37 | } | |
38 | ||
1c4248ca JR |
39 | static void irq_remapping_disable_io_apic(void) |
40 | { | |
41 | /* | |
42 | * With interrupt-remapping, for now we will use virtual wire A | |
43 | * mode, as virtual wire B is little complex (need to configure | |
44 | * both IOAPIC RTE as well as interrupt-remapping table entry). | |
45 | * As this gets called during crash dump, keep this simple for | |
46 | * now. | |
47 | */ | |
48 | if (cpu_has_apic || apic_from_smp_config()) | |
49 | disconnect_bsp_APIC(0); | |
50 | } | |
51 | ||
5afba62c JR |
52 | static int do_setup_msi_irqs(struct pci_dev *dev, int nvec) |
53 | { | |
54 | int node, ret, sub_handle, index = 0; | |
55 | unsigned int irq; | |
56 | struct msi_desc *msidesc; | |
57 | ||
58 | nvec = __roundup_pow_of_two(nvec); | |
59 | ||
60 | WARN_ON(!list_is_singular(&dev->msi_list)); | |
61 | msidesc = list_entry(dev->msi_list.next, struct msi_desc, list); | |
62 | WARN_ON(msidesc->irq); | |
63 | WARN_ON(msidesc->msi_attrib.multiple); | |
64 | ||
65 | node = dev_to_node(&dev->dev); | |
66 | irq = __create_irqs(get_nr_irqs_gsi(), nvec, node); | |
67 | if (irq == 0) | |
68 | return -ENOSPC; | |
69 | ||
70 | msidesc->msi_attrib.multiple = ilog2(nvec); | |
71 | for (sub_handle = 0; sub_handle < nvec; sub_handle++) { | |
72 | if (!sub_handle) { | |
73 | index = msi_alloc_remapped_irq(dev, irq, nvec); | |
74 | if (index < 0) { | |
75 | ret = index; | |
76 | goto error; | |
77 | } | |
78 | } else { | |
79 | ret = msi_setup_remapped_irq(dev, irq + sub_handle, | |
80 | index, sub_handle); | |
81 | if (ret < 0) | |
82 | goto error; | |
83 | } | |
84 | ret = setup_msi_irq(dev, msidesc, irq, sub_handle); | |
85 | if (ret < 0) | |
86 | goto error; | |
87 | } | |
88 | return 0; | |
89 | ||
90 | error: | |
91 | destroy_irqs(irq, nvec); | |
92 | ||
93 | /* | |
94 | * Restore altered MSI descriptor fields and prevent just destroyed | |
95 | * IRQs from tearing down again in default_teardown_msi_irqs() | |
96 | */ | |
97 | msidesc->irq = 0; | |
98 | msidesc->msi_attrib.multiple = 0; | |
99 | ||
100 | return ret; | |
101 | } | |
102 | ||
103 | static int do_setup_msix_irqs(struct pci_dev *dev, int nvec) | |
104 | { | |
105 | int node, ret, sub_handle, index = 0; | |
106 | struct msi_desc *msidesc; | |
107 | unsigned int irq; | |
108 | ||
109 | node = dev_to_node(&dev->dev); | |
110 | irq = get_nr_irqs_gsi(); | |
111 | sub_handle = 0; | |
112 | ||
113 | list_for_each_entry(msidesc, &dev->msi_list, list) { | |
114 | ||
115 | irq = create_irq_nr(irq, node); | |
116 | if (irq == 0) | |
117 | return -1; | |
118 | ||
119 | if (sub_handle == 0) | |
120 | ret = index = msi_alloc_remapped_irq(dev, irq, nvec); | |
121 | else | |
122 | ret = msi_setup_remapped_irq(dev, irq, index, sub_handle); | |
123 | ||
124 | if (ret < 0) | |
125 | goto error; | |
126 | ||
127 | ret = setup_msi_irq(dev, msidesc, irq, 0); | |
128 | if (ret < 0) | |
129 | goto error; | |
130 | ||
131 | sub_handle += 1; | |
132 | irq += 1; | |
133 | } | |
134 | ||
135 | return 0; | |
136 | ||
137 | error: | |
138 | destroy_irq(irq); | |
139 | return ret; | |
140 | } | |
141 | ||
142 | static int irq_remapping_setup_msi_irqs(struct pci_dev *dev, | |
143 | int nvec, int type) | |
144 | { | |
145 | if (type == PCI_CAP_ID_MSI) | |
146 | return do_setup_msi_irqs(dev, nvec); | |
147 | else | |
148 | return do_setup_msix_irqs(dev, nvec); | |
149 | } | |
150 | ||
da165322 JR |
151 | void eoi_ioapic_pin_remapped(int apic, int pin, int vector) |
152 | { | |
153 | /* | |
154 | * Intr-remapping uses pin number as the virtual vector | |
155 | * in the RTE. Actual vector is programmed in | |
156 | * intr-remapping table entry. Hence for the io-apic | |
157 | * EOI we use the pin number. | |
158 | */ | |
159 | io_apic_eoi(apic, pin); | |
160 | } | |
161 | ||
1c4248ca JR |
162 | static void __init irq_remapping_modify_x86_ops(void) |
163 | { | |
71054d88 | 164 | x86_io_apic_ops.disable = irq_remapping_disable_io_apic; |
373dd7a2 | 165 | x86_io_apic_ops.set_affinity = set_remapped_irq_affinity; |
a6a25dd3 | 166 | x86_io_apic_ops.setup_entry = setup_ioapic_remapped_entry; |
da165322 | 167 | x86_io_apic_ops.eoi_ioapic_pin = eoi_ioapic_pin_remapped; |
5afba62c | 168 | x86_msi.setup_msi_irqs = irq_remapping_setup_msi_irqs; |
71054d88 | 169 | x86_msi.setup_hpet_msi = setup_hpet_msi_remapped; |
7601384f | 170 | x86_msi.compose_msi_msg = compose_remapped_msi_msg; |
1c4248ca JR |
171 | } |
172 | ||
736baef4 JR |
173 | static __init int setup_nointremap(char *str) |
174 | { | |
95a02e97 | 175 | disable_irq_remap = 1; |
736baef4 JR |
176 | return 0; |
177 | } | |
178 | early_param("nointremap", setup_nointremap); | |
179 | ||
95a02e97 | 180 | static __init int setup_irqremap(char *str) |
736baef4 JR |
181 | { |
182 | if (!str) | |
183 | return -EINVAL; | |
184 | ||
185 | while (*str) { | |
186 | if (!strncmp(str, "on", 2)) | |
95a02e97 | 187 | disable_irq_remap = 0; |
736baef4 | 188 | else if (!strncmp(str, "off", 3)) |
95a02e97 | 189 | disable_irq_remap = 1; |
736baef4 JR |
190 | else if (!strncmp(str, "nosid", 5)) |
191 | disable_sourceid_checking = 1; | |
192 | else if (!strncmp(str, "no_x2apic_optout", 16)) | |
193 | no_x2apic_optout = 1; | |
194 | ||
195 | str += strcspn(str, ","); | |
196 | while (*str == ',') | |
197 | str++; | |
198 | } | |
199 | ||
200 | return 0; | |
201 | } | |
95a02e97 | 202 | early_param("intremap", setup_irqremap); |
736baef4 | 203 | |
95a02e97 | 204 | void __init setup_irq_remapping_ops(void) |
736baef4 JR |
205 | { |
206 | remap_ops = &intel_irq_remap_ops; | |
c18d2388 JR |
207 | |
208 | #ifdef CONFIG_AMD_IOMMU | |
209 | if (amd_iommu_irq_ops.prepare() == 0) | |
210 | remap_ops = &amd_iommu_irq_ops; | |
211 | #endif | |
736baef4 JR |
212 | } |
213 | ||
95a02e97 | 214 | int irq_remapping_supported(void) |
736baef4 | 215 | { |
95a02e97 | 216 | if (disable_irq_remap) |
736baef4 JR |
217 | return 0; |
218 | ||
219 | if (!remap_ops || !remap_ops->supported) | |
220 | return 0; | |
221 | ||
222 | return remap_ops->supported(); | |
223 | } | |
224 | ||
95a02e97 | 225 | int __init irq_remapping_prepare(void) |
736baef4 | 226 | { |
95a02e97 | 227 | if (!remap_ops || !remap_ops->prepare) |
736baef4 JR |
228 | return -ENODEV; |
229 | ||
95a02e97 | 230 | return remap_ops->prepare(); |
736baef4 JR |
231 | } |
232 | ||
95a02e97 | 233 | int __init irq_remapping_enable(void) |
736baef4 | 234 | { |
1c4248ca JR |
235 | int ret; |
236 | ||
95a02e97 | 237 | if (!remap_ops || !remap_ops->enable) |
736baef4 JR |
238 | return -ENODEV; |
239 | ||
1c4248ca JR |
240 | ret = remap_ops->enable(); |
241 | ||
242 | if (irq_remapping_enabled) | |
243 | irq_remapping_modify_x86_ops(); | |
244 | ||
245 | return ret; | |
736baef4 | 246 | } |
4f3d8b67 | 247 | |
95a02e97 | 248 | void irq_remapping_disable(void) |
4f3d8b67 | 249 | { |
70733e0c JR |
250 | if (!irq_remapping_enabled || |
251 | !remap_ops || | |
252 | !remap_ops->disable) | |
4f3d8b67 JR |
253 | return; |
254 | ||
95a02e97 | 255 | remap_ops->disable(); |
4f3d8b67 JR |
256 | } |
257 | ||
95a02e97 | 258 | int irq_remapping_reenable(int mode) |
4f3d8b67 | 259 | { |
70733e0c JR |
260 | if (!irq_remapping_enabled || |
261 | !remap_ops || | |
262 | !remap_ops->reenable) | |
4f3d8b67 JR |
263 | return 0; |
264 | ||
95a02e97 | 265 | return remap_ops->reenable(mode); |
4f3d8b67 JR |
266 | } |
267 | ||
95a02e97 | 268 | int __init irq_remap_enable_fault_handling(void) |
4f3d8b67 | 269 | { |
70733e0c JR |
270 | if (!irq_remapping_enabled) |
271 | return 0; | |
272 | ||
4f3d8b67 JR |
273 | if (!remap_ops || !remap_ops->enable_faulting) |
274 | return -ENODEV; | |
275 | ||
276 | return remap_ops->enable_faulting(); | |
277 | } | |
0c3f173a | 278 | |
95a02e97 SS |
279 | int setup_ioapic_remapped_entry(int irq, |
280 | struct IO_APIC_route_entry *entry, | |
281 | unsigned int destination, int vector, | |
282 | struct io_apic_irq_attr *attr) | |
0c3f173a JR |
283 | { |
284 | if (!remap_ops || !remap_ops->setup_ioapic_entry) | |
285 | return -ENODEV; | |
286 | ||
287 | return remap_ops->setup_ioapic_entry(irq, entry, destination, | |
288 | vector, attr); | |
289 | } | |
4c1bad6a | 290 | |
95a02e97 SS |
291 | int set_remapped_irq_affinity(struct irq_data *data, const struct cpumask *mask, |
292 | bool force) | |
4c1bad6a | 293 | { |
7eb9ae07 SS |
294 | if (!config_enabled(CONFIG_SMP) || !remap_ops || |
295 | !remap_ops->set_affinity) | |
4c1bad6a JR |
296 | return 0; |
297 | ||
298 | return remap_ops->set_affinity(data, mask, force); | |
299 | } | |
9d619f65 | 300 | |
95a02e97 | 301 | void free_remapped_irq(int irq) |
9d619f65 | 302 | { |
11b4a1cc JR |
303 | struct irq_cfg *cfg = irq_get_chip_data(irq); |
304 | ||
9d619f65 JR |
305 | if (!remap_ops || !remap_ops->free_irq) |
306 | return; | |
307 | ||
11b4a1cc JR |
308 | if (irq_remapped(cfg)) |
309 | remap_ops->free_irq(irq); | |
9d619f65 | 310 | } |
5e2b930b | 311 | |
95a02e97 SS |
312 | void compose_remapped_msi_msg(struct pci_dev *pdev, |
313 | unsigned int irq, unsigned int dest, | |
314 | struct msi_msg *msg, u8 hpet_id) | |
5e2b930b | 315 | { |
7601384f | 316 | struct irq_cfg *cfg = irq_get_chip_data(irq); |
5e2b930b | 317 | |
7601384f JR |
318 | if (!irq_remapped(cfg)) |
319 | native_compose_msi_msg(pdev, irq, dest, msg, hpet_id); | |
320 | else if (remap_ops && remap_ops->compose_msi_msg) | |
321 | remap_ops->compose_msi_msg(pdev, irq, dest, msg, hpet_id); | |
5e2b930b JR |
322 | } |
323 | ||
5afba62c | 324 | static int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec) |
5e2b930b JR |
325 | { |
326 | if (!remap_ops || !remap_ops->msi_alloc_irq) | |
327 | return -ENODEV; | |
328 | ||
329 | return remap_ops->msi_alloc_irq(pdev, irq, nvec); | |
330 | } | |
331 | ||
5afba62c JR |
332 | static int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq, |
333 | int index, int sub_handle) | |
5e2b930b JR |
334 | { |
335 | if (!remap_ops || !remap_ops->msi_setup_irq) | |
336 | return -ENODEV; | |
337 | ||
338 | return remap_ops->msi_setup_irq(pdev, irq, index, sub_handle); | |
339 | } | |
340 | ||
95a02e97 | 341 | int setup_hpet_msi_remapped(unsigned int irq, unsigned int id) |
5e2b930b JR |
342 | { |
343 | if (!remap_ops || !remap_ops->setup_hpet_msi) | |
344 | return -ENODEV; | |
345 | ||
346 | return remap_ops->setup_hpet_msi(irq, id); | |
347 | } | |
6a9f5de2 JR |
348 | |
349 | void panic_if_irq_remap(const char *msg) | |
350 | { | |
351 | if (irq_remapping_enabled) | |
352 | panic(msg); | |
353 | } | |
9b1b0e42 JR |
354 | |
355 | static void ir_ack_apic_edge(struct irq_data *data) | |
356 | { | |
357 | ack_APIC_irq(); | |
358 | } | |
359 | ||
360 | static void ir_ack_apic_level(struct irq_data *data) | |
361 | { | |
362 | ack_APIC_irq(); | |
363 | eoi_ioapic_irq(data->irq, data->chip_data); | |
364 | } | |
365 | ||
366 | static void ir_print_prefix(struct irq_data *data, struct seq_file *p) | |
367 | { | |
368 | seq_printf(p, " IR-%s", data->chip->name); | |
369 | } | |
370 | ||
371 | void irq_remap_modify_chip_defaults(struct irq_chip *chip) | |
372 | { | |
373 | chip->irq_print_chip = ir_print_prefix; | |
374 | chip->irq_ack = ir_ack_apic_edge; | |
375 | chip->irq_eoi = ir_ack_apic_level; | |
376 | chip->irq_set_affinity = x86_io_apic_ops.set_affinity; | |
377 | } | |
2976fd84 JR |
378 | |
379 | bool setup_remapped_irq(int irq, struct irq_cfg *cfg, struct irq_chip *chip) | |
380 | { | |
381 | if (!irq_remapped(cfg)) | |
382 | return false; | |
383 | irq_set_status_flags(irq, IRQ_MOVE_PCNTXT); | |
384 | irq_remap_modify_chip_defaults(chip); | |
385 | return true; | |
386 | } |