[mirror_ubuntu-zesty-kernel.git] / drivers / iommu / irq_remapping.c

#include <linux/seq_file.h>
#include <linux/cpumask.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/errno.h>
#include <linux/msi.h>
#include <linux/irq.h>
#include <linux/pci.h>

#include <asm/hw_irq.h>
#include <asm/irq_remapping.h>
#include <asm/processor.h>
#include <asm/x86_init.h>
#include <asm/apic.h>
#include <asm/hpet.h>

#include "irq_remapping.h"

int irq_remapping_enabled;
int irq_remap_broken;
int disable_sourceid_checking;
int no_x2apic_optout;

static int disable_irq_remap;
static struct irq_remap_ops *remap_ops;

static int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec);
static int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq,
				  int index, int sub_handle);
static int set_remapped_irq_affinity(struct irq_data *data,
				     const struct cpumask *mask,
				     bool force);

static bool irq_remapped(struct irq_cfg *cfg)
{
	return (cfg->remapped == 1);
}

static void irq_remapping_disable_io_apic(void)
{
	/*
	 * With interrupt-remapping, for now we will use virtual wire A
	 * mode, as virtual wire B is little complex (need to configure
	 * both IOAPIC RTE as well as interrupt-remapping table entry).
	 * As this gets called during crash dump, keep this simple for
	 * now.
	 */
	if (cpu_has_apic || apic_from_smp_config())
		disconnect_bsp_APIC(0);
}

static int do_setup_msi_irqs(struct pci_dev *dev, int nvec)
{
	int ret, sub_handle, nvec_pow2, index = 0;
	unsigned int irq;
	struct msi_desc *msidesc;

	msidesc = list_entry(dev->msi_list.next, struct msi_desc, list);

	irq = irq_alloc_hwirqs(nvec, dev_to_node(&dev->dev));
	if (irq == 0)
		return -ENOSPC;

	nvec_pow2 = __roundup_pow_of_two(nvec);
	for (sub_handle = 0; sub_handle < nvec; sub_handle++) {
		if (!sub_handle) {
			index = msi_alloc_remapped_irq(dev, irq, nvec_pow2);
			if (index < 0) {
				ret = index;
				goto error;
			}
		} else {
			ret = msi_setup_remapped_irq(dev, irq + sub_handle,
						     index, sub_handle);
			if (ret < 0)
				goto error;
		}
		ret = setup_msi_irq(dev, msidesc, irq, sub_handle);
		if (ret < 0)
			goto error;
	}
	return 0;

error:
	irq_free_hwirqs(irq, nvec);

	/*
	 * Restore altered MSI descriptor fields and prevent just destroyed
	 * IRQs from tearing down again in default_teardown_msi_irqs()
	 */
	msidesc->irq = 0;

	return ret;
}

static int do_setup_msix_irqs(struct pci_dev *dev, int nvec)
{
	int node, ret, sub_handle, index = 0;
	struct msi_desc *msidesc;
	unsigned int irq;

	node		= dev_to_node(&dev->dev);
	sub_handle	= 0;

	list_for_each_entry(msidesc, &dev->msi_list, list) {

		irq = irq_alloc_hwirq(node);
		if (irq == 0)
			return -1;

		if (sub_handle == 0)
			ret = index = msi_alloc_remapped_irq(dev, irq, nvec);
		else
			ret = msi_setup_remapped_irq(dev, irq, index, sub_handle);

		if (ret < 0)
			goto error;

		ret = setup_msi_irq(dev, msidesc, irq, 0);
		if (ret < 0)
			goto error;

		sub_handle += 1;
		irq        += 1;
	}

	return 0;

error:
	irq_free_hwirq(irq);
	return ret;
}

static int irq_remapping_setup_msi_irqs(struct pci_dev *dev,
					int nvec, int type)
{
	if (type == PCI_CAP_ID_MSI)
		return do_setup_msi_irqs(dev, nvec);
	else
		return do_setup_msix_irqs(dev, nvec);
}

static void eoi_ioapic_pin_remapped(int apic, int pin, int vector)
{
	/*
	 * Intr-remapping uses pin number as the virtual vector
	 * in the RTE. Actual vector is programmed in
	 * intr-remapping table entry. Hence for the io-apic
	 * EOI we use the pin number.
	 */
	io_apic_eoi(apic, pin);
}

static void __init irq_remapping_modify_x86_ops(void)
{
	x86_io_apic_ops.disable		= irq_remapping_disable_io_apic;
	x86_io_apic_ops.set_affinity	= set_remapped_irq_affinity;
	x86_io_apic_ops.setup_entry	= setup_ioapic_remapped_entry;
	x86_io_apic_ops.eoi_ioapic_pin	= eoi_ioapic_pin_remapped;
	x86_msi.setup_msi_irqs		= irq_remapping_setup_msi_irqs;
	x86_msi.setup_hpet_msi		= setup_hpet_msi_remapped;
	x86_msi.compose_msi_msg		= compose_remapped_msi_msg;
}

static __init int setup_nointremap(char *str)
{
	disable_irq_remap = 1;
	return 0;
}
early_param("nointremap", setup_nointremap);

static __init int setup_irqremap(char *str)
{
	if (!str)
		return -EINVAL;

	while (*str) {
		if (!strncmp(str, "on", 2))
			disable_irq_remap = 0;
		else if (!strncmp(str, "off", 3))
			disable_irq_remap = 1;
		else if (!strncmp(str, "nosid", 5))
			disable_sourceid_checking = 1;
		else if (!strncmp(str, "no_x2apic_optout", 16))
			no_x2apic_optout = 1;

		str += strcspn(str, ",");
		while (*str == ',')
			str++;
	}

	return 0;
}
early_param("intremap", setup_irqremap);

void set_irq_remapping_broken(void)
{
	irq_remap_broken = 1;
}

int __init irq_remapping_prepare(void)
{
	if (disable_irq_remap)
		return -ENOSYS;

	if (intel_irq_remap_ops.prepare() == 0)
		remap_ops = &intel_irq_remap_ops;
	else if (IS_ENABLED(CONFIG_AMD_IOMMU) &&
		 amd_iommu_irq_ops.prepare() == 0)
		remap_ops = &amd_iommu_irq_ops;
	else
		return -ENOSYS;

	return 0;
}

int __init irq_remapping_enable(void)
{
	int ret;

	if (!remap_ops || !remap_ops->enable)
		return -ENODEV;

	ret = remap_ops->enable();

	if (irq_remapping_enabled)
		irq_remapping_modify_x86_ops();

	return ret;
}

void irq_remapping_disable(void)
{
	if (!irq_remapping_enabled ||
	    !remap_ops ||
	    !remap_ops->disable)
		return;

	remap_ops->disable();
}

int irq_remapping_reenable(int mode)
{
	if (!irq_remapping_enabled ||
	    !remap_ops ||
	    !remap_ops->reenable)
		return 0;

	return remap_ops->reenable(mode);
}

int __init irq_remap_enable_fault_handling(void)
{
	if (!irq_remapping_enabled)
		return 0;

	if (!remap_ops || !remap_ops->enable_faulting)
		return -ENODEV;

	return remap_ops->enable_faulting();
}

int setup_ioapic_remapped_entry(int irq,
				struct IO_APIC_route_entry *entry,
				unsigned int destination, int vector,
				struct io_apic_irq_attr *attr)
{
	if (!remap_ops || !remap_ops->setup_ioapic_entry)
		return -ENODEV;

	return remap_ops->setup_ioapic_entry(irq, entry, destination,
					     vector, attr);
}

static int set_remapped_irq_affinity(struct irq_data *data,
				     const struct cpumask *mask, bool force)
{
	if (!config_enabled(CONFIG_SMP) || !remap_ops ||
	    !remap_ops->set_affinity)
		return 0;

	return remap_ops->set_affinity(data, mask, force);
}

void free_remapped_irq(int irq)
{
	struct irq_cfg *cfg = irq_cfg(irq);

	if (!remap_ops || !remap_ops->free_irq)
		return;

	if (irq_remapped(cfg))
		remap_ops->free_irq(irq);
}

void compose_remapped_msi_msg(struct pci_dev *pdev,
			      unsigned int irq, unsigned int dest,
			      struct msi_msg *msg, u8 hpet_id)
{
	struct irq_cfg *cfg = irq_cfg(irq);

	if (!irq_remapped(cfg))
		native_compose_msi_msg(pdev, irq, dest, msg, hpet_id);
	else if (remap_ops && remap_ops->compose_msi_msg)
		remap_ops->compose_msi_msg(pdev, irq, dest, msg, hpet_id);
}

static int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec)
{
	if (!remap_ops || !remap_ops->msi_alloc_irq)
		return -ENODEV;

	return remap_ops->msi_alloc_irq(pdev, irq, nvec);
}

static int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq,
				  int index, int sub_handle)
{
	if (!remap_ops || !remap_ops->msi_setup_irq)
		return -ENODEV;

	return remap_ops->msi_setup_irq(pdev, irq, index, sub_handle);
}

int setup_hpet_msi_remapped(unsigned int irq, unsigned int id)
{
	int ret;

	if (!remap_ops || !remap_ops->alloc_hpet_msi)
		return -ENODEV;

	ret = remap_ops->alloc_hpet_msi(irq, id);
	if (ret)
		return -EINVAL;

	return default_setup_hpet_msi(irq, id);
}

void panic_if_irq_remap(const char *msg)
{
	if (irq_remapping_enabled)
		panic(msg);
}

static void ir_ack_apic_edge(struct irq_data *data)
{
	ack_APIC_irq();
}

static void ir_ack_apic_level(struct irq_data *data)
{
	ack_APIC_irq();
	eoi_ioapic_irq(data->irq, irqd_cfg(data));
}

static void ir_print_prefix(struct irq_data *data, struct seq_file *p)
{
	seq_printf(p, " IR-%s", data->chip->name);
}

void irq_remap_modify_chip_defaults(struct irq_chip *chip)
{
	chip->irq_print_chip = ir_print_prefix;
	chip->irq_ack = ir_ack_apic_edge;
	chip->irq_eoi = ir_ack_apic_level;
	chip->irq_set_affinity = x86_io_apic_ops.set_affinity;
}

bool setup_remapped_irq(int irq, struct irq_cfg *cfg, struct irq_chip *chip)
{
	if (!irq_remapped(cfg))
		return false;
	irq_set_status_flags(irq, IRQ_MOVE_PCNTXT);
	irq_remap_modify_chip_defaults(chip);
	return true;
}
Commit	Line	Data
9b1b0e42	1	#include <linux/seq_file.h>
1c4248ca	2	#include <linux/cpumask.h>
736baef4 JR	3	#include <linux/kernel.h>
	4	#include <linux/string.h>
	5	#include <linux/errno.h>
98f1ad25	6	#include <linux/msi.h>
5afba62c JR	7	#include <linux/irq.h>
5afba62c JR	8	#include <linux/pci.h>
98f1ad25 JR	9
	10	#include <asm/hw_irq.h>
	11	#include <asm/irq_remapping.h>
1c4248ca JR	12	#include <asm/processor.h>
	13	#include <asm/x86_init.h>
	14	#include <asm/apic.h>
5fc24d8c	15	#include <asm/hpet.h>
736baef4	16
8a8f422d	17	#include "irq_remapping.h"
736baef4	18
95a02e97	19	int irq_remapping_enabled;
03bbcb2e	20	int irq_remap_broken;
736baef4 JR	21	int disable_sourceid_checking;
	22	int no_x2apic_optout;
	23
7fa1c842	24	static int disable_irq_remap;
736baef4 JR	25	static struct irq_remap_ops *remap_ops;
736baef4 JR	26
5afba62c JR	27	static int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec);
	28	static int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq,
	29	int index, int sub_handle);
373dd7a2 JR	30	static int set_remapped_irq_affinity(struct irq_data *data,
	31	const struct cpumask *mask,
	32	bool force);
5afba62c	33
a1bb20c2 JR	34	static bool irq_remapped(struct irq_cfg *cfg)
	35	{
	36	return (cfg->remapped == 1);
	37	}
	38
1c4248ca JR	39	static void irq_remapping_disable_io_apic(void)
	40	{
	41	/*
	42	* With interrupt-remapping, for now we will use virtual wire A
	43	* mode, as virtual wire B is little complex (need to configure
	44	* both IOAPIC RTE as well as interrupt-remapping table entry).
	45	* As this gets called during crash dump, keep this simple for
	46	* now.
	47	*/
	48	if (cpu_has_apic \|\| apic_from_smp_config())
	49	disconnect_bsp_APIC(0);
	50	}
	51
5afba62c JR	52	static int do_setup_msi_irqs(struct pci_dev *dev, int nvec)
5afba62c JR	53	{
d24a1354	54	int ret, sub_handle, nvec_pow2, index = 0;
5afba62c JR	55	unsigned int irq;
	56	struct msi_desc *msidesc;
	57
5afba62c	58	msidesc = list_entry(dev->msi_list.next, struct msi_desc, list);
5afba62c	59
d24a1354	60	irq = irq_alloc_hwirqs(nvec, dev_to_node(&dev->dev));
5afba62c JR	61	if (irq == 0)
	62	return -ENOSPC;
	63
5fec9451	64	nvec_pow2 = __roundup_pow_of_two(nvec);
5afba62c JR	65	for (sub_handle = 0; sub_handle < nvec; sub_handle++) {
5afba62c JR	66	if (!sub_handle) {
5fec9451	67	index = msi_alloc_remapped_irq(dev, irq, nvec_pow2);
5afba62c JR	68	if (index < 0) {
	69	ret = index;
	70	goto error;
	71	}
	72	} else {
	73	ret = msi_setup_remapped_irq(dev, irq + sub_handle,
	74	index, sub_handle);
	75	if (ret < 0)
	76	goto error;
	77	}
	78	ret = setup_msi_irq(dev, msidesc, irq, sub_handle);
	79	if (ret < 0)
	80	goto error;
	81	}
	82	return 0;
	83
	84	error:
d24a1354	85	irq_free_hwirqs(irq, nvec);
5afba62c JR	86
	87	/*
	88	* Restore altered MSI descriptor fields and prevent just destroyed
	89	* IRQs from tearing down again in default_teardown_msi_irqs()
	90	*/
	91	msidesc->irq = 0;
5afba62c JR	92
	93	return ret;
	94	}
	95
	96	static int do_setup_msix_irqs(struct pci_dev *dev, int nvec)
	97	{
	98	int node, ret, sub_handle, index = 0;
	99	struct msi_desc *msidesc;
	100	unsigned int irq;
	101
	102	node = dev_to_node(&dev->dev);
5afba62c JR	103	sub_handle = 0;
	104
	105	list_for_each_entry(msidesc, &dev->msi_list, list) {
	106
d24a1354	107	irq = irq_alloc_hwirq(node);
5afba62c JR	108	if (irq == 0)
	109	return -1;
	110
	111	if (sub_handle == 0)
	112	ret = index = msi_alloc_remapped_irq(dev, irq, nvec);
	113	else
	114	ret = msi_setup_remapped_irq(dev, irq, index, sub_handle);
	115
	116	if (ret < 0)
	117	goto error;
	118
	119	ret = setup_msi_irq(dev, msidesc, irq, 0);
	120	if (ret < 0)
	121	goto error;
	122
	123	sub_handle += 1;
	124	irq += 1;
	125	}
	126
	127	return 0;
	128
	129	error:
d24a1354	130	irq_free_hwirq(irq);
5afba62c JR	131	return ret;
	132	}
	133
	134	static int irq_remapping_setup_msi_irqs(struct pci_dev *dev,
	135	int nvec, int type)
	136	{
	137	if (type == PCI_CAP_ID_MSI)
	138	return do_setup_msi_irqs(dev, nvec);
	139	else
	140	return do_setup_msix_irqs(dev, nvec);
	141	}
	142
d2d1e8fe	143	static void eoi_ioapic_pin_remapped(int apic, int pin, int vector)
da165322 JR	144	{
	145	/*
	146	* Intr-remapping uses pin number as the virtual vector
	147	* in the RTE. Actual vector is programmed in
	148	* intr-remapping table entry. Hence for the io-apic
	149	* EOI we use the pin number.
	150	*/
	151	io_apic_eoi(apic, pin);
	152	}
	153
1c4248ca JR	154	static void __init irq_remapping_modify_x86_ops(void)
1c4248ca JR	155	{
71054d88	156	x86_io_apic_ops.disable = irq_remapping_disable_io_apic;
373dd7a2	157	x86_io_apic_ops.set_affinity = set_remapped_irq_affinity;
a6a25dd3	158	x86_io_apic_ops.setup_entry = setup_ioapic_remapped_entry;
da165322	159	x86_io_apic_ops.eoi_ioapic_pin = eoi_ioapic_pin_remapped;
5afba62c	160	x86_msi.setup_msi_irqs = irq_remapping_setup_msi_irqs;
71054d88	161	x86_msi.setup_hpet_msi = setup_hpet_msi_remapped;
7601384f	162	x86_msi.compose_msi_msg = compose_remapped_msi_msg;
1c4248ca JR	163	}
1c4248ca JR	164
736baef4 JR	165	static __init int setup_nointremap(char *str)
736baef4 JR	166	{
95a02e97	167	disable_irq_remap = 1;
736baef4 JR	168	return 0;
	169	}
	170	early_param("nointremap", setup_nointremap);
	171
95a02e97	172	static __init int setup_irqremap(char *str)
736baef4 JR	173	{
	174	if (!str)
	175	return -EINVAL;
	176
	177	while (*str) {
	178	if (!strncmp(str, "on", 2))
95a02e97	179	disable_irq_remap = 0;
736baef4	180	else if (!strncmp(str, "off", 3))
95a02e97	181	disable_irq_remap = 1;
736baef4 JR	182	else if (!strncmp(str, "nosid", 5))
	183	disable_sourceid_checking = 1;
	184	else if (!strncmp(str, "no_x2apic_optout", 16))
	185	no_x2apic_optout = 1;
	186
	187	str += strcspn(str, ",");
	188	while (*str == ',')
	189	str++;
	190	}
	191
	192	return 0;
	193	}
95a02e97	194	early_param("intremap", setup_irqremap);
736baef4	195
03bbcb2e NH	196	void set_irq_remapping_broken(void)
	197	{
	198	irq_remap_broken = 1;
	199	}
	200
c392f56c	201	int __init irq_remapping_prepare(void)
736baef4	202	{
95a02e97	203	if (disable_irq_remap)
c392f56c	204	return -ENOSYS;
736baef4	205
30969e34 JL	206	if (intel_irq_remap_ops.prepare() == 0)
	207	remap_ops = &intel_irq_remap_ops;
	208	else if (IS_ENABLED(CONFIG_AMD_IOMMU) &&
	209	amd_iommu_irq_ops.prepare() == 0)
a1dafe85	210	remap_ops = &amd_iommu_irq_ops;
30969e34 JL	211	else
	212	return -ENOSYS;
	213
	214	return 0;
736baef4 JR	215	}
736baef4 JR	216
95a02e97	217	int __init irq_remapping_enable(void)
736baef4	218	{
1c4248ca JR	219	int ret;
1c4248ca JR	220
95a02e97	221	if (!remap_ops \|\| !remap_ops->enable)
736baef4 JR	222	return -ENODEV;
736baef4 JR	223
1c4248ca JR	224	ret = remap_ops->enable();
	225
	226	if (irq_remapping_enabled)
	227	irq_remapping_modify_x86_ops();
	228
	229	return ret;
736baef4	230	}
4f3d8b67	231
95a02e97	232	void irq_remapping_disable(void)
4f3d8b67	233	{
70733e0c JR	234	if (!irq_remapping_enabled \|\|
	235	!remap_ops \|\|
	236	!remap_ops->disable)
4f3d8b67 JR	237	return;
4f3d8b67 JR	238
95a02e97	239	remap_ops->disable();
4f3d8b67 JR	240	}
4f3d8b67 JR	241
95a02e97	242	int irq_remapping_reenable(int mode)
4f3d8b67	243	{
70733e0c JR	244	if (!irq_remapping_enabled \|\|
	245	!remap_ops \|\|
	246	!remap_ops->reenable)
4f3d8b67 JR	247	return 0;
4f3d8b67 JR	248
95a02e97	249	return remap_ops->reenable(mode);
4f3d8b67 JR	250	}
4f3d8b67 JR	251
95a02e97	252	int __init irq_remap_enable_fault_handling(void)
4f3d8b67	253	{
70733e0c JR	254	if (!irq_remapping_enabled)
	255	return 0;
	256
4f3d8b67 JR	257	if (!remap_ops \|\| !remap_ops->enable_faulting)
	258	return -ENODEV;
	259
	260	return remap_ops->enable_faulting();
	261	}
0c3f173a	262
95a02e97 SS	263	int setup_ioapic_remapped_entry(int irq,
	264	struct IO_APIC_route_entry *entry,
	265	unsigned int destination, int vector,
	266	struct io_apic_irq_attr *attr)
0c3f173a JR	267	{
	268	if (!remap_ops \|\| !remap_ops->setup_ioapic_entry)
	269	return -ENODEV;
	270
	271	return remap_ops->setup_ioapic_entry(irq, entry, destination,
	272	vector, attr);
	273	}
4c1bad6a	274
b707cb02 JL	275	static int set_remapped_irq_affinity(struct irq_data *data,
b707cb02 JL	276	const struct cpumask *mask, bool force)
4c1bad6a	277	{
7eb9ae07 SS	278	if (!config_enabled(CONFIG_SMP) \|\| !remap_ops \|\|
7eb9ae07 SS	279	!remap_ops->set_affinity)
4c1bad6a JR	280	return 0;
	281
	282	return remap_ops->set_affinity(data, mask, force);
	283	}
9d619f65	284
95a02e97	285	void free_remapped_irq(int irq)
9d619f65	286	{
b71a3b29	287	struct irq_cfg *cfg = irq_cfg(irq);
11b4a1cc	288
9d619f65 JR	289	if (!remap_ops \|\| !remap_ops->free_irq)
	290	return;
	291
11b4a1cc JR	292	if (irq_remapped(cfg))
11b4a1cc JR	293	remap_ops->free_irq(irq);
9d619f65	294	}
5e2b930b	295
95a02e97 SS	296	void compose_remapped_msi_msg(struct pci_dev *pdev,
	297	unsigned int irq, unsigned int dest,
	298	struct msi_msg *msg, u8 hpet_id)
5e2b930b	299	{
b71a3b29	300	struct irq_cfg *cfg = irq_cfg(irq);
5e2b930b	301
7601384f JR	302	if (!irq_remapped(cfg))
	303	native_compose_msi_msg(pdev, irq, dest, msg, hpet_id);
	304	else if (remap_ops && remap_ops->compose_msi_msg)
	305	remap_ops->compose_msi_msg(pdev, irq, dest, msg, hpet_id);
5e2b930b JR	306	}
5e2b930b JR	307
5afba62c	308	static int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec)
5e2b930b JR	309	{
	310	if (!remap_ops \|\| !remap_ops->msi_alloc_irq)
	311	return -ENODEV;
	312
	313	return remap_ops->msi_alloc_irq(pdev, irq, nvec);
	314	}
	315
5afba62c JR	316	static int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq,
5afba62c JR	317	int index, int sub_handle)
5e2b930b JR	318	{
	319	if (!remap_ops \|\| !remap_ops->msi_setup_irq)
	320	return -ENODEV;
	321
	322	return remap_ops->msi_setup_irq(pdev, irq, index, sub_handle);
	323	}
	324
95a02e97	325	int setup_hpet_msi_remapped(unsigned int irq, unsigned int id)
5e2b930b	326	{
5fc24d8c YW	327	int ret;
	328
	329	if (!remap_ops \|\| !remap_ops->alloc_hpet_msi)
5e2b930b JR	330	return -ENODEV;
5e2b930b JR	331
5fc24d8c YW	332	ret = remap_ops->alloc_hpet_msi(irq, id);
	333	if (ret)
	334	return -EINVAL;
	335
	336	return default_setup_hpet_msi(irq, id);
5e2b930b	337	}
6a9f5de2 JR	338
	339	void panic_if_irq_remap(const char *msg)
	340	{
	341	if (irq_remapping_enabled)
	342	panic(msg);
	343	}
9b1b0e42 JR	344
	345	static void ir_ack_apic_edge(struct irq_data *data)
	346	{
	347	ack_APIC_irq();
	348	}
	349
	350	static void ir_ack_apic_level(struct irq_data *data)
	351	{
	352	ack_APIC_irq();
b71a3b29	353	eoi_ioapic_irq(data->irq, irqd_cfg(data));
9b1b0e42 JR	354	}
	355
	356	static void ir_print_prefix(struct irq_data data, struct seq_file p)
	357	{
	358	seq_printf(p, " IR-%s", data->chip->name);
	359	}
	360
	361	void irq_remap_modify_chip_defaults(struct irq_chip *chip)
	362	{
	363	chip->irq_print_chip = ir_print_prefix;
	364	chip->irq_ack = ir_ack_apic_edge;
	365	chip->irq_eoi = ir_ack_apic_level;
	366	chip->irq_set_affinity = x86_io_apic_ops.set_affinity;
	367	}
2976fd84 JR	368
	369	bool setup_remapped_irq(int irq, struct irq_cfg cfg, struct irq_chip chip)
	370	{
	371	if (!irq_remapped(cfg))
	372	return false;
	373	irq_set_status_flags(irq, IRQ_MOVE_PCNTXT);
	374	irq_remap_modify_chip_defaults(chip);
	375	return true;
	376	}