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Commit | Line | Data |
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9b1b0e42 | 1 | #include <linux/seq_file.h> |
1c4248ca | 2 | #include <linux/cpumask.h> |
736baef4 JR |
3 | #include <linux/kernel.h> |
4 | #include <linux/string.h> | |
5 | #include <linux/errno.h> | |
98f1ad25 | 6 | #include <linux/msi.h> |
5afba62c JR |
7 | #include <linux/irq.h> |
8 | #include <linux/pci.h> | |
98f1ad25 JR |
9 | |
10 | #include <asm/hw_irq.h> | |
11 | #include <asm/irq_remapping.h> | |
1c4248ca JR |
12 | #include <asm/processor.h> |
13 | #include <asm/x86_init.h> | |
14 | #include <asm/apic.h> | |
5fc24d8c | 15 | #include <asm/hpet.h> |
736baef4 | 16 | |
8a8f422d | 17 | #include "irq_remapping.h" |
736baef4 | 18 | |
95a02e97 | 19 | int irq_remapping_enabled; |
736baef4 | 20 | |
95a02e97 | 21 | int disable_irq_remap; |
03bbcb2e | 22 | int irq_remap_broken; |
736baef4 JR |
23 | int disable_sourceid_checking; |
24 | int no_x2apic_optout; | |
25 | ||
26 | static struct irq_remap_ops *remap_ops; | |
27 | ||
5afba62c JR |
28 | static int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec); |
29 | static int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq, | |
30 | int index, int sub_handle); | |
373dd7a2 JR |
31 | static int set_remapped_irq_affinity(struct irq_data *data, |
32 | const struct cpumask *mask, | |
33 | bool force); | |
5afba62c | 34 | |
a1bb20c2 JR |
35 | static bool irq_remapped(struct irq_cfg *cfg) |
36 | { | |
37 | return (cfg->remapped == 1); | |
38 | } | |
39 | ||
1c4248ca JR |
40 | static void irq_remapping_disable_io_apic(void) |
41 | { | |
42 | /* | |
43 | * With interrupt-remapping, for now we will use virtual wire A | |
44 | * mode, as virtual wire B is little complex (need to configure | |
45 | * both IOAPIC RTE as well as interrupt-remapping table entry). | |
46 | * As this gets called during crash dump, keep this simple for | |
47 | * now. | |
48 | */ | |
49 | if (cpu_has_apic || apic_from_smp_config()) | |
50 | disconnect_bsp_APIC(0); | |
51 | } | |
52 | ||
5afba62c JR |
53 | static int do_setup_msi_irqs(struct pci_dev *dev, int nvec) |
54 | { | |
d24a1354 | 55 | int ret, sub_handle, nvec_pow2, index = 0; |
5afba62c JR |
56 | unsigned int irq; |
57 | struct msi_desc *msidesc; | |
58 | ||
5afba62c | 59 | msidesc = list_entry(dev->msi_list.next, struct msi_desc, list); |
5afba62c | 60 | |
d24a1354 | 61 | irq = irq_alloc_hwirqs(nvec, dev_to_node(&dev->dev)); |
5afba62c JR |
62 | if (irq == 0) |
63 | return -ENOSPC; | |
64 | ||
5fec9451 | 65 | nvec_pow2 = __roundup_pow_of_two(nvec); |
5afba62c JR |
66 | for (sub_handle = 0; sub_handle < nvec; sub_handle++) { |
67 | if (!sub_handle) { | |
5fec9451 | 68 | index = msi_alloc_remapped_irq(dev, irq, nvec_pow2); |
5afba62c JR |
69 | if (index < 0) { |
70 | ret = index; | |
71 | goto error; | |
72 | } | |
73 | } else { | |
74 | ret = msi_setup_remapped_irq(dev, irq + sub_handle, | |
75 | index, sub_handle); | |
76 | if (ret < 0) | |
77 | goto error; | |
78 | } | |
79 | ret = setup_msi_irq(dev, msidesc, irq, sub_handle); | |
80 | if (ret < 0) | |
81 | goto error; | |
82 | } | |
83 | return 0; | |
84 | ||
85 | error: | |
d24a1354 | 86 | irq_free_hwirqs(irq, nvec); |
5afba62c JR |
87 | |
88 | /* | |
89 | * Restore altered MSI descriptor fields and prevent just destroyed | |
90 | * IRQs from tearing down again in default_teardown_msi_irqs() | |
91 | */ | |
92 | msidesc->irq = 0; | |
5afba62c JR |
93 | |
94 | return ret; | |
95 | } | |
96 | ||
97 | static int do_setup_msix_irqs(struct pci_dev *dev, int nvec) | |
98 | { | |
99 | int node, ret, sub_handle, index = 0; | |
100 | struct msi_desc *msidesc; | |
101 | unsigned int irq; | |
102 | ||
103 | node = dev_to_node(&dev->dev); | |
5afba62c JR |
104 | sub_handle = 0; |
105 | ||
106 | list_for_each_entry(msidesc, &dev->msi_list, list) { | |
107 | ||
d24a1354 | 108 | irq = irq_alloc_hwirq(node); |
5afba62c JR |
109 | if (irq == 0) |
110 | return -1; | |
111 | ||
112 | if (sub_handle == 0) | |
113 | ret = index = msi_alloc_remapped_irq(dev, irq, nvec); | |
114 | else | |
115 | ret = msi_setup_remapped_irq(dev, irq, index, sub_handle); | |
116 | ||
117 | if (ret < 0) | |
118 | goto error; | |
119 | ||
120 | ret = setup_msi_irq(dev, msidesc, irq, 0); | |
121 | if (ret < 0) | |
122 | goto error; | |
123 | ||
124 | sub_handle += 1; | |
125 | irq += 1; | |
126 | } | |
127 | ||
128 | return 0; | |
129 | ||
130 | error: | |
d24a1354 | 131 | irq_free_hwirq(irq); |
5afba62c JR |
132 | return ret; |
133 | } | |
134 | ||
135 | static int irq_remapping_setup_msi_irqs(struct pci_dev *dev, | |
136 | int nvec, int type) | |
137 | { | |
138 | if (type == PCI_CAP_ID_MSI) | |
139 | return do_setup_msi_irqs(dev, nvec); | |
140 | else | |
141 | return do_setup_msix_irqs(dev, nvec); | |
142 | } | |
143 | ||
d2d1e8fe | 144 | static void eoi_ioapic_pin_remapped(int apic, int pin, int vector) |
da165322 JR |
145 | { |
146 | /* | |
147 | * Intr-remapping uses pin number as the virtual vector | |
148 | * in the RTE. Actual vector is programmed in | |
149 | * intr-remapping table entry. Hence for the io-apic | |
150 | * EOI we use the pin number. | |
151 | */ | |
152 | io_apic_eoi(apic, pin); | |
153 | } | |
154 | ||
1c4248ca JR |
155 | static void __init irq_remapping_modify_x86_ops(void) |
156 | { | |
71054d88 | 157 | x86_io_apic_ops.disable = irq_remapping_disable_io_apic; |
373dd7a2 | 158 | x86_io_apic_ops.set_affinity = set_remapped_irq_affinity; |
a6a25dd3 | 159 | x86_io_apic_ops.setup_entry = setup_ioapic_remapped_entry; |
da165322 | 160 | x86_io_apic_ops.eoi_ioapic_pin = eoi_ioapic_pin_remapped; |
5afba62c | 161 | x86_msi.setup_msi_irqs = irq_remapping_setup_msi_irqs; |
71054d88 | 162 | x86_msi.setup_hpet_msi = setup_hpet_msi_remapped; |
7601384f | 163 | x86_msi.compose_msi_msg = compose_remapped_msi_msg; |
1c4248ca JR |
164 | } |
165 | ||
736baef4 JR |
166 | static __init int setup_nointremap(char *str) |
167 | { | |
95a02e97 | 168 | disable_irq_remap = 1; |
736baef4 JR |
169 | return 0; |
170 | } | |
171 | early_param("nointremap", setup_nointremap); | |
172 | ||
95a02e97 | 173 | static __init int setup_irqremap(char *str) |
736baef4 JR |
174 | { |
175 | if (!str) | |
176 | return -EINVAL; | |
177 | ||
178 | while (*str) { | |
179 | if (!strncmp(str, "on", 2)) | |
95a02e97 | 180 | disable_irq_remap = 0; |
736baef4 | 181 | else if (!strncmp(str, "off", 3)) |
95a02e97 | 182 | disable_irq_remap = 1; |
736baef4 JR |
183 | else if (!strncmp(str, "nosid", 5)) |
184 | disable_sourceid_checking = 1; | |
185 | else if (!strncmp(str, "no_x2apic_optout", 16)) | |
186 | no_x2apic_optout = 1; | |
187 | ||
188 | str += strcspn(str, ","); | |
189 | while (*str == ',') | |
190 | str++; | |
191 | } | |
192 | ||
193 | return 0; | |
194 | } | |
95a02e97 | 195 | early_param("intremap", setup_irqremap); |
736baef4 | 196 | |
03bbcb2e NH |
197 | void set_irq_remapping_broken(void) |
198 | { | |
199 | irq_remap_broken = 1; | |
200 | } | |
201 | ||
c392f56c | 202 | int __init irq_remapping_prepare(void) |
736baef4 | 203 | { |
95a02e97 | 204 | if (disable_irq_remap) |
c392f56c | 205 | return -ENOSYS; |
736baef4 | 206 | |
a1dafe85 | 207 | remap_ops = &intel_irq_remap_ops; |
736baef4 | 208 | |
a1dafe85 TG |
209 | #ifdef CONFIG_AMD_IOMMU |
210 | if (amd_iommu_irq_ops.prepare() == 0) { | |
211 | remap_ops = &amd_iommu_irq_ops; | |
212 | return 0; | |
213 | } | |
214 | #endif | |
95a02e97 | 215 | return remap_ops->prepare(); |
736baef4 JR |
216 | } |
217 | ||
95a02e97 | 218 | int __init irq_remapping_enable(void) |
736baef4 | 219 | { |
1c4248ca JR |
220 | int ret; |
221 | ||
95a02e97 | 222 | if (!remap_ops || !remap_ops->enable) |
736baef4 JR |
223 | return -ENODEV; |
224 | ||
1c4248ca JR |
225 | ret = remap_ops->enable(); |
226 | ||
227 | if (irq_remapping_enabled) | |
228 | irq_remapping_modify_x86_ops(); | |
229 | ||
230 | return ret; | |
736baef4 | 231 | } |
4f3d8b67 | 232 | |
95a02e97 | 233 | void irq_remapping_disable(void) |
4f3d8b67 | 234 | { |
70733e0c JR |
235 | if (!irq_remapping_enabled || |
236 | !remap_ops || | |
237 | !remap_ops->disable) | |
4f3d8b67 JR |
238 | return; |
239 | ||
95a02e97 | 240 | remap_ops->disable(); |
4f3d8b67 JR |
241 | } |
242 | ||
95a02e97 | 243 | int irq_remapping_reenable(int mode) |
4f3d8b67 | 244 | { |
70733e0c JR |
245 | if (!irq_remapping_enabled || |
246 | !remap_ops || | |
247 | !remap_ops->reenable) | |
4f3d8b67 JR |
248 | return 0; |
249 | ||
95a02e97 | 250 | return remap_ops->reenable(mode); |
4f3d8b67 JR |
251 | } |
252 | ||
95a02e97 | 253 | int __init irq_remap_enable_fault_handling(void) |
4f3d8b67 | 254 | { |
70733e0c JR |
255 | if (!irq_remapping_enabled) |
256 | return 0; | |
257 | ||
4f3d8b67 JR |
258 | if (!remap_ops || !remap_ops->enable_faulting) |
259 | return -ENODEV; | |
260 | ||
261 | return remap_ops->enable_faulting(); | |
262 | } | |
0c3f173a | 263 | |
95a02e97 SS |
264 | int setup_ioapic_remapped_entry(int irq, |
265 | struct IO_APIC_route_entry *entry, | |
266 | unsigned int destination, int vector, | |
267 | struct io_apic_irq_attr *attr) | |
0c3f173a JR |
268 | { |
269 | if (!remap_ops || !remap_ops->setup_ioapic_entry) | |
270 | return -ENODEV; | |
271 | ||
272 | return remap_ops->setup_ioapic_entry(irq, entry, destination, | |
273 | vector, attr); | |
274 | } | |
4c1bad6a | 275 | |
b707cb02 JL |
276 | static int set_remapped_irq_affinity(struct irq_data *data, |
277 | const struct cpumask *mask, bool force) | |
4c1bad6a | 278 | { |
7eb9ae07 SS |
279 | if (!config_enabled(CONFIG_SMP) || !remap_ops || |
280 | !remap_ops->set_affinity) | |
4c1bad6a JR |
281 | return 0; |
282 | ||
283 | return remap_ops->set_affinity(data, mask, force); | |
284 | } | |
9d619f65 | 285 | |
95a02e97 | 286 | void free_remapped_irq(int irq) |
9d619f65 | 287 | { |
b71a3b29 | 288 | struct irq_cfg *cfg = irq_cfg(irq); |
11b4a1cc | 289 | |
9d619f65 JR |
290 | if (!remap_ops || !remap_ops->free_irq) |
291 | return; | |
292 | ||
11b4a1cc JR |
293 | if (irq_remapped(cfg)) |
294 | remap_ops->free_irq(irq); | |
9d619f65 | 295 | } |
5e2b930b | 296 | |
95a02e97 SS |
297 | void compose_remapped_msi_msg(struct pci_dev *pdev, |
298 | unsigned int irq, unsigned int dest, | |
299 | struct msi_msg *msg, u8 hpet_id) | |
5e2b930b | 300 | { |
b71a3b29 | 301 | struct irq_cfg *cfg = irq_cfg(irq); |
5e2b930b | 302 | |
7601384f JR |
303 | if (!irq_remapped(cfg)) |
304 | native_compose_msi_msg(pdev, irq, dest, msg, hpet_id); | |
305 | else if (remap_ops && remap_ops->compose_msi_msg) | |
306 | remap_ops->compose_msi_msg(pdev, irq, dest, msg, hpet_id); | |
5e2b930b JR |
307 | } |
308 | ||
5afba62c | 309 | static int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec) |
5e2b930b JR |
310 | { |
311 | if (!remap_ops || !remap_ops->msi_alloc_irq) | |
312 | return -ENODEV; | |
313 | ||
314 | return remap_ops->msi_alloc_irq(pdev, irq, nvec); | |
315 | } | |
316 | ||
5afba62c JR |
317 | static int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq, |
318 | int index, int sub_handle) | |
5e2b930b JR |
319 | { |
320 | if (!remap_ops || !remap_ops->msi_setup_irq) | |
321 | return -ENODEV; | |
322 | ||
323 | return remap_ops->msi_setup_irq(pdev, irq, index, sub_handle); | |
324 | } | |
325 | ||
95a02e97 | 326 | int setup_hpet_msi_remapped(unsigned int irq, unsigned int id) |
5e2b930b | 327 | { |
5fc24d8c YW |
328 | int ret; |
329 | ||
330 | if (!remap_ops || !remap_ops->alloc_hpet_msi) | |
5e2b930b JR |
331 | return -ENODEV; |
332 | ||
5fc24d8c YW |
333 | ret = remap_ops->alloc_hpet_msi(irq, id); |
334 | if (ret) | |
335 | return -EINVAL; | |
336 | ||
337 | return default_setup_hpet_msi(irq, id); | |
5e2b930b | 338 | } |
6a9f5de2 JR |
339 | |
340 | void panic_if_irq_remap(const char *msg) | |
341 | { | |
342 | if (irq_remapping_enabled) | |
343 | panic(msg); | |
344 | } | |
9b1b0e42 JR |
345 | |
346 | static void ir_ack_apic_edge(struct irq_data *data) | |
347 | { | |
348 | ack_APIC_irq(); | |
349 | } | |
350 | ||
351 | static void ir_ack_apic_level(struct irq_data *data) | |
352 | { | |
353 | ack_APIC_irq(); | |
b71a3b29 | 354 | eoi_ioapic_irq(data->irq, irqd_cfg(data)); |
9b1b0e42 JR |
355 | } |
356 | ||
357 | static void ir_print_prefix(struct irq_data *data, struct seq_file *p) | |
358 | { | |
359 | seq_printf(p, " IR-%s", data->chip->name); | |
360 | } | |
361 | ||
362 | void irq_remap_modify_chip_defaults(struct irq_chip *chip) | |
363 | { | |
364 | chip->irq_print_chip = ir_print_prefix; | |
365 | chip->irq_ack = ir_ack_apic_edge; | |
366 | chip->irq_eoi = ir_ack_apic_level; | |
367 | chip->irq_set_affinity = x86_io_apic_ops.set_affinity; | |
368 | } | |
2976fd84 JR |
369 | |
370 | bool setup_remapped_irq(int irq, struct irq_cfg *cfg, struct irq_chip *chip) | |
371 | { | |
372 | if (!irq_remapped(cfg)) | |
373 | return false; | |
374 | irq_set_status_flags(irq, IRQ_MOVE_PCNTXT); | |
375 | irq_remap_modify_chip_defaults(chip); | |
376 | return true; | |
377 | } |