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4e0ee78f HD |
1 | /* |
2 | * OF helpers for IOMMU | |
3 | * | |
4 | * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms and conditions of the GNU General Public License, | |
8 | * version 2, as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope it will be useful, but WITHOUT | |
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | * more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License along with | |
16 | * this program; if not, write to the Free Software Foundation, Inc., | |
17 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
18 | */ | |
19 | ||
20 | #include <linux/export.h> | |
7eba1d51 | 21 | #include <linux/iommu.h> |
4e0ee78f HD |
22 | #include <linux/limits.h> |
23 | #include <linux/of.h> | |
cbff5634 | 24 | #include <linux/of_iommu.h> |
a42a7a1f | 25 | #include <linux/slab.h> |
4e0ee78f | 26 | |
1cd076bf WD |
27 | static const struct of_device_id __iommu_of_table_sentinel |
28 | __used __section(__iommu_of_table_end); | |
29 | ||
4e0ee78f HD |
30 | /** |
31 | * of_get_dma_window - Parse *dma-window property and returns 0 if found. | |
32 | * | |
33 | * @dn: device node | |
34 | * @prefix: prefix for property name if any | |
35 | * @index: index to start to parse | |
36 | * @busno: Returns busno if supported. Otherwise pass NULL | |
37 | * @addr: Returns address that DMA starts | |
38 | * @size: Returns the range that DMA can handle | |
39 | * | |
40 | * This supports different formats flexibly. "prefix" can be | |
41 | * configured if any. "busno" and "index" are optionally | |
42 | * specified. Set 0(or NULL) if not used. | |
43 | */ | |
44 | int of_get_dma_window(struct device_node *dn, const char *prefix, int index, | |
45 | unsigned long *busno, dma_addr_t *addr, size_t *size) | |
46 | { | |
47 | const __be32 *dma_window, *end; | |
48 | int bytes, cur_index = 0; | |
49 | char propname[NAME_MAX], addrname[NAME_MAX], sizename[NAME_MAX]; | |
50 | ||
51 | if (!dn || !addr || !size) | |
52 | return -EINVAL; | |
53 | ||
54 | if (!prefix) | |
55 | prefix = ""; | |
56 | ||
57 | snprintf(propname, sizeof(propname), "%sdma-window", prefix); | |
58 | snprintf(addrname, sizeof(addrname), "%s#dma-address-cells", prefix); | |
59 | snprintf(sizename, sizeof(sizename), "%s#dma-size-cells", prefix); | |
60 | ||
61 | dma_window = of_get_property(dn, propname, &bytes); | |
62 | if (!dma_window) | |
63 | return -ENODEV; | |
64 | end = dma_window + bytes / sizeof(*dma_window); | |
65 | ||
66 | while (dma_window < end) { | |
67 | u32 cells; | |
68 | const void *prop; | |
69 | ||
70 | /* busno is one cell if supported */ | |
71 | if (busno) | |
72 | *busno = be32_to_cpup(dma_window++); | |
73 | ||
74 | prop = of_get_property(dn, addrname, NULL); | |
75 | if (!prop) | |
76 | prop = of_get_property(dn, "#address-cells", NULL); | |
77 | ||
78 | cells = prop ? be32_to_cpup(prop) : of_n_addr_cells(dn); | |
79 | if (!cells) | |
80 | return -EINVAL; | |
81 | *addr = of_read_number(dma_window, cells); | |
82 | dma_window += cells; | |
83 | ||
84 | prop = of_get_property(dn, sizename, NULL); | |
85 | cells = prop ? be32_to_cpup(prop) : of_n_size_cells(dn); | |
86 | if (!cells) | |
87 | return -EINVAL; | |
88 | *size = of_read_number(dma_window, cells); | |
89 | dma_window += cells; | |
90 | ||
91 | if (cur_index++ == index) | |
92 | break; | |
93 | } | |
94 | return 0; | |
95 | } | |
96 | EXPORT_SYMBOL_GPL(of_get_dma_window); | |
1cd076bf | 97 | |
a42a7a1f RM |
98 | struct of_iommu_node { |
99 | struct list_head list; | |
100 | struct device_node *np; | |
53c92d79 | 101 | const struct iommu_ops *ops; |
a42a7a1f RM |
102 | }; |
103 | static LIST_HEAD(of_iommu_list); | |
104 | static DEFINE_SPINLOCK(of_iommu_lock); | |
105 | ||
53c92d79 | 106 | void of_iommu_set_ops(struct device_node *np, const struct iommu_ops *ops) |
a42a7a1f RM |
107 | { |
108 | struct of_iommu_node *iommu = kzalloc(sizeof(*iommu), GFP_KERNEL); | |
109 | ||
110 | if (WARN_ON(!iommu)) | |
111 | return; | |
112 | ||
45bb966d | 113 | of_node_get(np); |
a42a7a1f RM |
114 | INIT_LIST_HEAD(&iommu->list); |
115 | iommu->np = np; | |
116 | iommu->ops = ops; | |
117 | spin_lock(&of_iommu_lock); | |
118 | list_add_tail(&iommu->list, &of_iommu_list); | |
119 | spin_unlock(&of_iommu_lock); | |
120 | } | |
121 | ||
53c92d79 | 122 | const struct iommu_ops *of_iommu_get_ops(struct device_node *np) |
a42a7a1f RM |
123 | { |
124 | struct of_iommu_node *node; | |
53c92d79 | 125 | const struct iommu_ops *ops = NULL; |
a42a7a1f RM |
126 | |
127 | spin_lock(&of_iommu_lock); | |
128 | list_for_each_entry(node, &of_iommu_list, list) | |
129 | if (node->np == np) { | |
130 | ops = node->ops; | |
131 | break; | |
132 | } | |
133 | spin_unlock(&of_iommu_lock); | |
134 | return ops; | |
135 | } | |
136 | ||
53c92d79 RM |
137 | const struct iommu_ops *of_iommu_configure(struct device *dev, |
138 | struct device_node *master_np) | |
7eba1d51 WD |
139 | { |
140 | struct of_phandle_args iommu_spec; | |
141 | struct device_node *np; | |
53c92d79 | 142 | const struct iommu_ops *ops = NULL; |
7eba1d51 WD |
143 | int idx = 0; |
144 | ||
7b0ce727 RM |
145 | /* |
146 | * We can't do much for PCI devices without knowing how | |
147 | * device IDs are wired up from the PCI bus to the IOMMU. | |
148 | */ | |
149 | if (dev_is_pci(dev)) | |
ed748621 | 150 | return NULL; |
ed748621 | 151 | |
7eba1d51 WD |
152 | /* |
153 | * We don't currently walk up the tree looking for a parent IOMMU. | |
154 | * See the `Notes:' section of | |
155 | * Documentation/devicetree/bindings/iommu/iommu.txt | |
156 | */ | |
ed748621 | 157 | while (!of_parse_phandle_with_args(master_np, "iommus", |
7eba1d51 WD |
158 | "#iommu-cells", idx, |
159 | &iommu_spec)) { | |
160 | np = iommu_spec.np; | |
161 | ops = of_iommu_get_ops(np); | |
162 | ||
163 | if (!ops || !ops->of_xlate || ops->of_xlate(dev, &iommu_spec)) | |
164 | goto err_put_node; | |
165 | ||
166 | of_node_put(np); | |
167 | idx++; | |
168 | } | |
169 | ||
170 | return ops; | |
171 | ||
172 | err_put_node: | |
173 | of_node_put(np); | |
174 | return NULL; | |
175 | } | |
176 | ||
1cd076bf WD |
177 | void __init of_iommu_init(void) |
178 | { | |
179 | struct device_node *np; | |
180 | const struct of_device_id *match, *matches = &__iommu_of_table; | |
181 | ||
182 | for_each_matching_node_and_match(np, matches, &match) { | |
183 | const of_iommu_init_fn init_fn = match->data; | |
184 | ||
185 | if (init_fn(np)) | |
186 | pr_err("Failed to initialise IOMMU %s\n", | |
187 | of_node_full_name(np)); | |
188 | } | |
189 | } |