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irqchip: GICv3: Convert to domain hierarchy
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f6e916b8
TP
1config IRQCHIP
2 def_bool y
3 depends on OF_IRQ
4
81243e44
RH
5config ARM_GIC
6 bool
7 select IRQ_DOMAIN
8 select MULTI_IRQ_HANDLER
9
10config GIC_NON_BANKED
11 bool
12
021f6537
MZ
13config ARM_GIC_V3
14 bool
15 select IRQ_DOMAIN
16 select MULTI_IRQ_HANDLER
443acc4f 17 select IRQ_DOMAIN_HIERARCHY
021f6537 18
292ec080
UKK
19config ARM_NVIC
20 bool
21 select IRQ_DOMAIN
22 select GENERIC_IRQ_CHIP
23
44430ec0
RH
24config ARM_VIC
25 bool
26 select IRQ_DOMAIN
27 select MULTI_IRQ_HANDLER
28
29config ARM_VIC_NR
30 int
31 default 4 if ARCH_S5PV210
44430ec0
RH
32 default 2
33 depends on ARM_VIC
34 help
35 The maximum number of VICs available in the system, for
36 power management.
37
b1479ebb
BB
38config ATMEL_AIC_IRQ
39 bool
40 select GENERIC_IRQ_CHIP
41 select IRQ_DOMAIN
42 select MULTI_IRQ_HANDLER
43 select SPARSE_IRQ
44
45config ATMEL_AIC5_IRQ
46 bool
47 select GENERIC_IRQ_CHIP
48 select IRQ_DOMAIN
49 select MULTI_IRQ_HANDLER
50 select SPARSE_IRQ
51
7f646e92
FF
52config BRCMSTB_L2_IRQ
53 bool
54 depends on ARM
55 select GENERIC_IRQ_CHIP
56 select IRQ_DOMAIN
57
350d71b9
SH
58config DW_APB_ICTL
59 bool
60 select IRQ_DOMAIN
61
b6ef9161
JH
62config IMGPDC_IRQ
63 bool
64 select GENERIC_IRQ_CHIP
65 select IRQ_DOMAIN
66
afc98d90
AS
67config CLPS711X_IRQCHIP
68 bool
69 depends on ARCH_CLPS711X
70 select IRQ_DOMAIN
71 select MULTI_IRQ_HANDLER
72 select SPARSE_IRQ
73 default y
74
4db8e6d2
SK
75config OR1K_PIC
76 bool
77 select IRQ_DOMAIN
78
8598066c
FB
79config OMAP_IRQCHIP
80 bool
81 select GENERIC_IRQ_CHIP
82 select IRQ_DOMAIN
83
9dbd90f1
SH
84config ORION_IRQCHIP
85 bool
86 select IRQ_DOMAIN
87 select MULTI_IRQ_HANDLER
88
44358048
MD
89config RENESAS_INTC_IRQPIN
90 bool
91 select IRQ_DOMAIN
92
fbc83b7f
MD
93config RENESAS_IRQC
94 bool
95 select IRQ_DOMAIN
96
b06eb017
CR
97config TB10X_IRQC
98 bool
99 select IRQ_DOMAIN
100 select GENERIC_IRQ_CHIP
101
2389d501
LW
102config VERSATILE_FPGA_IRQ
103 bool
104 select IRQ_DOMAIN
105
106config VERSATILE_FPGA_IRQ_NR
107 int
108 default 4
109 depends on VERSATILE_FPGA_IRQ
26a8e96a
MF
110
111config XTENSA_MX
112 bool
113 select IRQ_DOMAIN
96ca848e
S
114
115config IRQ_CROSSBAR
116 bool
117 help
f54619f2 118 Support for a CROSSBAR ip that precedes the main interrupt controller.
96ca848e
S
119 The primary irqchip invokes the crossbar's callback which inturn allocates
120 a free irq and configures the IP. Thus the peripheral interrupts are
121 routed to one of the free irqchip interrupt lines.
89323f8c
GS
122
123config KEYSTONE_IRQ
124 tristate "Keystone 2 IRQ controller IP"
125 depends on ARCH_KEYSTONE
126 help
127 Support for Texas Instruments Keystone 2 IRQ controller IP which
128 is part of the Keystone 2 IPC mechanism