[mirror_ubuntu-bionic-kernel.git] / drivers / irqchip / Kconfig

config IRQCHIP
	def_bool y
	depends on OF_IRQ

config ARM_GIC
	bool
	select IRQ_DOMAIN
	select IRQ_DOMAIN_HIERARCHY
	select MULTI_IRQ_HANDLER

config ARM_GIC_V2M
	bool
	depends on ARM_GIC
	depends on PCI && PCI_MSI
	select PCI_MSI_IRQ_DOMAIN

config GIC_NON_BANKED
	bool

config ARM_GIC_V3
	bool
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER
	select IRQ_DOMAIN_HIERARCHY

config ARM_GIC_V3_ITS
	bool
	select PCI_MSI_IRQ_DOMAIN

config ARM_NVIC
	bool
	select IRQ_DOMAIN
	select IRQ_DOMAIN_HIERARCHY
	select GENERIC_IRQ_CHIP

config ARM_VIC
	bool
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER

config ARM_VIC_NR
	int
	default 4 if ARCH_S5PV210
	default 2
	depends on ARM_VIC
	help
	  The maximum number of VICs available in the system, for
	  power management.

config ATMEL_AIC_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER
	select SPARSE_IRQ

config ATMEL_AIC5_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER
	select SPARSE_IRQ

config I8259
	bool
	select IRQ_DOMAIN

config BCM7038_L1_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config BCM7120_L2_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config BRCMSTB_L2_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config DW_APB_ICTL
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config IMGPDC_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config IRQ_MIPS_CPU
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config CLPS711X_IRQCHIP
	bool
	depends on ARCH_CLPS711X
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER
	select SPARSE_IRQ
	default y

config OR1K_PIC
	bool
	select IRQ_DOMAIN

config OMAP_IRQCHIP
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config ORION_IRQCHIP
	bool
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER

config RENESAS_INTC_IRQPIN
	bool
	select IRQ_DOMAIN

config RENESAS_IRQC
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config ST_IRQCHIP
	bool
	select REGMAP
	select MFD_SYSCON
	help
	  Enables SysCfg Controlled IRQs on STi based platforms.

config TB10X_IRQC
	bool
	select IRQ_DOMAIN
	select GENERIC_IRQ_CHIP

config VERSATILE_FPGA_IRQ
	bool
	select IRQ_DOMAIN

config VERSATILE_FPGA_IRQ_NR
       int
       default 4
       depends on VERSATILE_FPGA_IRQ

config XTENSA_MX
	bool
	select IRQ_DOMAIN

config IRQ_CROSSBAR
	bool
	help
	  Support for a CROSSBAR ip that precedes the main interrupt controller.
	  The primary irqchip invokes the crossbar's callback which inturn allocates
	  a free irq and configures the IP. Thus the peripheral interrupts are
	  routed to one of the free irqchip interrupt lines.

config KEYSTONE_IRQ
	tristate "Keystone 2 IRQ controller IP"
	depends on ARCH_KEYSTONE
	help
		Support for Texas Instruments Keystone 2 IRQ controller IP which
		is part of the Keystone 2 IPC mechanism

config MIPS_GIC
	bool
	select MIPS_CM

config INGENIC_IRQ
	bool
	depends on MACH_INGENIC
	default y

config RENESAS_H8300H_INTC
        bool
	select IRQ_DOMAIN

config RENESAS_H8S_INTC
        bool
	select IRQ_DOMAIN

config IMX_GPCV2
	bool
	select IRQ_DOMAIN
	help
	  Enables the wakeup IRQs for IMX platforms with GPCv2 block
Commit	Line	Data
f6e916b8 TP	1	config IRQCHIP
	2	def_bool y
	3	depends on OF_IRQ
	4
81243e44 RH	5	config ARM_GIC
	6	bool
	7	select IRQ_DOMAIN
9a1091ef	8	select IRQ_DOMAIN_HIERARCHY
81243e44 RH	9	select MULTI_IRQ_HANDLER
81243e44 RH	10
853a33ce SS	11	config ARM_GIC_V2M
	12	bool
	13	depends on ARM_GIC
	14	depends on PCI && PCI_MSI
	15	select PCI_MSI_IRQ_DOMAIN
	16
81243e44 RH	17	config GIC_NON_BANKED
	18	bool
	19
021f6537 MZ	20	config ARM_GIC_V3
	21	bool
	22	select IRQ_DOMAIN
	23	select MULTI_IRQ_HANDLER
443acc4f	24	select IRQ_DOMAIN_HIERARCHY
021f6537	25
19812729 MZ	26	config ARM_GIC_V3_ITS
	27	bool
	28	select PCI_MSI_IRQ_DOMAIN
021f6537	29
292ec080 UKK	30	config ARM_NVIC
	31	bool
	32	select IRQ_DOMAIN
2d9f59f7	33	select IRQ_DOMAIN_HIERARCHY
292ec080 UKK	34	select GENERIC_IRQ_CHIP
292ec080 UKK	35
44430ec0 RH	36	config ARM_VIC
	37	bool
	38	select IRQ_DOMAIN
	39	select MULTI_IRQ_HANDLER
	40
	41	config ARM_VIC_NR
	42	int
	43	default 4 if ARCH_S5PV210
44430ec0 RH	44	default 2
	45	depends on ARM_VIC
	46	help
	47	The maximum number of VICs available in the system, for
	48	power management.
	49
b1479ebb BB	50	config ATMEL_AIC_IRQ
	51	bool
	52	select GENERIC_IRQ_CHIP
	53	select IRQ_DOMAIN
	54	select MULTI_IRQ_HANDLER
	55	select SPARSE_IRQ
	56
	57	config ATMEL_AIC5_IRQ
	58	bool
	59	select GENERIC_IRQ_CHIP
	60	select IRQ_DOMAIN
	61	select MULTI_IRQ_HANDLER
	62	select SPARSE_IRQ
	63
0509cfde RB	64	config I8259
	65	bool
	66	select IRQ_DOMAIN
	67
5f7f0317 KC	68	config BCM7038_L1_IRQ
	69	bool
	70	select GENERIC_IRQ_CHIP
	71	select IRQ_DOMAIN
	72
a4fcbb86 KC	73	config BCM7120_L2_IRQ
	74	bool
	75	select GENERIC_IRQ_CHIP
	76	select IRQ_DOMAIN
	77
7f646e92 FF	78	config BRCMSTB_L2_IRQ
7f646e92 FF	79	bool
7f646e92 FF	80	select GENERIC_IRQ_CHIP
	81	select IRQ_DOMAIN
	82
350d71b9 SH	83	config DW_APB_ICTL
350d71b9 SH	84	bool
e1588490	85	select GENERIC_IRQ_CHIP
350d71b9 SH	86	select IRQ_DOMAIN
350d71b9 SH	87
b6ef9161 JH	88	config IMGPDC_IRQ
	89	bool
	90	select GENERIC_IRQ_CHIP
	91	select IRQ_DOMAIN
	92
67e38cf2 RB	93	config IRQ_MIPS_CPU
	94	bool
	95	select GENERIC_IRQ_CHIP
	96	select IRQ_DOMAIN
	97
afc98d90 AS	98	config CLPS711X_IRQCHIP
	99	bool
	100	depends on ARCH_CLPS711X
	101	select IRQ_DOMAIN
	102	select MULTI_IRQ_HANDLER
	103	select SPARSE_IRQ
	104	default y
	105
4db8e6d2 SK	106	config OR1K_PIC
	107	bool
	108	select IRQ_DOMAIN
	109
8598066c FB	110	config OMAP_IRQCHIP
	111	bool
	112	select GENERIC_IRQ_CHIP
	113	select IRQ_DOMAIN
	114
9dbd90f1 SH	115	config ORION_IRQCHIP
	116	bool
	117	select IRQ_DOMAIN
	118	select MULTI_IRQ_HANDLER
	119
44358048 MD	120	config RENESAS_INTC_IRQPIN
	121	bool
	122	select IRQ_DOMAIN
	123
fbc83b7f MD	124	config RENESAS_IRQC
fbc83b7f MD	125	bool
99c221df	126	select GENERIC_IRQ_CHIP
fbc83b7f MD	127	select IRQ_DOMAIN
fbc83b7f MD	128
07088484 LJ	129	config ST_IRQCHIP
	130	bool
	131	select REGMAP
	132	select MFD_SYSCON
	133	help
	134	Enables SysCfg Controlled IRQs on STi based platforms.
	135
b06eb017 CR	136	config TB10X_IRQC
	137	bool
	138	select IRQ_DOMAIN
	139	select GENERIC_IRQ_CHIP
	140
2389d501 LW	141	config VERSATILE_FPGA_IRQ
	142	bool
	143	select IRQ_DOMAIN
	144
	145	config VERSATILE_FPGA_IRQ_NR
	146	int
	147	default 4
	148	depends on VERSATILE_FPGA_IRQ
26a8e96a MF	149
	150	config XTENSA_MX
	151	bool
	152	select IRQ_DOMAIN
96ca848e S	153
	154	config IRQ_CROSSBAR
	155	bool
	156	help
f54619f2	157	Support for a CROSSBAR ip that precedes the main interrupt controller.
96ca848e S	158	The primary irqchip invokes the crossbar's callback which inturn allocates
	159	a free irq and configures the IP. Thus the peripheral interrupts are
	160	routed to one of the free irqchip interrupt lines.
89323f8c GS	161
	162	config KEYSTONE_IRQ
	163	tristate "Keystone 2 IRQ controller IP"
	164	depends on ARCH_KEYSTONE
	165	help
	166	Support for Texas Instruments Keystone 2 IRQ controller IP which
	167	is part of the Keystone 2 IPC mechanism
8a19b8f1 AB	168
	169	config MIPS_GIC
	170	bool
	171	select MIPS_CM
8a764482	172
44e08e70 PB	173	config INGENIC_IRQ
	174	bool
	175	depends on MACH_INGENIC
	176	default y
78c10e55	177
8a764482 YS	178	config RENESAS_H8300H_INTC
	179	bool
	180	select IRQ_DOMAIN
	181
	182	config RENESAS_H8S_INTC
	183	bool
78c10e55	184	select IRQ_DOMAIN
e324c4dc SW	185
	186	config IMX_GPCV2
	187	bool
	188	select IRQ_DOMAIN
	189	help
	190	Enables the wakeup IRQs for IMX platforms with GPCv2 block