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Commit | Line | Data |
---|---|---|
f6e916b8 TP |
1 | config IRQCHIP |
2 | def_bool y | |
3 | depends on OF_IRQ | |
4 | ||
81243e44 RH |
5 | config ARM_GIC |
6 | bool | |
7 | select IRQ_DOMAIN | |
9a1091ef | 8 | select IRQ_DOMAIN_HIERARCHY |
81243e44 RH |
9 | select MULTI_IRQ_HANDLER |
10 | ||
853a33ce SS |
11 | config ARM_GIC_V2M |
12 | bool | |
13 | depends on ARM_GIC | |
14 | depends on PCI && PCI_MSI | |
15 | select PCI_MSI_IRQ_DOMAIN | |
16 | ||
81243e44 RH |
17 | config GIC_NON_BANKED |
18 | bool | |
19 | ||
021f6537 MZ |
20 | config ARM_GIC_V3 |
21 | bool | |
22 | select IRQ_DOMAIN | |
23 | select MULTI_IRQ_HANDLER | |
443acc4f | 24 | select IRQ_DOMAIN_HIERARCHY |
021f6537 | 25 | |
19812729 MZ |
26 | config ARM_GIC_V3_ITS |
27 | bool | |
28 | select PCI_MSI_IRQ_DOMAIN | |
021f6537 | 29 | |
292ec080 UKK |
30 | config ARM_NVIC |
31 | bool | |
32 | select IRQ_DOMAIN | |
2d9f59f7 | 33 | select IRQ_DOMAIN_HIERARCHY |
292ec080 UKK |
34 | select GENERIC_IRQ_CHIP |
35 | ||
44430ec0 RH |
36 | config ARM_VIC |
37 | bool | |
38 | select IRQ_DOMAIN | |
39 | select MULTI_IRQ_HANDLER | |
40 | ||
41 | config ARM_VIC_NR | |
42 | int | |
43 | default 4 if ARCH_S5PV210 | |
44430ec0 RH |
44 | default 2 |
45 | depends on ARM_VIC | |
46 | help | |
47 | The maximum number of VICs available in the system, for | |
48 | power management. | |
49 | ||
b1479ebb BB |
50 | config ATMEL_AIC_IRQ |
51 | bool | |
52 | select GENERIC_IRQ_CHIP | |
53 | select IRQ_DOMAIN | |
54 | select MULTI_IRQ_HANDLER | |
55 | select SPARSE_IRQ | |
56 | ||
57 | config ATMEL_AIC5_IRQ | |
58 | bool | |
59 | select GENERIC_IRQ_CHIP | |
60 | select IRQ_DOMAIN | |
61 | select MULTI_IRQ_HANDLER | |
62 | select SPARSE_IRQ | |
63 | ||
5f7f0317 KC |
64 | config BCM7038_L1_IRQ |
65 | bool | |
66 | select GENERIC_IRQ_CHIP | |
67 | select IRQ_DOMAIN | |
68 | ||
a4fcbb86 KC |
69 | config BCM7120_L2_IRQ |
70 | bool | |
71 | select GENERIC_IRQ_CHIP | |
72 | select IRQ_DOMAIN | |
73 | ||
7f646e92 FF |
74 | config BRCMSTB_L2_IRQ |
75 | bool | |
7f646e92 FF |
76 | select GENERIC_IRQ_CHIP |
77 | select IRQ_DOMAIN | |
78 | ||
350d71b9 SH |
79 | config DW_APB_ICTL |
80 | bool | |
e1588490 | 81 | select GENERIC_IRQ_CHIP |
350d71b9 SH |
82 | select IRQ_DOMAIN |
83 | ||
b6ef9161 JH |
84 | config IMGPDC_IRQ |
85 | bool | |
86 | select GENERIC_IRQ_CHIP | |
87 | select IRQ_DOMAIN | |
88 | ||
afc98d90 AS |
89 | config CLPS711X_IRQCHIP |
90 | bool | |
91 | depends on ARCH_CLPS711X | |
92 | select IRQ_DOMAIN | |
93 | select MULTI_IRQ_HANDLER | |
94 | select SPARSE_IRQ | |
95 | default y | |
96 | ||
4db8e6d2 SK |
97 | config OR1K_PIC |
98 | bool | |
99 | select IRQ_DOMAIN | |
100 | ||
8598066c FB |
101 | config OMAP_IRQCHIP |
102 | bool | |
103 | select GENERIC_IRQ_CHIP | |
104 | select IRQ_DOMAIN | |
105 | ||
9dbd90f1 SH |
106 | config ORION_IRQCHIP |
107 | bool | |
108 | select IRQ_DOMAIN | |
109 | select MULTI_IRQ_HANDLER | |
110 | ||
44358048 MD |
111 | config RENESAS_INTC_IRQPIN |
112 | bool | |
113 | select IRQ_DOMAIN | |
114 | ||
fbc83b7f MD |
115 | config RENESAS_IRQC |
116 | bool | |
117 | select IRQ_DOMAIN | |
118 | ||
07088484 LJ |
119 | config ST_IRQCHIP |
120 | bool | |
121 | select REGMAP | |
122 | select MFD_SYSCON | |
123 | help | |
124 | Enables SysCfg Controlled IRQs on STi based platforms. | |
125 | ||
b06eb017 CR |
126 | config TB10X_IRQC |
127 | bool | |
128 | select IRQ_DOMAIN | |
129 | select GENERIC_IRQ_CHIP | |
130 | ||
2389d501 LW |
131 | config VERSATILE_FPGA_IRQ |
132 | bool | |
133 | select IRQ_DOMAIN | |
134 | ||
135 | config VERSATILE_FPGA_IRQ_NR | |
136 | int | |
137 | default 4 | |
138 | depends on VERSATILE_FPGA_IRQ | |
26a8e96a MF |
139 | |
140 | config XTENSA_MX | |
141 | bool | |
142 | select IRQ_DOMAIN | |
96ca848e S |
143 | |
144 | config IRQ_CROSSBAR | |
145 | bool | |
146 | help | |
f54619f2 | 147 | Support for a CROSSBAR ip that precedes the main interrupt controller. |
96ca848e S |
148 | The primary irqchip invokes the crossbar's callback which inturn allocates |
149 | a free irq and configures the IP. Thus the peripheral interrupts are | |
150 | routed to one of the free irqchip interrupt lines. | |
89323f8c GS |
151 | |
152 | config KEYSTONE_IRQ | |
153 | tristate "Keystone 2 IRQ controller IP" | |
154 | depends on ARCH_KEYSTONE | |
155 | help | |
156 | Support for Texas Instruments Keystone 2 IRQ controller IP which | |
157 | is part of the Keystone 2 IPC mechanism | |
8a19b8f1 AB |
158 | |
159 | config MIPS_GIC | |
160 | bool | |
161 | select MIPS_CM |