[mirror_ubuntu-hirsute-kernel.git] / drivers / irqchip / irq-imx-irqsteer.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright 2017 NXP
 * Copyright (C) 2018 Pengutronix, Lucas Stach <kernel@pengutronix.de>
 */

#include <linux/clk.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/irqchip/chained_irq.h>
#include <linux/irqdomain.h>
#include <linux/kernel.h>
#include <linux/of_platform.h>
#include <linux/spinlock.h>

#define CTRL_STRIDE_OFF(_t, _r)	(_t * 4 * _r)
#define CHANCTRL		0x0
#define CHANMASK(n, t)		(CTRL_STRIDE_OFF(t, 0) + 0x4 * (n) + 0x4)
#define CHANSET(n, t)		(CTRL_STRIDE_OFF(t, 1) + 0x4 * (n) + 0x4)
#define CHANSTATUS(n, t)	(CTRL_STRIDE_OFF(t, 2) + 0x4 * (n) + 0x4)
#define CHAN_MINTDIS(t)		(CTRL_STRIDE_OFF(t, 3) + 0x4)
#define CHAN_MASTRSTAT(t)	(CTRL_STRIDE_OFF(t, 3) + 0x8)

struct irqsteer_data {
	void __iomem		*regs;
	struct clk		*ipg_clk;
	int			irq;
	raw_spinlock_t		lock;
	int			reg_num;
	int			channel;
	struct irq_domain	*domain;
	u32			*saved_reg;
};

static int imx_irqsteer_get_reg_index(struct irqsteer_data *data,
				      unsigned long irqnum)
{
	return (data->reg_num - irqnum / 32 - 1);
}

static void imx_irqsteer_irq_unmask(struct irq_data *d)
{
	struct irqsteer_data *data = d->chip_data;
	int idx = imx_irqsteer_get_reg_index(data, d->hwirq);
	unsigned long flags;
	u32 val;

	raw_spin_lock_irqsave(&data->lock, flags);
	val = readl_relaxed(data->regs + CHANMASK(idx, data->reg_num));
	val |= BIT(d->hwirq % 32);
	writel_relaxed(val, data->regs + CHANMASK(idx, data->reg_num));
	raw_spin_unlock_irqrestore(&data->lock, flags);
}

static void imx_irqsteer_irq_mask(struct irq_data *d)
{
	struct irqsteer_data *data = d->chip_data;
	int idx = imx_irqsteer_get_reg_index(data, d->hwirq);
	unsigned long flags;
	u32 val;

	raw_spin_lock_irqsave(&data->lock, flags);
	val = readl_relaxed(data->regs + CHANMASK(idx, data->reg_num));
	val &= ~BIT(d->hwirq % 32);
	writel_relaxed(val, data->regs + CHANMASK(idx, data->reg_num));
	raw_spin_unlock_irqrestore(&data->lock, flags);
}

static struct irq_chip imx_irqsteer_irq_chip = {
	.name		= "irqsteer",
	.irq_mask	= imx_irqsteer_irq_mask,
	.irq_unmask	= imx_irqsteer_irq_unmask,
};

static int imx_irqsteer_irq_map(struct irq_domain *h, unsigned int irq,
				irq_hw_number_t hwirq)
{
	irq_set_status_flags(irq, IRQ_LEVEL);
	irq_set_chip_data(irq, h->host_data);
	irq_set_chip_and_handler(irq, &imx_irqsteer_irq_chip, handle_level_irq);

	return 0;
}

static const struct irq_domain_ops imx_irqsteer_domain_ops = {
	.map		= imx_irqsteer_irq_map,
	.xlate		= irq_domain_xlate_onecell,
};

static void imx_irqsteer_irq_handler(struct irq_desc *desc)
{
	struct irqsteer_data *data = irq_desc_get_handler_data(desc);
	int i;

	chained_irq_enter(irq_desc_get_chip(desc), desc);

	for (i = 0; i < data->reg_num * 32; i += 32) {
		int idx = imx_irqsteer_get_reg_index(data, i);
		unsigned long irqmap;
		int pos, virq;

		irqmap = readl_relaxed(data->regs +
				       CHANSTATUS(idx, data->reg_num));

		for_each_set_bit(pos, &irqmap, 32) {
			virq = irq_find_mapping(data->domain, pos + i);
			if (virq)
				generic_handle_irq(virq);
		}
	}

	chained_irq_exit(irq_desc_get_chip(desc), desc);
}

static int imx_irqsteer_probe(struct platform_device *pdev)
{
	struct device_node *np = pdev->dev.of_node;
	struct irqsteer_data *data;
	struct resource *res;
	int ret;

	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
	if (!data)
		return -ENOMEM;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	data->regs = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(data->regs)) {
		dev_err(&pdev->dev, "failed to initialize reg\n");
		return PTR_ERR(data->regs);
	}

	data->irq = platform_get_irq(pdev, 0);
	if (data->irq <= 0) {
		dev_err(&pdev->dev, "failed to get irq\n");
		return -ENODEV;
	}

	data->ipg_clk = devm_clk_get(&pdev->dev, "ipg");
	if (IS_ERR(data->ipg_clk)) {
		ret = PTR_ERR(data->ipg_clk);
		if (ret != -EPROBE_DEFER)
			dev_err(&pdev->dev, "failed to get ipg clk: %d\n", ret);
		return ret;
	}

	raw_spin_lock_init(&data->lock);

	of_property_read_u32(np, "fsl,num-irqs", &data->reg_num);
	of_property_read_u32(np, "fsl,channel", &data->channel);

	/* one register bit map represents 32 input interrupts */
	data->reg_num /= 32;

	if (IS_ENABLED(CONFIG_PM_SLEEP)) {
		data->saved_reg = devm_kzalloc(&pdev->dev,
					sizeof(u32) * data->reg_num,
					GFP_KERNEL);
		if (!data->saved_reg)
			return -ENOMEM;
	}

	ret = clk_prepare_enable(data->ipg_clk);
	if (ret) {
		dev_err(&pdev->dev, "failed to enable ipg clk: %d\n", ret);
		return ret;
	}

	/* steer all IRQs into configured channel */
	writel_relaxed(BIT(data->channel), data->regs + CHANCTRL);

	data->domain = irq_domain_add_linear(np, data->reg_num * 32,
					     &imx_irqsteer_domain_ops, data);
	if (!data->domain) {
		dev_err(&pdev->dev, "failed to create IRQ domain\n");
		clk_disable_unprepare(data->ipg_clk);
		return -ENOMEM;
	}

	irq_set_chained_handler_and_data(data->irq, imx_irqsteer_irq_handler,
					 data);

	platform_set_drvdata(pdev, data);

	return 0;
}

static int imx_irqsteer_remove(struct platform_device *pdev)
{
	struct irqsteer_data *irqsteer_data = platform_get_drvdata(pdev);

	irq_set_chained_handler_and_data(irqsteer_data->irq, NULL, NULL);
	irq_domain_remove(irqsteer_data->domain);

	clk_disable_unprepare(irqsteer_data->ipg_clk);

	return 0;
}

#ifdef CONFIG_PM_SLEEP
static void imx_irqsteer_save_regs(struct irqsteer_data *data)
{
	int i;

	for (i = 0; i < data->reg_num; i++)
		data->saved_reg[i] = readl_relaxed(data->regs +
						CHANMASK(i, data->reg_num));
}

static void imx_irqsteer_restore_regs(struct irqsteer_data *data)
{
	int i;

	writel_relaxed(BIT(data->channel), data->regs + CHANCTRL);
	for (i = 0; i < data->reg_num; i++)
		writel_relaxed(data->saved_reg[i],
			       data->regs + CHANMASK(i, data->reg_num));
}

static int imx_irqsteer_suspend(struct device *dev)
{
	struct irqsteer_data *irqsteer_data = dev_get_drvdata(dev);

	imx_irqsteer_save_regs(irqsteer_data);
	clk_disable_unprepare(irqsteer_data->ipg_clk);

	return 0;
}

static int imx_irqsteer_resume(struct device *dev)
{
	struct irqsteer_data *irqsteer_data = dev_get_drvdata(dev);
	int ret;

	ret = clk_prepare_enable(irqsteer_data->ipg_clk);
	if (ret) {
		dev_err(dev, "failed to enable ipg clk: %d\n", ret);
		return ret;
	}
	imx_irqsteer_restore_regs(irqsteer_data);

	return 0;
}
#endif

static const struct dev_pm_ops imx_irqsteer_pm_ops = {
	SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(imx_irqsteer_suspend, imx_irqsteer_resume)
};

static const struct of_device_id imx_irqsteer_dt_ids[] = {
	{ .compatible = "fsl,imx-irqsteer", },
	{},
};

static struct platform_driver imx_irqsteer_driver = {
	.driver = {
		.name = "imx-irqsteer",
		.of_match_table = imx_irqsteer_dt_ids,
		.pm = &imx_irqsteer_pm_ops,
	},
	.probe = imx_irqsteer_probe,
	.remove = imx_irqsteer_remove,
};
builtin_platform_driver(imx_irqsteer_driver);
Commit	Line	Data
0136afa0 LS	1	// SPDX-License-Identifier: GPL-2.0+
	2	/*
	3	* Copyright 2017 NXP
	4	* Copyright (C) 2018 Pengutronix, Lucas Stach <kernel@pengutronix.de>
	5	*/
	6
	7	#include <linux/clk.h>
	8	#include <linux/interrupt.h>
	9	#include <linux/irq.h>
	10	#include <linux/irqchip/chained_irq.h>
	11	#include <linux/irqdomain.h>
	12	#include <linux/kernel.h>
	13	#include <linux/of_platform.h>
	14	#include <linux/spinlock.h>
	15
deb904e4	16	#define CTRL_STRIDE_OFF(_t, _r) (_t * 4 * _r)
0136afa0 LS	17	#define CHANCTRL 0x0
	18	#define CHANMASK(n, t) (CTRL_STRIDE_OFF(t, 0) + 0x4 * (n) + 0x4)
	19	#define CHANSET(n, t) (CTRL_STRIDE_OFF(t, 1) + 0x4 * (n) + 0x4)
	20	#define CHANSTATUS(n, t) (CTRL_STRIDE_OFF(t, 2) + 0x4 * (n) + 0x4)
	21	#define CHAN_MINTDIS(t) (CTRL_STRIDE_OFF(t, 3) + 0x4)
	22	#define CHAN_MASTRSTAT(t) (CTRL_STRIDE_OFF(t, 3) + 0x8)
	23
	24	struct irqsteer_data {
	25	void __iomem *regs;
	26	struct clk *ipg_clk;
	27	int irq;
	28	raw_spinlock_t lock;
deb904e4	29	int reg_num;
0136afa0 LS	30	int channel;
	31	struct irq_domain *domain;
	32	u32 *saved_reg;
	33	};
	34
	35	static int imx_irqsteer_get_reg_index(struct irqsteer_data *data,
	36	unsigned long irqnum)
	37	{
deb904e4	38	return (data->reg_num - irqnum / 32 - 1);
0136afa0 LS	39	}
	40
	41	static void imx_irqsteer_irq_unmask(struct irq_data *d)
	42	{
	43	struct irqsteer_data *data = d->chip_data;
	44	int idx = imx_irqsteer_get_reg_index(data, d->hwirq);
	45	unsigned long flags;
	46	u32 val;
	47
	48	raw_spin_lock_irqsave(&data->lock, flags);
deb904e4	49	val = readl_relaxed(data->regs + CHANMASK(idx, data->reg_num));
0136afa0	50	val \|= BIT(d->hwirq % 32);
deb904e4	51	writel_relaxed(val, data->regs + CHANMASK(idx, data->reg_num));
0136afa0 LS	52	raw_spin_unlock_irqrestore(&data->lock, flags);
	53	}
	54
	55	static void imx_irqsteer_irq_mask(struct irq_data *d)
	56	{
	57	struct irqsteer_data *data = d->chip_data;
	58	int idx = imx_irqsteer_get_reg_index(data, d->hwirq);
	59	unsigned long flags;
	60	u32 val;
	61
	62	raw_spin_lock_irqsave(&data->lock, flags);
deb904e4	63	val = readl_relaxed(data->regs + CHANMASK(idx, data->reg_num));
0136afa0	64	val &= ~BIT(d->hwirq % 32);
deb904e4	65	writel_relaxed(val, data->regs + CHANMASK(idx, data->reg_num));
0136afa0 LS	66	raw_spin_unlock_irqrestore(&data->lock, flags);
	67	}
	68
	69	static struct irq_chip imx_irqsteer_irq_chip = {
	70	.name = "irqsteer",
	71	.irq_mask = imx_irqsteer_irq_mask,
	72	.irq_unmask = imx_irqsteer_irq_unmask,
	73	};
	74
	75	static int imx_irqsteer_irq_map(struct irq_domain *h, unsigned int irq,
	76	irq_hw_number_t hwirq)
	77	{
	78	irq_set_status_flags(irq, IRQ_LEVEL);
	79	irq_set_chip_data(irq, h->host_data);
	80	irq_set_chip_and_handler(irq, &imx_irqsteer_irq_chip, handle_level_irq);
	81
	82	return 0;
	83	}
	84
	85	static const struct irq_domain_ops imx_irqsteer_domain_ops = {
	86	.map = imx_irqsteer_irq_map,
	87	.xlate = irq_domain_xlate_onecell,
	88	};
	89
	90	static void imx_irqsteer_irq_handler(struct irq_desc *desc)
	91	{
	92	struct irqsteer_data *data = irq_desc_get_handler_data(desc);
	93	int i;
	94
	95	chained_irq_enter(irq_desc_get_chip(desc), desc);
	96
deb904e4	97	for (i = 0; i < data->reg_num * 32; i += 32) {
0136afa0 LS	98	int idx = imx_irqsteer_get_reg_index(data, i);
	99	unsigned long irqmap;
	100	int pos, virq;
	101
	102	irqmap = readl_relaxed(data->regs +
deb904e4	103	CHANSTATUS(idx, data->reg_num));
0136afa0 LS	104
	105	for_each_set_bit(pos, &irqmap, 32) {
	106	virq = irq_find_mapping(data->domain, pos + i);
	107	if (virq)
	108	generic_handle_irq(virq);
	109	}
	110	}
	111
	112	chained_irq_exit(irq_desc_get_chip(desc), desc);
	113	}
	114
	115	static int imx_irqsteer_probe(struct platform_device *pdev)
	116	{
	117	struct device_node *np = pdev->dev.of_node;
	118	struct irqsteer_data *data;
	119	struct resource *res;
	120	int ret;
	121
	122	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
	123	if (!data)
	124	return -ENOMEM;
	125
	126	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	127	data->regs = devm_ioremap_resource(&pdev->dev, res);
	128	if (IS_ERR(data->regs)) {
	129	dev_err(&pdev->dev, "failed to initialize reg\n");
	130	return PTR_ERR(data->regs);
	131	}
	132
	133	data->irq = platform_get_irq(pdev, 0);
	134	if (data->irq <= 0) {
	135	dev_err(&pdev->dev, "failed to get irq\n");
	136	return -ENODEV;
	137	}
	138
	139	data->ipg_clk = devm_clk_get(&pdev->dev, "ipg");
	140	if (IS_ERR(data->ipg_clk)) {
	141	ret = PTR_ERR(data->ipg_clk);
	142	if (ret != -EPROBE_DEFER)
	143	dev_err(&pdev->dev, "failed to get ipg clk: %d\n", ret);
	144	return ret;
	145	}
	146
	147	raw_spin_lock_init(&data->lock);
	148
deb904e4	149	of_property_read_u32(np, "fsl,num-irqs", &data->reg_num);
0136afa0 LS	150	of_property_read_u32(np, "fsl,channel", &data->channel);
0136afa0 LS	151
deb904e4 AD	152	/* one register bit map represents 32 input interrupts */
	153	data->reg_num /= 32;
	154
0136afa0 LS	155	if (IS_ENABLED(CONFIG_PM_SLEEP)) {
0136afa0 LS	156	data->saved_reg = devm_kzalloc(&pdev->dev,
deb904e4	157	sizeof(u32) * data->reg_num,
0136afa0 LS	158	GFP_KERNEL);
	159	if (!data->saved_reg)
	160	return -ENOMEM;
	161	}
	162
	163	ret = clk_prepare_enable(data->ipg_clk);
	164	if (ret) {
	165	dev_err(&pdev->dev, "failed to enable ipg clk: %d\n", ret);
	166	return ret;
	167	}
	168
	169	/* steer all IRQs into configured channel */
	170	writel_relaxed(BIT(data->channel), data->regs + CHANCTRL);
	171
deb904e4	172	data->domain = irq_domain_add_linear(np, data->reg_num * 32,
0136afa0 LS	173	&imx_irqsteer_domain_ops, data);
	174	if (!data->domain) {
	175	dev_err(&pdev->dev, "failed to create IRQ domain\n");
	176	clk_disable_unprepare(data->ipg_clk);
	177	return -ENOMEM;
	178	}
	179
	180	irq_set_chained_handler_and_data(data->irq, imx_irqsteer_irq_handler,
	181	data);
	182
	183	platform_set_drvdata(pdev, data);
	184
	185	return 0;
	186	}
	187
	188	static int imx_irqsteer_remove(struct platform_device *pdev)
	189	{
	190	struct irqsteer_data *irqsteer_data = platform_get_drvdata(pdev);
	191
	192	irq_set_chained_handler_and_data(irqsteer_data->irq, NULL, NULL);
	193	irq_domain_remove(irqsteer_data->domain);
	194
	195	clk_disable_unprepare(irqsteer_data->ipg_clk);
	196
	197	return 0;
	198	}
	199
	200	#ifdef CONFIG_PM_SLEEP
	201	static void imx_irqsteer_save_regs(struct irqsteer_data *data)
	202	{
	203	int i;
	204
deb904e4	205	for (i = 0; i < data->reg_num; i++)
0136afa0	206	data->saved_reg[i] = readl_relaxed(data->regs +
deb904e4	207	CHANMASK(i, data->reg_num));
0136afa0 LS	208	}
	209
	210	static void imx_irqsteer_restore_regs(struct irqsteer_data *data)
	211	{
	212	int i;
	213
	214	writel_relaxed(BIT(data->channel), data->regs + CHANCTRL);
deb904e4	215	for (i = 0; i < data->reg_num; i++)
0136afa0	216	writel_relaxed(data->saved_reg[i],
deb904e4	217	data->regs + CHANMASK(i, data->reg_num));
0136afa0 LS	218	}
	219
	220	static int imx_irqsteer_suspend(struct device *dev)
	221	{
	222	struct irqsteer_data *irqsteer_data = dev_get_drvdata(dev);
	223
	224	imx_irqsteer_save_regs(irqsteer_data);
	225	clk_disable_unprepare(irqsteer_data->ipg_clk);
	226
	227	return 0;
	228	}
	229
	230	static int imx_irqsteer_resume(struct device *dev)
	231	{
	232	struct irqsteer_data *irqsteer_data = dev_get_drvdata(dev);
	233	int ret;
	234
	235	ret = clk_prepare_enable(irqsteer_data->ipg_clk);
	236	if (ret) {
	237	dev_err(dev, "failed to enable ipg clk: %d\n", ret);
	238	return ret;
	239	}
	240	imx_irqsteer_restore_regs(irqsteer_data);
	241
	242	return 0;
	243	}
	244	#endif
	245
	246	static const struct dev_pm_ops imx_irqsteer_pm_ops = {
	247	SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(imx_irqsteer_suspend, imx_irqsteer_resume)
	248	};
	249
	250	static const struct of_device_id imx_irqsteer_dt_ids[] = {
	251	{ .compatible = "fsl,imx-irqsteer", },
	252	{},
	253	};
	254
	255	static struct platform_driver imx_irqsteer_driver = {
	256	.driver = {
	257	.name = "imx-irqsteer",
	258	.of_match_table = imx_irqsteer_dt_ids,
	259	.pm = &imx_irqsteer_pm_ops,
	260	},
	261	.probe = imx_irqsteer_probe,
	262	.remove = imx_irqsteer_remove,
	263	};
	264	builtin_platform_driver(imx_irqsteer_driver);