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8a764482 YS |
1 | /* |
2 | * H8S interrupt contoller driver | |
3 | * | |
4 | * Copyright 2015 Yoshinori Sato <ysato@users.sourceforge.jp> | |
5 | */ | |
6 | ||
7 | #include <linux/irq.h> | |
8 | #include <linux/of_address.h> | |
9 | #include <linux/of_irq.h> | |
10 | #include <asm/io.h> | |
11 | #include "irqchip.h" | |
12 | ||
13 | static void *intc_baseaddr; | |
14 | #define IPRA ((unsigned long)intc_baseaddr) | |
15 | ||
16 | static const unsigned char ipr_table[] = { | |
17 | 0x03, 0x02, 0x01, 0x00, 0x13, 0x12, 0x11, 0x10, /* 16 - 23 */ | |
18 | 0x23, 0x22, 0x21, 0x20, 0x33, 0x32, 0x31, 0x30, /* 24 - 31 */ | |
19 | 0x43, 0x42, 0x41, 0x40, 0x53, 0x53, 0x52, 0x52, /* 32 - 39 */ | |
20 | 0x51, 0x51, 0x51, 0x51, 0x51, 0x51, 0x51, 0x51, /* 40 - 47 */ | |
21 | 0x50, 0x50, 0x50, 0x50, 0x63, 0x63, 0x63, 0x63, /* 48 - 55 */ | |
22 | 0x62, 0x62, 0x62, 0x62, 0x62, 0x62, 0x62, 0x62, /* 56 - 63 */ | |
23 | 0x61, 0x61, 0x61, 0x61, 0x60, 0x60, 0x60, 0x60, /* 64 - 71 */ | |
24 | 0x73, 0x73, 0x73, 0x73, 0x72, 0x72, 0x72, 0x72, /* 72 - 79 */ | |
25 | 0x71, 0x71, 0x71, 0x71, 0x70, 0x83, 0x82, 0x81, /* 80 - 87 */ | |
26 | 0x80, 0x80, 0x80, 0x80, 0x93, 0x93, 0x93, 0x93, /* 88 - 95 */ | |
27 | 0x92, 0x92, 0x92, 0x92, 0x91, 0x91, 0x91, 0x91, /* 96 - 103 */ | |
28 | 0x90, 0x90, 0x90, 0x90, 0xa3, 0xa3, 0xa3, 0xa3, /* 104 - 111 */ | |
29 | 0xa2, 0xa2, 0xa2, 0xa2, 0xa1, 0xa1, 0xa1, 0xa1, /* 112 - 119 */ | |
30 | 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, /* 120 - 127 */ | |
31 | }; | |
32 | ||
33 | static void h8s_disable_irq(struct irq_data *data) | |
34 | { | |
35 | int pos; | |
36 | unsigned int addr; | |
37 | unsigned short pri; | |
38 | int irq = data->irq; | |
39 | ||
40 | addr = IPRA + ((ipr_table[irq - 16] & 0xf0) >> 3); | |
41 | pos = (ipr_table[irq - 16] & 0x0f) * 4; | |
42 | pri = ~(0x000f << pos); | |
43 | pri &= ctrl_inw(addr); | |
44 | ctrl_outw(pri, addr); | |
45 | } | |
46 | ||
47 | static void h8s_enable_irq(struct irq_data *data) | |
48 | { | |
49 | int pos; | |
50 | unsigned int addr; | |
51 | unsigned short pri; | |
52 | int irq = data->irq; | |
53 | ||
54 | addr = IPRA + ((ipr_table[irq - 16] & 0xf0) >> 3); | |
55 | pos = (ipr_table[irq - 16] & 0x0f) * 4; | |
56 | pri = ~(0x000f << pos); | |
57 | pri &= ctrl_inw(addr); | |
58 | pri |= 1 << pos; | |
59 | ctrl_outw(pri, addr); | |
60 | } | |
61 | ||
62 | struct irq_chip h8s_irq_chip = { | |
63 | .name = "H8S-INTC", | |
64 | .irq_enable = h8s_enable_irq, | |
65 | .irq_disable = h8s_disable_irq, | |
66 | }; | |
67 | ||
68 | static __init int irq_map(struct irq_domain *h, unsigned int virq, | |
69 | irq_hw_number_t hw_irq_num) | |
70 | { | |
71 | irq_set_chip_and_handler(virq, &h8s_irq_chip, handle_simple_irq); | |
72 | ||
73 | return 0; | |
74 | } | |
75 | ||
76 | static struct irq_domain_ops irq_ops = { | |
77 | .map = irq_map, | |
78 | .xlate = irq_domain_xlate_onecell, | |
79 | }; | |
80 | ||
81 | static int __init h8s_intc_of_init(struct device_node *intc, | |
82 | struct device_node *parent) | |
83 | { | |
84 | struct irq_domain *domain; | |
85 | int n; | |
86 | ||
87 | intc_baseaddr = of_iomap(intc, 0); | |
88 | BUG_ON(!intc_baseaddr); | |
89 | ||
90 | /* All interrupt priority is 0 (disable) */ | |
91 | /* IPRA to IPRK */ | |
92 | for (n = 0; n <= 'k' - 'a'; n++) | |
93 | ctrl_outw(0x0000, IPRA + (n * 2)); | |
94 | ||
95 | domain = irq_domain_add_linear(intc, NR_IRQS, &irq_ops, NULL); | |
96 | BUG_ON(!domain); | |
97 | irq_set_default_host(domain); | |
98 | return 0; | |
99 | } | |
100 | ||
101 | IRQCHIP_DECLARE(h8s_intc, "renesas,h8s-intc", h8s_intc_of_init); |