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1da177e4 LT |
1 | /* $Id: bkm_a4t.c,v 1.22.2.4 2004/01/14 16:04:48 keil Exp $ |
2 | * | |
3 | * low level stuff for T-Berkom A4T | |
4 | * | |
5 | * Author Roland Klabunde | |
6 | * Copyright by Roland Klabunde <R.Klabunde@Berkom.de> | |
7 | * | |
8 | * This software may be used and distributed according to the terms | |
9 | * of the GNU General Public License, incorporated herein by reference. | |
10 | * | |
11 | */ | |
12 | ||
13 | ||
1da177e4 LT |
14 | #include <linux/init.h> |
15 | #include "hisax.h" | |
16 | #include "isac.h" | |
17 | #include "hscx.h" | |
18 | #include "jade.h" | |
19 | #include "isdnl1.h" | |
20 | #include <linux/pci.h> | |
21 | #include "bkm_ax.h" | |
22 | ||
23 | extern const char *CardType[]; | |
24 | ||
672c3fd9 | 25 | static const char *bkm_a4t_revision = "$Revision: 1.22.2.4 $"; |
1da177e4 LT |
26 | |
27 | ||
28 | static inline u_char | |
29 | readreg(unsigned int ale, unsigned long adr, u_char off) | |
30 | { | |
31 | register u_int ret; | |
32 | unsigned int *po = (unsigned int *) adr; /* Postoffice */ | |
33 | ||
34 | *po = (GCS_2 | PO_WRITE | off); | |
35 | __WAITI20__(po); | |
36 | *po = (ale | PO_READ); | |
37 | __WAITI20__(po); | |
38 | ret = *po; | |
39 | return ((unsigned char) ret); | |
40 | } | |
41 | ||
42 | ||
43 | static inline void | |
44 | readfifo(unsigned int ale, unsigned long adr, u_char off, u_char * data, int size) | |
45 | { | |
46 | int i; | |
47 | for (i = 0; i < size; i++) | |
48 | *data++ = readreg(ale, adr, off); | |
49 | } | |
50 | ||
51 | ||
52 | static inline void | |
53 | writereg(unsigned int ale, unsigned long adr, u_char off, u_char data) | |
54 | { | |
55 | unsigned int *po = (unsigned int *) adr; /* Postoffice */ | |
56 | *po = (GCS_2 | PO_WRITE | off); | |
57 | __WAITI20__(po); | |
58 | *po = (ale | PO_WRITE | data); | |
59 | __WAITI20__(po); | |
60 | } | |
61 | ||
62 | ||
63 | static inline void | |
64 | writefifo(unsigned int ale, unsigned long adr, u_char off, u_char * data, int size) | |
65 | { | |
66 | int i; | |
67 | ||
68 | for (i = 0; i < size; i++) | |
69 | writereg(ale, adr, off, *data++); | |
70 | } | |
71 | ||
72 | ||
73 | /* Interface functions */ | |
74 | ||
75 | static u_char | |
76 | ReadISAC(struct IsdnCardState *cs, u_char offset) | |
77 | { | |
78 | return (readreg(cs->hw.ax.isac_ale, cs->hw.ax.isac_adr, offset)); | |
79 | } | |
80 | ||
81 | static void | |
82 | WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value) | |
83 | { | |
84 | writereg(cs->hw.ax.isac_ale, cs->hw.ax.isac_adr, offset, value); | |
85 | } | |
86 | ||
87 | static void | |
88 | ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) | |
89 | { | |
90 | readfifo(cs->hw.ax.isac_ale, cs->hw.ax.isac_adr, 0, data, size); | |
91 | } | |
92 | ||
93 | static void | |
94 | WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) | |
95 | { | |
96 | writefifo(cs->hw.ax.isac_ale, cs->hw.ax.isac_adr, 0, data, size); | |
97 | } | |
98 | ||
99 | static u_char | |
100 | ReadJADE(struct IsdnCardState *cs, int jade, u_char offset) | |
101 | { | |
102 | return (readreg(cs->hw.ax.jade_ale, cs->hw.ax.jade_adr, offset + (jade == -1 ? 0 : (jade ? 0xC0 : 0x80)))); | |
103 | } | |
104 | ||
105 | static void | |
106 | WriteJADE(struct IsdnCardState *cs, int jade, u_char offset, u_char value) | |
107 | { | |
108 | writereg(cs->hw.ax.jade_ale, cs->hw.ax.jade_adr, offset + (jade == -1 ? 0 : (jade ? 0xC0 : 0x80)), value); | |
109 | } | |
110 | ||
111 | /* | |
112 | * fast interrupt JADE stuff goes here | |
113 | */ | |
114 | ||
115 | #define READJADE(cs, nr, reg) readreg(cs->hw.ax.jade_ale,\ | |
116 | cs->hw.ax.jade_adr, reg + (nr == -1 ? 0 : (nr ? 0xC0 : 0x80))) | |
117 | #define WRITEJADE(cs, nr, reg, data) writereg(cs->hw.ax.jade_ale,\ | |
118 | cs->hw.ax.jade_adr, reg + (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)), data) | |
119 | ||
120 | #define READJADEFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.ax.jade_ale,\ | |
121 | cs->hw.ax.jade_adr, (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)), ptr, cnt) | |
122 | #define WRITEJADEFIFO(cs, nr, ptr, cnt) writefifo( cs->hw.ax.jade_ale,\ | |
123 | cs->hw.ax.jade_adr, (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)), ptr, cnt) | |
124 | ||
125 | #include "jade_irq.c" | |
126 | ||
127 | static irqreturn_t | |
7d12e780 | 128 | bkm_interrupt(int intno, void *dev_id) |
1da177e4 LT |
129 | { |
130 | struct IsdnCardState *cs = dev_id; | |
131 | u_char val = 0; | |
132 | u_long flags; | |
133 | I20_REGISTER_FILE *pI20_Regs; | |
134 | ||
135 | spin_lock_irqsave(&cs->lock, flags); | |
136 | pI20_Regs = (I20_REGISTER_FILE *) (cs->hw.ax.base); | |
137 | ||
138 | /* ISDN interrupt pending? */ | |
139 | if (pI20_Regs->i20IntStatus & intISDN) { | |
140 | /* Reset the ISDN interrupt */ | |
141 | pI20_Regs->i20IntStatus = intISDN; | |
142 | /* Disable ISDN interrupt */ | |
143 | pI20_Regs->i20IntCtrl &= ~intISDN; | |
144 | /* Channel A first */ | |
145 | val = readreg(cs->hw.ax.jade_ale, cs->hw.ax.jade_adr, jade_HDLC_ISR + 0x80); | |
146 | if (val) { | |
147 | jade_int_main(cs, val, 0); | |
148 | } | |
149 | /* Channel B */ | |
150 | val = readreg(cs->hw.ax.jade_ale, cs->hw.ax.jade_adr, jade_HDLC_ISR + 0xC0); | |
151 | if (val) { | |
152 | jade_int_main(cs, val, 1); | |
153 | } | |
154 | /* D-Channel */ | |
155 | val = readreg(cs->hw.ax.isac_ale, cs->hw.ax.isac_adr, ISAC_ISTA); | |
156 | if (val) { | |
157 | isac_interrupt(cs, val); | |
158 | } | |
159 | /* Reenable ISDN interrupt */ | |
160 | pI20_Regs->i20IntCtrl |= intISDN; | |
161 | spin_unlock_irqrestore(&cs->lock, flags); | |
162 | return IRQ_HANDLED; | |
163 | } else { | |
164 | spin_unlock_irqrestore(&cs->lock, flags); | |
165 | return IRQ_NONE; | |
166 | } | |
167 | } | |
168 | ||
672c3fd9 | 169 | static void |
1da177e4 LT |
170 | release_io_bkm(struct IsdnCardState *cs) |
171 | { | |
172 | if (cs->hw.ax.base) { | |
173 | iounmap((void *) cs->hw.ax.base); | |
174 | cs->hw.ax.base = 0; | |
175 | } | |
176 | } | |
177 | ||
178 | static void | |
179 | enable_bkm_int(struct IsdnCardState *cs, unsigned bEnable) | |
180 | { | |
181 | if (cs->typ == ISDN_CTYPE_BKM_A4T) { | |
182 | I20_REGISTER_FILE *pI20_Regs = (I20_REGISTER_FILE *) (cs->hw.ax.base); | |
183 | if (bEnable) | |
184 | pI20_Regs->i20IntCtrl |= (intISDN | intPCI); | |
185 | else | |
186 | /* CAUTION: This disables the video capture driver too */ | |
187 | pI20_Regs->i20IntCtrl &= ~(intISDN | intPCI); | |
188 | } | |
189 | } | |
190 | ||
191 | static void | |
192 | reset_bkm(struct IsdnCardState *cs) | |
193 | { | |
194 | if (cs->typ == ISDN_CTYPE_BKM_A4T) { | |
195 | I20_REGISTER_FILE *pI20_Regs = (I20_REGISTER_FILE *) (cs->hw.ax.base); | |
196 | /* Issue the I20 soft reset */ | |
197 | pI20_Regs->i20SysControl = 0xFF; /* all in */ | |
198 | mdelay(10); | |
199 | /* Remove the soft reset */ | |
200 | pI20_Regs->i20SysControl = sysRESET | 0xFF; | |
201 | mdelay(10); | |
202 | /* Set our configuration */ | |
203 | pI20_Regs->i20SysControl = sysRESET | sysCFG; | |
204 | /* Issue ISDN reset */ | |
205 | pI20_Regs->i20GuestControl = guestWAIT_CFG | | |
206 | g_A4T_JADE_RES | | |
207 | g_A4T_ISAR_RES | | |
208 | g_A4T_ISAC_RES | | |
209 | g_A4T_JADE_BOOTR | | |
210 | g_A4T_ISAR_BOOTR; | |
211 | mdelay(10); | |
212 | ||
213 | /* Remove RESET state from ISDN */ | |
214 | pI20_Regs->i20GuestControl &= ~(g_A4T_ISAC_RES | | |
215 | g_A4T_JADE_RES | | |
216 | g_A4T_ISAR_RES); | |
217 | mdelay(10); | |
218 | } | |
219 | } | |
220 | ||
221 | static int | |
222 | BKM_card_msg(struct IsdnCardState *cs, int mt, void *arg) | |
223 | { | |
224 | u_long flags; | |
225 | ||
226 | switch (mt) { | |
227 | case CARD_RESET: | |
228 | /* Disable ints */ | |
229 | spin_lock_irqsave(&cs->lock, flags); | |
230 | enable_bkm_int(cs, 0); | |
231 | reset_bkm(cs); | |
232 | spin_unlock_irqrestore(&cs->lock, flags); | |
233 | return (0); | |
234 | case CARD_RELEASE: | |
235 | /* Sanity */ | |
236 | spin_lock_irqsave(&cs->lock, flags); | |
237 | enable_bkm_int(cs, 0); | |
238 | reset_bkm(cs); | |
239 | spin_unlock_irqrestore(&cs->lock, flags); | |
240 | release_io_bkm(cs); | |
241 | return (0); | |
242 | case CARD_INIT: | |
243 | spin_lock_irqsave(&cs->lock, flags); | |
244 | clear_pending_isac_ints(cs); | |
245 | clear_pending_jade_ints(cs); | |
246 | initisac(cs); | |
247 | initjade(cs); | |
248 | /* Enable ints */ | |
249 | enable_bkm_int(cs, 1); | |
250 | spin_unlock_irqrestore(&cs->lock, flags); | |
251 | return (0); | |
252 | case CARD_TEST: | |
253 | return (0); | |
254 | } | |
255 | return (0); | |
256 | } | |
257 | ||
67eb5db5 | 258 | static struct pci_dev *dev_a4t __devinitdata = NULL; |
1da177e4 | 259 | |
67eb5db5 | 260 | int __devinit |
1da177e4 LT |
261 | setup_bkm_a4t(struct IsdnCard *card) |
262 | { | |
263 | struct IsdnCardState *cs = card->cs; | |
264 | char tmp[64]; | |
265 | u_int pci_memaddr = 0, found = 0; | |
266 | I20_REGISTER_FILE *pI20_Regs; | |
267 | #ifdef CONFIG_PCI | |
268 | #endif | |
269 | ||
270 | strcpy(tmp, bkm_a4t_revision); | |
271 | printk(KERN_INFO "HiSax: T-Berkom driver Rev. %s\n", HiSax_getrev(tmp)); | |
272 | if (cs->typ == ISDN_CTYPE_BKM_A4T) { | |
273 | cs->subtyp = BKM_A4T; | |
274 | } else | |
275 | return (0); | |
276 | ||
277 | #ifdef CONFIG_PCI | |
278 | while ((dev_a4t = pci_find_device(PCI_VENDOR_ID_ZORAN, | |
279 | PCI_DEVICE_ID_ZORAN_36120, dev_a4t))) { | |
280 | u16 sub_sys; | |
281 | u16 sub_vendor; | |
282 | ||
283 | sub_vendor = dev_a4t->subsystem_vendor; | |
284 | sub_sys = dev_a4t->subsystem_device; | |
285 | if ((sub_sys == PCI_DEVICE_ID_BERKOM_A4T) && (sub_vendor == PCI_VENDOR_ID_BERKOM)) { | |
286 | if (pci_enable_device(dev_a4t)) | |
287 | return(0); | |
288 | found = 1; | |
289 | pci_memaddr = pci_resource_start(dev_a4t, 0); | |
290 | cs->irq = dev_a4t->irq; | |
291 | break; | |
292 | } | |
293 | } | |
294 | if (!found) { | |
295 | printk(KERN_WARNING "HiSax: %s: Card not found\n", CardType[card->typ]); | |
296 | return (0); | |
297 | } | |
298 | if (!cs->irq) { /* IRQ range check ?? */ | |
299 | printk(KERN_WARNING "HiSax: %s: No IRQ\n", CardType[card->typ]); | |
300 | return (0); | |
301 | } | |
302 | if (!pci_memaddr) { | |
303 | printk(KERN_WARNING "HiSax: %s: No Memory base address\n", CardType[card->typ]); | |
304 | return (0); | |
305 | } | |
306 | cs->hw.ax.base = (long) ioremap(pci_memaddr, 4096); | |
307 | /* Check suspecious address */ | |
308 | pI20_Regs = (I20_REGISTER_FILE *) (cs->hw.ax.base); | |
309 | if ((pI20_Regs->i20IntStatus & 0x8EFFFFFF) != 0) { | |
310 | printk(KERN_WARNING "HiSax: %s address %lx-%lx suspecious\n", | |
311 | CardType[card->typ], cs->hw.ax.base, cs->hw.ax.base + 4096); | |
312 | iounmap((void *) cs->hw.ax.base); | |
313 | cs->hw.ax.base = 0; | |
314 | return (0); | |
315 | } | |
316 | cs->hw.ax.isac_adr = cs->hw.ax.base + PO_OFFSET; | |
317 | cs->hw.ax.jade_adr = cs->hw.ax.base + PO_OFFSET; | |
318 | cs->hw.ax.isac_ale = GCS_1; | |
319 | cs->hw.ax.jade_ale = GCS_3; | |
320 | #else | |
321 | printk(KERN_WARNING "HiSax: %s: NO_PCI_BIOS\n", CardType[card->typ]); | |
322 | printk(KERN_WARNING "HiSax: %s: unable to configure\n", CardType[card->typ]); | |
323 | return (0); | |
324 | #endif /* CONFIG_PCI */ | |
325 | printk(KERN_INFO "HiSax: %s: Card configured at 0x%lX IRQ %d\n", | |
326 | CardType[card->typ], cs->hw.ax.base, cs->irq); | |
327 | ||
328 | setup_isac(cs); | |
329 | cs->readisac = &ReadISAC; | |
330 | cs->writeisac = &WriteISAC; | |
331 | cs->readisacfifo = &ReadISACfifo; | |
332 | cs->writeisacfifo = &WriteISACfifo; | |
333 | cs->BC_Read_Reg = &ReadJADE; | |
334 | cs->BC_Write_Reg = &WriteJADE; | |
335 | cs->BC_Send_Data = &jade_fill_fifo; | |
336 | cs->cardmsg = &BKM_card_msg; | |
337 | cs->irq_func = &bkm_interrupt; | |
9ba02bec | 338 | cs->irq_flags |= IRQF_SHARED; |
1da177e4 LT |
339 | ISACVersion(cs, "Telekom A4T:"); |
340 | /* Jade version */ | |
341 | JadeVersion(cs, "Telekom A4T:"); | |
342 | return (1); | |
343 | } |