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1da177e4 LT |
1 | /* $Id: gazel.c,v 2.19.2.4 2004/01/14 16:04:48 keil Exp $ |
2 | * | |
3 | * low level stuff for Gazel isdn cards | |
4 | * | |
5 | * Author BeWan Systems | |
6 | * based on source code from Karsten Keil | |
7 | * Copyright by BeWan Systems | |
8 | * | |
9 | * This software may be used and distributed according to the terms | |
10 | * of the GNU General Public License, incorporated herein by reference. | |
11 | * | |
12 | */ | |
13 | ||
1da177e4 LT |
14 | #include <linux/init.h> |
15 | #include "hisax.h" | |
16 | #include "isac.h" | |
17 | #include "hscx.h" | |
18 | #include "isdnl1.h" | |
19 | #include "ipac.h" | |
20 | #include <linux/pci.h> | |
21 | ||
22 | extern const char *CardType[]; | |
672c3fd9 | 23 | static const char *gazel_revision = "$Revision: 2.19.2.4 $"; |
1da177e4 LT |
24 | |
25 | #define R647 1 | |
26 | #define R685 2 | |
27 | #define R753 3 | |
28 | #define R742 4 | |
29 | ||
30 | #define PLX_CNTRL 0x50 /* registre de controle PLX */ | |
31 | #define RESET_GAZEL 0x4 | |
32 | #define RESET_9050 0x40000000 | |
33 | #define PLX_INCSR 0x4C /* registre d'IT du 9050 */ | |
34 | #define INT_ISAC_EN 0x8 /* 1 = enable IT isac */ | |
35 | #define INT_ISAC 0x20 /* 1 = IT isac en cours */ | |
36 | #define INT_HSCX_EN 0x1 /* 1 = enable IT hscx */ | |
37 | #define INT_HSCX 0x4 /* 1 = IT hscx en cours */ | |
38 | #define INT_PCI_EN 0x40 /* 1 = enable IT PCI */ | |
39 | #define INT_IPAC_EN 0x3 /* enable IT ipac */ | |
40 | ||
41 | ||
42 | #define byteout(addr,val) outb(val,addr) | |
43 | #define bytein(addr) inb(addr) | |
44 | ||
45 | static inline u_char | |
46 | readreg(unsigned int adr, u_short off) | |
47 | { | |
48 | return bytein(adr + off); | |
49 | } | |
50 | ||
51 | static inline void | |
52 | writereg(unsigned int adr, u_short off, u_char data) | |
53 | { | |
54 | byteout(adr + off, data); | |
55 | } | |
56 | ||
57 | ||
58 | static inline void | |
59 | read_fifo(unsigned int adr, u_char * data, int size) | |
60 | { | |
61 | insb(adr, data, size); | |
62 | } | |
63 | ||
64 | static void | |
65 | write_fifo(unsigned int adr, u_char * data, int size) | |
66 | { | |
67 | outsb(adr, data, size); | |
68 | } | |
69 | ||
70 | static inline u_char | |
71 | readreg_ipac(unsigned int adr, u_short off) | |
72 | { | |
73 | register u_char ret; | |
74 | ||
75 | byteout(adr, off); | |
76 | ret = bytein(adr + 4); | |
77 | return ret; | |
78 | } | |
79 | ||
80 | static inline void | |
81 | writereg_ipac(unsigned int adr, u_short off, u_char data) | |
82 | { | |
83 | byteout(adr, off); | |
84 | byteout(adr + 4, data); | |
85 | } | |
86 | ||
87 | ||
88 | static inline void | |
89 | read_fifo_ipac(unsigned int adr, u_short off, u_char * data, int size) | |
90 | { | |
91 | byteout(adr, off); | |
92 | insb(adr + 4, data, size); | |
93 | } | |
94 | ||
95 | static void | |
96 | write_fifo_ipac(unsigned int adr, u_short off, u_char * data, int size) | |
97 | { | |
98 | byteout(adr, off); | |
99 | outsb(adr + 4, data, size); | |
100 | } | |
101 | ||
102 | /* Interface functions */ | |
103 | ||
104 | static u_char | |
105 | ReadISAC(struct IsdnCardState *cs, u_char offset) | |
106 | { | |
107 | u_short off2 = offset; | |
108 | ||
109 | switch (cs->subtyp) { | |
110 | case R647: | |
111 | off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf)); | |
112 | case R685: | |
113 | return (readreg(cs->hw.gazel.isac, off2)); | |
114 | case R753: | |
115 | case R742: | |
116 | return (readreg_ipac(cs->hw.gazel.ipac, 0x80 + off2)); | |
117 | } | |
118 | return 0; | |
119 | } | |
120 | ||
121 | static void | |
122 | WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value) | |
123 | { | |
124 | u_short off2 = offset; | |
125 | ||
126 | switch (cs->subtyp) { | |
127 | case R647: | |
128 | off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf)); | |
129 | case R685: | |
130 | writereg(cs->hw.gazel.isac, off2, value); | |
131 | break; | |
132 | case R753: | |
133 | case R742: | |
134 | writereg_ipac(cs->hw.gazel.ipac, 0x80 + off2, value); | |
135 | break; | |
136 | } | |
137 | } | |
138 | ||
139 | static void | |
140 | ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) | |
141 | { | |
142 | switch (cs->subtyp) { | |
143 | case R647: | |
144 | case R685: | |
145 | read_fifo(cs->hw.gazel.isacfifo, data, size); | |
146 | break; | |
147 | case R753: | |
148 | case R742: | |
149 | read_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size); | |
150 | break; | |
151 | } | |
152 | } | |
153 | ||
154 | static void | |
155 | WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) | |
156 | { | |
157 | switch (cs->subtyp) { | |
158 | case R647: | |
159 | case R685: | |
160 | write_fifo(cs->hw.gazel.isacfifo, data, size); | |
161 | break; | |
162 | case R753: | |
163 | case R742: | |
164 | write_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size); | |
165 | break; | |
166 | } | |
167 | } | |
168 | ||
169 | static void | |
170 | ReadHSCXfifo(struct IsdnCardState *cs, int hscx, u_char * data, int size) | |
171 | { | |
172 | switch (cs->subtyp) { | |
173 | case R647: | |
174 | case R685: | |
175 | read_fifo(cs->hw.gazel.hscxfifo[hscx], data, size); | |
176 | break; | |
177 | case R753: | |
178 | case R742: | |
179 | read_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size); | |
180 | break; | |
181 | } | |
182 | } | |
183 | ||
184 | static void | |
185 | WriteHSCXfifo(struct IsdnCardState *cs, int hscx, u_char * data, int size) | |
186 | { | |
187 | switch (cs->subtyp) { | |
188 | case R647: | |
189 | case R685: | |
190 | write_fifo(cs->hw.gazel.hscxfifo[hscx], data, size); | |
191 | break; | |
192 | case R753: | |
193 | case R742: | |
194 | write_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size); | |
195 | break; | |
196 | } | |
197 | } | |
198 | ||
199 | static u_char | |
200 | ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) | |
201 | { | |
202 | u_short off2 = offset; | |
203 | ||
204 | switch (cs->subtyp) { | |
205 | case R647: | |
206 | off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf)); | |
207 | case R685: | |
208 | return (readreg(cs->hw.gazel.hscx[hscx], off2)); | |
209 | case R753: | |
210 | case R742: | |
211 | return (readreg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2)); | |
212 | } | |
213 | return 0; | |
214 | } | |
215 | ||
216 | static void | |
217 | WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value) | |
218 | { | |
219 | u_short off2 = offset; | |
220 | ||
221 | switch (cs->subtyp) { | |
222 | case R647: | |
223 | off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf)); | |
224 | case R685: | |
225 | writereg(cs->hw.gazel.hscx[hscx], off2, value); | |
226 | break; | |
227 | case R753: | |
228 | case R742: | |
229 | writereg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2, value); | |
230 | break; | |
231 | } | |
232 | } | |
233 | ||
234 | /* | |
235 | * fast interrupt HSCX stuff goes here | |
236 | */ | |
237 | ||
238 | #define READHSCX(cs, nr, reg) ReadHSCX(cs, nr, reg) | |
239 | #define WRITEHSCX(cs, nr, reg, data) WriteHSCX(cs, nr, reg, data) | |
240 | #define READHSCXFIFO(cs, nr, ptr, cnt) ReadHSCXfifo(cs, nr, ptr, cnt) | |
241 | #define WRITEHSCXFIFO(cs, nr, ptr, cnt) WriteHSCXfifo(cs, nr, ptr, cnt) | |
242 | ||
243 | #include "hscx_irq.c" | |
244 | ||
245 | static irqreturn_t | |
7d12e780 | 246 | gazel_interrupt(int intno, void *dev_id) |
1da177e4 LT |
247 | { |
248 | #define MAXCOUNT 5 | |
249 | struct IsdnCardState *cs = dev_id; | |
250 | u_char valisac, valhscx; | |
251 | int count = 0; | |
252 | u_long flags; | |
253 | ||
254 | spin_lock_irqsave(&cs->lock, flags); | |
255 | do { | |
256 | valhscx = ReadHSCX(cs, 1, HSCX_ISTA); | |
257 | if (valhscx) | |
258 | hscx_int_main(cs, valhscx); | |
259 | valisac = ReadISAC(cs, ISAC_ISTA); | |
260 | if (valisac) | |
261 | isac_interrupt(cs, valisac); | |
262 | count++; | |
263 | } while ((valhscx || valisac) && (count < MAXCOUNT)); | |
264 | ||
265 | WriteHSCX(cs, 0, HSCX_MASK, 0xFF); | |
266 | WriteHSCX(cs, 1, HSCX_MASK, 0xFF); | |
267 | WriteISAC(cs, ISAC_MASK, 0xFF); | |
268 | WriteISAC(cs, ISAC_MASK, 0x0); | |
269 | WriteHSCX(cs, 0, HSCX_MASK, 0x0); | |
270 | WriteHSCX(cs, 1, HSCX_MASK, 0x0); | |
271 | spin_unlock_irqrestore(&cs->lock, flags); | |
272 | return IRQ_HANDLED; | |
273 | } | |
274 | ||
275 | ||
276 | static irqreturn_t | |
7d12e780 | 277 | gazel_interrupt_ipac(int intno, void *dev_id) |
1da177e4 LT |
278 | { |
279 | struct IsdnCardState *cs = dev_id; | |
280 | u_char ista, val; | |
281 | int count = 0; | |
282 | u_long flags; | |
283 | ||
284 | spin_lock_irqsave(&cs->lock, flags); | |
285 | ista = ReadISAC(cs, IPAC_ISTA - 0x80); | |
286 | do { | |
287 | if (ista & 0x0f) { | |
288 | val = ReadHSCX(cs, 1, HSCX_ISTA); | |
289 | if (ista & 0x01) | |
290 | val |= 0x01; | |
291 | if (ista & 0x04) | |
292 | val |= 0x02; | |
293 | if (ista & 0x08) | |
294 | val |= 0x04; | |
295 | if (val) { | |
296 | hscx_int_main(cs, val); | |
297 | } | |
298 | } | |
299 | if (ista & 0x20) { | |
300 | val = 0xfe & ReadISAC(cs, ISAC_ISTA); | |
301 | if (val) { | |
302 | isac_interrupt(cs, val); | |
303 | } | |
304 | } | |
305 | if (ista & 0x10) { | |
306 | val = 0x01; | |
307 | isac_interrupt(cs, val); | |
308 | } | |
309 | ista = ReadISAC(cs, IPAC_ISTA - 0x80); | |
310 | count++; | |
311 | } | |
312 | while ((ista & 0x3f) && (count < MAXCOUNT)); | |
313 | ||
314 | WriteISAC(cs, IPAC_MASK - 0x80, 0xFF); | |
315 | WriteISAC(cs, IPAC_MASK - 0x80, 0xC0); | |
316 | spin_unlock_irqrestore(&cs->lock, flags); | |
317 | return IRQ_HANDLED; | |
318 | } | |
672c3fd9 AB |
319 | |
320 | static void | |
1da177e4 LT |
321 | release_io_gazel(struct IsdnCardState *cs) |
322 | { | |
323 | unsigned int i; | |
324 | ||
325 | switch (cs->subtyp) { | |
326 | case R647: | |
327 | for (i = 0x0000; i < 0xC000; i += 0x1000) | |
328 | release_region(i + cs->hw.gazel.hscx[0], 16); | |
329 | release_region(0xC000 + cs->hw.gazel.hscx[0], 1); | |
330 | break; | |
331 | ||
332 | case R685: | |
333 | release_region(cs->hw.gazel.hscx[0], 0x100); | |
334 | release_region(cs->hw.gazel.cfg_reg, 0x80); | |
335 | break; | |
336 | ||
337 | case R753: | |
338 | release_region(cs->hw.gazel.ipac, 0x8); | |
339 | release_region(cs->hw.gazel.cfg_reg, 0x80); | |
340 | break; | |
341 | ||
342 | case R742: | |
343 | release_region(cs->hw.gazel.ipac, 8); | |
344 | break; | |
345 | } | |
346 | } | |
347 | ||
348 | static int | |
349 | reset_gazel(struct IsdnCardState *cs) | |
350 | { | |
351 | unsigned long plxcntrl, addr = cs->hw.gazel.cfg_reg; | |
352 | ||
353 | switch (cs->subtyp) { | |
354 | case R647: | |
355 | writereg(addr, 0, 0); | |
356 | HZDELAY(10); | |
357 | writereg(addr, 0, 1); | |
358 | HZDELAY(2); | |
359 | break; | |
360 | case R685: | |
361 | plxcntrl = inl(addr + PLX_CNTRL); | |
362 | plxcntrl |= (RESET_9050 + RESET_GAZEL); | |
363 | outl(plxcntrl, addr + PLX_CNTRL); | |
364 | plxcntrl &= ~(RESET_9050 + RESET_GAZEL); | |
365 | HZDELAY(4); | |
366 | outl(plxcntrl, addr + PLX_CNTRL); | |
367 | HZDELAY(10); | |
368 | outb(INT_ISAC_EN + INT_HSCX_EN + INT_PCI_EN, addr + PLX_INCSR); | |
369 | break; | |
370 | case R753: | |
371 | plxcntrl = inl(addr + PLX_CNTRL); | |
372 | plxcntrl |= (RESET_9050 + RESET_GAZEL); | |
373 | outl(plxcntrl, addr + PLX_CNTRL); | |
374 | plxcntrl &= ~(RESET_9050 + RESET_GAZEL); | |
375 | WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20); | |
376 | HZDELAY(4); | |
377 | outl(plxcntrl, addr + PLX_CNTRL); | |
378 | HZDELAY(10); | |
379 | WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00); | |
380 | WriteISAC(cs, IPAC_ACFG - 0x80, 0xff); | |
381 | WriteISAC(cs, IPAC_AOE - 0x80, 0x0); | |
382 | WriteISAC(cs, IPAC_MASK - 0x80, 0xff); | |
383 | WriteISAC(cs, IPAC_CONF - 0x80, 0x1); | |
384 | outb(INT_IPAC_EN + INT_PCI_EN, addr + PLX_INCSR); | |
385 | WriteISAC(cs, IPAC_MASK - 0x80, 0xc0); | |
386 | break; | |
387 | case R742: | |
388 | WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20); | |
389 | HZDELAY(4); | |
390 | WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00); | |
391 | WriteISAC(cs, IPAC_ACFG - 0x80, 0xff); | |
392 | WriteISAC(cs, IPAC_AOE - 0x80, 0x0); | |
393 | WriteISAC(cs, IPAC_MASK - 0x80, 0xff); | |
394 | WriteISAC(cs, IPAC_CONF - 0x80, 0x1); | |
395 | WriteISAC(cs, IPAC_MASK - 0x80, 0xc0); | |
396 | break; | |
397 | } | |
398 | return (0); | |
399 | } | |
400 | ||
401 | static int | |
402 | Gazel_card_msg(struct IsdnCardState *cs, int mt, void *arg) | |
403 | { | |
404 | u_long flags; | |
405 | ||
406 | switch (mt) { | |
407 | case CARD_RESET: | |
408 | spin_lock_irqsave(&cs->lock, flags); | |
409 | reset_gazel(cs); | |
410 | spin_unlock_irqrestore(&cs->lock, flags); | |
411 | return (0); | |
412 | case CARD_RELEASE: | |
413 | release_io_gazel(cs); | |
414 | return (0); | |
415 | case CARD_INIT: | |
416 | spin_lock_irqsave(&cs->lock, flags); | |
417 | inithscxisac(cs, 1); | |
418 | if ((cs->subtyp==R647)||(cs->subtyp==R685)) { | |
419 | int i; | |
420 | for (i=0;i<(2+MAX_WAITING_CALLS);i++) { | |
421 | cs->bcs[i].hw.hscx.tsaxr0 = 0x1f; | |
422 | cs->bcs[i].hw.hscx.tsaxr1 = 0x23; | |
423 | } | |
424 | } | |
425 | spin_unlock_irqrestore(&cs->lock, flags); | |
426 | return (0); | |
427 | case CARD_TEST: | |
428 | return (0); | |
429 | } | |
430 | return (0); | |
431 | } | |
432 | ||
433 | static int | |
434 | reserve_regions(struct IsdnCard *card, struct IsdnCardState *cs) | |
435 | { | |
436 | unsigned int i, j, base = 0, adr = 0, len = 0; | |
437 | ||
438 | switch (cs->subtyp) { | |
439 | case R647: | |
440 | base = cs->hw.gazel.hscx[0]; | |
441 | if (!request_region(adr = (0xC000 + base), len = 1, "gazel")) | |
442 | goto error; | |
443 | for (i = 0x0000; i < 0xC000; i += 0x1000) { | |
444 | if (!request_region(adr = (i + base), len = 16, "gazel")) | |
445 | goto error; | |
446 | } | |
447 | if (i != 0xC000) { | |
448 | for (j = 0; j < i; j+= 0x1000) | |
449 | release_region(j + base, 16); | |
450 | release_region(0xC000 + base, 1); | |
451 | goto error; | |
452 | } | |
453 | break; | |
454 | ||
455 | case R685: | |
456 | if (!request_region(adr = cs->hw.gazel.hscx[0], len = 0x100, "gazel")) | |
457 | goto error; | |
458 | if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) { | |
459 | release_region(cs->hw.gazel.hscx[0],0x100); | |
460 | goto error; | |
461 | } | |
462 | break; | |
463 | ||
464 | case R753: | |
465 | if (!request_region(adr = cs->hw.gazel.ipac, len = 0x8, "gazel")) | |
466 | goto error; | |
467 | if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) { | |
468 | release_region(cs->hw.gazel.ipac, 8); | |
469 | goto error; | |
470 | } | |
471 | break; | |
472 | ||
473 | case R742: | |
474 | if (!request_region(adr = cs->hw.gazel.ipac, len = 0x8, "gazel")) | |
475 | goto error; | |
476 | break; | |
477 | } | |
478 | ||
479 | return 0; | |
480 | ||
481 | error: | |
482 | printk(KERN_WARNING "Gazel: %s io ports 0x%x-0x%x already in use\n", | |
483 | CardType[cs->typ], adr, adr + len); | |
484 | return 1; | |
485 | } | |
486 | ||
67eb5db5 | 487 | static int __devinit |
1da177e4 LT |
488 | setup_gazelisa(struct IsdnCard *card, struct IsdnCardState *cs) |
489 | { | |
490 | printk(KERN_INFO "Gazel: ISA PnP card automatic recognition\n"); | |
491 | // we got an irq parameter, assume it is an ISA card | |
492 | // R742 decodes address even in not started... | |
493 | // R647 returns FF if not present or not started | |
494 | // eventually needs improvment | |
495 | if (readreg_ipac(card->para[1], IPAC_ID) == 1) | |
496 | cs->subtyp = R742; | |
497 | else | |
498 | cs->subtyp = R647; | |
499 | ||
500 | setup_isac(cs); | |
501 | cs->hw.gazel.cfg_reg = card->para[1] + 0xC000; | |
502 | cs->hw.gazel.ipac = card->para[1]; | |
503 | cs->hw.gazel.isac = card->para[1] + 0x8000; | |
504 | cs->hw.gazel.hscx[0] = card->para[1]; | |
505 | cs->hw.gazel.hscx[1] = card->para[1] + 0x4000; | |
506 | cs->irq = card->para[0]; | |
507 | cs->hw.gazel.isacfifo = cs->hw.gazel.isac; | |
508 | cs->hw.gazel.hscxfifo[0] = cs->hw.gazel.hscx[0]; | |
509 | cs->hw.gazel.hscxfifo[1] = cs->hw.gazel.hscx[1]; | |
510 | ||
511 | switch (cs->subtyp) { | |
512 | case R647: | |
513 | printk(KERN_INFO "Gazel: Card ISA R647/R648 found\n"); | |
514 | cs->dc.isac.adf2 = 0x87; | |
515 | printk(KERN_INFO | |
516 | "Gazel: config irq:%d isac:0x%X cfg:0x%X\n", | |
517 | cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg); | |
518 | printk(KERN_INFO | |
519 | "Gazel: hscx A:0x%X hscx B:0x%X\n", | |
520 | cs->hw.gazel.hscx[0], cs->hw.gazel.hscx[1]); | |
521 | ||
522 | break; | |
523 | case R742: | |
524 | printk(KERN_INFO "Gazel: Card ISA R742 found\n"); | |
525 | test_and_set_bit(HW_IPAC, &cs->HW_Flags); | |
526 | printk(KERN_INFO | |
527 | "Gazel: config irq:%d ipac:0x%X\n", | |
528 | cs->irq, cs->hw.gazel.ipac); | |
529 | break; | |
530 | } | |
531 | ||
532 | return (0); | |
533 | } | |
534 | ||
67eb5db5 | 535 | static struct pci_dev *dev_tel __devinitdata = NULL; |
1da177e4 | 536 | |
67eb5db5 | 537 | static int __devinit |
1da177e4 LT |
538 | setup_gazelpci(struct IsdnCardState *cs) |
539 | { | |
540 | u_int pci_ioaddr0 = 0, pci_ioaddr1 = 0; | |
541 | u_char pci_irq = 0, found; | |
542 | u_int nbseek, seekcard; | |
543 | ||
544 | printk(KERN_WARNING "Gazel: PCI card automatic recognition\n"); | |
545 | ||
546 | found = 0; | |
547 | seekcard = PCI_DEVICE_ID_PLX_R685; | |
49f29915 OB |
548 | for (nbseek = 0; nbseek < 4; nbseek++) { |
549 | if ((dev_tel = pci_find_device(PCI_VENDOR_ID_PLX, | |
550 | seekcard, dev_tel))) { | |
1da177e4 LT |
551 | if (pci_enable_device(dev_tel)) |
552 | return 1; | |
553 | pci_irq = dev_tel->irq; | |
554 | pci_ioaddr0 = pci_resource_start(dev_tel, 1); | |
555 | pci_ioaddr1 = pci_resource_start(dev_tel, 2); | |
556 | found = 1; | |
557 | } | |
558 | if (found) | |
559 | break; | |
560 | else { | |
561 | switch (seekcard) { | |
562 | case PCI_DEVICE_ID_PLX_R685: | |
563 | seekcard = PCI_DEVICE_ID_PLX_R753; | |
564 | break; | |
565 | case PCI_DEVICE_ID_PLX_R753: | |
566 | seekcard = PCI_DEVICE_ID_PLX_DJINN_ITOO; | |
567 | break; | |
49f29915 OB |
568 | case PCI_DEVICE_ID_PLX_DJINN_ITOO: |
569 | seekcard = PCI_DEVICE_ID_PLX_OLITEC; | |
570 | break; | |
1da177e4 LT |
571 | } |
572 | } | |
573 | } | |
574 | if (!found) { | |
575 | printk(KERN_WARNING "Gazel: No PCI card found\n"); | |
576 | return (1); | |
577 | } | |
578 | if (!pci_irq) { | |
579 | printk(KERN_WARNING "Gazel: No IRQ for PCI card found\n"); | |
580 | return 1; | |
581 | } | |
582 | cs->hw.gazel.pciaddr[0] = pci_ioaddr0; | |
583 | cs->hw.gazel.pciaddr[1] = pci_ioaddr1; | |
584 | setup_isac(cs); | |
585 | pci_ioaddr1 &= 0xfffe; | |
586 | cs->hw.gazel.cfg_reg = pci_ioaddr0 & 0xfffe; | |
587 | cs->hw.gazel.ipac = pci_ioaddr1; | |
588 | cs->hw.gazel.isac = pci_ioaddr1 + 0x80; | |
589 | cs->hw.gazel.hscx[0] = pci_ioaddr1; | |
590 | cs->hw.gazel.hscx[1] = pci_ioaddr1 + 0x40; | |
591 | cs->hw.gazel.isacfifo = cs->hw.gazel.isac; | |
592 | cs->hw.gazel.hscxfifo[0] = cs->hw.gazel.hscx[0]; | |
593 | cs->hw.gazel.hscxfifo[1] = cs->hw.gazel.hscx[1]; | |
594 | cs->irq = pci_irq; | |
9ba02bec | 595 | cs->irq_flags |= IRQF_SHARED; |
1da177e4 LT |
596 | |
597 | switch (seekcard) { | |
598 | case PCI_DEVICE_ID_PLX_R685: | |
599 | printk(KERN_INFO "Gazel: Card PCI R685 found\n"); | |
600 | cs->subtyp = R685; | |
601 | cs->dc.isac.adf2 = 0x87; | |
602 | printk(KERN_INFO | |
603 | "Gazel: config irq:%d isac:0x%X cfg:0x%X\n", | |
604 | cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg); | |
605 | printk(KERN_INFO | |
606 | "Gazel: hscx A:0x%X hscx B:0x%X\n", | |
607 | cs->hw.gazel.hscx[0], cs->hw.gazel.hscx[1]); | |
608 | break; | |
609 | case PCI_DEVICE_ID_PLX_R753: | |
610 | case PCI_DEVICE_ID_PLX_DJINN_ITOO: | |
49f29915 | 611 | case PCI_DEVICE_ID_PLX_OLITEC: |
1da177e4 LT |
612 | printk(KERN_INFO "Gazel: Card PCI R753 found\n"); |
613 | cs->subtyp = R753; | |
614 | test_and_set_bit(HW_IPAC, &cs->HW_Flags); | |
615 | printk(KERN_INFO | |
616 | "Gazel: config irq:%d ipac:0x%X cfg:0x%X\n", | |
617 | cs->irq, cs->hw.gazel.ipac, cs->hw.gazel.cfg_reg); | |
618 | break; | |
619 | } | |
620 | ||
621 | return (0); | |
622 | } | |
623 | ||
67eb5db5 | 624 | int __devinit |
1da177e4 LT |
625 | setup_gazel(struct IsdnCard *card) |
626 | { | |
627 | struct IsdnCardState *cs = card->cs; | |
628 | char tmp[64]; | |
629 | u_char val; | |
630 | ||
631 | strcpy(tmp, gazel_revision); | |
632 | printk(KERN_INFO "Gazel: Driver Revision %s\n", HiSax_getrev(tmp)); | |
633 | ||
634 | if (cs->typ != ISDN_CTYPE_GAZEL) | |
635 | return (0); | |
636 | ||
637 | if (card->para[0]) { | |
638 | if (setup_gazelisa(card, cs)) | |
639 | return (0); | |
640 | } else { | |
641 | ||
642 | #ifdef CONFIG_PCI | |
643 | if (setup_gazelpci(cs)) | |
644 | return (0); | |
645 | #else | |
646 | printk(KERN_WARNING "Gazel: Card PCI requested and NO_PCI_BIOS, unable to config\n"); | |
647 | return (0); | |
648 | #endif /* CONFIG_PCI */ | |
649 | } | |
650 | ||
651 | if (reserve_regions(card, cs)) { | |
652 | return (0); | |
653 | } | |
654 | if (reset_gazel(cs)) { | |
655 | printk(KERN_WARNING "Gazel: wrong IRQ\n"); | |
656 | release_io_gazel(cs); | |
657 | return (0); | |
658 | } | |
659 | cs->readisac = &ReadISAC; | |
660 | cs->writeisac = &WriteISAC; | |
661 | cs->readisacfifo = &ReadISACfifo; | |
662 | cs->writeisacfifo = &WriteISACfifo; | |
663 | cs->BC_Read_Reg = &ReadHSCX; | |
664 | cs->BC_Write_Reg = &WriteHSCX; | |
665 | cs->BC_Send_Data = &hscx_fill_fifo; | |
666 | cs->cardmsg = &Gazel_card_msg; | |
667 | ||
668 | switch (cs->subtyp) { | |
669 | case R647: | |
670 | case R685: | |
671 | cs->irq_func = &gazel_interrupt; | |
672 | ISACVersion(cs, "Gazel:"); | |
673 | if (HscxVersion(cs, "Gazel:")) { | |
674 | printk(KERN_WARNING | |
675 | "Gazel: wrong HSCX versions check IO address\n"); | |
676 | release_io_gazel(cs); | |
677 | return (0); | |
678 | } | |
679 | break; | |
680 | case R742: | |
681 | case R753: | |
682 | cs->irq_func = &gazel_interrupt_ipac; | |
683 | val = ReadISAC(cs, IPAC_ID - 0x80); | |
684 | printk(KERN_INFO "Gazel: IPAC version %x\n", val); | |
685 | break; | |
686 | } | |
687 | ||
688 | return (1); | |
689 | } |