[mirror_ubuntu-artful-kernel.git] / drivers / isdn / pcbit / layer2.h

/*
 * PCBIT-D low-layer interface definitions
 *
 * Copyright (C) 1996 Universidade de Lisboa
 *
 * Written by Pedro Roque Marques (roque@di.fc.ul.pt)
 *
 * This software may be used and distributed according to the terms of
 * the GNU General Public License, incorporated herein by reference.
 */

/*
 * 19991203 - Fernando Carvalho - takion@superbofh.org
 * Hacked to compile with egcs and run with current version of isdn modules
 */

#ifndef LAYER2_H
#define LAYER2_H

#include <linux/interrupt.h>

#include <asm/byteorder.h>

#define BANK1 0x0000U /* PC -> Board */
#define BANK2 0x01ffU /* Board -> PC */
#define BANK3 0x03feU /* Att Board */
#define BANK4 0x03ffU /* Att PC */

#define BANKLEN 0x01FFU

#define LOAD_ZONE_START 0x03f8U
#define LOAD_ZONE_END   0x03fdU

#define LOAD_RETRY      18000000


/* TAM - XX - C - S  - NUM */
#define PREHDR_LEN 8
/* TT  - M  - I - TH - TD  */
#define FRAME_HDR_LEN  8

#define MSG_CONN_REQ		0x08000100
#define MSG_CONN_CONF		0x00000101
#define MSG_CONN_IND		0x00000102
#define MSG_CONN_RESP		0x08000103

#define MSG_CONN_ACTV_REQ	0x08000300
#define MSG_CONN_ACTV_CONF	0x00000301
#define MSG_CONN_ACTV_IND	0x00000302
#define MSG_CONN_ACTV_RESP	0x08000303

#define MSG_DISC_REQ		0x08000400
#define MSG_DISC_CONF		0x00000401
#define MSG_DISC_IND		0x00000402
#define MSG_DISC_RESP		0x08000403

#define MSG_TDATA_REQ		0x0908E200
#define MSG_TDATA_CONF		0x0000E201
#define MSG_TDATA_IND		0x0000E202
#define MSG_TDATA_RESP		0x0908E203

#define MSG_SELP_REQ		0x09004000
#define MSG_SELP_CONF		0x00004001

#define MSG_ACT_TRANSP_REQ      0x0908E000
#define MSG_ACT_TRANSP_CONF     0x0000E001

#define MSG_STPROT_REQ		0x09004100
#define MSG_STPROT_CONF		0x00004101

#define MSG_PING188_REQ		0x09030500
#define MSG_PING188_CONF        0x000005bc

#define MSG_WATCH188	        0x09030400

#define MSG_API_ON              0x08020102
#define MSG_POOL_PCBIT          0x08020400
#define MSG_POOL_PCBIT_CONF     0x00000401

#define MSG_INFO_IND            0x00002602
#define MSG_INFO_RESP           0x08002603

#define MSG_DEBUG_188           0x0000ff00

/*

  long  4 3 2 1
  Intel 1 2 3 4
*/

#ifdef __LITTLE_ENDIAN
#define SET_MSG_SCMD(msg, ch)	(msg = (msg & 0xffffff00) | (((ch) & 0xff)))
#define SET_MSG_CMD(msg, ch)	(msg = (msg & 0xffff00ff) | (((ch) & 0xff) << 8))
#define SET_MSG_PROC(msg, ch)	(msg = (msg & 0xff00ffff) | (((ch) & 0xff) << 16))
#define SET_MSG_CPU(msg, ch)	(msg = (msg & 0x00ffffff) | (((ch) & 0xff) << 24))

#define GET_MSG_SCMD(msg)	((msg) & 0xFF)
#define GET_MSG_CMD(msg)	((msg) >> 8 & 0xFF)
#define GET_MSG_PROC(msg)	((msg) >> 16 & 0xFF)
#define GET_MSG_CPU(msg)	((msg) >> 24)

#else
#error "Non-Intel CPU"
#endif

#define MAX_QUEUED 7

#define SCHED_READ    0x01
#define SCHED_WRITE   0x02

#define SET_RUN_TIMEOUT 2 * HZ /* 2 seconds */

struct frame_buf {
	ulong msg;
	unsigned int refnum;
	unsigned int dt_len;
	unsigned int hdr_len;
	struct sk_buff *skb;
	unsigned int copied;
	struct frame_buf *next;
};

extern int pcbit_l2_write(struct pcbit_dev *dev, ulong msg, ushort refnum,
			  struct sk_buff *skb, unsigned short hdr_len);

extern irqreturn_t pcbit_irq_handler(int interrupt, void *);

extern struct pcbit_dev *dev_pcbit[MAX_PCBIT_CARDS];

#ifdef DEBUG
static __inline__ void log_state(struct pcbit_dev *dev) {
	printk(KERN_DEBUG "writeptr = %ld\n",
	       (ulong) (dev->writeptr - dev->sh_mem));
	printk(KERN_DEBUG "readptr  = %ld\n",
	       (ulong) (dev->readptr - (dev->sh_mem + BANK2)));
	printk(KERN_DEBUG "{rcv_seq=%01x, send_seq=%01x, unack_seq=%01x}\n",
	       dev->rcv_seq, dev->send_seq, dev->unack_seq);
}
#endif

static __inline__ struct pcbit_dev *chan2dev(struct pcbit_chan *chan)
{
	struct pcbit_dev *dev;
	int i;


	for (i = 0; i < MAX_PCBIT_CARDS; i++)
		if ((dev = dev_pcbit[i]))
			if (dev->b1 == chan || dev->b2 == chan)
				return dev;
	return NULL;

}

static __inline__ struct pcbit_dev *finddev(int id)
{
	struct pcbit_dev *dev;
	int i;

	for (i = 0; i < MAX_PCBIT_CARDS; i++)
		if ((dev = dev_pcbit[i]))
			if (dev->id == id)
				return dev;
	return NULL;
}


/*
 *  Support routines for reading and writing in the board
 */

static __inline__ void pcbit_writeb(struct pcbit_dev *dev, unsigned char dt)
{
	writeb(dt, dev->writeptr++);
	if (dev->writeptr == dev->sh_mem + BANKLEN)
		dev->writeptr = dev->sh_mem;
}

static __inline__ void pcbit_writew(struct pcbit_dev *dev, unsigned short dt)
{
	int dist;

	dist = BANKLEN - (dev->writeptr - dev->sh_mem);
	switch (dist) {
	case 2:
		writew(dt, dev->writeptr);
		dev->writeptr = dev->sh_mem;
		break;
	case 1:
		writeb((u_char) (dt & 0x00ffU), dev->writeptr);
		dev->writeptr = dev->sh_mem;
		writeb((u_char) (dt >> 8), dev->writeptr++);
		break;
	default:
		writew(dt, dev->writeptr);
		dev->writeptr += 2;
		break;
	};
}

static __inline__ void memcpy_topcbit(struct pcbit_dev *dev, u_char *data,
				      int len)
{
	int diff;

	diff = len - (BANKLEN - (dev->writeptr - dev->sh_mem));

	if (diff > 0)
	{
		memcpy_toio(dev->writeptr, data, len - diff);
		memcpy_toio(dev->sh_mem, data + (len - diff), diff);
		dev->writeptr = dev->sh_mem + diff;
	}
	else
	{
		memcpy_toio(dev->writeptr, data, len);

		dev->writeptr += len;
		if (diff == 0)
			dev->writeptr = dev->sh_mem;
	}
}

static __inline__ unsigned char pcbit_readb(struct pcbit_dev *dev)
{
	unsigned char val;

	val = readb(dev->readptr++);
	if (dev->readptr == dev->sh_mem + BANK2 + BANKLEN)
		dev->readptr = dev->sh_mem + BANK2;

	return val;
}

static __inline__ unsigned short pcbit_readw(struct pcbit_dev *dev)
{
	int dist;
	unsigned short val;

	dist = BANKLEN - (dev->readptr - (dev->sh_mem + BANK2));
	switch (dist) {
	case 2:
		val = readw(dev->readptr);
		dev->readptr = dev->sh_mem + BANK2;
		break;
	case 1:
		val = readb(dev->readptr);
		dev->readptr = dev->sh_mem + BANK2;
		val = (readb(dev->readptr++) << 8) | val;
		break;
	default:
		val = readw(dev->readptr);
		dev->readptr += 2;
		break;
	};
	return val;
}

static __inline__ void memcpy_frompcbit(struct pcbit_dev *dev, u_char *data, int len)
{
	int diff;

	diff = len - (BANKLEN - (dev->readptr - (dev->sh_mem + BANK2)));
	if (diff > 0)
	{
		memcpy_fromio(data, dev->readptr, len - diff);
		memcpy_fromio(data + (len - diff), dev->sh_mem + BANK2 , diff);
		dev->readptr = dev->sh_mem + BANK2 + diff;
	}
	else
	{
		memcpy_fromio(data, dev->readptr, len);
		dev->readptr += len;
		if (diff == 0)
			dev->readptr = dev->sh_mem + BANK2;
	}
}


#endif
Commit	Line	Data
1da177e4 LT	1	/*
	2	* PCBIT-D low-layer interface definitions
	3	*
	4	* Copyright (C) 1996 Universidade de Lisboa
475be4d8	5	*
1da177e4 LT	6	* Written by Pedro Roque Marques (roque@di.fc.ul.pt)
1da177e4 LT	7	*
475be4d8	8	* This software may be used and distributed according to the terms of
1da177e4 LT	9	* the GNU General Public License, incorporated herein by reference.
	10	*/
	11
	12	/*
	13	* 19991203 - Fernando Carvalho - takion@superbofh.org
	14	* Hacked to compile with egcs and run with current version of isdn modules
475be4d8	15	*/
1da177e4 LT	16
	17	#ifndef LAYER2_H
	18	#define LAYER2_H
	19
	20	#include <linux/interrupt.h>
	21
	22	#include <asm/byteorder.h>
	23
	24	#define BANK1 0x0000U /* PC -> Board */
	25	#define BANK2 0x01ffU /* Board -> PC */
	26	#define BANK3 0x03feU /* Att Board */
	27	#define BANK4 0x03ffU /* Att PC */
	28
	29	#define BANKLEN 0x01FFU
	30
	31	#define LOAD_ZONE_START 0x03f8U
	32	#define LOAD_ZONE_END 0x03fdU
	33
	34	#define LOAD_RETRY 18000000
	35
	36
	37
	38	/* TAM - XX - C - S - NUM */
	39	#define PREHDR_LEN 8
475be4d8 JP	40	/* TT - M - I - TH - TD */
475be4d8 JP	41	#define FRAME_HDR_LEN 8
1da177e4 LT	42
	43	#define MSG_CONN_REQ 0x08000100
	44	#define MSG_CONN_CONF 0x00000101
	45	#define MSG_CONN_IND 0x00000102
	46	#define MSG_CONN_RESP 0x08000103
	47
	48	#define MSG_CONN_ACTV_REQ 0x08000300
	49	#define MSG_CONN_ACTV_CONF 0x00000301
	50	#define MSG_CONN_ACTV_IND 0x00000302
	51	#define MSG_CONN_ACTV_RESP 0x08000303
	52
	53	#define MSG_DISC_REQ 0x08000400
	54	#define MSG_DISC_CONF 0x00000401
	55	#define MSG_DISC_IND 0x00000402
	56	#define MSG_DISC_RESP 0x08000403
	57
	58	#define MSG_TDATA_REQ 0x0908E200
	59	#define MSG_TDATA_CONF 0x0000E201
	60	#define MSG_TDATA_IND 0x0000E202
	61	#define MSG_TDATA_RESP 0x0908E203
	62
	63	#define MSG_SELP_REQ 0x09004000
	64	#define MSG_SELP_CONF 0x00004001
	65
	66	#define MSG_ACT_TRANSP_REQ 0x0908E000
	67	#define MSG_ACT_TRANSP_CONF 0x0000E001
	68
	69	#define MSG_STPROT_REQ 0x09004100
	70	#define MSG_STPROT_CONF 0x00004101
	71
	72	#define MSG_PING188_REQ 0x09030500
	73	#define MSG_PING188_CONF 0x000005bc
	74
	75	#define MSG_WATCH188 0x09030400
	76
	77	#define MSG_API_ON 0x08020102
	78	#define MSG_POOL_PCBIT 0x08020400
	79	#define MSG_POOL_PCBIT_CONF 0x00000401
	80
	81	#define MSG_INFO_IND 0x00002602
	82	#define MSG_INFO_RESP 0x08002603
	83
	84	#define MSG_DEBUG_188 0x0000ff00
	85
	86	/*
475be4d8 JP	87
	88	long 4 3 2 1
	89	Intel 1 2 3 4
1da177e4 LT	90	*/
	91
	92	#ifdef __LITTLE_ENDIAN
475be4d8 JP	93	#define SET_MSG_SCMD(msg, ch) (msg = (msg & 0xffffff00) \| (((ch) & 0xff)))
	94	#define SET_MSG_CMD(msg, ch) (msg = (msg & 0xffff00ff) \| (((ch) & 0xff) << 8))
	95	#define SET_MSG_PROC(msg, ch) (msg = (msg & 0xff00ffff) \| (((ch) & 0xff) << 16))
	96	#define SET_MSG_CPU(msg, ch) (msg = (msg & 0x00ffffff) \| (((ch) & 0xff) << 24))
1da177e4	97
475be4d8 JP	98	#define GET_MSG_SCMD(msg) ((msg) & 0xFF)
	99	#define GET_MSG_CMD(msg) ((msg) >> 8 & 0xFF)
	100	#define GET_MSG_PROC(msg) ((msg) >> 16 & 0xFF)
	101	#define GET_MSG_CPU(msg) ((msg) >> 24)
1da177e4 LT	102
	103	#else
	104	#error "Non-Intel CPU"
	105	#endif
	106
	107	#define MAX_QUEUED 7
	108
	109	#define SCHED_READ 0x01
	110	#define SCHED_WRITE 0x02
	111
475be4d8 JP	112	#define SET_RUN_TIMEOUT 2 * HZ /* 2 seconds */
475be4d8 JP	113
1da177e4	114	struct frame_buf {
475be4d8 JP	115	ulong msg;
	116	unsigned int refnum;
	117	unsigned int dt_len;
	118	unsigned int hdr_len;
	119	struct sk_buff *skb;
1da177e4	120	unsigned int copied;
475be4d8	121	struct frame_buf *next;
1da177e4 LT	122	};
1da177e4 LT	123
475be4d8 JP	124	extern int pcbit_l2_write(struct pcbit_dev *dev, ulong msg, ushort refnum,
475be4d8 JP	125	struct sk_buff *skb, unsigned short hdr_len);
1da177e4	126
7d12e780	127	extern irqreturn_t pcbit_irq_handler(int interrupt, void *);
1da177e4	128
475be4d8	129	extern struct pcbit_dev *dev_pcbit[MAX_PCBIT_CARDS];
1da177e4 LT	130
	131	#ifdef DEBUG
	132	static __inline__ void log_state(struct pcbit_dev *dev) {
475be4d8	133	printk(KERN_DEBUG "writeptr = %ld\n",
1da177e4	134	(ulong) (dev->writeptr - dev->sh_mem));
475be4d8	135	printk(KERN_DEBUG "readptr = %ld\n",
1da177e4	136	(ulong) (dev->readptr - (dev->sh_mem + BANK2)));
475be4d8	137	printk(KERN_DEBUG "{rcv_seq=%01x, send_seq=%01x, unack_seq=%01x}\n",
1da177e4 LT	138	dev->rcv_seq, dev->send_seq, dev->unack_seq);
	139	}
	140	#endif
	141
475be4d8	142	static __inline__ struct pcbit_dev chan2dev(struct pcbit_chan chan)
1da177e4	143	{
475be4d8 JP	144	struct pcbit_dev *dev;
475be4d8 JP	145	int i;
1da177e4 LT	146
1da177e4 LT	147
475be4d8 JP	148	for (i = 0; i < MAX_PCBIT_CARDS; i++)
	149	if ((dev = dev_pcbit[i]))
	150	if (dev->b1 == chan \|\| dev->b2 == chan)
	151	return dev;
	152	return NULL;
1da177e4 LT	153
	154	}
	155
475be4d8	156	static __inline__ struct pcbit_dev *finddev(int id)
1da177e4	157	{
475be4d8 JP	158	struct pcbit_dev *dev;
	159	int i;
	160
	161	for (i = 0; i < MAX_PCBIT_CARDS; i++)
	162	if ((dev = dev_pcbit[i]))
	163	if (dev->id == id)
	164	return dev;
	165	return NULL;
1da177e4 LT	166	}
	167
	168
	169	/*
	170	* Support routines for reading and writing in the board
	171	*/
	172
	173	static __inline__ void pcbit_writeb(struct pcbit_dev *dev, unsigned char dt)
	174	{
475be4d8 JP	175	writeb(dt, dev->writeptr++);
	176	if (dev->writeptr == dev->sh_mem + BANKLEN)
	177	dev->writeptr = dev->sh_mem;
1da177e4 LT	178	}
	179
	180	static __inline__ void pcbit_writew(struct pcbit_dev *dev, unsigned short dt)
	181	{
475be4d8 JP	182	int dist;
	183
	184	dist = BANKLEN - (dev->writeptr - dev->sh_mem);
	185	switch (dist) {
	186	case 2:
	187	writew(dt, dev->writeptr);
	188	dev->writeptr = dev->sh_mem;
	189	break;
	190	case 1:
	191	writeb((u_char) (dt & 0x00ffU), dev->writeptr);
	192	dev->writeptr = dev->sh_mem;
	193	writeb((u_char) (dt >> 8), dev->writeptr++);
	194	break;
	195	default:
	196	writew(dt, dev->writeptr);
	197	dev->writeptr += 2;
	198	break;
	199	};
1da177e4 LT	200	}
1da177e4 LT	201
475be4d8	202	static __inline__ void memcpy_topcbit(struct pcbit_dev dev, u_char data,
1da177e4 LT	203	int len)
1da177e4 LT	204	{
475be4d8 JP	205	int diff;
	206
	207	diff = len - (BANKLEN - (dev->writeptr - dev->sh_mem));
	208
	209	if (diff > 0)
	210	{
	211	memcpy_toio(dev->writeptr, data, len - diff);
	212	memcpy_toio(dev->sh_mem, data + (len - diff), diff);
	213	dev->writeptr = dev->sh_mem + diff;
	214	}
	215	else
	216	{
	217	memcpy_toio(dev->writeptr, data, len);
	218
	219	dev->writeptr += len;
	220	if (diff == 0)
	221	dev->writeptr = dev->sh_mem;
	222	}
1da177e4 LT	223	}
	224
	225	static __inline__ unsigned char pcbit_readb(struct pcbit_dev *dev)
	226	{
475be4d8	227	unsigned char val;
1da177e4	228
475be4d8 JP	229	val = readb(dev->readptr++);
	230	if (dev->readptr == dev->sh_mem + BANK2 + BANKLEN)
	231	dev->readptr = dev->sh_mem + BANK2;
1da177e4	232
475be4d8	233	return val;
1da177e4 LT	234	}
	235
	236	static __inline__ unsigned short pcbit_readw(struct pcbit_dev *dev)
	237	{
475be4d8 JP	238	int dist;
	239	unsigned short val;
	240
	241	dist = BANKLEN - (dev->readptr - (dev->sh_mem + BANK2));
	242	switch (dist) {
	243	case 2:
	244	val = readw(dev->readptr);
	245	dev->readptr = dev->sh_mem + BANK2;
	246	break;
	247	case 1:
	248	val = readb(dev->readptr);
	249	dev->readptr = dev->sh_mem + BANK2;
	250	val = (readb(dev->readptr++) << 8) \| val;
	251	break;
	252	default:
	253	val = readw(dev->readptr);
	254	dev->readptr += 2;
	255	break;
	256	};
	257	return val;
1da177e4 LT	258	}
1da177e4 LT	259
475be4d8	260	static __inline__ void memcpy_frompcbit(struct pcbit_dev dev, u_char data, int len)
1da177e4	261	{
475be4d8 JP	262	int diff;
	263
	264	diff = len - (BANKLEN - (dev->readptr - (dev->sh_mem + BANK2)));
	265	if (diff > 0)
	266	{
	267	memcpy_fromio(data, dev->readptr, len - diff);
	268	memcpy_fromio(data + (len - diff), dev->sh_mem + BANK2 , diff);
	269	dev->readptr = dev->sh_mem + BANK2 + diff;
	270	}
	271	else
	272	{
	273	memcpy_fromio(data, dev->readptr, len);
	274	dev->readptr += len;
	275	if (diff == 0)
	276	dev->readptr = dev->sh_mem + BANK2;
	277	}
1da177e4 LT	278	}
	279
	280
	281	#endif