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KVM: MMU: Fix hugepage pdes mapping same physical address with different access
[mirror_ubuntu-zesty-kernel.git] / drivers / kvm / kvm.h
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1#ifndef __KVM_H
2#define __KVM_H
3
4/*
5 * This work is licensed under the terms of the GNU GPL, version 2. See
6 * the COPYING file in the top-level directory.
7 */
8
9#include <linux/types.h>
10#include <linux/list.h>
11#include <linux/mutex.h>
12#include <linux/spinlock.h>
13#include <linux/mm.h>
14
15#include "vmx.h"
16#include <linux/kvm.h>
102d8325 17#include <linux/kvm_para.h>
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18
19#define CR0_PE_MASK (1ULL << 0)
20#define CR0_TS_MASK (1ULL << 3)
21#define CR0_NE_MASK (1ULL << 5)
22#define CR0_WP_MASK (1ULL << 16)
23#define CR0_NW_MASK (1ULL << 29)
24#define CR0_CD_MASK (1ULL << 30)
25#define CR0_PG_MASK (1ULL << 31)
26
27#define CR3_WPT_MASK (1ULL << 3)
28#define CR3_PCD_MASK (1ULL << 4)
29
30#define CR3_RESEVED_BITS 0x07ULL
31#define CR3_L_MODE_RESEVED_BITS (~((1ULL << 40) - 1) | 0x0fe7ULL)
32#define CR3_FLAGS_MASK ((1ULL << 5) - 1)
33
34#define CR4_VME_MASK (1ULL << 0)
35#define CR4_PSE_MASK (1ULL << 4)
36#define CR4_PAE_MASK (1ULL << 5)
37#define CR4_PGE_MASK (1ULL << 7)
38#define CR4_VMXE_MASK (1ULL << 13)
39
40#define KVM_GUEST_CR0_MASK \
41 (CR0_PG_MASK | CR0_PE_MASK | CR0_WP_MASK | CR0_NE_MASK \
42 | CR0_NW_MASK | CR0_CD_MASK)
43#define KVM_VM_CR0_ALWAYS_ON \
44 (CR0_PG_MASK | CR0_PE_MASK | CR0_WP_MASK | CR0_NE_MASK)
45#define KVM_GUEST_CR4_MASK \
46 (CR4_PSE_MASK | CR4_PAE_MASK | CR4_PGE_MASK | CR4_VMXE_MASK | CR4_VME_MASK)
47#define KVM_PMODE_VM_CR4_ALWAYS_ON (CR4_VMXE_MASK | CR4_PAE_MASK)
48#define KVM_RMODE_VM_CR4_ALWAYS_ON (CR4_VMXE_MASK | CR4_PAE_MASK | CR4_VME_MASK)
49
50#define INVALID_PAGE (~(hpa_t)0)
51#define UNMAPPED_GVA (~(gpa_t)0)
52
53#define KVM_MAX_VCPUS 1
54#define KVM_MEMORY_SLOTS 4
55#define KVM_NUM_MMU_PAGES 256
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56#define KVM_MIN_FREE_MMU_PAGES 5
57#define KVM_REFILL_PAGES 25
06465c5a 58#define KVM_MAX_CPUID_ENTRIES 40
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59
60#define FX_IMAGE_SIZE 512
61#define FX_IMAGE_ALIGN 16
62#define FX_BUF_SIZE (2 * FX_IMAGE_SIZE + FX_IMAGE_ALIGN)
63
64#define DE_VECTOR 0
65#define DF_VECTOR 8
66#define TS_VECTOR 10
67#define NP_VECTOR 11
68#define SS_VECTOR 12
69#define GP_VECTOR 13
70#define PF_VECTOR 14
71
72#define SELECTOR_TI_MASK (1 << 2)
73#define SELECTOR_RPL_MASK 0x03
74
75#define IOPL_SHIFT 12
76
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77#define KVM_PIO_PAGE_OFFSET 1
78
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79/*
80 * Address types:
81 *
82 * gva - guest virtual address
83 * gpa - guest physical address
84 * gfn - guest frame number
85 * hva - host virtual address
86 * hpa - host physical address
87 * hfn - host frame number
88 */
89
90typedef unsigned long gva_t;
91typedef u64 gpa_t;
92typedef unsigned long gfn_t;
93
94typedef unsigned long hva_t;
95typedef u64 hpa_t;
96typedef unsigned long hfn_t;
97
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98#define NR_PTE_CHAIN_ENTRIES 5
99
100struct kvm_pte_chain {
101 u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
102 struct hlist_node link;
103};
104
105/*
106 * kvm_mmu_page_role, below, is defined as:
107 *
108 * bits 0:3 - total guest paging levels (2-4, or zero for real mode)
109 * bits 4:7 - page table level for this shadow (1-4)
110 * bits 8:9 - page table quadrant for 2-level guests
111 * bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode)
d28c6cfb 112 * bits 17:18 - "access" - the user and writable bits of a huge page pde
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113 */
114union kvm_mmu_page_role {
115 unsigned word;
116 struct {
117 unsigned glevels : 4;
118 unsigned level : 4;
119 unsigned quadrant : 2;
120 unsigned pad_for_nice_hex_output : 6;
121 unsigned metaphysical : 1;
d28c6cfb 122 unsigned hugepage_access : 2;
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123 };
124};
125
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126struct kvm_mmu_page {
127 struct list_head link;
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128 struct hlist_node hash_link;
129
130 /*
131 * The following two entries are used to key the shadow page in the
132 * hash table.
133 */
134 gfn_t gfn;
135 union kvm_mmu_page_role role;
136
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137 hpa_t page_hpa;
138 unsigned long slot_bitmap; /* One bit set per slot which has memory
139 * in this shadow page.
140 */
cea0f0e7 141 int multimapped; /* More than one parent_pte? */
3bb65a22 142 int root_count; /* Currently serving as active root */
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143 union {
144 u64 *parent_pte; /* !multimapped */
145 struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
146 };
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147};
148
149struct vmcs {
150 u32 revision_id;
151 u32 abort;
152 char data[0];
153};
154
155#define vmx_msr_entry kvm_msr_entry
156
157struct kvm_vcpu;
158
159/*
160 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
161 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
162 * mode.
163 */
164struct kvm_mmu {
165 void (*new_cr3)(struct kvm_vcpu *vcpu);
166 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
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167 void (*free)(struct kvm_vcpu *vcpu);
168 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
169 hpa_t root_hpa;
170 int root_level;
171 int shadow_root_level;
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172
173 u64 *pae_root;
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174};
175
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176#define KVM_NR_MEM_OBJS 20
177
178struct kvm_mmu_memory_cache {
179 int nobjs;
180 void *objects[KVM_NR_MEM_OBJS];
181};
182
183/*
184 * We don't want allocation failures within the mmu code, so we preallocate
185 * enough memory for a single page fault in a cache.
186 */
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187struct kvm_guest_debug {
188 int enabled;
189 unsigned long bp[4];
190 int singlestep;
191};
192
193enum {
194 VCPU_REGS_RAX = 0,
195 VCPU_REGS_RCX = 1,
196 VCPU_REGS_RDX = 2,
197 VCPU_REGS_RBX = 3,
198 VCPU_REGS_RSP = 4,
199 VCPU_REGS_RBP = 5,
200 VCPU_REGS_RSI = 6,
201 VCPU_REGS_RDI = 7,
05b3e0c2 202#ifdef CONFIG_X86_64
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203 VCPU_REGS_R8 = 8,
204 VCPU_REGS_R9 = 9,
205 VCPU_REGS_R10 = 10,
206 VCPU_REGS_R11 = 11,
207 VCPU_REGS_R12 = 12,
208 VCPU_REGS_R13 = 13,
209 VCPU_REGS_R14 = 14,
210 VCPU_REGS_R15 = 15,
211#endif
212 NR_VCPU_REGS
213};
214
215enum {
216 VCPU_SREG_CS,
217 VCPU_SREG_DS,
218 VCPU_SREG_ES,
219 VCPU_SREG_FS,
220 VCPU_SREG_GS,
221 VCPU_SREG_SS,
222 VCPU_SREG_TR,
223 VCPU_SREG_LDTR,
224};
225
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226struct kvm_pio_request {
227 unsigned long count;
228 int cur_count;
229 struct page *guest_pages[2];
230 unsigned guest_page_offset;
231 int in;
232 int size;
233 int string;
234 int down;
235 int rep;
236};
237
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238struct kvm_vcpu {
239 struct kvm *kvm;
240 union {
241 struct vmcs *vmcs;
242 struct vcpu_svm *svm;
243 };
244 struct mutex mutex;
245 int cpu;
246 int launched;
9a2bb7f4 247 struct kvm_run *run;
c1150d8c 248 int interrupt_window_open;
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249 unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
250#define NR_IRQ_WORDS KVM_IRQ_BITMAP_SIZE(unsigned long)
251 unsigned long irq_pending[NR_IRQ_WORDS];
252 unsigned long regs[NR_VCPU_REGS]; /* for rsp: vcpu_load_rsp_rip() */
253 unsigned long rip; /* needs vcpu_load_rsp_rip() */
254
255 unsigned long cr0;
256 unsigned long cr2;
257 unsigned long cr3;
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258 gpa_t para_state_gpa;
259 struct page *para_state_page;
260 gpa_t hypercall_gpa;
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261 unsigned long cr4;
262 unsigned long cr8;
1342d353 263 u64 pdptrs[4]; /* pae */
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264 u64 shadow_efer;
265 u64 apic_base;
6f00e68f 266 u64 ia32_misc_enable_msr;
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267 int nmsrs;
268 struct vmx_msr_entry *guest_msrs;
269 struct vmx_msr_entry *host_msrs;
270
271 struct list_head free_pages;
272 struct kvm_mmu_page page_header_buf[KVM_NUM_MMU_PAGES];
273 struct kvm_mmu mmu;
274
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275 struct kvm_mmu_memory_cache mmu_pte_chain_cache;
276 struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
277
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278 gfn_t last_pt_write_gfn;
279 int last_pt_write_count;
280
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281 struct kvm_guest_debug guest_debug;
282
283 char fx_buf[FX_BUF_SIZE];
284 char *host_fx_image;
285 char *guest_fx_image;
286
287 int mmio_needed;
288 int mmio_read_completed;
289 int mmio_is_write;
290 int mmio_size;
291 unsigned char mmio_data[8];
292 gpa_t mmio_phys_addr;
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293 struct kvm_pio_request pio;
294 void *pio_data;
6aa8b732 295
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296 int sigset_active;
297 sigset_t sigset;
298
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299 struct {
300 int active;
301 u8 save_iopl;
302 struct kvm_save_segment {
303 u16 selector;
304 unsigned long base;
305 u32 limit;
306 u32 ar;
307 } tr, es, ds, fs, gs;
308 } rmode;
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309
310 int cpuid_nent;
311 struct kvm_cpuid_entry cpuid_entries[KVM_MAX_CPUID_ENTRIES];
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312};
313
314struct kvm_memory_slot {
315 gfn_t base_gfn;
316 unsigned long npages;
317 unsigned long flags;
318 struct page **phys_mem;
319 unsigned long *dirty_bitmap;
320};
321
322struct kvm {
323 spinlock_t lock; /* protects everything except vcpus */
324 int nmemslots;
325 struct kvm_memory_slot memslots[KVM_MEMORY_SLOTS];
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326 /*
327 * Hash table of struct kvm_mmu_page.
328 */
6aa8b732 329 struct list_head active_mmu_pages;
ebeace86 330 int n_free_mmu_pages;
cea0f0e7 331 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
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332 struct kvm_vcpu vcpus[KVM_MAX_VCPUS];
333 int memory_config_version;
334 int busy;
cd4a4e53 335 unsigned long rmap_overflow;
133de902 336 struct list_head vm_list;
bccf2150 337 struct file *filp;
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338};
339
340struct kvm_stat {
341 u32 pf_fixed;
342 u32 pf_guest;
343 u32 tlb_flush;
344 u32 invlpg;
345
346 u32 exits;
347 u32 io_exits;
348 u32 mmio_exits;
349 u32 signal_exits;
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350 u32 irq_window_exits;
351 u32 halt_exits;
352 u32 request_irq_exits;
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353 u32 irq_exits;
354};
355
356struct descriptor_table {
357 u16 limit;
358 unsigned long base;
359} __attribute__((packed));
360
361struct kvm_arch_ops {
362 int (*cpu_has_kvm_support)(void); /* __init */
363 int (*disabled_by_bios)(void); /* __init */
364 void (*hardware_enable)(void *dummy); /* __init */
365 void (*hardware_disable)(void *dummy);
366 int (*hardware_setup)(void); /* __init */
367 void (*hardware_unsetup)(void); /* __exit */
368
369 int (*vcpu_create)(struct kvm_vcpu *vcpu);
370 void (*vcpu_free)(struct kvm_vcpu *vcpu);
371
bccf2150 372 void (*vcpu_load)(struct kvm_vcpu *vcpu);
6aa8b732 373 void (*vcpu_put)(struct kvm_vcpu *vcpu);
774c47f1 374 void (*vcpu_decache)(struct kvm_vcpu *vcpu);
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375
376 int (*set_guest_debug)(struct kvm_vcpu *vcpu,
377 struct kvm_debug_guest *dbg);
378 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
379 int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
380 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
381 void (*get_segment)(struct kvm_vcpu *vcpu,
382 struct kvm_segment *var, int seg);
383 void (*set_segment)(struct kvm_vcpu *vcpu,
384 struct kvm_segment *var, int seg);
6aa8b732 385 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
399badf3 386 void (*decache_cr0_cr4_guest_bits)(struct kvm_vcpu *vcpu);
6aa8b732 387 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
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388 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
389 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
390 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
391 void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
392 void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
393 void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
394 void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
395 unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
396 void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
397 int *exception);
398 void (*cache_regs)(struct kvm_vcpu *vcpu);
399 void (*decache_regs)(struct kvm_vcpu *vcpu);
400 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
401 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
402
403 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t addr);
404 void (*tlb_flush)(struct kvm_vcpu *vcpu);
405 void (*inject_page_fault)(struct kvm_vcpu *vcpu,
406 unsigned long addr, u32 err_code);
407
408 void (*inject_gp)(struct kvm_vcpu *vcpu, unsigned err_code);
409
410 int (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run);
411 int (*vcpu_setup)(struct kvm_vcpu *vcpu);
412 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
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413 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
414 unsigned char *hypercall_addr);
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415};
416
417extern struct kvm_stat kvm_stat;
418extern struct kvm_arch_ops *kvm_arch_ops;
419
420#define kvm_printf(kvm, fmt ...) printk(KERN_DEBUG fmt)
421#define vcpu_printf(vcpu, fmt...) kvm_printf(vcpu->kvm, fmt)
422
423int kvm_init_arch(struct kvm_arch_ops *ops, struct module *module);
424void kvm_exit_arch(void);
425
426void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
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427int kvm_mmu_create(struct kvm_vcpu *vcpu);
428int kvm_mmu_setup(struct kvm_vcpu *vcpu);
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429
430int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
714b93da 431void kvm_mmu_slot_remove_write_access(struct kvm_vcpu *vcpu, int slot);
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432
433hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa);
434#define HPA_MSB ((sizeof(hpa_t) * 8) - 1)
435#define HPA_ERR_MASK ((hpa_t)1 << HPA_MSB)
436static inline int is_error_hpa(hpa_t hpa) { return hpa >> HPA_MSB; }
437hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva);
039576c0 438struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva);
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439
440void kvm_emulator_want_group7_invlpg(void);
441
442extern hpa_t bad_page_address;
443
444static inline struct page *gfn_to_page(struct kvm_memory_slot *slot, gfn_t gfn)
445{
446 return slot->phys_mem[gfn - slot->base_gfn];
447}
448
449struct kvm_memory_slot *gfn_to_memslot(struct kvm *kvm, gfn_t gfn);
450void mark_page_dirty(struct kvm *kvm, gfn_t gfn);
451
452enum emulation_result {
453 EMULATE_DONE, /* no further processing */
454 EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
455 EMULATE_FAIL, /* can't emulate this instruction */
456};
457
458int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run,
459 unsigned long cr2, u16 error_code);
460void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
461void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
462void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
463 unsigned long *rflags);
464
465unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
466void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
467 unsigned long *rflags);
468
469struct x86_emulate_ctxt;
470
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471int kvm_setup_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
472 int size, unsigned long count, int string, int down,
473 gva_t address, int rep, unsigned port);
06465c5a 474void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
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475int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
476int emulate_clts(struct kvm_vcpu *vcpu);
477int emulator_get_dr(struct x86_emulate_ctxt* ctxt, int dr,
478 unsigned long *dest);
479int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
480 unsigned long value);
481
482void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
483void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr0);
484void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr0);
485void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr0);
486void lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
487
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488int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
489int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
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490
491void fx_init(struct kvm_vcpu *vcpu);
492
493void load_msrs(struct vmx_msr_entry *e, int n);
494void save_msrs(struct vmx_msr_entry *e, int n);
495void kvm_resched(struct kvm_vcpu *vcpu);
496
497int kvm_read_guest(struct kvm_vcpu *vcpu,
498 gva_t addr,
499 unsigned long size,
500 void *dest);
501
502int kvm_write_guest(struct kvm_vcpu *vcpu,
503 gva_t addr,
504 unsigned long size,
505 void *data);
506
507unsigned long segment_base(u16 selector);
508
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509void kvm_mmu_pre_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes);
510void kvm_mmu_post_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes);
a436036b 511int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
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512void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
513
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514int kvm_hypercall(struct kvm_vcpu *vcpu, struct kvm_run *run);
515
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516static inline int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
517 u32 error_code)
518{
519 if (unlikely(vcpu->kvm->n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES))
520 kvm_mmu_free_some_pages(vcpu);
521 return vcpu->mmu.page_fault(vcpu, gva, error_code);
522}
da4a00f0 523
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524static inline struct page *_gfn_to_page(struct kvm *kvm, gfn_t gfn)
525{
526 struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn);
527 return (slot) ? slot->phys_mem[gfn - slot->base_gfn] : NULL;
528}
529
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530static inline int is_long_mode(struct kvm_vcpu *vcpu)
531{
532#ifdef CONFIG_X86_64
533 return vcpu->shadow_efer & EFER_LME;
534#else
535 return 0;
536#endif
537}
538
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539static inline int is_pae(struct kvm_vcpu *vcpu)
540{
541 return vcpu->cr4 & CR4_PAE_MASK;
542}
543
544static inline int is_pse(struct kvm_vcpu *vcpu)
545{
546 return vcpu->cr4 & CR4_PSE_MASK;
547}
548
549static inline int is_paging(struct kvm_vcpu *vcpu)
550{
551 return vcpu->cr0 & CR0_PG_MASK;
552}
553
554static inline int memslot_id(struct kvm *kvm, struct kvm_memory_slot *slot)
555{
556 return slot - kvm->memslots;
557}
558
559static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
560{
561 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
562
5972e953 563 return (struct kvm_mmu_page *)page_private(page);
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564}
565
566static inline u16 read_fs(void)
567{
568 u16 seg;
569 asm ("mov %%fs, %0" : "=g"(seg));
570 return seg;
571}
572
573static inline u16 read_gs(void)
574{
575 u16 seg;
576 asm ("mov %%gs, %0" : "=g"(seg));
577 return seg;
578}
579
580static inline u16 read_ldt(void)
581{
582 u16 ldt;
583 asm ("sldt %0" : "=g"(ldt));
584 return ldt;
585}
586
587static inline void load_fs(u16 sel)
588{
589 asm ("mov %0, %%fs" : : "rm"(sel));
590}
591
592static inline void load_gs(u16 sel)
593{
594 asm ("mov %0, %%gs" : : "rm"(sel));
595}
596
597#ifndef load_ldt
598static inline void load_ldt(u16 sel)
599{
a0610ddf 600 asm ("lldt %0" : : "rm"(sel));
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601}
602#endif
603
604static inline void get_idt(struct descriptor_table *table)
605{
606 asm ("sidt %0" : "=m"(*table));
607}
608
609static inline void get_gdt(struct descriptor_table *table)
610{
611 asm ("sgdt %0" : "=m"(*table));
612}
613
614static inline unsigned long read_tr_base(void)
615{
616 u16 tr;
617 asm ("str %0" : "=g"(tr));
618 return segment_base(tr);
619}
620
05b3e0c2 621#ifdef CONFIG_X86_64
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622static inline unsigned long read_msr(unsigned long msr)
623{
624 u64 value;
625
626 rdmsrl(msr, value);
627 return value;
628}
629#endif
630
631static inline void fx_save(void *image)
632{
633 asm ("fxsave (%0)":: "r" (image));
634}
635
636static inline void fx_restore(void *image)
637{
638 asm ("fxrstor (%0)":: "r" (image));
639}
640
641static inline void fpu_init(void)
642{
643 asm ("finit");
644}
645
646static inline u32 get_rdx_init_val(void)
647{
648 return 0x600; /* P6 family */
649}
650
651#define ASM_VMX_VMCLEAR_RAX ".byte 0x66, 0x0f, 0xc7, 0x30"
652#define ASM_VMX_VMLAUNCH ".byte 0x0f, 0x01, 0xc2"
653#define ASM_VMX_VMRESUME ".byte 0x0f, 0x01, 0xc3"
654#define ASM_VMX_VMPTRLD_RAX ".byte 0x0f, 0xc7, 0x30"
655#define ASM_VMX_VMREAD_RDX_RAX ".byte 0x0f, 0x78, 0xd0"
656#define ASM_VMX_VMWRITE_RAX_RDX ".byte 0x0f, 0x79, 0xd0"
657#define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4"
658#define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4"
659#define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30"
660
661#define MSR_IA32_TIME_STAMP_COUNTER 0x010
662
663#define TSS_IOPB_BASE_OFFSET 0x66
664#define TSS_BASE_SIZE 0x68
665#define TSS_IOPB_SIZE (65536 / 8)
666#define TSS_REDIRECTION_SIZE (256 / 8)
667#define RMODE_TSS_SIZE (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
668
6aa8b732 669#endif