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KVM: VMX: Handle NMIs before enabling interrupts and preemption
[mirror_ubuntu-jammy-kernel.git] / drivers / kvm / mmu.c
CommitLineData
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1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
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19
20#include "vmx.h"
21#include "kvm.h"
22
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23#include <linux/types.h>
24#include <linux/string.h>
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25#include <linux/mm.h>
26#include <linux/highmem.h>
27#include <linux/module.h>
28
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29#include <asm/page.h>
30#include <asm/cmpxchg.h>
6aa8b732 31
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32#undef MMU_DEBUG
33
34#undef AUDIT
35
36#ifdef AUDIT
37static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
38#else
39static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
40#endif
41
42#ifdef MMU_DEBUG
43
44#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
45#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
46
47#else
48
49#define pgprintk(x...) do { } while (0)
50#define rmap_printk(x...) do { } while (0)
51
52#endif
53
54#if defined(MMU_DEBUG) || defined(AUDIT)
55static int dbg = 1;
56#endif
6aa8b732 57
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58#ifndef MMU_DEBUG
59#define ASSERT(x) do { } while (0)
60#else
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61#define ASSERT(x) \
62 if (!(x)) { \
63 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
64 __FILE__, __LINE__, #x); \
65 }
d6c69ee9 66#endif
6aa8b732 67
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68#define PT64_PT_BITS 9
69#define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
70#define PT32_PT_BITS 10
71#define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
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72
73#define PT_WRITABLE_SHIFT 1
74
75#define PT_PRESENT_MASK (1ULL << 0)
76#define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
77#define PT_USER_MASK (1ULL << 2)
78#define PT_PWT_MASK (1ULL << 3)
79#define PT_PCD_MASK (1ULL << 4)
80#define PT_ACCESSED_MASK (1ULL << 5)
81#define PT_DIRTY_MASK (1ULL << 6)
82#define PT_PAGE_SIZE_MASK (1ULL << 7)
83#define PT_PAT_MASK (1ULL << 7)
84#define PT_GLOBAL_MASK (1ULL << 8)
85#define PT64_NX_MASK (1ULL << 63)
86
87#define PT_PAT_SHIFT 7
88#define PT_DIR_PAT_SHIFT 12
89#define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
90
91#define PT32_DIR_PSE36_SIZE 4
92#define PT32_DIR_PSE36_SHIFT 13
93#define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
94
95
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96#define PT_FIRST_AVAIL_BITS_SHIFT 9
97#define PT64_SECOND_AVAIL_BITS_SHIFT 52
98
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99#define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
100
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101#define VALID_PAGE(x) ((x) != INVALID_PAGE)
102
103#define PT64_LEVEL_BITS 9
104
105#define PT64_LEVEL_SHIFT(level) \
106 ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS )
107
108#define PT64_LEVEL_MASK(level) \
109 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
110
111#define PT64_INDEX(address, level)\
112 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
113
114
115#define PT32_LEVEL_BITS 10
116
117#define PT32_LEVEL_SHIFT(level) \
118 ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS )
119
120#define PT32_LEVEL_MASK(level) \
121 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
122
123#define PT32_INDEX(address, level)\
124 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
125
126
27aba766 127#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
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128#define PT64_DIR_BASE_ADDR_MASK \
129 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
130
131#define PT32_BASE_ADDR_MASK PAGE_MASK
132#define PT32_DIR_BASE_ADDR_MASK \
133 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
134
135
136#define PFERR_PRESENT_MASK (1U << 0)
137#define PFERR_WRITE_MASK (1U << 1)
138#define PFERR_USER_MASK (1U << 2)
73b1087e 139#define PFERR_FETCH_MASK (1U << 4)
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140
141#define PT64_ROOT_LEVEL 4
142#define PT32_ROOT_LEVEL 2
143#define PT32E_ROOT_LEVEL 3
144
145#define PT_DIRECTORY_LEVEL 2
146#define PT_PAGE_TABLE_LEVEL 1
147
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148#define RMAP_EXT 4
149
150struct kvm_rmap_desc {
151 u64 *shadow_ptes[RMAP_EXT];
152 struct kvm_rmap_desc *more;
153};
154
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155static struct kmem_cache *pte_chain_cache;
156static struct kmem_cache *rmap_desc_cache;
d3d25b04 157static struct kmem_cache *mmu_page_header_cache;
b5a33a75 158
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159static int is_write_protection(struct kvm_vcpu *vcpu)
160{
707d92fa 161 return vcpu->cr0 & X86_CR0_WP;
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162}
163
164static int is_cpuid_PSE36(void)
165{
166 return 1;
167}
168
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169static int is_nx(struct kvm_vcpu *vcpu)
170{
171 return vcpu->shadow_efer & EFER_NX;
172}
173
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174static int is_present_pte(unsigned long pte)
175{
176 return pte & PT_PRESENT_MASK;
177}
178
179static int is_writeble_pte(unsigned long pte)
180{
181 return pte & PT_WRITABLE_MASK;
182}
183
184static int is_io_pte(unsigned long pte)
185{
186 return pte & PT_SHADOW_IO_MARK;
187}
188
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189static int is_rmap_pte(u64 pte)
190{
191 return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK))
192 == (PT_WRITABLE_MASK | PT_PRESENT_MASK);
193}
194
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195static void set_shadow_pte(u64 *sptep, u64 spte)
196{
197#ifdef CONFIG_X86_64
198 set_64bit((unsigned long *)sptep, spte);
199#else
200 set_64bit((unsigned long long *)sptep, spte);
201#endif
202}
203
e2dec939 204static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 205 struct kmem_cache *base_cache, int min)
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206{
207 void *obj;
208
209 if (cache->nobjs >= min)
e2dec939 210 return 0;
714b93da 211 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 212 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 213 if (!obj)
e2dec939 214 return -ENOMEM;
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215 cache->objects[cache->nobjs++] = obj;
216 }
e2dec939 217 return 0;
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218}
219
220static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
221{
222 while (mc->nobjs)
223 kfree(mc->objects[--mc->nobjs]);
224}
225
c1158e63 226static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 227 int min)
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228{
229 struct page *page;
230
231 if (cache->nobjs >= min)
232 return 0;
233 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 234 page = alloc_page(GFP_KERNEL);
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235 if (!page)
236 return -ENOMEM;
237 set_page_private(page, 0);
238 cache->objects[cache->nobjs++] = page_address(page);
239 }
240 return 0;
241}
242
243static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
244{
245 while (mc->nobjs)
c4d198d5 246 free_page((unsigned long)mc->objects[--mc->nobjs]);
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247}
248
2e3e5882 249static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 250{
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251 int r;
252
2e3e5882 253 kvm_mmu_free_some_pages(vcpu);
e2dec939 254 r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
2e3e5882 255 pte_chain_cache, 4);
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256 if (r)
257 goto out;
258 r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
2e3e5882 259 rmap_desc_cache, 1);
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260 if (r)
261 goto out;
2e3e5882 262 r = mmu_topup_memory_cache_page(&vcpu->mmu_page_cache, 4);
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263 if (r)
264 goto out;
265 r = mmu_topup_memory_cache(&vcpu->mmu_page_header_cache,
2e3e5882 266 mmu_page_header_cache, 4);
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267out:
268 return r;
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269}
270
271static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
272{
273 mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
274 mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
c1158e63 275 mmu_free_memory_cache_page(&vcpu->mmu_page_cache);
d3d25b04 276 mmu_free_memory_cache(&vcpu->mmu_page_header_cache);
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277}
278
279static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
280 size_t size)
281{
282 void *p;
283
284 BUG_ON(!mc->nobjs);
285 p = mc->objects[--mc->nobjs];
286 memset(p, 0, size);
287 return p;
288}
289
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290static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
291{
292 return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
293 sizeof(struct kvm_pte_chain));
294}
295
90cb0529 296static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 297{
90cb0529 298 kfree(pc);
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299}
300
301static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
302{
303 return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
304 sizeof(struct kvm_rmap_desc));
305}
306
90cb0529 307static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 308{
90cb0529 309 kfree(rd);
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310}
311
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312/*
313 * Reverse mapping data structures:
314 *
315 * If page->private bit zero is zero, then page->private points to the
316 * shadow page table entry that points to page_address(page).
317 *
318 * If page->private bit zero is one, (then page->private & ~1) points
319 * to a struct kvm_rmap_desc containing more mappings.
320 */
714b93da 321static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte)
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322{
323 struct page *page;
324 struct kvm_rmap_desc *desc;
325 int i;
326
327 if (!is_rmap_pte(*spte))
328 return;
329 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
5972e953 330 if (!page_private(page)) {
cd4a4e53 331 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
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332 set_page_private(page,(unsigned long)spte);
333 } else if (!(page_private(page) & 1)) {
cd4a4e53 334 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 335 desc = mmu_alloc_rmap_desc(vcpu);
5972e953 336 desc->shadow_ptes[0] = (u64 *)page_private(page);
cd4a4e53 337 desc->shadow_ptes[1] = spte;
5972e953 338 set_page_private(page,(unsigned long)desc | 1);
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339 } else {
340 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
5972e953 341 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
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342 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
343 desc = desc->more;
344 if (desc->shadow_ptes[RMAP_EXT-1]) {
714b93da 345 desc->more = mmu_alloc_rmap_desc(vcpu);
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346 desc = desc->more;
347 }
348 for (i = 0; desc->shadow_ptes[i]; ++i)
349 ;
350 desc->shadow_ptes[i] = spte;
351 }
352}
353
90cb0529 354static void rmap_desc_remove_entry(struct page *page,
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355 struct kvm_rmap_desc *desc,
356 int i,
357 struct kvm_rmap_desc *prev_desc)
358{
359 int j;
360
361 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
362 ;
363 desc->shadow_ptes[i] = desc->shadow_ptes[j];
11718b4d 364 desc->shadow_ptes[j] = NULL;
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365 if (j != 0)
366 return;
367 if (!prev_desc && !desc->more)
5972e953 368 set_page_private(page,(unsigned long)desc->shadow_ptes[0]);
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369 else
370 if (prev_desc)
371 prev_desc->more = desc->more;
372 else
5972e953 373 set_page_private(page,(unsigned long)desc->more | 1);
90cb0529 374 mmu_free_rmap_desc(desc);
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375}
376
90cb0529 377static void rmap_remove(u64 *spte)
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378{
379 struct page *page;
380 struct kvm_rmap_desc *desc;
381 struct kvm_rmap_desc *prev_desc;
382 int i;
383
384 if (!is_rmap_pte(*spte))
385 return;
386 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
5972e953 387 if (!page_private(page)) {
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388 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
389 BUG();
5972e953 390 } else if (!(page_private(page) & 1)) {
cd4a4e53 391 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
5972e953 392 if ((u64 *)page_private(page) != spte) {
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393 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
394 spte, *spte);
395 BUG();
396 }
5972e953 397 set_page_private(page,0);
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398 } else {
399 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
5972e953 400 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
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401 prev_desc = NULL;
402 while (desc) {
403 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
404 if (desc->shadow_ptes[i] == spte) {
90cb0529 405 rmap_desc_remove_entry(page,
714b93da 406 desc, i,
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407 prev_desc);
408 return;
409 }
410 prev_desc = desc;
411 desc = desc->more;
412 }
413 BUG();
414 }
415}
416
714b93da 417static void rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn)
374cbac0 418{
714b93da 419 struct kvm *kvm = vcpu->kvm;
374cbac0 420 struct page *page;
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421 struct kvm_rmap_desc *desc;
422 u64 *spte;
423
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424 page = gfn_to_page(kvm, gfn);
425 BUG_ON(!page);
374cbac0 426
5972e953
MR
427 while (page_private(page)) {
428 if (!(page_private(page) & 1))
429 spte = (u64 *)page_private(page);
374cbac0 430 else {
5972e953 431 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
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432 spte = desc->shadow_ptes[0];
433 }
434 BUG_ON(!spte);
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435 BUG_ON((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT
436 != page_to_pfn(page));
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437 BUG_ON(!(*spte & PT_PRESENT_MASK));
438 BUG_ON(!(*spte & PT_WRITABLE_MASK));
439 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
90cb0529 440 rmap_remove(spte);
e663ee64 441 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
88a97f0b 442 kvm_flush_remote_tlbs(vcpu->kvm);
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443 }
444}
445
d6c69ee9 446#ifdef MMU_DEBUG
47ad8e68 447static int is_empty_shadow_page(u64 *spt)
6aa8b732 448{
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449 u64 *pos;
450 u64 *end;
451
47ad8e68 452 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
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453 if (*pos != 0) {
454 printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
455 pos, *pos);
6aa8b732 456 return 0;
139bdb2d 457 }
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458 return 1;
459}
d6c69ee9 460#endif
6aa8b732 461
90cb0529 462static void kvm_mmu_free_page(struct kvm *kvm,
4b02d6da 463 struct kvm_mmu_page *page_head)
260746c0 464{
47ad8e68 465 ASSERT(is_empty_shadow_page(page_head->spt));
d3d25b04 466 list_del(&page_head->link);
c1158e63 467 __free_page(virt_to_page(page_head->spt));
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468 kfree(page_head);
469 ++kvm->n_free_mmu_pages;
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470}
471
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472static unsigned kvm_page_table_hashfn(gfn_t gfn)
473{
474 return gfn;
475}
476
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477static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
478 u64 *parent_pte)
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479{
480 struct kvm_mmu_page *page;
481
d3d25b04 482 if (!vcpu->kvm->n_free_mmu_pages)
25c0de2c 483 return NULL;
6aa8b732 484
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485 page = mmu_memory_cache_alloc(&vcpu->mmu_page_header_cache,
486 sizeof *page);
487 page->spt = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
488 set_page_private(virt_to_page(page->spt), (unsigned long)page);
489 list_add(&page->link, &vcpu->kvm->active_mmu_pages);
47ad8e68 490 ASSERT(is_empty_shadow_page(page->spt));
6aa8b732 491 page->slot_bitmap = 0;
cea0f0e7 492 page->multimapped = 0;
6aa8b732 493 page->parent_pte = parent_pte;
ebeace86 494 --vcpu->kvm->n_free_mmu_pages;
25c0de2c 495 return page;
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496}
497
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498static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
499 struct kvm_mmu_page *page, u64 *parent_pte)
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500{
501 struct kvm_pte_chain *pte_chain;
502 struct hlist_node *node;
503 int i;
504
505 if (!parent_pte)
506 return;
507 if (!page->multimapped) {
508 u64 *old = page->parent_pte;
509
510 if (!old) {
511 page->parent_pte = parent_pte;
512 return;
513 }
514 page->multimapped = 1;
714b93da 515 pte_chain = mmu_alloc_pte_chain(vcpu);
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516 INIT_HLIST_HEAD(&page->parent_ptes);
517 hlist_add_head(&pte_chain->link, &page->parent_ptes);
518 pte_chain->parent_ptes[0] = old;
519 }
520 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
521 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
522 continue;
523 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
524 if (!pte_chain->parent_ptes[i]) {
525 pte_chain->parent_ptes[i] = parent_pte;
526 return;
527 }
528 }
714b93da 529 pte_chain = mmu_alloc_pte_chain(vcpu);
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530 BUG_ON(!pte_chain);
531 hlist_add_head(&pte_chain->link, &page->parent_ptes);
532 pte_chain->parent_ptes[0] = parent_pte;
533}
534
90cb0529 535static void mmu_page_remove_parent_pte(struct kvm_mmu_page *page,
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536 u64 *parent_pte)
537{
538 struct kvm_pte_chain *pte_chain;
539 struct hlist_node *node;
540 int i;
541
542 if (!page->multimapped) {
543 BUG_ON(page->parent_pte != parent_pte);
544 page->parent_pte = NULL;
545 return;
546 }
547 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
548 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
549 if (!pte_chain->parent_ptes[i])
550 break;
551 if (pte_chain->parent_ptes[i] != parent_pte)
552 continue;
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553 while (i + 1 < NR_PTE_CHAIN_ENTRIES
554 && pte_chain->parent_ptes[i + 1]) {
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555 pte_chain->parent_ptes[i]
556 = pte_chain->parent_ptes[i + 1];
557 ++i;
558 }
559 pte_chain->parent_ptes[i] = NULL;
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560 if (i == 0) {
561 hlist_del(&pte_chain->link);
90cb0529 562 mmu_free_pte_chain(pte_chain);
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563 if (hlist_empty(&page->parent_ptes)) {
564 page->multimapped = 0;
565 page->parent_pte = NULL;
566 }
567 }
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568 return;
569 }
570 BUG();
571}
572
573static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu,
574 gfn_t gfn)
575{
576 unsigned index;
577 struct hlist_head *bucket;
578 struct kvm_mmu_page *page;
579 struct hlist_node *node;
580
581 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
582 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
583 bucket = &vcpu->kvm->mmu_page_hash[index];
584 hlist_for_each_entry(page, node, bucket, hash_link)
585 if (page->gfn == gfn && !page->role.metaphysical) {
586 pgprintk("%s: found role %x\n",
587 __FUNCTION__, page->role.word);
588 return page;
589 }
590 return NULL;
591}
592
593static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
594 gfn_t gfn,
595 gva_t gaddr,
596 unsigned level,
597 int metaphysical,
d28c6cfb 598 unsigned hugepage_access,
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599 u64 *parent_pte)
600{
601 union kvm_mmu_page_role role;
602 unsigned index;
603 unsigned quadrant;
604 struct hlist_head *bucket;
605 struct kvm_mmu_page *page;
606 struct hlist_node *node;
607
608 role.word = 0;
609 role.glevels = vcpu->mmu.root_level;
610 role.level = level;
611 role.metaphysical = metaphysical;
d28c6cfb 612 role.hugepage_access = hugepage_access;
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613 if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
614 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
615 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
616 role.quadrant = quadrant;
617 }
618 pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
619 gfn, role.word);
620 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
621 bucket = &vcpu->kvm->mmu_page_hash[index];
622 hlist_for_each_entry(page, node, bucket, hash_link)
623 if (page->gfn == gfn && page->role.word == role.word) {
714b93da 624 mmu_page_add_parent_pte(vcpu, page, parent_pte);
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625 pgprintk("%s: found\n", __FUNCTION__);
626 return page;
627 }
628 page = kvm_mmu_alloc_page(vcpu, parent_pte);
629 if (!page)
630 return page;
631 pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
632 page->gfn = gfn;
633 page->role = role;
634 hlist_add_head(&page->hash_link, bucket);
374cbac0 635 if (!metaphysical)
714b93da 636 rmap_write_protect(vcpu, gfn);
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637 return page;
638}
639
90cb0529 640static void kvm_mmu_page_unlink_children(struct kvm *kvm,
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641 struct kvm_mmu_page *page)
642{
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643 unsigned i;
644 u64 *pt;
645 u64 ent;
646
47ad8e68 647 pt = page->spt;
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648
649 if (page->role.level == PT_PAGE_TABLE_LEVEL) {
650 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
651 if (pt[i] & PT_PRESENT_MASK)
90cb0529 652 rmap_remove(&pt[i]);
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653 pt[i] = 0;
654 }
90cb0529 655 kvm_flush_remote_tlbs(kvm);
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656 return;
657 }
658
659 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
660 ent = pt[i];
661
662 pt[i] = 0;
663 if (!(ent & PT_PRESENT_MASK))
664 continue;
665 ent &= PT64_BASE_ADDR_MASK;
90cb0529 666 mmu_page_remove_parent_pte(page_header(ent), &pt[i]);
697fe2e2 667 }
90cb0529 668 kvm_flush_remote_tlbs(kvm);
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669}
670
90cb0529 671static void kvm_mmu_put_page(struct kvm_mmu_page *page,
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672 u64 *parent_pte)
673{
90cb0529 674 mmu_page_remove_parent_pte(page, parent_pte);
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675}
676
90cb0529 677static void kvm_mmu_zap_page(struct kvm *kvm,
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678 struct kvm_mmu_page *page)
679{
680 u64 *parent_pte;
681
682 while (page->multimapped || page->parent_pte) {
683 if (!page->multimapped)
684 parent_pte = page->parent_pte;
685 else {
686 struct kvm_pte_chain *chain;
687
688 chain = container_of(page->parent_ptes.first,
689 struct kvm_pte_chain, link);
690 parent_pte = chain->parent_ptes[0];
691 }
697fe2e2 692 BUG_ON(!parent_pte);
90cb0529 693 kvm_mmu_put_page(page, parent_pte);
e663ee64 694 set_shadow_pte(parent_pte, 0);
a436036b 695 }
90cb0529 696 kvm_mmu_page_unlink_children(kvm, page);
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697 if (!page->root_count) {
698 hlist_del(&page->hash_link);
90cb0529 699 kvm_mmu_free_page(kvm, page);
36868f7b 700 } else
90cb0529 701 list_move(&page->link, &kvm->active_mmu_pages);
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702}
703
704static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn)
705{
706 unsigned index;
707 struct hlist_head *bucket;
708 struct kvm_mmu_page *page;
709 struct hlist_node *node, *n;
710 int r;
711
712 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
713 r = 0;
714 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
715 bucket = &vcpu->kvm->mmu_page_hash[index];
716 hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
717 if (page->gfn == gfn && !page->role.metaphysical) {
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718 pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
719 page->role.word);
90cb0529 720 kvm_mmu_zap_page(vcpu->kvm, page);
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721 r = 1;
722 }
723 return r;
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724}
725
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726static void mmu_unshadow(struct kvm_vcpu *vcpu, gfn_t gfn)
727{
728 struct kvm_mmu_page *page;
729
730 while ((page = kvm_mmu_lookup_page(vcpu, gfn)) != NULL) {
731 pgprintk("%s: zap %lx %x\n",
732 __FUNCTION__, gfn, page->role.word);
90cb0529 733 kvm_mmu_zap_page(vcpu->kvm, page);
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734 }
735}
736
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737static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
738{
739 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
740 struct kvm_mmu_page *page_head = page_header(__pa(pte));
741
742 __set_bit(slot, &page_head->slot_bitmap);
743}
744
745hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
746{
747 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
748
749 return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa;
750}
751
752hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
753{
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754 struct page *page;
755
756 ASSERT((gpa & HPA_ERR_MASK) == 0);
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757 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
758 if (!page)
6aa8b732 759 return gpa | HPA_ERR_MASK;
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760 return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT)
761 | (gpa & (PAGE_SIZE-1));
762}
763
764hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
765{
766 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
767
768 if (gpa == UNMAPPED_GVA)
769 return UNMAPPED_GVA;
770 return gpa_to_hpa(vcpu, gpa);
771}
772
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773struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
774{
775 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
776
777 if (gpa == UNMAPPED_GVA)
778 return NULL;
779 return pfn_to_page(gpa_to_hpa(vcpu, gpa) >> PAGE_SHIFT);
780}
781
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782static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
783{
784}
785
786static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
787{
788 int level = PT32E_ROOT_LEVEL;
789 hpa_t table_addr = vcpu->mmu.root_hpa;
790
791 for (; ; level--) {
792 u32 index = PT64_INDEX(v, level);
793 u64 *table;
cea0f0e7 794 u64 pte;
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795
796 ASSERT(VALID_PAGE(table_addr));
797 table = __va(table_addr);
798
799 if (level == 1) {
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800 pte = table[index];
801 if (is_present_pte(pte) && is_writeble_pte(pte))
802 return 0;
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803 mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
804 page_header_update_slot(vcpu->kvm, table, v);
805 table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
806 PT_USER_MASK;
714b93da 807 rmap_add(vcpu, &table[index]);
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808 return 0;
809 }
810
811 if (table[index] == 0) {
25c0de2c 812 struct kvm_mmu_page *new_table;
cea0f0e7 813 gfn_t pseudo_gfn;
6aa8b732 814
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815 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
816 >> PAGE_SHIFT;
817 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
818 v, level - 1,
d28c6cfb 819 1, 0, &table[index]);
25c0de2c 820 if (!new_table) {
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821 pgprintk("nonpaging_map: ENOMEM\n");
822 return -ENOMEM;
823 }
824
47ad8e68 825 table[index] = __pa(new_table->spt) | PT_PRESENT_MASK
25c0de2c 826 | PT_WRITABLE_MASK | PT_USER_MASK;
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827 }
828 table_addr = table[index] & PT64_BASE_ADDR_MASK;
829 }
830}
831
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832static void mmu_free_roots(struct kvm_vcpu *vcpu)
833{
834 int i;
3bb65a22 835 struct kvm_mmu_page *page;
17ac10ad 836
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837 if (!VALID_PAGE(vcpu->mmu.root_hpa))
838 return;
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839#ifdef CONFIG_X86_64
840 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
841 hpa_t root = vcpu->mmu.root_hpa;
842
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843 page = page_header(root);
844 --page->root_count;
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845 vcpu->mmu.root_hpa = INVALID_PAGE;
846 return;
847 }
848#endif
849 for (i = 0; i < 4; ++i) {
850 hpa_t root = vcpu->mmu.pae_root[i];
851
417726a3 852 if (root) {
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853 root &= PT64_BASE_ADDR_MASK;
854 page = page_header(root);
855 --page->root_count;
856 }
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857 vcpu->mmu.pae_root[i] = INVALID_PAGE;
858 }
859 vcpu->mmu.root_hpa = INVALID_PAGE;
860}
861
862static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
863{
864 int i;
cea0f0e7 865 gfn_t root_gfn;
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866 struct kvm_mmu_page *page;
867
cea0f0e7 868 root_gfn = vcpu->cr3 >> PAGE_SHIFT;
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869
870#ifdef CONFIG_X86_64
871 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
872 hpa_t root = vcpu->mmu.root_hpa;
873
874 ASSERT(!VALID_PAGE(root));
68a99f6d 875 page = kvm_mmu_get_page(vcpu, root_gfn, 0,
d28c6cfb 876 PT64_ROOT_LEVEL, 0, 0, NULL);
47ad8e68 877 root = __pa(page->spt);
3bb65a22 878 ++page->root_count;
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879 vcpu->mmu.root_hpa = root;
880 return;
881 }
882#endif
883 for (i = 0; i < 4; ++i) {
884 hpa_t root = vcpu->mmu.pae_root[i];
885
886 ASSERT(!VALID_PAGE(root));
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887 if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) {
888 if (!is_present_pte(vcpu->pdptrs[i])) {
889 vcpu->mmu.pae_root[i] = 0;
890 continue;
891 }
cea0f0e7 892 root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
417726a3 893 } else if (vcpu->mmu.root_level == 0)
cea0f0e7 894 root_gfn = 0;
68a99f6d 895 page = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
cea0f0e7 896 PT32_ROOT_LEVEL, !is_paging(vcpu),
d28c6cfb 897 0, NULL);
47ad8e68 898 root = __pa(page->spt);
3bb65a22 899 ++page->root_count;
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900 vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
901 }
902 vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
903}
904
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905static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
906{
907 return vaddr;
908}
909
910static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
911 u32 error_code)
912{
6aa8b732 913 gpa_t addr = gva;
ebeace86 914 hpa_t paddr;
e2dec939 915 int r;
6aa8b732 916
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917 r = mmu_topup_memory_caches(vcpu);
918 if (r)
919 return r;
714b93da 920
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921 ASSERT(vcpu);
922 ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
923
6aa8b732 924
ebeace86 925 paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK);
6aa8b732 926
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927 if (is_error_hpa(paddr))
928 return 1;
6aa8b732 929
ebeace86 930 return nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
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931}
932
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933static void nonpaging_free(struct kvm_vcpu *vcpu)
934{
17ac10ad 935 mmu_free_roots(vcpu);
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936}
937
938static int nonpaging_init_context(struct kvm_vcpu *vcpu)
939{
940 struct kvm_mmu *context = &vcpu->mmu;
941
942 context->new_cr3 = nonpaging_new_cr3;
943 context->page_fault = nonpaging_page_fault;
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944 context->gva_to_gpa = nonpaging_gva_to_gpa;
945 context->free = nonpaging_free;
cea0f0e7 946 context->root_level = 0;
6aa8b732 947 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 948 context->root_hpa = INVALID_PAGE;
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949 return 0;
950}
951
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952static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
953{
1165f5fe 954 ++vcpu->stat.tlb_flush;
cbdd1bea 955 kvm_x86_ops->tlb_flush(vcpu);
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956}
957
958static void paging_new_cr3(struct kvm_vcpu *vcpu)
959{
374cbac0 960 pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
cea0f0e7 961 mmu_free_roots(vcpu);
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962}
963
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964static void inject_page_fault(struct kvm_vcpu *vcpu,
965 u64 addr,
966 u32 err_code)
967{
cbdd1bea 968 kvm_x86_ops->inject_page_fault(vcpu, addr, err_code);
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969}
970
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971static void paging_free(struct kvm_vcpu *vcpu)
972{
973 nonpaging_free(vcpu);
974}
975
976#define PTTYPE 64
977#include "paging_tmpl.h"
978#undef PTTYPE
979
980#define PTTYPE 32
981#include "paging_tmpl.h"
982#undef PTTYPE
983
17ac10ad 984static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
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985{
986 struct kvm_mmu *context = &vcpu->mmu;
987
988 ASSERT(is_pae(vcpu));
989 context->new_cr3 = paging_new_cr3;
990 context->page_fault = paging64_page_fault;
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991 context->gva_to_gpa = paging64_gva_to_gpa;
992 context->free = paging_free;
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993 context->root_level = level;
994 context->shadow_root_level = level;
17c3ba9d 995 context->root_hpa = INVALID_PAGE;
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996 return 0;
997}
998
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999static int paging64_init_context(struct kvm_vcpu *vcpu)
1000{
1001 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1002}
1003
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1004static int paging32_init_context(struct kvm_vcpu *vcpu)
1005{
1006 struct kvm_mmu *context = &vcpu->mmu;
1007
1008 context->new_cr3 = paging_new_cr3;
1009 context->page_fault = paging32_page_fault;
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1010 context->gva_to_gpa = paging32_gva_to_gpa;
1011 context->free = paging_free;
1012 context->root_level = PT32_ROOT_LEVEL;
1013 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1014 context->root_hpa = INVALID_PAGE;
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1015 return 0;
1016}
1017
1018static int paging32E_init_context(struct kvm_vcpu *vcpu)
1019{
17ac10ad 1020 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
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1021}
1022
1023static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1024{
1025 ASSERT(vcpu);
1026 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1027
1028 if (!is_paging(vcpu))
1029 return nonpaging_init_context(vcpu);
a9058ecd 1030 else if (is_long_mode(vcpu))
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1031 return paging64_init_context(vcpu);
1032 else if (is_pae(vcpu))
1033 return paging32E_init_context(vcpu);
1034 else
1035 return paging32_init_context(vcpu);
1036}
1037
1038static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1039{
1040 ASSERT(vcpu);
1041 if (VALID_PAGE(vcpu->mmu.root_hpa)) {
1042 vcpu->mmu.free(vcpu);
1043 vcpu->mmu.root_hpa = INVALID_PAGE;
1044 }
1045}
1046
1047int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
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1048{
1049 destroy_kvm_mmu(vcpu);
1050 return init_kvm_mmu(vcpu);
1051}
1052
1053int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 1054{
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1055 int r;
1056
11ec2804 1057 mutex_lock(&vcpu->kvm->lock);
e2dec939 1058 r = mmu_topup_memory_caches(vcpu);
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1059 if (r)
1060 goto out;
1061 mmu_alloc_roots(vcpu);
cbdd1bea 1062 kvm_x86_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
17c3ba9d 1063 kvm_mmu_flush_tlb(vcpu);
714b93da 1064out:
11ec2804 1065 mutex_unlock(&vcpu->kvm->lock);
714b93da 1066 return r;
6aa8b732 1067}
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1068EXPORT_SYMBOL_GPL(kvm_mmu_load);
1069
1070void kvm_mmu_unload(struct kvm_vcpu *vcpu)
1071{
1072 mmu_free_roots(vcpu);
1073}
6aa8b732 1074
09072daf 1075static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
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1076 struct kvm_mmu_page *page,
1077 u64 *spte)
1078{
1079 u64 pte;
1080 struct kvm_mmu_page *child;
1081
1082 pte = *spte;
1083 if (is_present_pte(pte)) {
1084 if (page->role.level == PT_PAGE_TABLE_LEVEL)
90cb0529 1085 rmap_remove(spte);
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1086 else {
1087 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 1088 mmu_page_remove_parent_pte(child, spte);
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1089 }
1090 }
7f2145ad 1091 set_shadow_pte(spte, 0);
d9e368d6 1092 kvm_flush_remote_tlbs(vcpu->kvm);
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1093}
1094
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1095static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
1096 struct kvm_mmu_page *page,
1097 u64 *spte,
1098 const void *new, int bytes)
1099{
1100 if (page->role.level != PT_PAGE_TABLE_LEVEL)
1101 return;
1102
1103 if (page->role.glevels == PT32_ROOT_LEVEL)
1104 paging32_update_pte(vcpu, page, spte, new, bytes);
1105 else
1106 paging64_update_pte(vcpu, page, spte, new, bytes);
1107}
1108
09072daf 1109void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
fe551881 1110 const u8 *new, int bytes)
da4a00f0 1111{
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1112 gfn_t gfn = gpa >> PAGE_SHIFT;
1113 struct kvm_mmu_page *page;
0e7bc4b9 1114 struct hlist_node *node, *n;
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1115 struct hlist_head *bucket;
1116 unsigned index;
1117 u64 *spte;
9b7a0325 1118 unsigned offset = offset_in_page(gpa);
0e7bc4b9 1119 unsigned pte_size;
9b7a0325 1120 unsigned page_offset;
0e7bc4b9 1121 unsigned misaligned;
fce0657f 1122 unsigned quadrant;
9b7a0325 1123 int level;
86a5ba02 1124 int flooded = 0;
ac1b714e 1125 int npte;
9b7a0325 1126
da4a00f0 1127 pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
86a5ba02
AK
1128 if (gfn == vcpu->last_pt_write_gfn) {
1129 ++vcpu->last_pt_write_count;
1130 if (vcpu->last_pt_write_count >= 3)
1131 flooded = 1;
1132 } else {
1133 vcpu->last_pt_write_gfn = gfn;
1134 vcpu->last_pt_write_count = 1;
1135 }
9b7a0325
AK
1136 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
1137 bucket = &vcpu->kvm->mmu_page_hash[index];
0e7bc4b9 1138 hlist_for_each_entry_safe(page, node, n, bucket, hash_link) {
9b7a0325
AK
1139 if (page->gfn != gfn || page->role.metaphysical)
1140 continue;
0e7bc4b9
AK
1141 pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
1142 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 1143 misaligned |= bytes < 4;
86a5ba02 1144 if (misaligned || flooded) {
0e7bc4b9
AK
1145 /*
1146 * Misaligned accesses are too much trouble to fix
1147 * up; also, they usually indicate a page is not used
1148 * as a page table.
86a5ba02
AK
1149 *
1150 * If we're seeing too many writes to a page,
1151 * it may no longer be a page table, or we may be
1152 * forking, in which case it is better to unmap the
1153 * page.
0e7bc4b9
AK
1154 */
1155 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
1156 gpa, bytes, page->role.word);
90cb0529 1157 kvm_mmu_zap_page(vcpu->kvm, page);
0e7bc4b9
AK
1158 continue;
1159 }
9b7a0325
AK
1160 page_offset = offset;
1161 level = page->role.level;
ac1b714e 1162 npte = 1;
9b7a0325 1163 if (page->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK
1164 page_offset <<= 1; /* 32->64 */
1165 /*
1166 * A 32-bit pde maps 4MB while the shadow pdes map
1167 * only 2MB. So we need to double the offset again
1168 * and zap two pdes instead of one.
1169 */
1170 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 1171 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK
1172 page_offset <<= 1;
1173 npte = 2;
1174 }
fce0657f 1175 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 1176 page_offset &= ~PAGE_MASK;
fce0657f
AK
1177 if (quadrant != page->role.quadrant)
1178 continue;
9b7a0325 1179 }
47ad8e68 1180 spte = &page->spt[page_offset / sizeof(*spte)];
ac1b714e 1181 while (npte--) {
09072daf 1182 mmu_pte_write_zap_pte(vcpu, page, spte);
0028425f 1183 mmu_pte_write_new_pte(vcpu, page, spte, new, bytes);
ac1b714e 1184 ++spte;
9b7a0325 1185 }
9b7a0325 1186 }
da4a00f0
AK
1187}
1188
a436036b
AK
1189int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1190{
1191 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
1192
1193 return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT);
1194}
1195
22d95b12 1196void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86
AK
1197{
1198 while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
1199 struct kvm_mmu_page *page;
1200
1201 page = container_of(vcpu->kvm->active_mmu_pages.prev,
1202 struct kvm_mmu_page, link);
90cb0529 1203 kvm_mmu_zap_page(vcpu->kvm, page);
ebeace86
AK
1204 }
1205}
ebeace86 1206
6aa8b732
AK
1207static void free_mmu_pages(struct kvm_vcpu *vcpu)
1208{
f51234c2 1209 struct kvm_mmu_page *page;
6aa8b732 1210
f51234c2
AK
1211 while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
1212 page = container_of(vcpu->kvm->active_mmu_pages.next,
1213 struct kvm_mmu_page, link);
90cb0529 1214 kvm_mmu_zap_page(vcpu->kvm, page);
f51234c2 1215 }
17ac10ad 1216 free_page((unsigned long)vcpu->mmu.pae_root);
6aa8b732
AK
1217}
1218
1219static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1220{
17ac10ad 1221 struct page *page;
6aa8b732
AK
1222 int i;
1223
1224 ASSERT(vcpu);
1225
d3d25b04 1226 vcpu->kvm->n_free_mmu_pages = KVM_NUM_MMU_PAGES;
17ac10ad
AK
1227
1228 /*
1229 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1230 * Therefore we need to allocate shadow page tables in the first
1231 * 4GB of memory, which happens to fit the DMA32 zone.
1232 */
1233 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1234 if (!page)
1235 goto error_1;
1236 vcpu->mmu.pae_root = page_address(page);
1237 for (i = 0; i < 4; ++i)
1238 vcpu->mmu.pae_root[i] = INVALID_PAGE;
1239
6aa8b732
AK
1240 return 0;
1241
1242error_1:
1243 free_mmu_pages(vcpu);
1244 return -ENOMEM;
1245}
1246
8018c27b 1247int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 1248{
6aa8b732
AK
1249 ASSERT(vcpu);
1250 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
6aa8b732 1251
8018c27b
IM
1252 return alloc_mmu_pages(vcpu);
1253}
6aa8b732 1254
8018c27b
IM
1255int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1256{
1257 ASSERT(vcpu);
1258 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
2c264957 1259
8018c27b 1260 return init_kvm_mmu(vcpu);
6aa8b732
AK
1261}
1262
1263void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1264{
1265 ASSERT(vcpu);
1266
1267 destroy_kvm_mmu(vcpu);
1268 free_mmu_pages(vcpu);
714b93da 1269 mmu_free_memory_caches(vcpu);
6aa8b732
AK
1270}
1271
90cb0529 1272void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732
AK
1273{
1274 struct kvm_mmu_page *page;
1275
1276 list_for_each_entry(page, &kvm->active_mmu_pages, link) {
1277 int i;
1278 u64 *pt;
1279
1280 if (!test_bit(slot, &page->slot_bitmap))
1281 continue;
1282
47ad8e68 1283 pt = page->spt;
6aa8b732
AK
1284 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1285 /* avoid RMW */
cd4a4e53 1286 if (pt[i] & PT_WRITABLE_MASK) {
90cb0529 1287 rmap_remove(&pt[i]);
6aa8b732 1288 pt[i] &= ~PT_WRITABLE_MASK;
cd4a4e53 1289 }
6aa8b732
AK
1290 }
1291}
37a7d8b0 1292
90cb0529 1293void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 1294{
90cb0529 1295 struct kvm_mmu_page *page, *node;
e0fa826f 1296
90cb0529
AK
1297 list_for_each_entry_safe(page, node, &kvm->active_mmu_pages, link)
1298 kvm_mmu_zap_page(kvm, page);
e0fa826f 1299
90cb0529 1300 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL
1301}
1302
b5a33a75
AK
1303void kvm_mmu_module_exit(void)
1304{
1305 if (pte_chain_cache)
1306 kmem_cache_destroy(pte_chain_cache);
1307 if (rmap_desc_cache)
1308 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK
1309 if (mmu_page_header_cache)
1310 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK
1311}
1312
1313int kvm_mmu_module_init(void)
1314{
1315 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
1316 sizeof(struct kvm_pte_chain),
20c2df83 1317 0, 0, NULL);
b5a33a75
AK
1318 if (!pte_chain_cache)
1319 goto nomem;
1320 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
1321 sizeof(struct kvm_rmap_desc),
20c2df83 1322 0, 0, NULL);
b5a33a75
AK
1323 if (!rmap_desc_cache)
1324 goto nomem;
1325
d3d25b04
AK
1326 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
1327 sizeof(struct kvm_mmu_page),
20c2df83 1328 0, 0, NULL);
d3d25b04
AK
1329 if (!mmu_page_header_cache)
1330 goto nomem;
1331
b5a33a75
AK
1332 return 0;
1333
1334nomem:
1335 kvm_mmu_module_exit();
1336 return -ENOMEM;
1337}
1338
37a7d8b0
AK
1339#ifdef AUDIT
1340
1341static const char *audit_msg;
1342
1343static gva_t canonicalize(gva_t gva)
1344{
1345#ifdef CONFIG_X86_64
1346 gva = (long long)(gva << 16) >> 16;
1347#endif
1348 return gva;
1349}
1350
1351static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
1352 gva_t va, int level)
1353{
1354 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
1355 int i;
1356 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
1357
1358 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
1359 u64 ent = pt[i];
1360
2807696c 1361 if (!(ent & PT_PRESENT_MASK))
37a7d8b0
AK
1362 continue;
1363
1364 va = canonicalize(va);
1365 if (level > 1)
1366 audit_mappings_page(vcpu, ent, va, level - 1);
1367 else {
1368 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va);
1369 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
1370
1371 if ((ent & PT_PRESENT_MASK)
1372 && (ent & PT64_BASE_ADDR_MASK) != hpa)
1373 printk(KERN_ERR "audit error: (%s) levels %d"
1374 " gva %lx gpa %llx hpa %llx ent %llx\n",
1375 audit_msg, vcpu->mmu.root_level,
1376 va, gpa, hpa, ent);
1377 }
1378 }
1379}
1380
1381static void audit_mappings(struct kvm_vcpu *vcpu)
1382{
1ea252af 1383 unsigned i;
37a7d8b0
AK
1384
1385 if (vcpu->mmu.root_level == 4)
1386 audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4);
1387 else
1388 for (i = 0; i < 4; ++i)
1389 if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK)
1390 audit_mappings_page(vcpu,
1391 vcpu->mmu.pae_root[i],
1392 i << 30,
1393 2);
1394}
1395
1396static int count_rmaps(struct kvm_vcpu *vcpu)
1397{
1398 int nmaps = 0;
1399 int i, j, k;
1400
1401 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
1402 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
1403 struct kvm_rmap_desc *d;
1404
1405 for (j = 0; j < m->npages; ++j) {
1406 struct page *page = m->phys_mem[j];
1407
1408 if (!page->private)
1409 continue;
1410 if (!(page->private & 1)) {
1411 ++nmaps;
1412 continue;
1413 }
1414 d = (struct kvm_rmap_desc *)(page->private & ~1ul);
1415 while (d) {
1416 for (k = 0; k < RMAP_EXT; ++k)
1417 if (d->shadow_ptes[k])
1418 ++nmaps;
1419 else
1420 break;
1421 d = d->more;
1422 }
1423 }
1424 }
1425 return nmaps;
1426}
1427
1428static int count_writable_mappings(struct kvm_vcpu *vcpu)
1429{
1430 int nmaps = 0;
1431 struct kvm_mmu_page *page;
1432 int i;
1433
1434 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
47ad8e68 1435 u64 *pt = page->spt;
37a7d8b0
AK
1436
1437 if (page->role.level != PT_PAGE_TABLE_LEVEL)
1438 continue;
1439
1440 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1441 u64 ent = pt[i];
1442
1443 if (!(ent & PT_PRESENT_MASK))
1444 continue;
1445 if (!(ent & PT_WRITABLE_MASK))
1446 continue;
1447 ++nmaps;
1448 }
1449 }
1450 return nmaps;
1451}
1452
1453static void audit_rmap(struct kvm_vcpu *vcpu)
1454{
1455 int n_rmap = count_rmaps(vcpu);
1456 int n_actual = count_writable_mappings(vcpu);
1457
1458 if (n_rmap != n_actual)
1459 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
1460 __FUNCTION__, audit_msg, n_rmap, n_actual);
1461}
1462
1463static void audit_write_protection(struct kvm_vcpu *vcpu)
1464{
1465 struct kvm_mmu_page *page;
1466
1467 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
1468 hfn_t hfn;
1469 struct page *pg;
1470
1471 if (page->role.metaphysical)
1472 continue;
1473
1474 hfn = gpa_to_hpa(vcpu, (gpa_t)page->gfn << PAGE_SHIFT)
1475 >> PAGE_SHIFT;
1476 pg = pfn_to_page(hfn);
1477 if (pg->private)
1478 printk(KERN_ERR "%s: (%s) shadow page has writable"
1479 " mappings: gfn %lx role %x\n",
1480 __FUNCTION__, audit_msg, page->gfn,
1481 page->role.word);
1482 }
1483}
1484
1485static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
1486{
1487 int olddbg = dbg;
1488
1489 dbg = 0;
1490 audit_msg = msg;
1491 audit_rmap(vcpu);
1492 audit_write_protection(vcpu);
1493 audit_mappings(vcpu);
1494 dbg = olddbg;
1495}
1496
1497#endif