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KVM: MMU: Merge set_pte() and set_pte_common()
[mirror_ubuntu-bionic-kernel.git] / drivers / kvm / mmu.c
CommitLineData
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1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
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19
20#include "vmx.h"
21#include "kvm.h"
34c16eec 22#include "x86.h"
e495606d 23
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24#include <linux/types.h>
25#include <linux/string.h>
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26#include <linux/mm.h>
27#include <linux/highmem.h>
28#include <linux/module.h>
29
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30#include <asm/page.h>
31#include <asm/cmpxchg.h>
4e542370 32#include <asm/io.h>
6aa8b732 33
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34#undef MMU_DEBUG
35
36#undef AUDIT
37
38#ifdef AUDIT
39static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
40#else
41static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
42#endif
43
44#ifdef MMU_DEBUG
45
46#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
47#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
48
49#else
50
51#define pgprintk(x...) do { } while (0)
52#define rmap_printk(x...) do { } while (0)
53
54#endif
55
56#if defined(MMU_DEBUG) || defined(AUDIT)
57static int dbg = 1;
58#endif
6aa8b732 59
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60#ifndef MMU_DEBUG
61#define ASSERT(x) do { } while (0)
62#else
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63#define ASSERT(x) \
64 if (!(x)) { \
65 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
66 __FILE__, __LINE__, #x); \
67 }
d6c69ee9 68#endif
6aa8b732 69
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70#define PT64_PT_BITS 9
71#define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
72#define PT32_PT_BITS 10
73#define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
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74
75#define PT_WRITABLE_SHIFT 1
76
77#define PT_PRESENT_MASK (1ULL << 0)
78#define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
79#define PT_USER_MASK (1ULL << 2)
80#define PT_PWT_MASK (1ULL << 3)
81#define PT_PCD_MASK (1ULL << 4)
82#define PT_ACCESSED_MASK (1ULL << 5)
83#define PT_DIRTY_MASK (1ULL << 6)
84#define PT_PAGE_SIZE_MASK (1ULL << 7)
85#define PT_PAT_MASK (1ULL << 7)
86#define PT_GLOBAL_MASK (1ULL << 8)
87#define PT64_NX_MASK (1ULL << 63)
88
89#define PT_PAT_SHIFT 7
90#define PT_DIR_PAT_SHIFT 12
91#define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
92
93#define PT32_DIR_PSE36_SIZE 4
94#define PT32_DIR_PSE36_SHIFT 13
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95#define PT32_DIR_PSE36_MASK \
96 (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
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97
98
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99#define PT_FIRST_AVAIL_BITS_SHIFT 9
100#define PT64_SECOND_AVAIL_BITS_SHIFT 52
101
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102#define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
103
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104#define VALID_PAGE(x) ((x) != INVALID_PAGE)
105
106#define PT64_LEVEL_BITS 9
107
108#define PT64_LEVEL_SHIFT(level) \
d77c26fc 109 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
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110
111#define PT64_LEVEL_MASK(level) \
112 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
113
114#define PT64_INDEX(address, level)\
115 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
116
117
118#define PT32_LEVEL_BITS 10
119
120#define PT32_LEVEL_SHIFT(level) \
d77c26fc 121 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
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122
123#define PT32_LEVEL_MASK(level) \
124 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
125
126#define PT32_INDEX(address, level)\
127 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
128
129
27aba766 130#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
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131#define PT64_DIR_BASE_ADDR_MASK \
132 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
133
134#define PT32_BASE_ADDR_MASK PAGE_MASK
135#define PT32_DIR_BASE_ADDR_MASK \
136 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
137
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138#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
139 | PT64_NX_MASK)
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140
141#define PFERR_PRESENT_MASK (1U << 0)
142#define PFERR_WRITE_MASK (1U << 1)
143#define PFERR_USER_MASK (1U << 2)
73b1087e 144#define PFERR_FETCH_MASK (1U << 4)
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145
146#define PT64_ROOT_LEVEL 4
147#define PT32_ROOT_LEVEL 2
148#define PT32E_ROOT_LEVEL 3
149
150#define PT_DIRECTORY_LEVEL 2
151#define PT_PAGE_TABLE_LEVEL 1
152
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153#define RMAP_EXT 4
154
155struct kvm_rmap_desc {
156 u64 *shadow_ptes[RMAP_EXT];
157 struct kvm_rmap_desc *more;
158};
159
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160static struct kmem_cache *pte_chain_cache;
161static struct kmem_cache *rmap_desc_cache;
d3d25b04 162static struct kmem_cache *mmu_page_header_cache;
b5a33a75 163
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164static u64 __read_mostly shadow_trap_nonpresent_pte;
165static u64 __read_mostly shadow_notrap_nonpresent_pte;
166
167void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
168{
169 shadow_trap_nonpresent_pte = trap_pte;
170 shadow_notrap_nonpresent_pte = notrap_pte;
171}
172EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
173
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174static int is_write_protection(struct kvm_vcpu *vcpu)
175{
707d92fa 176 return vcpu->cr0 & X86_CR0_WP;
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177}
178
179static int is_cpuid_PSE36(void)
180{
181 return 1;
182}
183
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184static int is_nx(struct kvm_vcpu *vcpu)
185{
186 return vcpu->shadow_efer & EFER_NX;
187}
188
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189static int is_present_pte(unsigned long pte)
190{
191 return pte & PT_PRESENT_MASK;
192}
193
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194static int is_shadow_present_pte(u64 pte)
195{
196 pte &= ~PT_SHADOW_IO_MARK;
197 return pte != shadow_trap_nonpresent_pte
198 && pte != shadow_notrap_nonpresent_pte;
199}
200
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201static int is_writeble_pte(unsigned long pte)
202{
203 return pte & PT_WRITABLE_MASK;
204}
205
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206static int is_dirty_pte(unsigned long pte)
207{
208 return pte & PT_DIRTY_MASK;
209}
210
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211static int is_io_pte(unsigned long pte)
212{
213 return pte & PT_SHADOW_IO_MARK;
214}
215
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216static int is_rmap_pte(u64 pte)
217{
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218 return pte != shadow_trap_nonpresent_pte
219 && pte != shadow_notrap_nonpresent_pte;
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220}
221
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222static gfn_t pse36_gfn_delta(u32 gpte)
223{
224 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
225
226 return (gpte & PT32_DIR_PSE36_MASK) << shift;
227}
228
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229static void set_shadow_pte(u64 *sptep, u64 spte)
230{
231#ifdef CONFIG_X86_64
232 set_64bit((unsigned long *)sptep, spte);
233#else
234 set_64bit((unsigned long long *)sptep, spte);
235#endif
236}
237
e2dec939 238static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 239 struct kmem_cache *base_cache, int min)
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240{
241 void *obj;
242
243 if (cache->nobjs >= min)
e2dec939 244 return 0;
714b93da 245 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 246 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 247 if (!obj)
e2dec939 248 return -ENOMEM;
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249 cache->objects[cache->nobjs++] = obj;
250 }
e2dec939 251 return 0;
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252}
253
254static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
255{
256 while (mc->nobjs)
257 kfree(mc->objects[--mc->nobjs]);
258}
259
c1158e63 260static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 261 int min)
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262{
263 struct page *page;
264
265 if (cache->nobjs >= min)
266 return 0;
267 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 268 page = alloc_page(GFP_KERNEL);
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269 if (!page)
270 return -ENOMEM;
271 set_page_private(page, 0);
272 cache->objects[cache->nobjs++] = page_address(page);
273 }
274 return 0;
275}
276
277static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
278{
279 while (mc->nobjs)
c4d198d5 280 free_page((unsigned long)mc->objects[--mc->nobjs]);
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281}
282
2e3e5882 283static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 284{
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285 int r;
286
2e3e5882 287 kvm_mmu_free_some_pages(vcpu);
e2dec939 288 r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
2e3e5882 289 pte_chain_cache, 4);
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290 if (r)
291 goto out;
292 r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
2e3e5882 293 rmap_desc_cache, 1);
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294 if (r)
295 goto out;
290fc38d 296 r = mmu_topup_memory_cache_page(&vcpu->mmu_page_cache, 8);
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297 if (r)
298 goto out;
299 r = mmu_topup_memory_cache(&vcpu->mmu_page_header_cache,
2e3e5882 300 mmu_page_header_cache, 4);
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301out:
302 return r;
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303}
304
305static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
306{
307 mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
308 mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
c1158e63 309 mmu_free_memory_cache_page(&vcpu->mmu_page_cache);
d3d25b04 310 mmu_free_memory_cache(&vcpu->mmu_page_header_cache);
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311}
312
313static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
314 size_t size)
315{
316 void *p;
317
318 BUG_ON(!mc->nobjs);
319 p = mc->objects[--mc->nobjs];
320 memset(p, 0, size);
321 return p;
322}
323
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324static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
325{
326 return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
327 sizeof(struct kvm_pte_chain));
328}
329
90cb0529 330static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 331{
90cb0529 332 kfree(pc);
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333}
334
335static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
336{
337 return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
338 sizeof(struct kvm_rmap_desc));
339}
340
90cb0529 341static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 342{
90cb0529 343 kfree(rd);
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344}
345
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346/*
347 * Take gfn and return the reverse mapping to it.
348 * Note: gfn must be unaliased before this function get called
349 */
350
351static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn)
352{
353 struct kvm_memory_slot *slot;
354
355 slot = gfn_to_memslot(kvm, gfn);
356 return &slot->rmap[gfn - slot->base_gfn];
357}
358
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359/*
360 * Reverse mapping data structures:
361 *
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362 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
363 * that points to page_address(page).
cd4a4e53 364 *
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365 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
366 * containing more mappings.
cd4a4e53 367 */
290fc38d 368static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
cd4a4e53 369{
290fc38d 370 struct kvm_mmu_page *page;
cd4a4e53 371 struct kvm_rmap_desc *desc;
290fc38d 372 unsigned long *rmapp;
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373 int i;
374
375 if (!is_rmap_pte(*spte))
376 return;
290fc38d
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377 gfn = unalias_gfn(vcpu->kvm, gfn);
378 page = page_header(__pa(spte));
379 page->gfns[spte - page->spt] = gfn;
380 rmapp = gfn_to_rmap(vcpu->kvm, gfn);
381 if (!*rmapp) {
cd4a4e53 382 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
290fc38d
IE
383 *rmapp = (unsigned long)spte;
384 } else if (!(*rmapp & 1)) {
cd4a4e53 385 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 386 desc = mmu_alloc_rmap_desc(vcpu);
290fc38d 387 desc->shadow_ptes[0] = (u64 *)*rmapp;
cd4a4e53 388 desc->shadow_ptes[1] = spte;
290fc38d 389 *rmapp = (unsigned long)desc | 1;
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390 } else {
391 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 392 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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393 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
394 desc = desc->more;
395 if (desc->shadow_ptes[RMAP_EXT-1]) {
714b93da 396 desc->more = mmu_alloc_rmap_desc(vcpu);
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397 desc = desc->more;
398 }
399 for (i = 0; desc->shadow_ptes[i]; ++i)
400 ;
401 desc->shadow_ptes[i] = spte;
402 }
403}
404
290fc38d 405static void rmap_desc_remove_entry(unsigned long *rmapp,
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406 struct kvm_rmap_desc *desc,
407 int i,
408 struct kvm_rmap_desc *prev_desc)
409{
410 int j;
411
412 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
413 ;
414 desc->shadow_ptes[i] = desc->shadow_ptes[j];
11718b4d 415 desc->shadow_ptes[j] = NULL;
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416 if (j != 0)
417 return;
418 if (!prev_desc && !desc->more)
290fc38d 419 *rmapp = (unsigned long)desc->shadow_ptes[0];
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420 else
421 if (prev_desc)
422 prev_desc->more = desc->more;
423 else
290fc38d 424 *rmapp = (unsigned long)desc->more | 1;
90cb0529 425 mmu_free_rmap_desc(desc);
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426}
427
290fc38d 428static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 429{
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430 struct kvm_rmap_desc *desc;
431 struct kvm_rmap_desc *prev_desc;
290fc38d 432 struct kvm_mmu_page *page;
b4231d61 433 struct page *release_page;
290fc38d 434 unsigned long *rmapp;
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435 int i;
436
437 if (!is_rmap_pte(*spte))
438 return;
290fc38d 439 page = page_header(__pa(spte));
b4231d61
IE
440 release_page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
441 if (is_writeble_pte(*spte))
442 kvm_release_page_dirty(release_page);
443 else
444 kvm_release_page_clean(release_page);
290fc38d
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445 rmapp = gfn_to_rmap(kvm, page->gfns[spte - page->spt]);
446 if (!*rmapp) {
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447 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
448 BUG();
290fc38d 449 } else if (!(*rmapp & 1)) {
cd4a4e53 450 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 451 if ((u64 *)*rmapp != spte) {
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452 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
453 spte, *spte);
454 BUG();
455 }
290fc38d 456 *rmapp = 0;
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457 } else {
458 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 459 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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460 prev_desc = NULL;
461 while (desc) {
462 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
463 if (desc->shadow_ptes[i] == spte) {
290fc38d 464 rmap_desc_remove_entry(rmapp,
714b93da 465 desc, i,
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466 prev_desc);
467 return;
468 }
469 prev_desc = desc;
470 desc = desc->more;
471 }
472 BUG();
473 }
474}
475
98348e95 476static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 477{
374cbac0 478 struct kvm_rmap_desc *desc;
98348e95
IE
479 struct kvm_rmap_desc *prev_desc;
480 u64 *prev_spte;
481 int i;
482
483 if (!*rmapp)
484 return NULL;
485 else if (!(*rmapp & 1)) {
486 if (!spte)
487 return (u64 *)*rmapp;
488 return NULL;
489 }
490 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
491 prev_desc = NULL;
492 prev_spte = NULL;
493 while (desc) {
494 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
495 if (prev_spte == spte)
496 return desc->shadow_ptes[i];
497 prev_spte = desc->shadow_ptes[i];
498 }
499 desc = desc->more;
500 }
501 return NULL;
502}
503
504static void rmap_write_protect(struct kvm *kvm, u64 gfn)
505{
290fc38d 506 unsigned long *rmapp;
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507 u64 *spte;
508
4a4c9924
AL
509 gfn = unalias_gfn(kvm, gfn);
510 rmapp = gfn_to_rmap(kvm, gfn);
374cbac0 511
98348e95
IE
512 spte = rmap_next(kvm, rmapp, NULL);
513 while (spte) {
374cbac0 514 BUG_ON(!spte);
374cbac0 515 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 516 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
9647c14c
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517 if (is_writeble_pte(*spte))
518 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
4a4c9924 519 kvm_flush_remote_tlbs(kvm);
9647c14c 520 spte = rmap_next(kvm, rmapp, spte);
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521 }
522}
523
d6c69ee9 524#ifdef MMU_DEBUG
47ad8e68 525static int is_empty_shadow_page(u64 *spt)
6aa8b732 526{
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527 u64 *pos;
528 u64 *end;
529
47ad8e68 530 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
c7addb90 531 if ((*pos & ~PT_SHADOW_IO_MARK) != shadow_trap_nonpresent_pte) {
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532 printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
533 pos, *pos);
6aa8b732 534 return 0;
139bdb2d 535 }
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536 return 1;
537}
d6c69ee9 538#endif
6aa8b732 539
90cb0529 540static void kvm_mmu_free_page(struct kvm *kvm,
4b02d6da 541 struct kvm_mmu_page *page_head)
260746c0 542{
47ad8e68 543 ASSERT(is_empty_shadow_page(page_head->spt));
d3d25b04 544 list_del(&page_head->link);
c1158e63 545 __free_page(virt_to_page(page_head->spt));
290fc38d 546 __free_page(virt_to_page(page_head->gfns));
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547 kfree(page_head);
548 ++kvm->n_free_mmu_pages;
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549}
550
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551static unsigned kvm_page_table_hashfn(gfn_t gfn)
552{
553 return gfn;
554}
555
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556static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
557 u64 *parent_pte)
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558{
559 struct kvm_mmu_page *page;
560
d3d25b04 561 if (!vcpu->kvm->n_free_mmu_pages)
25c0de2c 562 return NULL;
6aa8b732 563
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564 page = mmu_memory_cache_alloc(&vcpu->mmu_page_header_cache,
565 sizeof *page);
566 page->spt = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
290fc38d 567 page->gfns = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
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568 set_page_private(virt_to_page(page->spt), (unsigned long)page);
569 list_add(&page->link, &vcpu->kvm->active_mmu_pages);
47ad8e68 570 ASSERT(is_empty_shadow_page(page->spt));
6aa8b732 571 page->slot_bitmap = 0;
cea0f0e7 572 page->multimapped = 0;
6aa8b732 573 page->parent_pte = parent_pte;
ebeace86 574 --vcpu->kvm->n_free_mmu_pages;
25c0de2c 575 return page;
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576}
577
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578static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
579 struct kvm_mmu_page *page, u64 *parent_pte)
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580{
581 struct kvm_pte_chain *pte_chain;
582 struct hlist_node *node;
583 int i;
584
585 if (!parent_pte)
586 return;
587 if (!page->multimapped) {
588 u64 *old = page->parent_pte;
589
590 if (!old) {
591 page->parent_pte = parent_pte;
592 return;
593 }
594 page->multimapped = 1;
714b93da 595 pte_chain = mmu_alloc_pte_chain(vcpu);
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596 INIT_HLIST_HEAD(&page->parent_ptes);
597 hlist_add_head(&pte_chain->link, &page->parent_ptes);
598 pte_chain->parent_ptes[0] = old;
599 }
600 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
601 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
602 continue;
603 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
604 if (!pte_chain->parent_ptes[i]) {
605 pte_chain->parent_ptes[i] = parent_pte;
606 return;
607 }
608 }
714b93da 609 pte_chain = mmu_alloc_pte_chain(vcpu);
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610 BUG_ON(!pte_chain);
611 hlist_add_head(&pte_chain->link, &page->parent_ptes);
612 pte_chain->parent_ptes[0] = parent_pte;
613}
614
90cb0529 615static void mmu_page_remove_parent_pte(struct kvm_mmu_page *page,
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616 u64 *parent_pte)
617{
618 struct kvm_pte_chain *pte_chain;
619 struct hlist_node *node;
620 int i;
621
622 if (!page->multimapped) {
623 BUG_ON(page->parent_pte != parent_pte);
624 page->parent_pte = NULL;
625 return;
626 }
627 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
628 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
629 if (!pte_chain->parent_ptes[i])
630 break;
631 if (pte_chain->parent_ptes[i] != parent_pte)
632 continue;
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633 while (i + 1 < NR_PTE_CHAIN_ENTRIES
634 && pte_chain->parent_ptes[i + 1]) {
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635 pte_chain->parent_ptes[i]
636 = pte_chain->parent_ptes[i + 1];
637 ++i;
638 }
639 pte_chain->parent_ptes[i] = NULL;
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640 if (i == 0) {
641 hlist_del(&pte_chain->link);
90cb0529 642 mmu_free_pte_chain(pte_chain);
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643 if (hlist_empty(&page->parent_ptes)) {
644 page->multimapped = 0;
645 page->parent_pte = NULL;
646 }
647 }
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648 return;
649 }
650 BUG();
651}
652
f67a46f4 653static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm,
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654 gfn_t gfn)
655{
656 unsigned index;
657 struct hlist_head *bucket;
658 struct kvm_mmu_page *page;
659 struct hlist_node *node;
660
661 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
662 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
f67a46f4 663 bucket = &kvm->mmu_page_hash[index];
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664 hlist_for_each_entry(page, node, bucket, hash_link)
665 if (page->gfn == gfn && !page->role.metaphysical) {
666 pgprintk("%s: found role %x\n",
667 __FUNCTION__, page->role.word);
668 return page;
669 }
670 return NULL;
671}
672
673static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
674 gfn_t gfn,
675 gva_t gaddr,
676 unsigned level,
677 int metaphysical,
d28c6cfb 678 unsigned hugepage_access,
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679 u64 *parent_pte)
680{
681 union kvm_mmu_page_role role;
682 unsigned index;
683 unsigned quadrant;
684 struct hlist_head *bucket;
685 struct kvm_mmu_page *page;
686 struct hlist_node *node;
687
688 role.word = 0;
689 role.glevels = vcpu->mmu.root_level;
690 role.level = level;
691 role.metaphysical = metaphysical;
d28c6cfb 692 role.hugepage_access = hugepage_access;
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693 if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
694 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
695 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
696 role.quadrant = quadrant;
697 }
698 pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
699 gfn, role.word);
700 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
701 bucket = &vcpu->kvm->mmu_page_hash[index];
702 hlist_for_each_entry(page, node, bucket, hash_link)
703 if (page->gfn == gfn && page->role.word == role.word) {
714b93da 704 mmu_page_add_parent_pte(vcpu, page, parent_pte);
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705 pgprintk("%s: found\n", __FUNCTION__);
706 return page;
707 }
708 page = kvm_mmu_alloc_page(vcpu, parent_pte);
709 if (!page)
710 return page;
711 pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
712 page->gfn = gfn;
713 page->role = role;
714 hlist_add_head(&page->hash_link, bucket);
c7addb90 715 vcpu->mmu.prefetch_page(vcpu, page);
374cbac0 716 if (!metaphysical)
4a4c9924 717 rmap_write_protect(vcpu->kvm, gfn);
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718 return page;
719}
720
90cb0529 721static void kvm_mmu_page_unlink_children(struct kvm *kvm,
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722 struct kvm_mmu_page *page)
723{
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724 unsigned i;
725 u64 *pt;
726 u64 ent;
727
47ad8e68 728 pt = page->spt;
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729
730 if (page->role.level == PT_PAGE_TABLE_LEVEL) {
731 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
c7addb90 732 if (is_shadow_present_pte(pt[i]))
290fc38d 733 rmap_remove(kvm, &pt[i]);
c7addb90 734 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 735 }
90cb0529 736 kvm_flush_remote_tlbs(kvm);
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737 return;
738 }
739
740 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
741 ent = pt[i];
742
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743 pt[i] = shadow_trap_nonpresent_pte;
744 if (!is_shadow_present_pte(ent))
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745 continue;
746 ent &= PT64_BASE_ADDR_MASK;
90cb0529 747 mmu_page_remove_parent_pte(page_header(ent), &pt[i]);
697fe2e2 748 }
90cb0529 749 kvm_flush_remote_tlbs(kvm);
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750}
751
90cb0529 752static void kvm_mmu_put_page(struct kvm_mmu_page *page,
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753 u64 *parent_pte)
754{
90cb0529 755 mmu_page_remove_parent_pte(page, parent_pte);
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756}
757
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758static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
759{
760 int i;
761
762 for (i = 0; i < KVM_MAX_VCPUS; ++i)
763 if (kvm->vcpus[i])
764 kvm->vcpus[i]->last_pte_updated = NULL;
765}
766
90cb0529 767static void kvm_mmu_zap_page(struct kvm *kvm,
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768 struct kvm_mmu_page *page)
769{
770 u64 *parent_pte;
771
4cee5764 772 ++kvm->stat.mmu_shadow_zapped;
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773 while (page->multimapped || page->parent_pte) {
774 if (!page->multimapped)
775 parent_pte = page->parent_pte;
776 else {
777 struct kvm_pte_chain *chain;
778
779 chain = container_of(page->parent_ptes.first,
780 struct kvm_pte_chain, link);
781 parent_pte = chain->parent_ptes[0];
782 }
697fe2e2 783 BUG_ON(!parent_pte);
90cb0529 784 kvm_mmu_put_page(page, parent_pte);
c7addb90 785 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 786 }
90cb0529 787 kvm_mmu_page_unlink_children(kvm, page);
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788 if (!page->root_count) {
789 hlist_del(&page->hash_link);
90cb0529 790 kvm_mmu_free_page(kvm, page);
36868f7b 791 } else
90cb0529 792 list_move(&page->link, &kvm->active_mmu_pages);
12b7d28f 793 kvm_mmu_reset_last_pte_updated(kvm);
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794}
795
82ce2c96
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796/*
797 * Changing the number of mmu pages allocated to the vm
798 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
799 */
800void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
801{
802 /*
803 * If we set the number of mmu pages to be smaller be than the
804 * number of actived pages , we must to free some mmu pages before we
805 * change the value
806 */
807
808 if ((kvm->n_alloc_mmu_pages - kvm->n_free_mmu_pages) >
809 kvm_nr_mmu_pages) {
810 int n_used_mmu_pages = kvm->n_alloc_mmu_pages
811 - kvm->n_free_mmu_pages;
812
813 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
814 struct kvm_mmu_page *page;
815
816 page = container_of(kvm->active_mmu_pages.prev,
817 struct kvm_mmu_page, link);
818 kvm_mmu_zap_page(kvm, page);
819 n_used_mmu_pages--;
820 }
821 kvm->n_free_mmu_pages = 0;
822 }
823 else
824 kvm->n_free_mmu_pages += kvm_nr_mmu_pages
825 - kvm->n_alloc_mmu_pages;
826
827 kvm->n_alloc_mmu_pages = kvm_nr_mmu_pages;
828}
829
f67a46f4 830static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
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831{
832 unsigned index;
833 struct hlist_head *bucket;
834 struct kvm_mmu_page *page;
835 struct hlist_node *node, *n;
836 int r;
837
838 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
839 r = 0;
840 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
f67a46f4 841 bucket = &kvm->mmu_page_hash[index];
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842 hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
843 if (page->gfn == gfn && !page->role.metaphysical) {
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844 pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
845 page->role.word);
f67a46f4 846 kvm_mmu_zap_page(kvm, page);
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847 r = 1;
848 }
849 return r;
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850}
851
f67a46f4 852static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
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853{
854 struct kvm_mmu_page *page;
855
f67a46f4 856 while ((page = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
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857 pgprintk("%s: zap %lx %x\n",
858 __FUNCTION__, gfn, page->role.word);
f67a46f4 859 kvm_mmu_zap_page(kvm, page);
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860 }
861}
862
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863static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
864{
865 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
866 struct kvm_mmu_page *page_head = page_header(__pa(pte));
867
868 __set_bit(slot, &page_head->slot_bitmap);
869}
870
4a4c9924 871hpa_t gpa_to_hpa(struct kvm *kvm, gpa_t gpa)
6aa8b732 872{
6aa8b732 873 struct page *page;
cea7bb21 874 hpa_t hpa;
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875
876 ASSERT((gpa & HPA_ERR_MASK) == 0);
4a4c9924 877 page = gfn_to_page(kvm, gpa >> PAGE_SHIFT);
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878 hpa = ((hpa_t)page_to_pfn(page) << PAGE_SHIFT) | (gpa & (PAGE_SIZE-1));
879 if (is_error_page(page))
880 return hpa | HPA_ERR_MASK;
881 return hpa;
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882}
883
884hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
885{
886 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
887
888 if (gpa == UNMAPPED_GVA)
889 return UNMAPPED_GVA;
4a4c9924 890 return gpa_to_hpa(vcpu->kvm, gpa);
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891}
892
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893struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
894{
895 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
896
897 if (gpa == UNMAPPED_GVA)
898 return NULL;
4a4c9924 899 return pfn_to_page(gpa_to_hpa(vcpu->kvm, gpa) >> PAGE_SHIFT);
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900}
901
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902static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
903{
904}
905
906static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
907{
908 int level = PT32E_ROOT_LEVEL;
909 hpa_t table_addr = vcpu->mmu.root_hpa;
b4231d61 910 struct page *page;
6aa8b732 911
b4231d61 912 page = pfn_to_page(p >> PAGE_SHIFT);
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913 for (; ; level--) {
914 u32 index = PT64_INDEX(v, level);
915 u64 *table;
cea0f0e7 916 u64 pte;
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917
918 ASSERT(VALID_PAGE(table_addr));
919 table = __va(table_addr);
920
921 if (level == 1) {
9647c14c
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922 int was_rmapped;
923
cea0f0e7 924 pte = table[index];
9647c14c 925 was_rmapped = is_rmap_pte(pte);
2065b372 926 if (is_shadow_present_pte(pte) && is_writeble_pte(pte)) {
b4231d61 927 kvm_release_page_clean(page);
cea0f0e7 928 return 0;
2065b372 929 }
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930 mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
931 page_header_update_slot(vcpu->kvm, table, v);
932 table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
933 PT_USER_MASK;
9647c14c
IE
934 if (!was_rmapped)
935 rmap_add(vcpu, &table[index], v >> PAGE_SHIFT);
8a7ae055 936 else
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937 kvm_release_page_clean(page);
938
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939 return 0;
940 }
941
c7addb90 942 if (table[index] == shadow_trap_nonpresent_pte) {
25c0de2c 943 struct kvm_mmu_page *new_table;
cea0f0e7 944 gfn_t pseudo_gfn;
6aa8b732 945
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946 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
947 >> PAGE_SHIFT;
948 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
949 v, level - 1,
6bfccdc9 950 1, 3, &table[index]);
25c0de2c 951 if (!new_table) {
6aa8b732 952 pgprintk("nonpaging_map: ENOMEM\n");
b4231d61 953 kvm_release_page_clean(page);
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954 return -ENOMEM;
955 }
956
47ad8e68 957 table[index] = __pa(new_table->spt) | PT_PRESENT_MASK
25c0de2c 958 | PT_WRITABLE_MASK | PT_USER_MASK;
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959 }
960 table_addr = table[index] & PT64_BASE_ADDR_MASK;
961 }
962}
963
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964static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
965 struct kvm_mmu_page *sp)
966{
967 int i;
968
969 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
970 sp->spt[i] = shadow_trap_nonpresent_pte;
971}
972
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973static void mmu_free_roots(struct kvm_vcpu *vcpu)
974{
975 int i;
3bb65a22 976 struct kvm_mmu_page *page;
17ac10ad 977
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978 if (!VALID_PAGE(vcpu->mmu.root_hpa))
979 return;
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980#ifdef CONFIG_X86_64
981 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
982 hpa_t root = vcpu->mmu.root_hpa;
983
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984 page = page_header(root);
985 --page->root_count;
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986 vcpu->mmu.root_hpa = INVALID_PAGE;
987 return;
988 }
989#endif
990 for (i = 0; i < 4; ++i) {
991 hpa_t root = vcpu->mmu.pae_root[i];
992
417726a3 993 if (root) {
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994 root &= PT64_BASE_ADDR_MASK;
995 page = page_header(root);
996 --page->root_count;
997 }
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998 vcpu->mmu.pae_root[i] = INVALID_PAGE;
999 }
1000 vcpu->mmu.root_hpa = INVALID_PAGE;
1001}
1002
1003static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1004{
1005 int i;
cea0f0e7 1006 gfn_t root_gfn;
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1007 struct kvm_mmu_page *page;
1008
cea0f0e7 1009 root_gfn = vcpu->cr3 >> PAGE_SHIFT;
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1010
1011#ifdef CONFIG_X86_64
1012 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1013 hpa_t root = vcpu->mmu.root_hpa;
1014
1015 ASSERT(!VALID_PAGE(root));
68a99f6d 1016 page = kvm_mmu_get_page(vcpu, root_gfn, 0,
d28c6cfb 1017 PT64_ROOT_LEVEL, 0, 0, NULL);
47ad8e68 1018 root = __pa(page->spt);
3bb65a22 1019 ++page->root_count;
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1020 vcpu->mmu.root_hpa = root;
1021 return;
1022 }
1023#endif
1024 for (i = 0; i < 4; ++i) {
1025 hpa_t root = vcpu->mmu.pae_root[i];
1026
1027 ASSERT(!VALID_PAGE(root));
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1028 if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) {
1029 if (!is_present_pte(vcpu->pdptrs[i])) {
1030 vcpu->mmu.pae_root[i] = 0;
1031 continue;
1032 }
cea0f0e7 1033 root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
417726a3 1034 } else if (vcpu->mmu.root_level == 0)
cea0f0e7 1035 root_gfn = 0;
68a99f6d 1036 page = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
cea0f0e7 1037 PT32_ROOT_LEVEL, !is_paging(vcpu),
d28c6cfb 1038 0, NULL);
47ad8e68 1039 root = __pa(page->spt);
3bb65a22 1040 ++page->root_count;
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1041 vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
1042 }
1043 vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
1044}
1045
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1046static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
1047{
1048 return vaddr;
1049}
1050
1051static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
1052 u32 error_code)
1053{
6aa8b732 1054 gpa_t addr = gva;
ebeace86 1055 hpa_t paddr;
e2dec939 1056 int r;
6aa8b732 1057
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1058 r = mmu_topup_memory_caches(vcpu);
1059 if (r)
1060 return r;
714b93da 1061
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1062 ASSERT(vcpu);
1063 ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
1064
6aa8b732 1065
4a4c9924 1066 paddr = gpa_to_hpa(vcpu->kvm, addr & PT64_BASE_ADDR_MASK);
6aa8b732 1067
8a7ae055 1068 if (is_error_hpa(paddr)) {
b4231d61
IE
1069 kvm_release_page_clean(pfn_to_page((paddr & PT64_BASE_ADDR_MASK)
1070 >> PAGE_SHIFT));
ebeace86 1071 return 1;
8a7ae055 1072 }
6aa8b732 1073
ebeace86 1074 return nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
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1075}
1076
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1077static void nonpaging_free(struct kvm_vcpu *vcpu)
1078{
17ac10ad 1079 mmu_free_roots(vcpu);
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1080}
1081
1082static int nonpaging_init_context(struct kvm_vcpu *vcpu)
1083{
1084 struct kvm_mmu *context = &vcpu->mmu;
1085
1086 context->new_cr3 = nonpaging_new_cr3;
1087 context->page_fault = nonpaging_page_fault;
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1088 context->gva_to_gpa = nonpaging_gva_to_gpa;
1089 context->free = nonpaging_free;
c7addb90 1090 context->prefetch_page = nonpaging_prefetch_page;
cea0f0e7 1091 context->root_level = 0;
6aa8b732 1092 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1093 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1094 return 0;
1095}
1096
d835dfec 1097void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
6aa8b732 1098{
1165f5fe 1099 ++vcpu->stat.tlb_flush;
cbdd1bea 1100 kvm_x86_ops->tlb_flush(vcpu);
6aa8b732
AK
1101}
1102
1103static void paging_new_cr3(struct kvm_vcpu *vcpu)
1104{
374cbac0 1105 pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
cea0f0e7 1106 mmu_free_roots(vcpu);
6aa8b732
AK
1107}
1108
6aa8b732
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1109static void inject_page_fault(struct kvm_vcpu *vcpu,
1110 u64 addr,
1111 u32 err_code)
1112{
cbdd1bea 1113 kvm_x86_ops->inject_page_fault(vcpu, addr, err_code);
6aa8b732
AK
1114}
1115
6aa8b732
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1116static void paging_free(struct kvm_vcpu *vcpu)
1117{
1118 nonpaging_free(vcpu);
1119}
1120
1121#define PTTYPE 64
1122#include "paging_tmpl.h"
1123#undef PTTYPE
1124
1125#define PTTYPE 32
1126#include "paging_tmpl.h"
1127#undef PTTYPE
1128
17ac10ad 1129static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732
AK
1130{
1131 struct kvm_mmu *context = &vcpu->mmu;
1132
1133 ASSERT(is_pae(vcpu));
1134 context->new_cr3 = paging_new_cr3;
1135 context->page_fault = paging64_page_fault;
6aa8b732 1136 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 1137 context->prefetch_page = paging64_prefetch_page;
6aa8b732 1138 context->free = paging_free;
17ac10ad
AK
1139 context->root_level = level;
1140 context->shadow_root_level = level;
17c3ba9d 1141 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1142 return 0;
1143}
1144
17ac10ad
AK
1145static int paging64_init_context(struct kvm_vcpu *vcpu)
1146{
1147 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1148}
1149
6aa8b732
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1150static int paging32_init_context(struct kvm_vcpu *vcpu)
1151{
1152 struct kvm_mmu *context = &vcpu->mmu;
1153
1154 context->new_cr3 = paging_new_cr3;
1155 context->page_fault = paging32_page_fault;
6aa8b732
AK
1156 context->gva_to_gpa = paging32_gva_to_gpa;
1157 context->free = paging_free;
c7addb90 1158 context->prefetch_page = paging32_prefetch_page;
6aa8b732
AK
1159 context->root_level = PT32_ROOT_LEVEL;
1160 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1161 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1162 return 0;
1163}
1164
1165static int paging32E_init_context(struct kvm_vcpu *vcpu)
1166{
17ac10ad 1167 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK
1168}
1169
1170static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1171{
1172 ASSERT(vcpu);
1173 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1174
1175 if (!is_paging(vcpu))
1176 return nonpaging_init_context(vcpu);
a9058ecd 1177 else if (is_long_mode(vcpu))
6aa8b732
AK
1178 return paging64_init_context(vcpu);
1179 else if (is_pae(vcpu))
1180 return paging32E_init_context(vcpu);
1181 else
1182 return paging32_init_context(vcpu);
1183}
1184
1185static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1186{
1187 ASSERT(vcpu);
1188 if (VALID_PAGE(vcpu->mmu.root_hpa)) {
1189 vcpu->mmu.free(vcpu);
1190 vcpu->mmu.root_hpa = INVALID_PAGE;
1191 }
1192}
1193
1194int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK
1195{
1196 destroy_kvm_mmu(vcpu);
1197 return init_kvm_mmu(vcpu);
1198}
8668a3c4 1199EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK
1200
1201int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 1202{
714b93da
AK
1203 int r;
1204
11ec2804 1205 mutex_lock(&vcpu->kvm->lock);
e2dec939 1206 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK
1207 if (r)
1208 goto out;
1209 mmu_alloc_roots(vcpu);
cbdd1bea 1210 kvm_x86_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
17c3ba9d 1211 kvm_mmu_flush_tlb(vcpu);
714b93da 1212out:
11ec2804 1213 mutex_unlock(&vcpu->kvm->lock);
714b93da 1214 return r;
6aa8b732 1215}
17c3ba9d
AK
1216EXPORT_SYMBOL_GPL(kvm_mmu_load);
1217
1218void kvm_mmu_unload(struct kvm_vcpu *vcpu)
1219{
1220 mmu_free_roots(vcpu);
1221}
6aa8b732 1222
09072daf 1223static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
ac1b714e
AK
1224 struct kvm_mmu_page *page,
1225 u64 *spte)
1226{
1227 u64 pte;
1228 struct kvm_mmu_page *child;
1229
1230 pte = *spte;
c7addb90 1231 if (is_shadow_present_pte(pte)) {
ac1b714e 1232 if (page->role.level == PT_PAGE_TABLE_LEVEL)
290fc38d 1233 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK
1234 else {
1235 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 1236 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK
1237 }
1238 }
c7addb90 1239 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
ac1b714e
AK
1240}
1241
0028425f
AK
1242static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
1243 struct kvm_mmu_page *page,
1244 u64 *spte,
c7addb90
AK
1245 const void *new, int bytes,
1246 int offset_in_pte)
0028425f 1247{
4cee5764
AK
1248 if (page->role.level != PT_PAGE_TABLE_LEVEL) {
1249 ++vcpu->kvm->stat.mmu_pde_zapped;
0028425f 1250 return;
4cee5764 1251 }
0028425f 1252
4cee5764 1253 ++vcpu->kvm->stat.mmu_pte_updated;
0028425f 1254 if (page->role.glevels == PT32_ROOT_LEVEL)
c7addb90
AK
1255 paging32_update_pte(vcpu, page, spte, new, bytes,
1256 offset_in_pte);
0028425f 1257 else
c7addb90
AK
1258 paging64_update_pte(vcpu, page, spte, new, bytes,
1259 offset_in_pte);
0028425f
AK
1260}
1261
79539cec
AK
1262static bool need_remote_flush(u64 old, u64 new)
1263{
1264 if (!is_shadow_present_pte(old))
1265 return false;
1266 if (!is_shadow_present_pte(new))
1267 return true;
1268 if ((old ^ new) & PT64_BASE_ADDR_MASK)
1269 return true;
1270 old ^= PT64_NX_MASK;
1271 new ^= PT64_NX_MASK;
1272 return (old & ~new & PT64_PERM_MASK) != 0;
1273}
1274
1275static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
1276{
1277 if (need_remote_flush(old, new))
1278 kvm_flush_remote_tlbs(vcpu->kvm);
1279 else
1280 kvm_mmu_flush_tlb(vcpu);
1281}
1282
12b7d28f
AK
1283static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
1284{
1285 u64 *spte = vcpu->last_pte_updated;
1286
1287 return !!(spte && (*spte & PT_ACCESSED_MASK));
1288}
1289
09072daf 1290void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
fe551881 1291 const u8 *new, int bytes)
da4a00f0 1292{
9b7a0325
AK
1293 gfn_t gfn = gpa >> PAGE_SHIFT;
1294 struct kvm_mmu_page *page;
0e7bc4b9 1295 struct hlist_node *node, *n;
9b7a0325
AK
1296 struct hlist_head *bucket;
1297 unsigned index;
79539cec 1298 u64 entry;
9b7a0325 1299 u64 *spte;
9b7a0325 1300 unsigned offset = offset_in_page(gpa);
0e7bc4b9 1301 unsigned pte_size;
9b7a0325 1302 unsigned page_offset;
0e7bc4b9 1303 unsigned misaligned;
fce0657f 1304 unsigned quadrant;
9b7a0325 1305 int level;
86a5ba02 1306 int flooded = 0;
ac1b714e 1307 int npte;
9b7a0325 1308
da4a00f0 1309 pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
4cee5764 1310 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 1311 kvm_mmu_audit(vcpu, "pre pte write");
12b7d28f
AK
1312 if (gfn == vcpu->last_pt_write_gfn
1313 && !last_updated_pte_accessed(vcpu)) {
86a5ba02
AK
1314 ++vcpu->last_pt_write_count;
1315 if (vcpu->last_pt_write_count >= 3)
1316 flooded = 1;
1317 } else {
1318 vcpu->last_pt_write_gfn = gfn;
1319 vcpu->last_pt_write_count = 1;
12b7d28f 1320 vcpu->last_pte_updated = NULL;
86a5ba02 1321 }
9b7a0325
AK
1322 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
1323 bucket = &vcpu->kvm->mmu_page_hash[index];
0e7bc4b9 1324 hlist_for_each_entry_safe(page, node, n, bucket, hash_link) {
9b7a0325
AK
1325 if (page->gfn != gfn || page->role.metaphysical)
1326 continue;
0e7bc4b9
AK
1327 pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
1328 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 1329 misaligned |= bytes < 4;
86a5ba02 1330 if (misaligned || flooded) {
0e7bc4b9
AK
1331 /*
1332 * Misaligned accesses are too much trouble to fix
1333 * up; also, they usually indicate a page is not used
1334 * as a page table.
86a5ba02
AK
1335 *
1336 * If we're seeing too many writes to a page,
1337 * it may no longer be a page table, or we may be
1338 * forking, in which case it is better to unmap the
1339 * page.
0e7bc4b9
AK
1340 */
1341 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
1342 gpa, bytes, page->role.word);
90cb0529 1343 kvm_mmu_zap_page(vcpu->kvm, page);
4cee5764 1344 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK
1345 continue;
1346 }
9b7a0325
AK
1347 page_offset = offset;
1348 level = page->role.level;
ac1b714e 1349 npte = 1;
9b7a0325 1350 if (page->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK
1351 page_offset <<= 1; /* 32->64 */
1352 /*
1353 * A 32-bit pde maps 4MB while the shadow pdes map
1354 * only 2MB. So we need to double the offset again
1355 * and zap two pdes instead of one.
1356 */
1357 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 1358 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK
1359 page_offset <<= 1;
1360 npte = 2;
1361 }
fce0657f 1362 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 1363 page_offset &= ~PAGE_MASK;
fce0657f
AK
1364 if (quadrant != page->role.quadrant)
1365 continue;
9b7a0325 1366 }
47ad8e68 1367 spte = &page->spt[page_offset / sizeof(*spte)];
ac1b714e 1368 while (npte--) {
79539cec 1369 entry = *spte;
09072daf 1370 mmu_pte_write_zap_pte(vcpu, page, spte);
c7addb90
AK
1371 mmu_pte_write_new_pte(vcpu, page, spte, new, bytes,
1372 page_offset & (pte_size - 1));
79539cec 1373 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
ac1b714e 1374 ++spte;
9b7a0325 1375 }
9b7a0325 1376 }
c7addb90 1377 kvm_mmu_audit(vcpu, "post pte write");
da4a00f0
AK
1378}
1379
a436036b
AK
1380int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1381{
1382 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
1383
f67a46f4 1384 return kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
a436036b
AK
1385}
1386
22d95b12 1387void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86
AK
1388{
1389 while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
1390 struct kvm_mmu_page *page;
1391
1392 page = container_of(vcpu->kvm->active_mmu_pages.prev,
1393 struct kvm_mmu_page, link);
90cb0529 1394 kvm_mmu_zap_page(vcpu->kvm, page);
4cee5764 1395 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK
1396 }
1397}
ebeace86 1398
3067714c
AK
1399int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
1400{
1401 int r;
1402 enum emulation_result er;
1403
1404 mutex_lock(&vcpu->kvm->lock);
1405 r = vcpu->mmu.page_fault(vcpu, cr2, error_code);
1406 if (r < 0)
1407 goto out;
1408
1409 if (!r) {
1410 r = 1;
1411 goto out;
1412 }
1413
b733bfb5
AK
1414 r = mmu_topup_memory_caches(vcpu);
1415 if (r)
1416 goto out;
1417
3067714c
AK
1418 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
1419 mutex_unlock(&vcpu->kvm->lock);
1420
1421 switch (er) {
1422 case EMULATE_DONE:
1423 return 1;
1424 case EMULATE_DO_MMIO:
1425 ++vcpu->stat.mmio_exits;
1426 return 0;
1427 case EMULATE_FAIL:
1428 kvm_report_emulation_failure(vcpu, "pagetable");
1429 return 1;
1430 default:
1431 BUG();
1432 }
1433out:
1434 mutex_unlock(&vcpu->kvm->lock);
1435 return r;
1436}
1437EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
1438
6aa8b732
AK
1439static void free_mmu_pages(struct kvm_vcpu *vcpu)
1440{
f51234c2 1441 struct kvm_mmu_page *page;
6aa8b732 1442
f51234c2
AK
1443 while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
1444 page = container_of(vcpu->kvm->active_mmu_pages.next,
1445 struct kvm_mmu_page, link);
90cb0529 1446 kvm_mmu_zap_page(vcpu->kvm, page);
f51234c2 1447 }
17ac10ad 1448 free_page((unsigned long)vcpu->mmu.pae_root);
6aa8b732
AK
1449}
1450
1451static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1452{
17ac10ad 1453 struct page *page;
6aa8b732
AK
1454 int i;
1455
1456 ASSERT(vcpu);
1457
82ce2c96
IE
1458 if (vcpu->kvm->n_requested_mmu_pages)
1459 vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_requested_mmu_pages;
1460 else
1461 vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_alloc_mmu_pages;
17ac10ad
AK
1462 /*
1463 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1464 * Therefore we need to allocate shadow page tables in the first
1465 * 4GB of memory, which happens to fit the DMA32 zone.
1466 */
1467 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1468 if (!page)
1469 goto error_1;
1470 vcpu->mmu.pae_root = page_address(page);
1471 for (i = 0; i < 4; ++i)
1472 vcpu->mmu.pae_root[i] = INVALID_PAGE;
1473
6aa8b732
AK
1474 return 0;
1475
1476error_1:
1477 free_mmu_pages(vcpu);
1478 return -ENOMEM;
1479}
1480
8018c27b 1481int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 1482{
6aa8b732
AK
1483 ASSERT(vcpu);
1484 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
6aa8b732 1485
8018c27b
IM
1486 return alloc_mmu_pages(vcpu);
1487}
6aa8b732 1488
8018c27b
IM
1489int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1490{
1491 ASSERT(vcpu);
1492 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
2c264957 1493
8018c27b 1494 return init_kvm_mmu(vcpu);
6aa8b732
AK
1495}
1496
1497void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1498{
1499 ASSERT(vcpu);
1500
1501 destroy_kvm_mmu(vcpu);
1502 free_mmu_pages(vcpu);
714b93da 1503 mmu_free_memory_caches(vcpu);
6aa8b732
AK
1504}
1505
90cb0529 1506void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732
AK
1507{
1508 struct kvm_mmu_page *page;
1509
1510 list_for_each_entry(page, &kvm->active_mmu_pages, link) {
1511 int i;
1512 u64 *pt;
1513
1514 if (!test_bit(slot, &page->slot_bitmap))
1515 continue;
1516
47ad8e68 1517 pt = page->spt;
6aa8b732
AK
1518 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1519 /* avoid RMW */
9647c14c 1520 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 1521 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732
AK
1522 }
1523}
37a7d8b0 1524
90cb0529 1525void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 1526{
90cb0529 1527 struct kvm_mmu_page *page, *node;
e0fa826f 1528
90cb0529
AK
1529 list_for_each_entry_safe(page, node, &kvm->active_mmu_pages, link)
1530 kvm_mmu_zap_page(kvm, page);
e0fa826f 1531
90cb0529 1532 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL
1533}
1534
b5a33a75
AK
1535void kvm_mmu_module_exit(void)
1536{
1537 if (pte_chain_cache)
1538 kmem_cache_destroy(pte_chain_cache);
1539 if (rmap_desc_cache)
1540 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK
1541 if (mmu_page_header_cache)
1542 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK
1543}
1544
1545int kvm_mmu_module_init(void)
1546{
1547 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
1548 sizeof(struct kvm_pte_chain),
20c2df83 1549 0, 0, NULL);
b5a33a75
AK
1550 if (!pte_chain_cache)
1551 goto nomem;
1552 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
1553 sizeof(struct kvm_rmap_desc),
20c2df83 1554 0, 0, NULL);
b5a33a75
AK
1555 if (!rmap_desc_cache)
1556 goto nomem;
1557
d3d25b04
AK
1558 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
1559 sizeof(struct kvm_mmu_page),
20c2df83 1560 0, 0, NULL);
d3d25b04
AK
1561 if (!mmu_page_header_cache)
1562 goto nomem;
1563
b5a33a75
AK
1564 return 0;
1565
1566nomem:
1567 kvm_mmu_module_exit();
1568 return -ENOMEM;
1569}
1570
3ad82a7e
ZX
1571/*
1572 * Caculate mmu pages needed for kvm.
1573 */
1574unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
1575{
1576 int i;
1577 unsigned int nr_mmu_pages;
1578 unsigned int nr_pages = 0;
1579
1580 for (i = 0; i < kvm->nmemslots; i++)
1581 nr_pages += kvm->memslots[i].npages;
1582
1583 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
1584 nr_mmu_pages = max(nr_mmu_pages,
1585 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
1586
1587 return nr_mmu_pages;
1588}
1589
37a7d8b0
AK
1590#ifdef AUDIT
1591
1592static const char *audit_msg;
1593
1594static gva_t canonicalize(gva_t gva)
1595{
1596#ifdef CONFIG_X86_64
1597 gva = (long long)(gva << 16) >> 16;
1598#endif
1599 return gva;
1600}
1601
1602static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
1603 gva_t va, int level)
1604{
1605 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
1606 int i;
1607 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
1608
1609 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
1610 u64 ent = pt[i];
1611
c7addb90 1612 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK
1613 continue;
1614
1615 va = canonicalize(va);
c7addb90
AK
1616 if (level > 1) {
1617 if (ent == shadow_notrap_nonpresent_pte)
1618 printk(KERN_ERR "audit: (%s) nontrapping pte"
1619 " in nonleaf level: levels %d gva %lx"
1620 " level %d pte %llx\n", audit_msg,
1621 vcpu->mmu.root_level, va, level, ent);
1622
37a7d8b0 1623 audit_mappings_page(vcpu, ent, va, level - 1);
c7addb90 1624 } else {
37a7d8b0
AK
1625 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va);
1626 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
8a7ae055 1627 struct page *page;
37a7d8b0 1628
c7addb90 1629 if (is_shadow_present_pte(ent)
37a7d8b0 1630 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK
1631 printk(KERN_ERR "xx audit error: (%s) levels %d"
1632 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
37a7d8b0 1633 audit_msg, vcpu->mmu.root_level,
d77c26fc
MD
1634 va, gpa, hpa, ent,
1635 is_shadow_present_pte(ent));
c7addb90
AK
1636 else if (ent == shadow_notrap_nonpresent_pte
1637 && !is_error_hpa(hpa))
1638 printk(KERN_ERR "audit: (%s) notrap shadow,"
1639 " valid guest gva %lx\n", audit_msg, va);
8a7ae055
IE
1640 page = pfn_to_page((gpa & PT64_BASE_ADDR_MASK)
1641 >> PAGE_SHIFT);
b4231d61 1642 kvm_release_page_clean(page);
c7addb90 1643
37a7d8b0
AK
1644 }
1645 }
1646}
1647
1648static void audit_mappings(struct kvm_vcpu *vcpu)
1649{
1ea252af 1650 unsigned i;
37a7d8b0
AK
1651
1652 if (vcpu->mmu.root_level == 4)
1653 audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4);
1654 else
1655 for (i = 0; i < 4; ++i)
1656 if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK)
1657 audit_mappings_page(vcpu,
1658 vcpu->mmu.pae_root[i],
1659 i << 30,
1660 2);
1661}
1662
1663static int count_rmaps(struct kvm_vcpu *vcpu)
1664{
1665 int nmaps = 0;
1666 int i, j, k;
1667
1668 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
1669 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
1670 struct kvm_rmap_desc *d;
1671
1672 for (j = 0; j < m->npages; ++j) {
290fc38d 1673 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 1674
290fc38d 1675 if (!*rmapp)
37a7d8b0 1676 continue;
290fc38d 1677 if (!(*rmapp & 1)) {
37a7d8b0
AK
1678 ++nmaps;
1679 continue;
1680 }
290fc38d 1681 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK
1682 while (d) {
1683 for (k = 0; k < RMAP_EXT; ++k)
1684 if (d->shadow_ptes[k])
1685 ++nmaps;
1686 else
1687 break;
1688 d = d->more;
1689 }
1690 }
1691 }
1692 return nmaps;
1693}
1694
1695static int count_writable_mappings(struct kvm_vcpu *vcpu)
1696{
1697 int nmaps = 0;
1698 struct kvm_mmu_page *page;
1699 int i;
1700
1701 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
47ad8e68 1702 u64 *pt = page->spt;
37a7d8b0
AK
1703
1704 if (page->role.level != PT_PAGE_TABLE_LEVEL)
1705 continue;
1706
1707 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1708 u64 ent = pt[i];
1709
1710 if (!(ent & PT_PRESENT_MASK))
1711 continue;
1712 if (!(ent & PT_WRITABLE_MASK))
1713 continue;
1714 ++nmaps;
1715 }
1716 }
1717 return nmaps;
1718}
1719
1720static void audit_rmap(struct kvm_vcpu *vcpu)
1721{
1722 int n_rmap = count_rmaps(vcpu);
1723 int n_actual = count_writable_mappings(vcpu);
1724
1725 if (n_rmap != n_actual)
1726 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
1727 __FUNCTION__, audit_msg, n_rmap, n_actual);
1728}
1729
1730static void audit_write_protection(struct kvm_vcpu *vcpu)
1731{
1732 struct kvm_mmu_page *page;
290fc38d
IE
1733 struct kvm_memory_slot *slot;
1734 unsigned long *rmapp;
1735 gfn_t gfn;
37a7d8b0
AK
1736
1737 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
37a7d8b0
AK
1738 if (page->role.metaphysical)
1739 continue;
1740
290fc38d
IE
1741 slot = gfn_to_memslot(vcpu->kvm, page->gfn);
1742 gfn = unalias_gfn(vcpu->kvm, page->gfn);
1743 rmapp = &slot->rmap[gfn - slot->base_gfn];
1744 if (*rmapp)
37a7d8b0
AK
1745 printk(KERN_ERR "%s: (%s) shadow page has writable"
1746 " mappings: gfn %lx role %x\n",
1747 __FUNCTION__, audit_msg, page->gfn,
1748 page->role.word);
1749 }
1750}
1751
1752static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
1753{
1754 int olddbg = dbg;
1755
1756 dbg = 0;
1757 audit_msg = msg;
1758 audit_rmap(vcpu);
1759 audit_write_protection(vcpu);
1760 audit_mappings(vcpu);
1761 dbg = olddbg;
1762}
1763
1764#endif