]>
Commit | Line | Data |
---|---|---|
6aa8b732 AK |
1 | /* |
2 | * Kernel-based Virtual Machine driver for Linux | |
3 | * | |
4 | * This module enables machines with Intel VT-x extensions to run virtual | |
5 | * machines without emulation or binary translation. | |
6 | * | |
7 | * MMU support | |
8 | * | |
9 | * Copyright (C) 2006 Qumranet, Inc. | |
10 | * | |
11 | * Authors: | |
12 | * Yaniv Kamay <yaniv@qumranet.com> | |
13 | * Avi Kivity <avi@qumranet.com> | |
14 | * | |
15 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
16 | * the COPYING file in the top-level directory. | |
17 | * | |
18 | */ | |
19 | #include <linux/types.h> | |
20 | #include <linux/string.h> | |
21 | #include <asm/page.h> | |
22 | #include <linux/mm.h> | |
23 | #include <linux/highmem.h> | |
24 | #include <linux/module.h> | |
25 | ||
26 | #include "vmx.h" | |
27 | #include "kvm.h" | |
28 | ||
37a7d8b0 AK |
29 | #undef MMU_DEBUG |
30 | ||
31 | #undef AUDIT | |
32 | ||
33 | #ifdef AUDIT | |
34 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg); | |
35 | #else | |
36 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {} | |
37 | #endif | |
38 | ||
39 | #ifdef MMU_DEBUG | |
40 | ||
41 | #define pgprintk(x...) do { if (dbg) printk(x); } while (0) | |
42 | #define rmap_printk(x...) do { if (dbg) printk(x); } while (0) | |
43 | ||
44 | #else | |
45 | ||
46 | #define pgprintk(x...) do { } while (0) | |
47 | #define rmap_printk(x...) do { } while (0) | |
48 | ||
49 | #endif | |
50 | ||
51 | #if defined(MMU_DEBUG) || defined(AUDIT) | |
52 | static int dbg = 1; | |
53 | #endif | |
6aa8b732 | 54 | |
d6c69ee9 YD |
55 | #ifndef MMU_DEBUG |
56 | #define ASSERT(x) do { } while (0) | |
57 | #else | |
6aa8b732 AK |
58 | #define ASSERT(x) \ |
59 | if (!(x)) { \ | |
60 | printk(KERN_WARNING "assertion failed %s:%d: %s\n", \ | |
61 | __FILE__, __LINE__, #x); \ | |
62 | } | |
d6c69ee9 | 63 | #endif |
6aa8b732 | 64 | |
cea0f0e7 AK |
65 | #define PT64_PT_BITS 9 |
66 | #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS) | |
67 | #define PT32_PT_BITS 10 | |
68 | #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS) | |
6aa8b732 AK |
69 | |
70 | #define PT_WRITABLE_SHIFT 1 | |
71 | ||
72 | #define PT_PRESENT_MASK (1ULL << 0) | |
73 | #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT) | |
74 | #define PT_USER_MASK (1ULL << 2) | |
75 | #define PT_PWT_MASK (1ULL << 3) | |
76 | #define PT_PCD_MASK (1ULL << 4) | |
77 | #define PT_ACCESSED_MASK (1ULL << 5) | |
78 | #define PT_DIRTY_MASK (1ULL << 6) | |
79 | #define PT_PAGE_SIZE_MASK (1ULL << 7) | |
80 | #define PT_PAT_MASK (1ULL << 7) | |
81 | #define PT_GLOBAL_MASK (1ULL << 8) | |
82 | #define PT64_NX_MASK (1ULL << 63) | |
83 | ||
84 | #define PT_PAT_SHIFT 7 | |
85 | #define PT_DIR_PAT_SHIFT 12 | |
86 | #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT) | |
87 | ||
88 | #define PT32_DIR_PSE36_SIZE 4 | |
89 | #define PT32_DIR_PSE36_SHIFT 13 | |
90 | #define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT) | |
91 | ||
92 | ||
93 | #define PT32_PTE_COPY_MASK \ | |
8c7bb723 | 94 | (PT_PRESENT_MASK | PT_ACCESSED_MASK | PT_DIRTY_MASK | PT_GLOBAL_MASK) |
6aa8b732 | 95 | |
8c7bb723 | 96 | #define PT64_PTE_COPY_MASK (PT64_NX_MASK | PT32_PTE_COPY_MASK) |
6aa8b732 AK |
97 | |
98 | #define PT_FIRST_AVAIL_BITS_SHIFT 9 | |
99 | #define PT64_SECOND_AVAIL_BITS_SHIFT 52 | |
100 | ||
101 | #define PT_SHADOW_PS_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT) | |
102 | #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT) | |
103 | ||
104 | #define PT_SHADOW_WRITABLE_SHIFT (PT_FIRST_AVAIL_BITS_SHIFT + 1) | |
105 | #define PT_SHADOW_WRITABLE_MASK (1ULL << PT_SHADOW_WRITABLE_SHIFT) | |
106 | ||
107 | #define PT_SHADOW_USER_SHIFT (PT_SHADOW_WRITABLE_SHIFT + 1) | |
108 | #define PT_SHADOW_USER_MASK (1ULL << (PT_SHADOW_USER_SHIFT)) | |
109 | ||
110 | #define PT_SHADOW_BITS_OFFSET (PT_SHADOW_WRITABLE_SHIFT - PT_WRITABLE_SHIFT) | |
111 | ||
112 | #define VALID_PAGE(x) ((x) != INVALID_PAGE) | |
113 | ||
114 | #define PT64_LEVEL_BITS 9 | |
115 | ||
116 | #define PT64_LEVEL_SHIFT(level) \ | |
117 | ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS ) | |
118 | ||
119 | #define PT64_LEVEL_MASK(level) \ | |
120 | (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level)) | |
121 | ||
122 | #define PT64_INDEX(address, level)\ | |
123 | (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1)) | |
124 | ||
125 | ||
126 | #define PT32_LEVEL_BITS 10 | |
127 | ||
128 | #define PT32_LEVEL_SHIFT(level) \ | |
129 | ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS ) | |
130 | ||
131 | #define PT32_LEVEL_MASK(level) \ | |
132 | (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level)) | |
133 | ||
134 | #define PT32_INDEX(address, level)\ | |
135 | (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1)) | |
136 | ||
137 | ||
27aba766 | 138 | #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1)) |
6aa8b732 AK |
139 | #define PT64_DIR_BASE_ADDR_MASK \ |
140 | (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1)) | |
141 | ||
142 | #define PT32_BASE_ADDR_MASK PAGE_MASK | |
143 | #define PT32_DIR_BASE_ADDR_MASK \ | |
144 | (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1)) | |
145 | ||
146 | ||
147 | #define PFERR_PRESENT_MASK (1U << 0) | |
148 | #define PFERR_WRITE_MASK (1U << 1) | |
149 | #define PFERR_USER_MASK (1U << 2) | |
73b1087e | 150 | #define PFERR_FETCH_MASK (1U << 4) |
6aa8b732 AK |
151 | |
152 | #define PT64_ROOT_LEVEL 4 | |
153 | #define PT32_ROOT_LEVEL 2 | |
154 | #define PT32E_ROOT_LEVEL 3 | |
155 | ||
156 | #define PT_DIRECTORY_LEVEL 2 | |
157 | #define PT_PAGE_TABLE_LEVEL 1 | |
158 | ||
cd4a4e53 AK |
159 | #define RMAP_EXT 4 |
160 | ||
161 | struct kvm_rmap_desc { | |
162 | u64 *shadow_ptes[RMAP_EXT]; | |
163 | struct kvm_rmap_desc *more; | |
164 | }; | |
165 | ||
b5a33a75 AK |
166 | static struct kmem_cache *pte_chain_cache; |
167 | static struct kmem_cache *rmap_desc_cache; | |
168 | ||
6aa8b732 AK |
169 | static int is_write_protection(struct kvm_vcpu *vcpu) |
170 | { | |
171 | return vcpu->cr0 & CR0_WP_MASK; | |
172 | } | |
173 | ||
174 | static int is_cpuid_PSE36(void) | |
175 | { | |
176 | return 1; | |
177 | } | |
178 | ||
73b1087e AK |
179 | static int is_nx(struct kvm_vcpu *vcpu) |
180 | { | |
181 | return vcpu->shadow_efer & EFER_NX; | |
182 | } | |
183 | ||
6aa8b732 AK |
184 | static int is_present_pte(unsigned long pte) |
185 | { | |
186 | return pte & PT_PRESENT_MASK; | |
187 | } | |
188 | ||
189 | static int is_writeble_pte(unsigned long pte) | |
190 | { | |
191 | return pte & PT_WRITABLE_MASK; | |
192 | } | |
193 | ||
194 | static int is_io_pte(unsigned long pte) | |
195 | { | |
196 | return pte & PT_SHADOW_IO_MARK; | |
197 | } | |
198 | ||
cd4a4e53 AK |
199 | static int is_rmap_pte(u64 pte) |
200 | { | |
201 | return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK)) | |
202 | == (PT_WRITABLE_MASK | PT_PRESENT_MASK); | |
203 | } | |
204 | ||
e2dec939 | 205 | static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache, |
8c438502 AK |
206 | struct kmem_cache *base_cache, int min, |
207 | gfp_t gfp_flags) | |
714b93da AK |
208 | { |
209 | void *obj; | |
210 | ||
211 | if (cache->nobjs >= min) | |
e2dec939 | 212 | return 0; |
714b93da | 213 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { |
8c438502 | 214 | obj = kmem_cache_zalloc(base_cache, gfp_flags); |
714b93da | 215 | if (!obj) |
e2dec939 | 216 | return -ENOMEM; |
714b93da AK |
217 | cache->objects[cache->nobjs++] = obj; |
218 | } | |
e2dec939 | 219 | return 0; |
714b93da AK |
220 | } |
221 | ||
222 | static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc) | |
223 | { | |
224 | while (mc->nobjs) | |
225 | kfree(mc->objects[--mc->nobjs]); | |
226 | } | |
227 | ||
8c438502 | 228 | static int __mmu_topup_memory_caches(struct kvm_vcpu *vcpu, gfp_t gfp_flags) |
714b93da | 229 | { |
e2dec939 AK |
230 | int r; |
231 | ||
232 | r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache, | |
8c438502 | 233 | pte_chain_cache, 4, gfp_flags); |
e2dec939 AK |
234 | if (r) |
235 | goto out; | |
236 | r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache, | |
8c438502 | 237 | rmap_desc_cache, 1, gfp_flags); |
e2dec939 AK |
238 | out: |
239 | return r; | |
714b93da AK |
240 | } |
241 | ||
8c438502 AK |
242 | static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu) |
243 | { | |
244 | int r; | |
245 | ||
246 | r = __mmu_topup_memory_caches(vcpu, GFP_NOWAIT); | |
247 | if (r < 0) { | |
248 | spin_unlock(&vcpu->kvm->lock); | |
249 | kvm_arch_ops->vcpu_put(vcpu); | |
250 | r = __mmu_topup_memory_caches(vcpu, GFP_KERNEL); | |
251 | kvm_arch_ops->vcpu_load(vcpu); | |
252 | spin_lock(&vcpu->kvm->lock); | |
253 | } | |
254 | return r; | |
255 | } | |
256 | ||
714b93da AK |
257 | static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) |
258 | { | |
259 | mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache); | |
260 | mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache); | |
261 | } | |
262 | ||
263 | static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc, | |
264 | size_t size) | |
265 | { | |
266 | void *p; | |
267 | ||
268 | BUG_ON(!mc->nobjs); | |
269 | p = mc->objects[--mc->nobjs]; | |
270 | memset(p, 0, size); | |
271 | return p; | |
272 | } | |
273 | ||
274 | static void mmu_memory_cache_free(struct kvm_mmu_memory_cache *mc, void *obj) | |
275 | { | |
276 | if (mc->nobjs < KVM_NR_MEM_OBJS) | |
277 | mc->objects[mc->nobjs++] = obj; | |
278 | else | |
279 | kfree(obj); | |
280 | } | |
281 | ||
282 | static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu) | |
283 | { | |
284 | return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache, | |
285 | sizeof(struct kvm_pte_chain)); | |
286 | } | |
287 | ||
288 | static void mmu_free_pte_chain(struct kvm_vcpu *vcpu, | |
289 | struct kvm_pte_chain *pc) | |
290 | { | |
291 | mmu_memory_cache_free(&vcpu->mmu_pte_chain_cache, pc); | |
292 | } | |
293 | ||
294 | static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu) | |
295 | { | |
296 | return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache, | |
297 | sizeof(struct kvm_rmap_desc)); | |
298 | } | |
299 | ||
300 | static void mmu_free_rmap_desc(struct kvm_vcpu *vcpu, | |
301 | struct kvm_rmap_desc *rd) | |
302 | { | |
303 | mmu_memory_cache_free(&vcpu->mmu_rmap_desc_cache, rd); | |
304 | } | |
305 | ||
cd4a4e53 AK |
306 | /* |
307 | * Reverse mapping data structures: | |
308 | * | |
309 | * If page->private bit zero is zero, then page->private points to the | |
310 | * shadow page table entry that points to page_address(page). | |
311 | * | |
312 | * If page->private bit zero is one, (then page->private & ~1) points | |
313 | * to a struct kvm_rmap_desc containing more mappings. | |
314 | */ | |
714b93da | 315 | static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte) |
cd4a4e53 AK |
316 | { |
317 | struct page *page; | |
318 | struct kvm_rmap_desc *desc; | |
319 | int i; | |
320 | ||
321 | if (!is_rmap_pte(*spte)) | |
322 | return; | |
323 | page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT); | |
5972e953 | 324 | if (!page_private(page)) { |
cd4a4e53 | 325 | rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte); |
5972e953 MR |
326 | set_page_private(page,(unsigned long)spte); |
327 | } else if (!(page_private(page) & 1)) { | |
cd4a4e53 | 328 | rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte); |
714b93da | 329 | desc = mmu_alloc_rmap_desc(vcpu); |
5972e953 | 330 | desc->shadow_ptes[0] = (u64 *)page_private(page); |
cd4a4e53 | 331 | desc->shadow_ptes[1] = spte; |
5972e953 | 332 | set_page_private(page,(unsigned long)desc | 1); |
cd4a4e53 AK |
333 | } else { |
334 | rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte); | |
5972e953 | 335 | desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul); |
cd4a4e53 AK |
336 | while (desc->shadow_ptes[RMAP_EXT-1] && desc->more) |
337 | desc = desc->more; | |
338 | if (desc->shadow_ptes[RMAP_EXT-1]) { | |
714b93da | 339 | desc->more = mmu_alloc_rmap_desc(vcpu); |
cd4a4e53 AK |
340 | desc = desc->more; |
341 | } | |
342 | for (i = 0; desc->shadow_ptes[i]; ++i) | |
343 | ; | |
344 | desc->shadow_ptes[i] = spte; | |
345 | } | |
346 | } | |
347 | ||
714b93da AK |
348 | static void rmap_desc_remove_entry(struct kvm_vcpu *vcpu, |
349 | struct page *page, | |
cd4a4e53 AK |
350 | struct kvm_rmap_desc *desc, |
351 | int i, | |
352 | struct kvm_rmap_desc *prev_desc) | |
353 | { | |
354 | int j; | |
355 | ||
356 | for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j) | |
357 | ; | |
358 | desc->shadow_ptes[i] = desc->shadow_ptes[j]; | |
11718b4d | 359 | desc->shadow_ptes[j] = NULL; |
cd4a4e53 AK |
360 | if (j != 0) |
361 | return; | |
362 | if (!prev_desc && !desc->more) | |
5972e953 | 363 | set_page_private(page,(unsigned long)desc->shadow_ptes[0]); |
cd4a4e53 AK |
364 | else |
365 | if (prev_desc) | |
366 | prev_desc->more = desc->more; | |
367 | else | |
5972e953 | 368 | set_page_private(page,(unsigned long)desc->more | 1); |
714b93da | 369 | mmu_free_rmap_desc(vcpu, desc); |
cd4a4e53 AK |
370 | } |
371 | ||
714b93da | 372 | static void rmap_remove(struct kvm_vcpu *vcpu, u64 *spte) |
cd4a4e53 AK |
373 | { |
374 | struct page *page; | |
375 | struct kvm_rmap_desc *desc; | |
376 | struct kvm_rmap_desc *prev_desc; | |
377 | int i; | |
378 | ||
379 | if (!is_rmap_pte(*spte)) | |
380 | return; | |
381 | page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT); | |
5972e953 | 382 | if (!page_private(page)) { |
cd4a4e53 AK |
383 | printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte); |
384 | BUG(); | |
5972e953 | 385 | } else if (!(page_private(page) & 1)) { |
cd4a4e53 | 386 | rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte); |
5972e953 | 387 | if ((u64 *)page_private(page) != spte) { |
cd4a4e53 AK |
388 | printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n", |
389 | spte, *spte); | |
390 | BUG(); | |
391 | } | |
5972e953 | 392 | set_page_private(page,0); |
cd4a4e53 AK |
393 | } else { |
394 | rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte); | |
5972e953 | 395 | desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul); |
cd4a4e53 AK |
396 | prev_desc = NULL; |
397 | while (desc) { | |
398 | for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) | |
399 | if (desc->shadow_ptes[i] == spte) { | |
714b93da AK |
400 | rmap_desc_remove_entry(vcpu, page, |
401 | desc, i, | |
cd4a4e53 AK |
402 | prev_desc); |
403 | return; | |
404 | } | |
405 | prev_desc = desc; | |
406 | desc = desc->more; | |
407 | } | |
408 | BUG(); | |
409 | } | |
410 | } | |
411 | ||
714b93da | 412 | static void rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn) |
374cbac0 | 413 | { |
714b93da | 414 | struct kvm *kvm = vcpu->kvm; |
374cbac0 | 415 | struct page *page; |
374cbac0 AK |
416 | struct kvm_rmap_desc *desc; |
417 | u64 *spte; | |
418 | ||
954bbbc2 AK |
419 | page = gfn_to_page(kvm, gfn); |
420 | BUG_ON(!page); | |
374cbac0 | 421 | |
5972e953 MR |
422 | while (page_private(page)) { |
423 | if (!(page_private(page) & 1)) | |
424 | spte = (u64 *)page_private(page); | |
374cbac0 | 425 | else { |
5972e953 | 426 | desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul); |
374cbac0 AK |
427 | spte = desc->shadow_ptes[0]; |
428 | } | |
429 | BUG_ON(!spte); | |
27aba766 AK |
430 | BUG_ON((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT |
431 | != page_to_pfn(page)); | |
374cbac0 AK |
432 | BUG_ON(!(*spte & PT_PRESENT_MASK)); |
433 | BUG_ON(!(*spte & PT_WRITABLE_MASK)); | |
434 | rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte); | |
714b93da | 435 | rmap_remove(vcpu, spte); |
40907d57 | 436 | kvm_arch_ops->tlb_flush(vcpu); |
374cbac0 AK |
437 | *spte &= ~(u64)PT_WRITABLE_MASK; |
438 | } | |
439 | } | |
440 | ||
d6c69ee9 | 441 | #ifdef MMU_DEBUG |
6aa8b732 AK |
442 | static int is_empty_shadow_page(hpa_t page_hpa) |
443 | { | |
139bdb2d AK |
444 | u64 *pos; |
445 | u64 *end; | |
446 | ||
447 | for (pos = __va(page_hpa), end = pos + PAGE_SIZE / sizeof(u64); | |
6aa8b732 | 448 | pos != end; pos++) |
139bdb2d AK |
449 | if (*pos != 0) { |
450 | printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__, | |
451 | pos, *pos); | |
6aa8b732 | 452 | return 0; |
139bdb2d | 453 | } |
6aa8b732 AK |
454 | return 1; |
455 | } | |
d6c69ee9 | 456 | #endif |
6aa8b732 | 457 | |
4b02d6da AK |
458 | static void kvm_mmu_free_page(struct kvm_vcpu *vcpu, |
459 | struct kvm_mmu_page *page_head) | |
260746c0 | 460 | { |
4b02d6da | 461 | ASSERT(is_empty_shadow_page(page_head->page_hpa)); |
36868f7b | 462 | list_move(&page_head->link, &vcpu->free_pages); |
260746c0 AK |
463 | ++vcpu->kvm->n_free_mmu_pages; |
464 | } | |
465 | ||
cea0f0e7 AK |
466 | static unsigned kvm_page_table_hashfn(gfn_t gfn) |
467 | { | |
468 | return gfn; | |
469 | } | |
470 | ||
25c0de2c AK |
471 | static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, |
472 | u64 *parent_pte) | |
6aa8b732 AK |
473 | { |
474 | struct kvm_mmu_page *page; | |
475 | ||
476 | if (list_empty(&vcpu->free_pages)) | |
25c0de2c | 477 | return NULL; |
6aa8b732 AK |
478 | |
479 | page = list_entry(vcpu->free_pages.next, struct kvm_mmu_page, link); | |
36868f7b | 480 | list_move(&page->link, &vcpu->kvm->active_mmu_pages); |
6aa8b732 AK |
481 | ASSERT(is_empty_shadow_page(page->page_hpa)); |
482 | page->slot_bitmap = 0; | |
cea0f0e7 | 483 | page->multimapped = 0; |
6aa8b732 | 484 | page->parent_pte = parent_pte; |
ebeace86 | 485 | --vcpu->kvm->n_free_mmu_pages; |
25c0de2c | 486 | return page; |
6aa8b732 AK |
487 | } |
488 | ||
714b93da AK |
489 | static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu, |
490 | struct kvm_mmu_page *page, u64 *parent_pte) | |
cea0f0e7 AK |
491 | { |
492 | struct kvm_pte_chain *pte_chain; | |
493 | struct hlist_node *node; | |
494 | int i; | |
495 | ||
496 | if (!parent_pte) | |
497 | return; | |
498 | if (!page->multimapped) { | |
499 | u64 *old = page->parent_pte; | |
500 | ||
501 | if (!old) { | |
502 | page->parent_pte = parent_pte; | |
503 | return; | |
504 | } | |
505 | page->multimapped = 1; | |
714b93da | 506 | pte_chain = mmu_alloc_pte_chain(vcpu); |
cea0f0e7 AK |
507 | INIT_HLIST_HEAD(&page->parent_ptes); |
508 | hlist_add_head(&pte_chain->link, &page->parent_ptes); | |
509 | pte_chain->parent_ptes[0] = old; | |
510 | } | |
511 | hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) { | |
512 | if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1]) | |
513 | continue; | |
514 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) | |
515 | if (!pte_chain->parent_ptes[i]) { | |
516 | pte_chain->parent_ptes[i] = parent_pte; | |
517 | return; | |
518 | } | |
519 | } | |
714b93da | 520 | pte_chain = mmu_alloc_pte_chain(vcpu); |
cea0f0e7 AK |
521 | BUG_ON(!pte_chain); |
522 | hlist_add_head(&pte_chain->link, &page->parent_ptes); | |
523 | pte_chain->parent_ptes[0] = parent_pte; | |
524 | } | |
525 | ||
714b93da AK |
526 | static void mmu_page_remove_parent_pte(struct kvm_vcpu *vcpu, |
527 | struct kvm_mmu_page *page, | |
cea0f0e7 AK |
528 | u64 *parent_pte) |
529 | { | |
530 | struct kvm_pte_chain *pte_chain; | |
531 | struct hlist_node *node; | |
532 | int i; | |
533 | ||
534 | if (!page->multimapped) { | |
535 | BUG_ON(page->parent_pte != parent_pte); | |
536 | page->parent_pte = NULL; | |
537 | return; | |
538 | } | |
539 | hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) | |
540 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) { | |
541 | if (!pte_chain->parent_ptes[i]) | |
542 | break; | |
543 | if (pte_chain->parent_ptes[i] != parent_pte) | |
544 | continue; | |
697fe2e2 AK |
545 | while (i + 1 < NR_PTE_CHAIN_ENTRIES |
546 | && pte_chain->parent_ptes[i + 1]) { | |
cea0f0e7 AK |
547 | pte_chain->parent_ptes[i] |
548 | = pte_chain->parent_ptes[i + 1]; | |
549 | ++i; | |
550 | } | |
551 | pte_chain->parent_ptes[i] = NULL; | |
697fe2e2 AK |
552 | if (i == 0) { |
553 | hlist_del(&pte_chain->link); | |
714b93da | 554 | mmu_free_pte_chain(vcpu, pte_chain); |
697fe2e2 AK |
555 | if (hlist_empty(&page->parent_ptes)) { |
556 | page->multimapped = 0; | |
557 | page->parent_pte = NULL; | |
558 | } | |
559 | } | |
cea0f0e7 AK |
560 | return; |
561 | } | |
562 | BUG(); | |
563 | } | |
564 | ||
565 | static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu, | |
566 | gfn_t gfn) | |
567 | { | |
568 | unsigned index; | |
569 | struct hlist_head *bucket; | |
570 | struct kvm_mmu_page *page; | |
571 | struct hlist_node *node; | |
572 | ||
573 | pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn); | |
574 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
575 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
576 | hlist_for_each_entry(page, node, bucket, hash_link) | |
577 | if (page->gfn == gfn && !page->role.metaphysical) { | |
578 | pgprintk("%s: found role %x\n", | |
579 | __FUNCTION__, page->role.word); | |
580 | return page; | |
581 | } | |
582 | return NULL; | |
583 | } | |
584 | ||
585 | static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, | |
586 | gfn_t gfn, | |
587 | gva_t gaddr, | |
588 | unsigned level, | |
589 | int metaphysical, | |
d28c6cfb | 590 | unsigned hugepage_access, |
cea0f0e7 AK |
591 | u64 *parent_pte) |
592 | { | |
593 | union kvm_mmu_page_role role; | |
594 | unsigned index; | |
595 | unsigned quadrant; | |
596 | struct hlist_head *bucket; | |
597 | struct kvm_mmu_page *page; | |
598 | struct hlist_node *node; | |
599 | ||
600 | role.word = 0; | |
601 | role.glevels = vcpu->mmu.root_level; | |
602 | role.level = level; | |
603 | role.metaphysical = metaphysical; | |
d28c6cfb | 604 | role.hugepage_access = hugepage_access; |
cea0f0e7 AK |
605 | if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) { |
606 | quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); | |
607 | quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1; | |
608 | role.quadrant = quadrant; | |
609 | } | |
610 | pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__, | |
611 | gfn, role.word); | |
612 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
613 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
614 | hlist_for_each_entry(page, node, bucket, hash_link) | |
615 | if (page->gfn == gfn && page->role.word == role.word) { | |
714b93da | 616 | mmu_page_add_parent_pte(vcpu, page, parent_pte); |
cea0f0e7 AK |
617 | pgprintk("%s: found\n", __FUNCTION__); |
618 | return page; | |
619 | } | |
620 | page = kvm_mmu_alloc_page(vcpu, parent_pte); | |
621 | if (!page) | |
622 | return page; | |
623 | pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word); | |
624 | page->gfn = gfn; | |
625 | page->role = role; | |
626 | hlist_add_head(&page->hash_link, bucket); | |
374cbac0 | 627 | if (!metaphysical) |
714b93da | 628 | rmap_write_protect(vcpu, gfn); |
cea0f0e7 AK |
629 | return page; |
630 | } | |
631 | ||
a436036b AK |
632 | static void kvm_mmu_page_unlink_children(struct kvm_vcpu *vcpu, |
633 | struct kvm_mmu_page *page) | |
634 | { | |
697fe2e2 AK |
635 | unsigned i; |
636 | u64 *pt; | |
637 | u64 ent; | |
638 | ||
639 | pt = __va(page->page_hpa); | |
640 | ||
641 | if (page->role.level == PT_PAGE_TABLE_LEVEL) { | |
642 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
643 | if (pt[i] & PT_PRESENT_MASK) | |
714b93da | 644 | rmap_remove(vcpu, &pt[i]); |
697fe2e2 AK |
645 | pt[i] = 0; |
646 | } | |
40907d57 | 647 | kvm_arch_ops->tlb_flush(vcpu); |
697fe2e2 AK |
648 | return; |
649 | } | |
650 | ||
651 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
652 | ent = pt[i]; | |
653 | ||
654 | pt[i] = 0; | |
655 | if (!(ent & PT_PRESENT_MASK)) | |
656 | continue; | |
657 | ent &= PT64_BASE_ADDR_MASK; | |
714b93da | 658 | mmu_page_remove_parent_pte(vcpu, page_header(ent), &pt[i]); |
697fe2e2 | 659 | } |
a436036b AK |
660 | } |
661 | ||
cea0f0e7 AK |
662 | static void kvm_mmu_put_page(struct kvm_vcpu *vcpu, |
663 | struct kvm_mmu_page *page, | |
664 | u64 *parent_pte) | |
665 | { | |
714b93da | 666 | mmu_page_remove_parent_pte(vcpu, page, parent_pte); |
a436036b AK |
667 | } |
668 | ||
669 | static void kvm_mmu_zap_page(struct kvm_vcpu *vcpu, | |
670 | struct kvm_mmu_page *page) | |
671 | { | |
672 | u64 *parent_pte; | |
673 | ||
674 | while (page->multimapped || page->parent_pte) { | |
675 | if (!page->multimapped) | |
676 | parent_pte = page->parent_pte; | |
677 | else { | |
678 | struct kvm_pte_chain *chain; | |
679 | ||
680 | chain = container_of(page->parent_ptes.first, | |
681 | struct kvm_pte_chain, link); | |
682 | parent_pte = chain->parent_ptes[0]; | |
683 | } | |
697fe2e2 | 684 | BUG_ON(!parent_pte); |
a436036b AK |
685 | kvm_mmu_put_page(vcpu, page, parent_pte); |
686 | *parent_pte = 0; | |
687 | } | |
cc4529ef | 688 | kvm_mmu_page_unlink_children(vcpu, page); |
3bb65a22 AK |
689 | if (!page->root_count) { |
690 | hlist_del(&page->hash_link); | |
4b02d6da | 691 | kvm_mmu_free_page(vcpu, page); |
36868f7b AK |
692 | } else |
693 | list_move(&page->link, &vcpu->kvm->active_mmu_pages); | |
a436036b AK |
694 | } |
695 | ||
696 | static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn) | |
697 | { | |
698 | unsigned index; | |
699 | struct hlist_head *bucket; | |
700 | struct kvm_mmu_page *page; | |
701 | struct hlist_node *node, *n; | |
702 | int r; | |
703 | ||
704 | pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn); | |
705 | r = 0; | |
706 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
707 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
708 | hlist_for_each_entry_safe(page, node, n, bucket, hash_link) | |
709 | if (page->gfn == gfn && !page->role.metaphysical) { | |
697fe2e2 AK |
710 | pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn, |
711 | page->role.word); | |
a436036b AK |
712 | kvm_mmu_zap_page(vcpu, page); |
713 | r = 1; | |
714 | } | |
715 | return r; | |
cea0f0e7 AK |
716 | } |
717 | ||
6aa8b732 AK |
718 | static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa) |
719 | { | |
720 | int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT)); | |
721 | struct kvm_mmu_page *page_head = page_header(__pa(pte)); | |
722 | ||
723 | __set_bit(slot, &page_head->slot_bitmap); | |
724 | } | |
725 | ||
726 | hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa) | |
727 | { | |
728 | hpa_t hpa = gpa_to_hpa(vcpu, gpa); | |
729 | ||
730 | return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa; | |
731 | } | |
732 | ||
733 | hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa) | |
734 | { | |
6aa8b732 AK |
735 | struct page *page; |
736 | ||
737 | ASSERT((gpa & HPA_ERR_MASK) == 0); | |
954bbbc2 AK |
738 | page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT); |
739 | if (!page) | |
6aa8b732 | 740 | return gpa | HPA_ERR_MASK; |
6aa8b732 AK |
741 | return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT) |
742 | | (gpa & (PAGE_SIZE-1)); | |
743 | } | |
744 | ||
745 | hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva) | |
746 | { | |
747 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva); | |
748 | ||
749 | if (gpa == UNMAPPED_GVA) | |
750 | return UNMAPPED_GVA; | |
751 | return gpa_to_hpa(vcpu, gpa); | |
752 | } | |
753 | ||
039576c0 AK |
754 | struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva) |
755 | { | |
756 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva); | |
757 | ||
758 | if (gpa == UNMAPPED_GVA) | |
759 | return NULL; | |
760 | return pfn_to_page(gpa_to_hpa(vcpu, gpa) >> PAGE_SHIFT); | |
761 | } | |
762 | ||
6aa8b732 AK |
763 | static void nonpaging_new_cr3(struct kvm_vcpu *vcpu) |
764 | { | |
765 | } | |
766 | ||
767 | static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p) | |
768 | { | |
769 | int level = PT32E_ROOT_LEVEL; | |
770 | hpa_t table_addr = vcpu->mmu.root_hpa; | |
771 | ||
772 | for (; ; level--) { | |
773 | u32 index = PT64_INDEX(v, level); | |
774 | u64 *table; | |
cea0f0e7 | 775 | u64 pte; |
6aa8b732 AK |
776 | |
777 | ASSERT(VALID_PAGE(table_addr)); | |
778 | table = __va(table_addr); | |
779 | ||
780 | if (level == 1) { | |
cea0f0e7 AK |
781 | pte = table[index]; |
782 | if (is_present_pte(pte) && is_writeble_pte(pte)) | |
783 | return 0; | |
6aa8b732 AK |
784 | mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT); |
785 | page_header_update_slot(vcpu->kvm, table, v); | |
786 | table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK | | |
787 | PT_USER_MASK; | |
714b93da | 788 | rmap_add(vcpu, &table[index]); |
6aa8b732 AK |
789 | return 0; |
790 | } | |
791 | ||
792 | if (table[index] == 0) { | |
25c0de2c | 793 | struct kvm_mmu_page *new_table; |
cea0f0e7 | 794 | gfn_t pseudo_gfn; |
6aa8b732 | 795 | |
cea0f0e7 AK |
796 | pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK) |
797 | >> PAGE_SHIFT; | |
798 | new_table = kvm_mmu_get_page(vcpu, pseudo_gfn, | |
799 | v, level - 1, | |
d28c6cfb | 800 | 1, 0, &table[index]); |
25c0de2c | 801 | if (!new_table) { |
6aa8b732 AK |
802 | pgprintk("nonpaging_map: ENOMEM\n"); |
803 | return -ENOMEM; | |
804 | } | |
805 | ||
25c0de2c AK |
806 | table[index] = new_table->page_hpa | PT_PRESENT_MASK |
807 | | PT_WRITABLE_MASK | PT_USER_MASK; | |
6aa8b732 AK |
808 | } |
809 | table_addr = table[index] & PT64_BASE_ADDR_MASK; | |
810 | } | |
811 | } | |
812 | ||
17ac10ad AK |
813 | static void mmu_free_roots(struct kvm_vcpu *vcpu) |
814 | { | |
815 | int i; | |
3bb65a22 | 816 | struct kvm_mmu_page *page; |
17ac10ad AK |
817 | |
818 | #ifdef CONFIG_X86_64 | |
819 | if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) { | |
820 | hpa_t root = vcpu->mmu.root_hpa; | |
821 | ||
822 | ASSERT(VALID_PAGE(root)); | |
3bb65a22 AK |
823 | page = page_header(root); |
824 | --page->root_count; | |
17ac10ad AK |
825 | vcpu->mmu.root_hpa = INVALID_PAGE; |
826 | return; | |
827 | } | |
828 | #endif | |
829 | for (i = 0; i < 4; ++i) { | |
830 | hpa_t root = vcpu->mmu.pae_root[i]; | |
831 | ||
417726a3 AK |
832 | if (root) { |
833 | ASSERT(VALID_PAGE(root)); | |
834 | root &= PT64_BASE_ADDR_MASK; | |
835 | page = page_header(root); | |
836 | --page->root_count; | |
837 | } | |
17ac10ad AK |
838 | vcpu->mmu.pae_root[i] = INVALID_PAGE; |
839 | } | |
840 | vcpu->mmu.root_hpa = INVALID_PAGE; | |
841 | } | |
842 | ||
843 | static void mmu_alloc_roots(struct kvm_vcpu *vcpu) | |
844 | { | |
845 | int i; | |
cea0f0e7 | 846 | gfn_t root_gfn; |
3bb65a22 AK |
847 | struct kvm_mmu_page *page; |
848 | ||
cea0f0e7 | 849 | root_gfn = vcpu->cr3 >> PAGE_SHIFT; |
17ac10ad AK |
850 | |
851 | #ifdef CONFIG_X86_64 | |
852 | if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) { | |
853 | hpa_t root = vcpu->mmu.root_hpa; | |
854 | ||
855 | ASSERT(!VALID_PAGE(root)); | |
68a99f6d | 856 | page = kvm_mmu_get_page(vcpu, root_gfn, 0, |
d28c6cfb | 857 | PT64_ROOT_LEVEL, 0, 0, NULL); |
68a99f6d | 858 | root = page->page_hpa; |
3bb65a22 | 859 | ++page->root_count; |
17ac10ad AK |
860 | vcpu->mmu.root_hpa = root; |
861 | return; | |
862 | } | |
863 | #endif | |
864 | for (i = 0; i < 4; ++i) { | |
865 | hpa_t root = vcpu->mmu.pae_root[i]; | |
866 | ||
867 | ASSERT(!VALID_PAGE(root)); | |
417726a3 AK |
868 | if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) { |
869 | if (!is_present_pte(vcpu->pdptrs[i])) { | |
870 | vcpu->mmu.pae_root[i] = 0; | |
871 | continue; | |
872 | } | |
cea0f0e7 | 873 | root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT; |
417726a3 | 874 | } else if (vcpu->mmu.root_level == 0) |
cea0f0e7 | 875 | root_gfn = 0; |
68a99f6d | 876 | page = kvm_mmu_get_page(vcpu, root_gfn, i << 30, |
cea0f0e7 | 877 | PT32_ROOT_LEVEL, !is_paging(vcpu), |
d28c6cfb | 878 | 0, NULL); |
68a99f6d | 879 | root = page->page_hpa; |
3bb65a22 | 880 | ++page->root_count; |
17ac10ad AK |
881 | vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK; |
882 | } | |
883 | vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root); | |
884 | } | |
885 | ||
6aa8b732 AK |
886 | static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr) |
887 | { | |
888 | return vaddr; | |
889 | } | |
890 | ||
891 | static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva, | |
892 | u32 error_code) | |
893 | { | |
6aa8b732 | 894 | gpa_t addr = gva; |
ebeace86 | 895 | hpa_t paddr; |
e2dec939 | 896 | int r; |
6aa8b732 | 897 | |
e2dec939 AK |
898 | r = mmu_topup_memory_caches(vcpu); |
899 | if (r) | |
900 | return r; | |
714b93da | 901 | |
6aa8b732 AK |
902 | ASSERT(vcpu); |
903 | ASSERT(VALID_PAGE(vcpu->mmu.root_hpa)); | |
904 | ||
6aa8b732 | 905 | |
ebeace86 | 906 | paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK); |
6aa8b732 | 907 | |
ebeace86 AK |
908 | if (is_error_hpa(paddr)) |
909 | return 1; | |
6aa8b732 | 910 | |
ebeace86 | 911 | return nonpaging_map(vcpu, addr & PAGE_MASK, paddr); |
6aa8b732 AK |
912 | } |
913 | ||
6aa8b732 AK |
914 | static void nonpaging_free(struct kvm_vcpu *vcpu) |
915 | { | |
17ac10ad | 916 | mmu_free_roots(vcpu); |
6aa8b732 AK |
917 | } |
918 | ||
919 | static int nonpaging_init_context(struct kvm_vcpu *vcpu) | |
920 | { | |
921 | struct kvm_mmu *context = &vcpu->mmu; | |
922 | ||
923 | context->new_cr3 = nonpaging_new_cr3; | |
924 | context->page_fault = nonpaging_page_fault; | |
6aa8b732 AK |
925 | context->gva_to_gpa = nonpaging_gva_to_gpa; |
926 | context->free = nonpaging_free; | |
cea0f0e7 | 927 | context->root_level = 0; |
6aa8b732 | 928 | context->shadow_root_level = PT32E_ROOT_LEVEL; |
17ac10ad | 929 | mmu_alloc_roots(vcpu); |
6aa8b732 AK |
930 | ASSERT(VALID_PAGE(context->root_hpa)); |
931 | kvm_arch_ops->set_cr3(vcpu, context->root_hpa); | |
932 | return 0; | |
933 | } | |
934 | ||
6aa8b732 AK |
935 | static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu) |
936 | { | |
1165f5fe | 937 | ++vcpu->stat.tlb_flush; |
6aa8b732 AK |
938 | kvm_arch_ops->tlb_flush(vcpu); |
939 | } | |
940 | ||
941 | static void paging_new_cr3(struct kvm_vcpu *vcpu) | |
942 | { | |
374cbac0 | 943 | pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3); |
cea0f0e7 | 944 | mmu_free_roots(vcpu); |
7f7417d6 IM |
945 | if (unlikely(vcpu->kvm->n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES)) |
946 | kvm_mmu_free_some_pages(vcpu); | |
cea0f0e7 | 947 | mmu_alloc_roots(vcpu); |
6aa8b732 | 948 | kvm_mmu_flush_tlb(vcpu); |
cea0f0e7 | 949 | kvm_arch_ops->set_cr3(vcpu, vcpu->mmu.root_hpa); |
6aa8b732 AK |
950 | } |
951 | ||
6aa8b732 AK |
952 | static inline void set_pte_common(struct kvm_vcpu *vcpu, |
953 | u64 *shadow_pte, | |
954 | gpa_t gaddr, | |
955 | int dirty, | |
815af8d4 AK |
956 | u64 access_bits, |
957 | gfn_t gfn) | |
6aa8b732 AK |
958 | { |
959 | hpa_t paddr; | |
960 | ||
961 | *shadow_pte |= access_bits << PT_SHADOW_BITS_OFFSET; | |
962 | if (!dirty) | |
963 | access_bits &= ~PT_WRITABLE_MASK; | |
cea0f0e7 | 964 | |
374cbac0 | 965 | paddr = gpa_to_hpa(vcpu, gaddr & PT64_BASE_ADDR_MASK); |
6aa8b732 AK |
966 | |
967 | *shadow_pte |= access_bits; | |
968 | ||
6aa8b732 AK |
969 | if (is_error_hpa(paddr)) { |
970 | *shadow_pte |= gaddr; | |
971 | *shadow_pte |= PT_SHADOW_IO_MARK; | |
972 | *shadow_pte &= ~PT_PRESENT_MASK; | |
374cbac0 | 973 | return; |
6aa8b732 | 974 | } |
374cbac0 AK |
975 | |
976 | *shadow_pte |= paddr; | |
977 | ||
978 | if (access_bits & PT_WRITABLE_MASK) { | |
979 | struct kvm_mmu_page *shadow; | |
980 | ||
815af8d4 | 981 | shadow = kvm_mmu_lookup_page(vcpu, gfn); |
374cbac0 AK |
982 | if (shadow) { |
983 | pgprintk("%s: found shadow page for %lx, marking ro\n", | |
815af8d4 | 984 | __FUNCTION__, gfn); |
374cbac0 | 985 | access_bits &= ~PT_WRITABLE_MASK; |
40907d57 AK |
986 | if (is_writeble_pte(*shadow_pte)) { |
987 | *shadow_pte &= ~PT_WRITABLE_MASK; | |
988 | kvm_arch_ops->tlb_flush(vcpu); | |
989 | } | |
374cbac0 AK |
990 | } |
991 | } | |
992 | ||
993 | if (access_bits & PT_WRITABLE_MASK) | |
994 | mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT); | |
995 | ||
996 | page_header_update_slot(vcpu->kvm, shadow_pte, gaddr); | |
714b93da | 997 | rmap_add(vcpu, shadow_pte); |
6aa8b732 AK |
998 | } |
999 | ||
1000 | static void inject_page_fault(struct kvm_vcpu *vcpu, | |
1001 | u64 addr, | |
1002 | u32 err_code) | |
1003 | { | |
1004 | kvm_arch_ops->inject_page_fault(vcpu, addr, err_code); | |
1005 | } | |
1006 | ||
1007 | static inline int fix_read_pf(u64 *shadow_ent) | |
1008 | { | |
1009 | if ((*shadow_ent & PT_SHADOW_USER_MASK) && | |
1010 | !(*shadow_ent & PT_USER_MASK)) { | |
1011 | /* | |
1012 | * If supervisor write protect is disabled, we shadow kernel | |
1013 | * pages as user pages so we can trap the write access. | |
1014 | */ | |
1015 | *shadow_ent |= PT_USER_MASK; | |
1016 | *shadow_ent &= ~PT_WRITABLE_MASK; | |
1017 | ||
1018 | return 1; | |
1019 | ||
1020 | } | |
1021 | return 0; | |
1022 | } | |
1023 | ||
6aa8b732 AK |
1024 | static void paging_free(struct kvm_vcpu *vcpu) |
1025 | { | |
1026 | nonpaging_free(vcpu); | |
1027 | } | |
1028 | ||
1029 | #define PTTYPE 64 | |
1030 | #include "paging_tmpl.h" | |
1031 | #undef PTTYPE | |
1032 | ||
1033 | #define PTTYPE 32 | |
1034 | #include "paging_tmpl.h" | |
1035 | #undef PTTYPE | |
1036 | ||
17ac10ad | 1037 | static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level) |
6aa8b732 AK |
1038 | { |
1039 | struct kvm_mmu *context = &vcpu->mmu; | |
1040 | ||
1041 | ASSERT(is_pae(vcpu)); | |
1042 | context->new_cr3 = paging_new_cr3; | |
1043 | context->page_fault = paging64_page_fault; | |
6aa8b732 AK |
1044 | context->gva_to_gpa = paging64_gva_to_gpa; |
1045 | context->free = paging_free; | |
17ac10ad AK |
1046 | context->root_level = level; |
1047 | context->shadow_root_level = level; | |
1048 | mmu_alloc_roots(vcpu); | |
6aa8b732 AK |
1049 | ASSERT(VALID_PAGE(context->root_hpa)); |
1050 | kvm_arch_ops->set_cr3(vcpu, context->root_hpa | | |
1051 | (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK))); | |
1052 | return 0; | |
1053 | } | |
1054 | ||
17ac10ad AK |
1055 | static int paging64_init_context(struct kvm_vcpu *vcpu) |
1056 | { | |
1057 | return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL); | |
1058 | } | |
1059 | ||
6aa8b732 AK |
1060 | static int paging32_init_context(struct kvm_vcpu *vcpu) |
1061 | { | |
1062 | struct kvm_mmu *context = &vcpu->mmu; | |
1063 | ||
1064 | context->new_cr3 = paging_new_cr3; | |
1065 | context->page_fault = paging32_page_fault; | |
6aa8b732 AK |
1066 | context->gva_to_gpa = paging32_gva_to_gpa; |
1067 | context->free = paging_free; | |
1068 | context->root_level = PT32_ROOT_LEVEL; | |
1069 | context->shadow_root_level = PT32E_ROOT_LEVEL; | |
17ac10ad | 1070 | mmu_alloc_roots(vcpu); |
6aa8b732 AK |
1071 | ASSERT(VALID_PAGE(context->root_hpa)); |
1072 | kvm_arch_ops->set_cr3(vcpu, context->root_hpa | | |
1073 | (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK))); | |
1074 | return 0; | |
1075 | } | |
1076 | ||
1077 | static int paging32E_init_context(struct kvm_vcpu *vcpu) | |
1078 | { | |
17ac10ad | 1079 | return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL); |
6aa8b732 AK |
1080 | } |
1081 | ||
1082 | static int init_kvm_mmu(struct kvm_vcpu *vcpu) | |
1083 | { | |
1084 | ASSERT(vcpu); | |
1085 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
1086 | ||
1087 | if (!is_paging(vcpu)) | |
1088 | return nonpaging_init_context(vcpu); | |
a9058ecd | 1089 | else if (is_long_mode(vcpu)) |
6aa8b732 AK |
1090 | return paging64_init_context(vcpu); |
1091 | else if (is_pae(vcpu)) | |
1092 | return paging32E_init_context(vcpu); | |
1093 | else | |
1094 | return paging32_init_context(vcpu); | |
1095 | } | |
1096 | ||
1097 | static void destroy_kvm_mmu(struct kvm_vcpu *vcpu) | |
1098 | { | |
1099 | ASSERT(vcpu); | |
1100 | if (VALID_PAGE(vcpu->mmu.root_hpa)) { | |
1101 | vcpu->mmu.free(vcpu); | |
1102 | vcpu->mmu.root_hpa = INVALID_PAGE; | |
1103 | } | |
1104 | } | |
1105 | ||
1106 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu) | |
1107 | { | |
714b93da AK |
1108 | int r; |
1109 | ||
6aa8b732 | 1110 | destroy_kvm_mmu(vcpu); |
714b93da AK |
1111 | r = init_kvm_mmu(vcpu); |
1112 | if (r < 0) | |
1113 | goto out; | |
e2dec939 | 1114 | r = mmu_topup_memory_caches(vcpu); |
714b93da AK |
1115 | out: |
1116 | return r; | |
6aa8b732 AK |
1117 | } |
1118 | ||
09072daf | 1119 | static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu, |
ac1b714e AK |
1120 | struct kvm_mmu_page *page, |
1121 | u64 *spte) | |
1122 | { | |
1123 | u64 pte; | |
1124 | struct kvm_mmu_page *child; | |
1125 | ||
1126 | pte = *spte; | |
1127 | if (is_present_pte(pte)) { | |
1128 | if (page->role.level == PT_PAGE_TABLE_LEVEL) | |
1129 | rmap_remove(vcpu, spte); | |
1130 | else { | |
1131 | child = page_header(pte & PT64_BASE_ADDR_MASK); | |
1132 | mmu_page_remove_parent_pte(vcpu, child, spte); | |
1133 | } | |
1134 | } | |
1135 | *spte = 0; | |
1136 | } | |
1137 | ||
0028425f AK |
1138 | static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu, |
1139 | struct kvm_mmu_page *page, | |
1140 | u64 *spte, | |
1141 | const void *new, int bytes) | |
1142 | { | |
1143 | if (page->role.level != PT_PAGE_TABLE_LEVEL) | |
1144 | return; | |
1145 | ||
1146 | if (page->role.glevels == PT32_ROOT_LEVEL) | |
1147 | paging32_update_pte(vcpu, page, spte, new, bytes); | |
1148 | else | |
1149 | paging64_update_pte(vcpu, page, spte, new, bytes); | |
1150 | } | |
1151 | ||
09072daf AK |
1152 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
1153 | const u8 *old, const u8 *new, int bytes) | |
da4a00f0 | 1154 | { |
9b7a0325 AK |
1155 | gfn_t gfn = gpa >> PAGE_SHIFT; |
1156 | struct kvm_mmu_page *page; | |
0e7bc4b9 | 1157 | struct hlist_node *node, *n; |
9b7a0325 AK |
1158 | struct hlist_head *bucket; |
1159 | unsigned index; | |
1160 | u64 *spte; | |
9b7a0325 | 1161 | unsigned offset = offset_in_page(gpa); |
0e7bc4b9 | 1162 | unsigned pte_size; |
9b7a0325 | 1163 | unsigned page_offset; |
0e7bc4b9 | 1164 | unsigned misaligned; |
fce0657f | 1165 | unsigned quadrant; |
9b7a0325 | 1166 | int level; |
86a5ba02 | 1167 | int flooded = 0; |
ac1b714e | 1168 | int npte; |
9b7a0325 | 1169 | |
da4a00f0 | 1170 | pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes); |
86a5ba02 AK |
1171 | if (gfn == vcpu->last_pt_write_gfn) { |
1172 | ++vcpu->last_pt_write_count; | |
1173 | if (vcpu->last_pt_write_count >= 3) | |
1174 | flooded = 1; | |
1175 | } else { | |
1176 | vcpu->last_pt_write_gfn = gfn; | |
1177 | vcpu->last_pt_write_count = 1; | |
1178 | } | |
9b7a0325 AK |
1179 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; |
1180 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
0e7bc4b9 | 1181 | hlist_for_each_entry_safe(page, node, n, bucket, hash_link) { |
9b7a0325 AK |
1182 | if (page->gfn != gfn || page->role.metaphysical) |
1183 | continue; | |
0e7bc4b9 AK |
1184 | pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8; |
1185 | misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); | |
e925c5ba | 1186 | misaligned |= bytes < 4; |
86a5ba02 | 1187 | if (misaligned || flooded) { |
0e7bc4b9 AK |
1188 | /* |
1189 | * Misaligned accesses are too much trouble to fix | |
1190 | * up; also, they usually indicate a page is not used | |
1191 | * as a page table. | |
86a5ba02 AK |
1192 | * |
1193 | * If we're seeing too many writes to a page, | |
1194 | * it may no longer be a page table, or we may be | |
1195 | * forking, in which case it is better to unmap the | |
1196 | * page. | |
0e7bc4b9 AK |
1197 | */ |
1198 | pgprintk("misaligned: gpa %llx bytes %d role %x\n", | |
1199 | gpa, bytes, page->role.word); | |
1200 | kvm_mmu_zap_page(vcpu, page); | |
1201 | continue; | |
1202 | } | |
9b7a0325 AK |
1203 | page_offset = offset; |
1204 | level = page->role.level; | |
ac1b714e | 1205 | npte = 1; |
9b7a0325 | 1206 | if (page->role.glevels == PT32_ROOT_LEVEL) { |
ac1b714e AK |
1207 | page_offset <<= 1; /* 32->64 */ |
1208 | /* | |
1209 | * A 32-bit pde maps 4MB while the shadow pdes map | |
1210 | * only 2MB. So we need to double the offset again | |
1211 | * and zap two pdes instead of one. | |
1212 | */ | |
1213 | if (level == PT32_ROOT_LEVEL) { | |
6b8d0f9b | 1214 | page_offset &= ~7; /* kill rounding error */ |
ac1b714e AK |
1215 | page_offset <<= 1; |
1216 | npte = 2; | |
1217 | } | |
fce0657f | 1218 | quadrant = page_offset >> PAGE_SHIFT; |
9b7a0325 | 1219 | page_offset &= ~PAGE_MASK; |
fce0657f AK |
1220 | if (quadrant != page->role.quadrant) |
1221 | continue; | |
9b7a0325 AK |
1222 | } |
1223 | spte = __va(page->page_hpa); | |
1224 | spte += page_offset / sizeof(*spte); | |
ac1b714e | 1225 | while (npte--) { |
09072daf | 1226 | mmu_pte_write_zap_pte(vcpu, page, spte); |
0028425f | 1227 | mmu_pte_write_new_pte(vcpu, page, spte, new, bytes); |
ac1b714e | 1228 | ++spte; |
9b7a0325 | 1229 | } |
9b7a0325 | 1230 | } |
da4a00f0 AK |
1231 | } |
1232 | ||
a436036b AK |
1233 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva) |
1234 | { | |
1235 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva); | |
1236 | ||
1237 | return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT); | |
1238 | } | |
1239 | ||
ebeace86 AK |
1240 | void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu) |
1241 | { | |
1242 | while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) { | |
1243 | struct kvm_mmu_page *page; | |
1244 | ||
1245 | page = container_of(vcpu->kvm->active_mmu_pages.prev, | |
1246 | struct kvm_mmu_page, link); | |
1247 | kvm_mmu_zap_page(vcpu, page); | |
1248 | } | |
1249 | } | |
1250 | EXPORT_SYMBOL_GPL(kvm_mmu_free_some_pages); | |
1251 | ||
6aa8b732 AK |
1252 | static void free_mmu_pages(struct kvm_vcpu *vcpu) |
1253 | { | |
f51234c2 | 1254 | struct kvm_mmu_page *page; |
6aa8b732 | 1255 | |
f51234c2 AK |
1256 | while (!list_empty(&vcpu->kvm->active_mmu_pages)) { |
1257 | page = container_of(vcpu->kvm->active_mmu_pages.next, | |
1258 | struct kvm_mmu_page, link); | |
1259 | kvm_mmu_zap_page(vcpu, page); | |
1260 | } | |
1261 | while (!list_empty(&vcpu->free_pages)) { | |
6aa8b732 AK |
1262 | page = list_entry(vcpu->free_pages.next, |
1263 | struct kvm_mmu_page, link); | |
1264 | list_del(&page->link); | |
1265 | __free_page(pfn_to_page(page->page_hpa >> PAGE_SHIFT)); | |
1266 | page->page_hpa = INVALID_PAGE; | |
1267 | } | |
17ac10ad | 1268 | free_page((unsigned long)vcpu->mmu.pae_root); |
6aa8b732 AK |
1269 | } |
1270 | ||
1271 | static int alloc_mmu_pages(struct kvm_vcpu *vcpu) | |
1272 | { | |
17ac10ad | 1273 | struct page *page; |
6aa8b732 AK |
1274 | int i; |
1275 | ||
1276 | ASSERT(vcpu); | |
1277 | ||
1278 | for (i = 0; i < KVM_NUM_MMU_PAGES; i++) { | |
6aa8b732 AK |
1279 | struct kvm_mmu_page *page_header = &vcpu->page_header_buf[i]; |
1280 | ||
1281 | INIT_LIST_HEAD(&page_header->link); | |
17ac10ad | 1282 | if ((page = alloc_page(GFP_KERNEL)) == NULL) |
6aa8b732 | 1283 | goto error_1; |
5972e953 | 1284 | set_page_private(page, (unsigned long)page_header); |
6aa8b732 AK |
1285 | page_header->page_hpa = (hpa_t)page_to_pfn(page) << PAGE_SHIFT; |
1286 | memset(__va(page_header->page_hpa), 0, PAGE_SIZE); | |
1287 | list_add(&page_header->link, &vcpu->free_pages); | |
ebeace86 | 1288 | ++vcpu->kvm->n_free_mmu_pages; |
6aa8b732 | 1289 | } |
17ac10ad AK |
1290 | |
1291 | /* | |
1292 | * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64. | |
1293 | * Therefore we need to allocate shadow page tables in the first | |
1294 | * 4GB of memory, which happens to fit the DMA32 zone. | |
1295 | */ | |
1296 | page = alloc_page(GFP_KERNEL | __GFP_DMA32); | |
1297 | if (!page) | |
1298 | goto error_1; | |
1299 | vcpu->mmu.pae_root = page_address(page); | |
1300 | for (i = 0; i < 4; ++i) | |
1301 | vcpu->mmu.pae_root[i] = INVALID_PAGE; | |
1302 | ||
6aa8b732 AK |
1303 | return 0; |
1304 | ||
1305 | error_1: | |
1306 | free_mmu_pages(vcpu); | |
1307 | return -ENOMEM; | |
1308 | } | |
1309 | ||
8018c27b | 1310 | int kvm_mmu_create(struct kvm_vcpu *vcpu) |
6aa8b732 | 1311 | { |
6aa8b732 AK |
1312 | ASSERT(vcpu); |
1313 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
1314 | ASSERT(list_empty(&vcpu->free_pages)); | |
1315 | ||
8018c27b IM |
1316 | return alloc_mmu_pages(vcpu); |
1317 | } | |
6aa8b732 | 1318 | |
8018c27b IM |
1319 | int kvm_mmu_setup(struct kvm_vcpu *vcpu) |
1320 | { | |
1321 | ASSERT(vcpu); | |
1322 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
1323 | ASSERT(!list_empty(&vcpu->free_pages)); | |
2c264957 | 1324 | |
8018c27b | 1325 | return init_kvm_mmu(vcpu); |
6aa8b732 AK |
1326 | } |
1327 | ||
1328 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu) | |
1329 | { | |
1330 | ASSERT(vcpu); | |
1331 | ||
1332 | destroy_kvm_mmu(vcpu); | |
1333 | free_mmu_pages(vcpu); | |
714b93da | 1334 | mmu_free_memory_caches(vcpu); |
6aa8b732 AK |
1335 | } |
1336 | ||
714b93da | 1337 | void kvm_mmu_slot_remove_write_access(struct kvm_vcpu *vcpu, int slot) |
6aa8b732 | 1338 | { |
714b93da | 1339 | struct kvm *kvm = vcpu->kvm; |
6aa8b732 AK |
1340 | struct kvm_mmu_page *page; |
1341 | ||
1342 | list_for_each_entry(page, &kvm->active_mmu_pages, link) { | |
1343 | int i; | |
1344 | u64 *pt; | |
1345 | ||
1346 | if (!test_bit(slot, &page->slot_bitmap)) | |
1347 | continue; | |
1348 | ||
1349 | pt = __va(page->page_hpa); | |
1350 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) | |
1351 | /* avoid RMW */ | |
cd4a4e53 | 1352 | if (pt[i] & PT_WRITABLE_MASK) { |
714b93da | 1353 | rmap_remove(vcpu, &pt[i]); |
6aa8b732 | 1354 | pt[i] &= ~PT_WRITABLE_MASK; |
cd4a4e53 | 1355 | } |
6aa8b732 AK |
1356 | } |
1357 | } | |
37a7d8b0 | 1358 | |
e0fa826f DL |
1359 | void kvm_mmu_zap_all(struct kvm_vcpu *vcpu) |
1360 | { | |
1361 | destroy_kvm_mmu(vcpu); | |
1362 | ||
1363 | while (!list_empty(&vcpu->kvm->active_mmu_pages)) { | |
1364 | struct kvm_mmu_page *page; | |
1365 | ||
1366 | page = container_of(vcpu->kvm->active_mmu_pages.next, | |
1367 | struct kvm_mmu_page, link); | |
1368 | kvm_mmu_zap_page(vcpu, page); | |
1369 | } | |
1370 | ||
1371 | mmu_free_memory_caches(vcpu); | |
1372 | kvm_arch_ops->tlb_flush(vcpu); | |
1373 | init_kvm_mmu(vcpu); | |
1374 | } | |
1375 | ||
b5a33a75 AK |
1376 | void kvm_mmu_module_exit(void) |
1377 | { | |
1378 | if (pte_chain_cache) | |
1379 | kmem_cache_destroy(pte_chain_cache); | |
1380 | if (rmap_desc_cache) | |
1381 | kmem_cache_destroy(rmap_desc_cache); | |
1382 | } | |
1383 | ||
1384 | int kvm_mmu_module_init(void) | |
1385 | { | |
1386 | pte_chain_cache = kmem_cache_create("kvm_pte_chain", | |
1387 | sizeof(struct kvm_pte_chain), | |
1388 | 0, 0, NULL, NULL); | |
1389 | if (!pte_chain_cache) | |
1390 | goto nomem; | |
1391 | rmap_desc_cache = kmem_cache_create("kvm_rmap_desc", | |
1392 | sizeof(struct kvm_rmap_desc), | |
1393 | 0, 0, NULL, NULL); | |
1394 | if (!rmap_desc_cache) | |
1395 | goto nomem; | |
1396 | ||
1397 | return 0; | |
1398 | ||
1399 | nomem: | |
1400 | kvm_mmu_module_exit(); | |
1401 | return -ENOMEM; | |
1402 | } | |
1403 | ||
37a7d8b0 AK |
1404 | #ifdef AUDIT |
1405 | ||
1406 | static const char *audit_msg; | |
1407 | ||
1408 | static gva_t canonicalize(gva_t gva) | |
1409 | { | |
1410 | #ifdef CONFIG_X86_64 | |
1411 | gva = (long long)(gva << 16) >> 16; | |
1412 | #endif | |
1413 | return gva; | |
1414 | } | |
1415 | ||
1416 | static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte, | |
1417 | gva_t va, int level) | |
1418 | { | |
1419 | u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK); | |
1420 | int i; | |
1421 | gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1)); | |
1422 | ||
1423 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) { | |
1424 | u64 ent = pt[i]; | |
1425 | ||
2807696c | 1426 | if (!(ent & PT_PRESENT_MASK)) |
37a7d8b0 AK |
1427 | continue; |
1428 | ||
1429 | va = canonicalize(va); | |
1430 | if (level > 1) | |
1431 | audit_mappings_page(vcpu, ent, va, level - 1); | |
1432 | else { | |
1433 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va); | |
1434 | hpa_t hpa = gpa_to_hpa(vcpu, gpa); | |
1435 | ||
1436 | if ((ent & PT_PRESENT_MASK) | |
1437 | && (ent & PT64_BASE_ADDR_MASK) != hpa) | |
1438 | printk(KERN_ERR "audit error: (%s) levels %d" | |
1439 | " gva %lx gpa %llx hpa %llx ent %llx\n", | |
1440 | audit_msg, vcpu->mmu.root_level, | |
1441 | va, gpa, hpa, ent); | |
1442 | } | |
1443 | } | |
1444 | } | |
1445 | ||
1446 | static void audit_mappings(struct kvm_vcpu *vcpu) | |
1447 | { | |
1ea252af | 1448 | unsigned i; |
37a7d8b0 AK |
1449 | |
1450 | if (vcpu->mmu.root_level == 4) | |
1451 | audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4); | |
1452 | else | |
1453 | for (i = 0; i < 4; ++i) | |
1454 | if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK) | |
1455 | audit_mappings_page(vcpu, | |
1456 | vcpu->mmu.pae_root[i], | |
1457 | i << 30, | |
1458 | 2); | |
1459 | } | |
1460 | ||
1461 | static int count_rmaps(struct kvm_vcpu *vcpu) | |
1462 | { | |
1463 | int nmaps = 0; | |
1464 | int i, j, k; | |
1465 | ||
1466 | for (i = 0; i < KVM_MEMORY_SLOTS; ++i) { | |
1467 | struct kvm_memory_slot *m = &vcpu->kvm->memslots[i]; | |
1468 | struct kvm_rmap_desc *d; | |
1469 | ||
1470 | for (j = 0; j < m->npages; ++j) { | |
1471 | struct page *page = m->phys_mem[j]; | |
1472 | ||
1473 | if (!page->private) | |
1474 | continue; | |
1475 | if (!(page->private & 1)) { | |
1476 | ++nmaps; | |
1477 | continue; | |
1478 | } | |
1479 | d = (struct kvm_rmap_desc *)(page->private & ~1ul); | |
1480 | while (d) { | |
1481 | for (k = 0; k < RMAP_EXT; ++k) | |
1482 | if (d->shadow_ptes[k]) | |
1483 | ++nmaps; | |
1484 | else | |
1485 | break; | |
1486 | d = d->more; | |
1487 | } | |
1488 | } | |
1489 | } | |
1490 | return nmaps; | |
1491 | } | |
1492 | ||
1493 | static int count_writable_mappings(struct kvm_vcpu *vcpu) | |
1494 | { | |
1495 | int nmaps = 0; | |
1496 | struct kvm_mmu_page *page; | |
1497 | int i; | |
1498 | ||
1499 | list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) { | |
1500 | u64 *pt = __va(page->page_hpa); | |
1501 | ||
1502 | if (page->role.level != PT_PAGE_TABLE_LEVEL) | |
1503 | continue; | |
1504 | ||
1505 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
1506 | u64 ent = pt[i]; | |
1507 | ||
1508 | if (!(ent & PT_PRESENT_MASK)) | |
1509 | continue; | |
1510 | if (!(ent & PT_WRITABLE_MASK)) | |
1511 | continue; | |
1512 | ++nmaps; | |
1513 | } | |
1514 | } | |
1515 | return nmaps; | |
1516 | } | |
1517 | ||
1518 | static void audit_rmap(struct kvm_vcpu *vcpu) | |
1519 | { | |
1520 | int n_rmap = count_rmaps(vcpu); | |
1521 | int n_actual = count_writable_mappings(vcpu); | |
1522 | ||
1523 | if (n_rmap != n_actual) | |
1524 | printk(KERN_ERR "%s: (%s) rmap %d actual %d\n", | |
1525 | __FUNCTION__, audit_msg, n_rmap, n_actual); | |
1526 | } | |
1527 | ||
1528 | static void audit_write_protection(struct kvm_vcpu *vcpu) | |
1529 | { | |
1530 | struct kvm_mmu_page *page; | |
1531 | ||
1532 | list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) { | |
1533 | hfn_t hfn; | |
1534 | struct page *pg; | |
1535 | ||
1536 | if (page->role.metaphysical) | |
1537 | continue; | |
1538 | ||
1539 | hfn = gpa_to_hpa(vcpu, (gpa_t)page->gfn << PAGE_SHIFT) | |
1540 | >> PAGE_SHIFT; | |
1541 | pg = pfn_to_page(hfn); | |
1542 | if (pg->private) | |
1543 | printk(KERN_ERR "%s: (%s) shadow page has writable" | |
1544 | " mappings: gfn %lx role %x\n", | |
1545 | __FUNCTION__, audit_msg, page->gfn, | |
1546 | page->role.word); | |
1547 | } | |
1548 | } | |
1549 | ||
1550 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) | |
1551 | { | |
1552 | int olddbg = dbg; | |
1553 | ||
1554 | dbg = 0; | |
1555 | audit_msg = msg; | |
1556 | audit_rmap(vcpu); | |
1557 | audit_write_protection(vcpu); | |
1558 | audit_mappings(vcpu); | |
1559 | dbg = olddbg; | |
1560 | } | |
1561 | ||
1562 | #endif |