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KVM: Portability: Introduce kvm_vcpu_arch
[mirror_ubuntu-jammy-kernel.git] / drivers / kvm / mmu.c
CommitLineData
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1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
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19
20#include "vmx.h"
21#include "kvm.h"
34c16eec 22#include "x86.h"
e495606d 23
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24#include <linux/types.h>
25#include <linux/string.h>
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26#include <linux/mm.h>
27#include <linux/highmem.h>
28#include <linux/module.h>
448353ca 29#include <linux/swap.h>
6aa8b732 30
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31#include <asm/page.h>
32#include <asm/cmpxchg.h>
4e542370 33#include <asm/io.h>
6aa8b732 34
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35#undef MMU_DEBUG
36
37#undef AUDIT
38
39#ifdef AUDIT
40static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
41#else
42static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
43#endif
44
45#ifdef MMU_DEBUG
46
47#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
48#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
49
50#else
51
52#define pgprintk(x...) do { } while (0)
53#define rmap_printk(x...) do { } while (0)
54
55#endif
56
57#if defined(MMU_DEBUG) || defined(AUDIT)
58static int dbg = 1;
59#endif
6aa8b732 60
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61#ifndef MMU_DEBUG
62#define ASSERT(x) do { } while (0)
63#else
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64#define ASSERT(x) \
65 if (!(x)) { \
66 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
67 __FILE__, __LINE__, #x); \
68 }
d6c69ee9 69#endif
6aa8b732 70
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71#define PT64_PT_BITS 9
72#define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
73#define PT32_PT_BITS 10
74#define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
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75
76#define PT_WRITABLE_SHIFT 1
77
78#define PT_PRESENT_MASK (1ULL << 0)
79#define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
80#define PT_USER_MASK (1ULL << 2)
81#define PT_PWT_MASK (1ULL << 3)
82#define PT_PCD_MASK (1ULL << 4)
83#define PT_ACCESSED_MASK (1ULL << 5)
84#define PT_DIRTY_MASK (1ULL << 6)
85#define PT_PAGE_SIZE_MASK (1ULL << 7)
86#define PT_PAT_MASK (1ULL << 7)
87#define PT_GLOBAL_MASK (1ULL << 8)
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88#define PT64_NX_SHIFT 63
89#define PT64_NX_MASK (1ULL << PT64_NX_SHIFT)
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90
91#define PT_PAT_SHIFT 7
92#define PT_DIR_PAT_SHIFT 12
93#define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
94
95#define PT32_DIR_PSE36_SIZE 4
96#define PT32_DIR_PSE36_SHIFT 13
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97#define PT32_DIR_PSE36_MASK \
98 (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
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99
100
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101#define PT_FIRST_AVAIL_BITS_SHIFT 9
102#define PT64_SECOND_AVAIL_BITS_SHIFT 52
103
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104#define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
105
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106#define VALID_PAGE(x) ((x) != INVALID_PAGE)
107
108#define PT64_LEVEL_BITS 9
109
110#define PT64_LEVEL_SHIFT(level) \
d77c26fc 111 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
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112
113#define PT64_LEVEL_MASK(level) \
114 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
115
116#define PT64_INDEX(address, level)\
117 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
118
119
120#define PT32_LEVEL_BITS 10
121
122#define PT32_LEVEL_SHIFT(level) \
d77c26fc 123 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
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124
125#define PT32_LEVEL_MASK(level) \
126 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
127
128#define PT32_INDEX(address, level)\
129 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
130
131
27aba766 132#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
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133#define PT64_DIR_BASE_ADDR_MASK \
134 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
135
136#define PT32_BASE_ADDR_MASK PAGE_MASK
137#define PT32_DIR_BASE_ADDR_MASK \
138 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
139
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140#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
141 | PT64_NX_MASK)
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142
143#define PFERR_PRESENT_MASK (1U << 0)
144#define PFERR_WRITE_MASK (1U << 1)
145#define PFERR_USER_MASK (1U << 2)
73b1087e 146#define PFERR_FETCH_MASK (1U << 4)
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147
148#define PT64_ROOT_LEVEL 4
149#define PT32_ROOT_LEVEL 2
150#define PT32E_ROOT_LEVEL 3
151
152#define PT_DIRECTORY_LEVEL 2
153#define PT_PAGE_TABLE_LEVEL 1
154
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155#define RMAP_EXT 4
156
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157#define ACC_EXEC_MASK 1
158#define ACC_WRITE_MASK PT_WRITABLE_MASK
159#define ACC_USER_MASK PT_USER_MASK
160#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
161
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162struct kvm_rmap_desc {
163 u64 *shadow_ptes[RMAP_EXT];
164 struct kvm_rmap_desc *more;
165};
166
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167static struct kmem_cache *pte_chain_cache;
168static struct kmem_cache *rmap_desc_cache;
d3d25b04 169static struct kmem_cache *mmu_page_header_cache;
b5a33a75 170
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171static u64 __read_mostly shadow_trap_nonpresent_pte;
172static u64 __read_mostly shadow_notrap_nonpresent_pte;
173
174void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
175{
176 shadow_trap_nonpresent_pte = trap_pte;
177 shadow_notrap_nonpresent_pte = notrap_pte;
178}
179EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
180
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181static int is_write_protection(struct kvm_vcpu *vcpu)
182{
ad312c7c 183 return vcpu->arch.cr0 & X86_CR0_WP;
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184}
185
186static int is_cpuid_PSE36(void)
187{
188 return 1;
189}
190
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191static int is_nx(struct kvm_vcpu *vcpu)
192{
ad312c7c 193 return vcpu->arch.shadow_efer & EFER_NX;
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194}
195
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196static int is_present_pte(unsigned long pte)
197{
198 return pte & PT_PRESENT_MASK;
199}
200
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201static int is_shadow_present_pte(u64 pte)
202{
203 pte &= ~PT_SHADOW_IO_MARK;
204 return pte != shadow_trap_nonpresent_pte
205 && pte != shadow_notrap_nonpresent_pte;
206}
207
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208static int is_writeble_pte(unsigned long pte)
209{
210 return pte & PT_WRITABLE_MASK;
211}
212
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213static int is_dirty_pte(unsigned long pte)
214{
215 return pte & PT_DIRTY_MASK;
216}
217
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218static int is_io_pte(unsigned long pte)
219{
220 return pte & PT_SHADOW_IO_MARK;
221}
222
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223static int is_rmap_pte(u64 pte)
224{
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225 return pte != shadow_trap_nonpresent_pte
226 && pte != shadow_notrap_nonpresent_pte;
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227}
228
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229static gfn_t pse36_gfn_delta(u32 gpte)
230{
231 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
232
233 return (gpte & PT32_DIR_PSE36_MASK) << shift;
234}
235
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236static void set_shadow_pte(u64 *sptep, u64 spte)
237{
238#ifdef CONFIG_X86_64
239 set_64bit((unsigned long *)sptep, spte);
240#else
241 set_64bit((unsigned long long *)sptep, spte);
242#endif
243}
244
e2dec939 245static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 246 struct kmem_cache *base_cache, int min)
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247{
248 void *obj;
249
250 if (cache->nobjs >= min)
e2dec939 251 return 0;
714b93da 252 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 253 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 254 if (!obj)
e2dec939 255 return -ENOMEM;
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256 cache->objects[cache->nobjs++] = obj;
257 }
e2dec939 258 return 0;
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259}
260
261static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
262{
263 while (mc->nobjs)
264 kfree(mc->objects[--mc->nobjs]);
265}
266
c1158e63 267static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 268 int min)
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269{
270 struct page *page;
271
272 if (cache->nobjs >= min)
273 return 0;
274 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 275 page = alloc_page(GFP_KERNEL);
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276 if (!page)
277 return -ENOMEM;
278 set_page_private(page, 0);
279 cache->objects[cache->nobjs++] = page_address(page);
280 }
281 return 0;
282}
283
284static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
285{
286 while (mc->nobjs)
c4d198d5 287 free_page((unsigned long)mc->objects[--mc->nobjs]);
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288}
289
2e3e5882 290static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 291{
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292 int r;
293
2e3e5882 294 kvm_mmu_free_some_pages(vcpu);
ad312c7c 295 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
2e3e5882 296 pte_chain_cache, 4);
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297 if (r)
298 goto out;
ad312c7c 299 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
2e3e5882 300 rmap_desc_cache, 1);
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301 if (r)
302 goto out;
ad312c7c 303 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
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304 if (r)
305 goto out;
ad312c7c 306 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
2e3e5882 307 mmu_page_header_cache, 4);
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308out:
309 return r;
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310}
311
312static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
313{
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314 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
315 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
316 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
317 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
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318}
319
320static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
321 size_t size)
322{
323 void *p;
324
325 BUG_ON(!mc->nobjs);
326 p = mc->objects[--mc->nobjs];
327 memset(p, 0, size);
328 return p;
329}
330
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331static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
332{
ad312c7c 333 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
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334 sizeof(struct kvm_pte_chain));
335}
336
90cb0529 337static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 338{
90cb0529 339 kfree(pc);
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340}
341
342static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
343{
ad312c7c 344 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
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345 sizeof(struct kvm_rmap_desc));
346}
347
90cb0529 348static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 349{
90cb0529 350 kfree(rd);
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351}
352
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353/*
354 * Take gfn and return the reverse mapping to it.
355 * Note: gfn must be unaliased before this function get called
356 */
357
358static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn)
359{
360 struct kvm_memory_slot *slot;
361
362 slot = gfn_to_memslot(kvm, gfn);
363 return &slot->rmap[gfn - slot->base_gfn];
364}
365
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366/*
367 * Reverse mapping data structures:
368 *
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369 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
370 * that points to page_address(page).
cd4a4e53 371 *
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372 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
373 * containing more mappings.
cd4a4e53 374 */
290fc38d 375static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
cd4a4e53 376{
4db35314 377 struct kvm_mmu_page *sp;
cd4a4e53 378 struct kvm_rmap_desc *desc;
290fc38d 379 unsigned long *rmapp;
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380 int i;
381
382 if (!is_rmap_pte(*spte))
383 return;
290fc38d 384 gfn = unalias_gfn(vcpu->kvm, gfn);
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385 sp = page_header(__pa(spte));
386 sp->gfns[spte - sp->spt] = gfn;
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387 rmapp = gfn_to_rmap(vcpu->kvm, gfn);
388 if (!*rmapp) {
cd4a4e53 389 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
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390 *rmapp = (unsigned long)spte;
391 } else if (!(*rmapp & 1)) {
cd4a4e53 392 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 393 desc = mmu_alloc_rmap_desc(vcpu);
290fc38d 394 desc->shadow_ptes[0] = (u64 *)*rmapp;
cd4a4e53 395 desc->shadow_ptes[1] = spte;
290fc38d 396 *rmapp = (unsigned long)desc | 1;
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397 } else {
398 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 399 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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400 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
401 desc = desc->more;
402 if (desc->shadow_ptes[RMAP_EXT-1]) {
714b93da 403 desc->more = mmu_alloc_rmap_desc(vcpu);
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404 desc = desc->more;
405 }
406 for (i = 0; desc->shadow_ptes[i]; ++i)
407 ;
408 desc->shadow_ptes[i] = spte;
409 }
410}
411
290fc38d 412static void rmap_desc_remove_entry(unsigned long *rmapp,
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413 struct kvm_rmap_desc *desc,
414 int i,
415 struct kvm_rmap_desc *prev_desc)
416{
417 int j;
418
419 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
420 ;
421 desc->shadow_ptes[i] = desc->shadow_ptes[j];
11718b4d 422 desc->shadow_ptes[j] = NULL;
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423 if (j != 0)
424 return;
425 if (!prev_desc && !desc->more)
290fc38d 426 *rmapp = (unsigned long)desc->shadow_ptes[0];
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427 else
428 if (prev_desc)
429 prev_desc->more = desc->more;
430 else
290fc38d 431 *rmapp = (unsigned long)desc->more | 1;
90cb0529 432 mmu_free_rmap_desc(desc);
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433}
434
290fc38d 435static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 436{
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437 struct kvm_rmap_desc *desc;
438 struct kvm_rmap_desc *prev_desc;
4db35314 439 struct kvm_mmu_page *sp;
76c35c6e 440 struct page *page;
290fc38d 441 unsigned long *rmapp;
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442 int i;
443
444 if (!is_rmap_pte(*spte))
445 return;
4db35314 446 sp = page_header(__pa(spte));
76c35c6e 447 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
448353ca 448 mark_page_accessed(page);
b4231d61 449 if (is_writeble_pte(*spte))
76c35c6e 450 kvm_release_page_dirty(page);
b4231d61 451 else
76c35c6e 452 kvm_release_page_clean(page);
4db35314 453 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt]);
290fc38d 454 if (!*rmapp) {
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455 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
456 BUG();
290fc38d 457 } else if (!(*rmapp & 1)) {
cd4a4e53 458 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 459 if ((u64 *)*rmapp != spte) {
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460 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
461 spte, *spte);
462 BUG();
463 }
290fc38d 464 *rmapp = 0;
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465 } else {
466 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 467 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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468 prev_desc = NULL;
469 while (desc) {
470 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
471 if (desc->shadow_ptes[i] == spte) {
290fc38d 472 rmap_desc_remove_entry(rmapp,
714b93da 473 desc, i,
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474 prev_desc);
475 return;
476 }
477 prev_desc = desc;
478 desc = desc->more;
479 }
480 BUG();
481 }
482}
483
98348e95 484static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 485{
374cbac0 486 struct kvm_rmap_desc *desc;
98348e95
IE
487 struct kvm_rmap_desc *prev_desc;
488 u64 *prev_spte;
489 int i;
490
491 if (!*rmapp)
492 return NULL;
493 else if (!(*rmapp & 1)) {
494 if (!spte)
495 return (u64 *)*rmapp;
496 return NULL;
497 }
498 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
499 prev_desc = NULL;
500 prev_spte = NULL;
501 while (desc) {
502 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
503 if (prev_spte == spte)
504 return desc->shadow_ptes[i];
505 prev_spte = desc->shadow_ptes[i];
506 }
507 desc = desc->more;
508 }
509 return NULL;
510}
511
512static void rmap_write_protect(struct kvm *kvm, u64 gfn)
513{
290fc38d 514 unsigned long *rmapp;
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515 u64 *spte;
516
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517 gfn = unalias_gfn(kvm, gfn);
518 rmapp = gfn_to_rmap(kvm, gfn);
374cbac0 519
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IE
520 spte = rmap_next(kvm, rmapp, NULL);
521 while (spte) {
374cbac0 522 BUG_ON(!spte);
374cbac0 523 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 524 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
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525 if (is_writeble_pte(*spte))
526 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
4a4c9924 527 kvm_flush_remote_tlbs(kvm);
9647c14c 528 spte = rmap_next(kvm, rmapp, spte);
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529 }
530}
531
d6c69ee9 532#ifdef MMU_DEBUG
47ad8e68 533static int is_empty_shadow_page(u64 *spt)
6aa8b732 534{
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535 u64 *pos;
536 u64 *end;
537
47ad8e68 538 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
c7addb90 539 if ((*pos & ~PT_SHADOW_IO_MARK) != shadow_trap_nonpresent_pte) {
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540 printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
541 pos, *pos);
6aa8b732 542 return 0;
139bdb2d 543 }
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544 return 1;
545}
d6c69ee9 546#endif
6aa8b732 547
4db35314 548static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
260746c0 549{
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550 ASSERT(is_empty_shadow_page(sp->spt));
551 list_del(&sp->link);
552 __free_page(virt_to_page(sp->spt));
553 __free_page(virt_to_page(sp->gfns));
554 kfree(sp);
90cb0529 555 ++kvm->n_free_mmu_pages;
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556}
557
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558static unsigned kvm_page_table_hashfn(gfn_t gfn)
559{
560 return gfn;
561}
562
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563static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
564 u64 *parent_pte)
6aa8b732 565{
4db35314 566 struct kvm_mmu_page *sp;
6aa8b732 567
d3d25b04 568 if (!vcpu->kvm->n_free_mmu_pages)
25c0de2c 569 return NULL;
6aa8b732 570
ad312c7c
ZX
571 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
572 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
573 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
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574 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
575 list_add(&sp->link, &vcpu->kvm->active_mmu_pages);
576 ASSERT(is_empty_shadow_page(sp->spt));
577 sp->slot_bitmap = 0;
578 sp->multimapped = 0;
579 sp->parent_pte = parent_pte;
ebeace86 580 --vcpu->kvm->n_free_mmu_pages;
4db35314 581 return sp;
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582}
583
714b93da 584static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
4db35314 585 struct kvm_mmu_page *sp, u64 *parent_pte)
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586{
587 struct kvm_pte_chain *pte_chain;
588 struct hlist_node *node;
589 int i;
590
591 if (!parent_pte)
592 return;
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593 if (!sp->multimapped) {
594 u64 *old = sp->parent_pte;
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595
596 if (!old) {
4db35314 597 sp->parent_pte = parent_pte;
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598 return;
599 }
4db35314 600 sp->multimapped = 1;
714b93da 601 pte_chain = mmu_alloc_pte_chain(vcpu);
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602 INIT_HLIST_HEAD(&sp->parent_ptes);
603 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
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604 pte_chain->parent_ptes[0] = old;
605 }
4db35314 606 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
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607 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
608 continue;
609 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
610 if (!pte_chain->parent_ptes[i]) {
611 pte_chain->parent_ptes[i] = parent_pte;
612 return;
613 }
614 }
714b93da 615 pte_chain = mmu_alloc_pte_chain(vcpu);
cea0f0e7 616 BUG_ON(!pte_chain);
4db35314 617 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
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618 pte_chain->parent_ptes[0] = parent_pte;
619}
620
4db35314 621static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
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622 u64 *parent_pte)
623{
624 struct kvm_pte_chain *pte_chain;
625 struct hlist_node *node;
626 int i;
627
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628 if (!sp->multimapped) {
629 BUG_ON(sp->parent_pte != parent_pte);
630 sp->parent_pte = NULL;
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631 return;
632 }
4db35314 633 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
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634 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
635 if (!pte_chain->parent_ptes[i])
636 break;
637 if (pte_chain->parent_ptes[i] != parent_pte)
638 continue;
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639 while (i + 1 < NR_PTE_CHAIN_ENTRIES
640 && pte_chain->parent_ptes[i + 1]) {
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641 pte_chain->parent_ptes[i]
642 = pte_chain->parent_ptes[i + 1];
643 ++i;
644 }
645 pte_chain->parent_ptes[i] = NULL;
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646 if (i == 0) {
647 hlist_del(&pte_chain->link);
90cb0529 648 mmu_free_pte_chain(pte_chain);
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649 if (hlist_empty(&sp->parent_ptes)) {
650 sp->multimapped = 0;
651 sp->parent_pte = NULL;
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652 }
653 }
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654 return;
655 }
656 BUG();
657}
658
4db35314 659static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
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660{
661 unsigned index;
662 struct hlist_head *bucket;
4db35314 663 struct kvm_mmu_page *sp;
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664 struct hlist_node *node;
665
666 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
667 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
f67a46f4 668 bucket = &kvm->mmu_page_hash[index];
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669 hlist_for_each_entry(sp, node, bucket, hash_link)
670 if (sp->gfn == gfn && !sp->role.metaphysical) {
cea0f0e7 671 pgprintk("%s: found role %x\n",
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672 __FUNCTION__, sp->role.word);
673 return sp;
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674 }
675 return NULL;
676}
677
678static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
679 gfn_t gfn,
680 gva_t gaddr,
681 unsigned level,
682 int metaphysical,
41074d07 683 unsigned access,
7819026e
MT
684 u64 *parent_pte,
685 bool *new_page)
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686{
687 union kvm_mmu_page_role role;
688 unsigned index;
689 unsigned quadrant;
690 struct hlist_head *bucket;
4db35314 691 struct kvm_mmu_page *sp;
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692 struct hlist_node *node;
693
694 role.word = 0;
ad312c7c 695 role.glevels = vcpu->arch.mmu.root_level;
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696 role.level = level;
697 role.metaphysical = metaphysical;
41074d07 698 role.access = access;
ad312c7c 699 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
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700 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
701 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
702 role.quadrant = quadrant;
703 }
704 pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
705 gfn, role.word);
706 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
707 bucket = &vcpu->kvm->mmu_page_hash[index];
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708 hlist_for_each_entry(sp, node, bucket, hash_link)
709 if (sp->gfn == gfn && sp->role.word == role.word) {
710 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
cea0f0e7 711 pgprintk("%s: found\n", __FUNCTION__);
4db35314 712 return sp;
cea0f0e7 713 }
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714 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
715 if (!sp)
716 return sp;
cea0f0e7 717 pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
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718 sp->gfn = gfn;
719 sp->role = role;
720 hlist_add_head(&sp->hash_link, bucket);
ad312c7c 721 vcpu->arch.mmu.prefetch_page(vcpu, sp);
374cbac0 722 if (!metaphysical)
4a4c9924 723 rmap_write_protect(vcpu->kvm, gfn);
7819026e
MT
724 if (new_page)
725 *new_page = 1;
4db35314 726 return sp;
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727}
728
90cb0529 729static void kvm_mmu_page_unlink_children(struct kvm *kvm,
4db35314 730 struct kvm_mmu_page *sp)
a436036b 731{
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AK
732 unsigned i;
733 u64 *pt;
734 u64 ent;
735
4db35314 736 pt = sp->spt;
697fe2e2 737
4db35314 738 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
697fe2e2 739 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
c7addb90 740 if (is_shadow_present_pte(pt[i]))
290fc38d 741 rmap_remove(kvm, &pt[i]);
c7addb90 742 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 743 }
90cb0529 744 kvm_flush_remote_tlbs(kvm);
697fe2e2
AK
745 return;
746 }
747
748 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
749 ent = pt[i];
750
c7addb90
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751 pt[i] = shadow_trap_nonpresent_pte;
752 if (!is_shadow_present_pte(ent))
697fe2e2
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753 continue;
754 ent &= PT64_BASE_ADDR_MASK;
90cb0529 755 mmu_page_remove_parent_pte(page_header(ent), &pt[i]);
697fe2e2 756 }
90cb0529 757 kvm_flush_remote_tlbs(kvm);
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758}
759
4db35314 760static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7 761{
4db35314 762 mmu_page_remove_parent_pte(sp, parent_pte);
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763}
764
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765static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
766{
767 int i;
768
769 for (i = 0; i < KVM_MAX_VCPUS; ++i)
770 if (kvm->vcpus[i])
ad312c7c 771 kvm->vcpus[i]->arch.last_pte_updated = NULL;
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AK
772}
773
4db35314 774static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
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775{
776 u64 *parent_pte;
777
4cee5764 778 ++kvm->stat.mmu_shadow_zapped;
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779 while (sp->multimapped || sp->parent_pte) {
780 if (!sp->multimapped)
781 parent_pte = sp->parent_pte;
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782 else {
783 struct kvm_pte_chain *chain;
784
4db35314 785 chain = container_of(sp->parent_ptes.first,
a436036b
AK
786 struct kvm_pte_chain, link);
787 parent_pte = chain->parent_ptes[0];
788 }
697fe2e2 789 BUG_ON(!parent_pte);
4db35314 790 kvm_mmu_put_page(sp, parent_pte);
c7addb90 791 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 792 }
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793 kvm_mmu_page_unlink_children(kvm, sp);
794 if (!sp->root_count) {
795 hlist_del(&sp->hash_link);
796 kvm_mmu_free_page(kvm, sp);
36868f7b 797 } else
4db35314 798 list_move(&sp->link, &kvm->active_mmu_pages);
12b7d28f 799 kvm_mmu_reset_last_pte_updated(kvm);
a436036b
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800}
801
82ce2c96
IE
802/*
803 * Changing the number of mmu pages allocated to the vm
804 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
805 */
806void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
807{
808 /*
809 * If we set the number of mmu pages to be smaller be than the
810 * number of actived pages , we must to free some mmu pages before we
811 * change the value
812 */
813
814 if ((kvm->n_alloc_mmu_pages - kvm->n_free_mmu_pages) >
815 kvm_nr_mmu_pages) {
816 int n_used_mmu_pages = kvm->n_alloc_mmu_pages
817 - kvm->n_free_mmu_pages;
818
819 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
820 struct kvm_mmu_page *page;
821
822 page = container_of(kvm->active_mmu_pages.prev,
823 struct kvm_mmu_page, link);
824 kvm_mmu_zap_page(kvm, page);
825 n_used_mmu_pages--;
826 }
827 kvm->n_free_mmu_pages = 0;
828 }
829 else
830 kvm->n_free_mmu_pages += kvm_nr_mmu_pages
831 - kvm->n_alloc_mmu_pages;
832
833 kvm->n_alloc_mmu_pages = kvm_nr_mmu_pages;
834}
835
f67a46f4 836static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
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837{
838 unsigned index;
839 struct hlist_head *bucket;
4db35314 840 struct kvm_mmu_page *sp;
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841 struct hlist_node *node, *n;
842 int r;
843
844 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
845 r = 0;
846 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
f67a46f4 847 bucket = &kvm->mmu_page_hash[index];
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848 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
849 if (sp->gfn == gfn && !sp->role.metaphysical) {
697fe2e2 850 pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
4db35314
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851 sp->role.word);
852 kvm_mmu_zap_page(kvm, sp);
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853 r = 1;
854 }
855 return r;
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AK
856}
857
f67a46f4 858static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
97a0a01e 859{
4db35314 860 struct kvm_mmu_page *sp;
97a0a01e 861
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862 while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
863 pgprintk("%s: zap %lx %x\n", __FUNCTION__, gfn, sp->role.word);
864 kvm_mmu_zap_page(kvm, sp);
97a0a01e
AK
865 }
866}
867
38c335f1 868static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
6aa8b732 869{
38c335f1 870 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
4db35314 871 struct kvm_mmu_page *sp = page_header(__pa(pte));
6aa8b732 872
4db35314 873 __set_bit(slot, &sp->slot_bitmap);
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874}
875
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876struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
877{
ad312c7c 878 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
039576c0
AK
879
880 if (gpa == UNMAPPED_GVA)
881 return NULL;
1d28f5f4 882 return gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
039576c0
AK
883}
884
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885static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
886 unsigned pt_access, unsigned pte_access,
887 int user_fault, int write_fault, int dirty,
888 int *ptwrite, gfn_t gfn)
889{
890 u64 spte;
891 int was_rmapped = is_rmap_pte(*shadow_pte);
892 struct page *page;
893
bc750ba8 894 pgprintk("%s: spte %llx access %x write_fault %d"
1c4f1fd6 895 " user_fault %d gfn %lx\n",
bc750ba8 896 __FUNCTION__, *shadow_pte, pt_access,
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897 write_fault, user_fault, gfn);
898
899 /*
900 * We don't set the accessed bit, since we sometimes want to see
901 * whether the guest actually used the pte (in order to detect
902 * demand paging).
903 */
904 spte = PT_PRESENT_MASK | PT_DIRTY_MASK;
905 if (!dirty)
906 pte_access &= ~ACC_WRITE_MASK;
907 if (!(pte_access & ACC_EXEC_MASK))
908 spte |= PT64_NX_MASK;
909
910 page = gfn_to_page(vcpu->kvm, gfn);
911
912 spte |= PT_PRESENT_MASK;
913 if (pte_access & ACC_USER_MASK)
914 spte |= PT_USER_MASK;
915
916 if (is_error_page(page)) {
917 set_shadow_pte(shadow_pte,
918 shadow_trap_nonpresent_pte | PT_SHADOW_IO_MARK);
919 kvm_release_page_clean(page);
920 return;
921 }
922
923 spte |= page_to_phys(page);
924
925 if ((pte_access & ACC_WRITE_MASK)
926 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
927 struct kvm_mmu_page *shadow;
928
929 spte |= PT_WRITABLE_MASK;
930 if (user_fault) {
931 mmu_unshadow(vcpu->kvm, gfn);
932 goto unshadowed;
933 }
934
935 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
936 if (shadow) {
937 pgprintk("%s: found shadow page for %lx, marking ro\n",
938 __FUNCTION__, gfn);
939 pte_access &= ~ACC_WRITE_MASK;
940 if (is_writeble_pte(spte)) {
941 spte &= ~PT_WRITABLE_MASK;
942 kvm_x86_ops->tlb_flush(vcpu);
943 }
944 if (write_fault)
945 *ptwrite = 1;
946 }
947 }
948
949unshadowed:
950
951 if (pte_access & ACC_WRITE_MASK)
952 mark_page_dirty(vcpu->kvm, gfn);
953
954 pgprintk("%s: setting spte %llx\n", __FUNCTION__, spte);
955 set_shadow_pte(shadow_pte, spte);
956 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
957 if (!was_rmapped) {
958 rmap_add(vcpu, shadow_pte, gfn);
959 if (!is_rmap_pte(*shadow_pte))
960 kvm_release_page_clean(page);
961 }
962 else
963 kvm_release_page_clean(page);
964 if (!ptwrite || !*ptwrite)
ad312c7c 965 vcpu->arch.last_pte_updated = shadow_pte;
1c4f1fd6
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966}
967
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968static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
969{
970}
971
e833240f 972static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
6aa8b732
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973{
974 int level = PT32E_ROOT_LEVEL;
ad312c7c 975 hpa_t table_addr = vcpu->arch.mmu.root_hpa;
e833240f 976 int pt_write = 0;
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977
978 for (; ; level--) {
979 u32 index = PT64_INDEX(v, level);
980 u64 *table;
981
982 ASSERT(VALID_PAGE(table_addr));
983 table = __va(table_addr);
984
985 if (level == 1) {
e833240f
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986 mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL,
987 0, write, 1, &pt_write, gfn);
988 return pt_write || is_io_pte(table[index]);
6aa8b732
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989 }
990
c7addb90 991 if (table[index] == shadow_trap_nonpresent_pte) {
25c0de2c 992 struct kvm_mmu_page *new_table;
cea0f0e7 993 gfn_t pseudo_gfn;
6aa8b732 994
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995 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
996 >> PAGE_SHIFT;
997 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
998 v, level - 1,
7819026e
MT
999 1, ACC_ALL, &table[index],
1000 NULL);
25c0de2c 1001 if (!new_table) {
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1002 pgprintk("nonpaging_map: ENOMEM\n");
1003 return -ENOMEM;
1004 }
1005
47ad8e68 1006 table[index] = __pa(new_table->spt) | PT_PRESENT_MASK
25c0de2c 1007 | PT_WRITABLE_MASK | PT_USER_MASK;
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1008 }
1009 table_addr = table[index] & PT64_BASE_ADDR_MASK;
1010 }
1011}
1012
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1013static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1014 struct kvm_mmu_page *sp)
1015{
1016 int i;
1017
1018 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1019 sp->spt[i] = shadow_trap_nonpresent_pte;
1020}
1021
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1022static void mmu_free_roots(struct kvm_vcpu *vcpu)
1023{
1024 int i;
4db35314 1025 struct kvm_mmu_page *sp;
17ac10ad 1026
ad312c7c 1027 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
7b53aa56 1028 return;
17ac10ad 1029#ifdef CONFIG_X86_64
ad312c7c
ZX
1030 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1031 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad 1032
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1033 sp = page_header(root);
1034 --sp->root_count;
ad312c7c 1035 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
17ac10ad
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1036 return;
1037 }
1038#endif
1039 for (i = 0; i < 4; ++i) {
ad312c7c 1040 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad 1041
417726a3 1042 if (root) {
417726a3 1043 root &= PT64_BASE_ADDR_MASK;
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1044 sp = page_header(root);
1045 --sp->root_count;
417726a3 1046 }
ad312c7c 1047 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 1048 }
ad312c7c 1049 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
17ac10ad
AK
1050}
1051
1052static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1053{
1054 int i;
cea0f0e7 1055 gfn_t root_gfn;
4db35314 1056 struct kvm_mmu_page *sp;
3bb65a22 1057
ad312c7c 1058 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
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1059
1060#ifdef CONFIG_X86_64
ad312c7c
ZX
1061 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1062 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad
AK
1063
1064 ASSERT(!VALID_PAGE(root));
4db35314 1065 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
7819026e 1066 PT64_ROOT_LEVEL, 0, ACC_ALL, NULL, NULL);
4db35314
AK
1067 root = __pa(sp->spt);
1068 ++sp->root_count;
ad312c7c 1069 vcpu->arch.mmu.root_hpa = root;
17ac10ad
AK
1070 return;
1071 }
1072#endif
1073 for (i = 0; i < 4; ++i) {
ad312c7c 1074 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad
AK
1075
1076 ASSERT(!VALID_PAGE(root));
ad312c7c
ZX
1077 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
1078 if (!is_present_pte(vcpu->arch.pdptrs[i])) {
1079 vcpu->arch.mmu.pae_root[i] = 0;
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AK
1080 continue;
1081 }
ad312c7c
ZX
1082 root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
1083 } else if (vcpu->arch.mmu.root_level == 0)
cea0f0e7 1084 root_gfn = 0;
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1085 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
1086 PT32_ROOT_LEVEL, !is_paging(vcpu),
7819026e 1087 ACC_ALL, NULL, NULL);
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1088 root = __pa(sp->spt);
1089 ++sp->root_count;
ad312c7c 1090 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
17ac10ad 1091 }
ad312c7c 1092 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
17ac10ad
AK
1093}
1094
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1095static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
1096{
1097 return vaddr;
1098}
1099
1100static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3f3e7124 1101 u32 error_code)
6aa8b732 1102{
e833240f 1103 gfn_t gfn;
e2dec939 1104 int r;
6aa8b732 1105
e833240f 1106 pgprintk("%s: gva %lx error %x\n", __FUNCTION__, gva, error_code);
e2dec939
AK
1107 r = mmu_topup_memory_caches(vcpu);
1108 if (r)
1109 return r;
714b93da 1110
6aa8b732 1111 ASSERT(vcpu);
ad312c7c 1112 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 1113
e833240f 1114 gfn = gva >> PAGE_SHIFT;
6aa8b732 1115
e833240f
AK
1116 return nonpaging_map(vcpu, gva & PAGE_MASK,
1117 error_code & PFERR_WRITE_MASK, gfn);
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1118}
1119
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1120static void nonpaging_free(struct kvm_vcpu *vcpu)
1121{
17ac10ad 1122 mmu_free_roots(vcpu);
6aa8b732
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1123}
1124
1125static int nonpaging_init_context(struct kvm_vcpu *vcpu)
1126{
ad312c7c 1127 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
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1128
1129 context->new_cr3 = nonpaging_new_cr3;
1130 context->page_fault = nonpaging_page_fault;
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1131 context->gva_to_gpa = nonpaging_gva_to_gpa;
1132 context->free = nonpaging_free;
c7addb90 1133 context->prefetch_page = nonpaging_prefetch_page;
cea0f0e7 1134 context->root_level = 0;
6aa8b732 1135 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1136 context->root_hpa = INVALID_PAGE;
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1137 return 0;
1138}
1139
d835dfec 1140void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
6aa8b732 1141{
1165f5fe 1142 ++vcpu->stat.tlb_flush;
cbdd1bea 1143 kvm_x86_ops->tlb_flush(vcpu);
6aa8b732
AK
1144}
1145
1146static void paging_new_cr3(struct kvm_vcpu *vcpu)
1147{
374cbac0 1148 pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
cea0f0e7 1149 mmu_free_roots(vcpu);
6aa8b732
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1150}
1151
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1152static void inject_page_fault(struct kvm_vcpu *vcpu,
1153 u64 addr,
1154 u32 err_code)
1155{
c3c91fee 1156 kvm_inject_page_fault(vcpu, addr, err_code);
6aa8b732
AK
1157}
1158
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1159static void paging_free(struct kvm_vcpu *vcpu)
1160{
1161 nonpaging_free(vcpu);
1162}
1163
1164#define PTTYPE 64
1165#include "paging_tmpl.h"
1166#undef PTTYPE
1167
1168#define PTTYPE 32
1169#include "paging_tmpl.h"
1170#undef PTTYPE
1171
17ac10ad 1172static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732 1173{
ad312c7c 1174 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
1175
1176 ASSERT(is_pae(vcpu));
1177 context->new_cr3 = paging_new_cr3;
1178 context->page_fault = paging64_page_fault;
6aa8b732 1179 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 1180 context->prefetch_page = paging64_prefetch_page;
6aa8b732 1181 context->free = paging_free;
17ac10ad
AK
1182 context->root_level = level;
1183 context->shadow_root_level = level;
17c3ba9d 1184 context->root_hpa = INVALID_PAGE;
6aa8b732
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1185 return 0;
1186}
1187
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1188static int paging64_init_context(struct kvm_vcpu *vcpu)
1189{
1190 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1191}
1192
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1193static int paging32_init_context(struct kvm_vcpu *vcpu)
1194{
ad312c7c 1195 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
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1196
1197 context->new_cr3 = paging_new_cr3;
1198 context->page_fault = paging32_page_fault;
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1199 context->gva_to_gpa = paging32_gva_to_gpa;
1200 context->free = paging_free;
c7addb90 1201 context->prefetch_page = paging32_prefetch_page;
6aa8b732
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1202 context->root_level = PT32_ROOT_LEVEL;
1203 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1204 context->root_hpa = INVALID_PAGE;
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1205 return 0;
1206}
1207
1208static int paging32E_init_context(struct kvm_vcpu *vcpu)
1209{
17ac10ad 1210 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK
1211}
1212
1213static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1214{
1215 ASSERT(vcpu);
ad312c7c 1216 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
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1217
1218 if (!is_paging(vcpu))
1219 return nonpaging_init_context(vcpu);
a9058ecd 1220 else if (is_long_mode(vcpu))
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1221 return paging64_init_context(vcpu);
1222 else if (is_pae(vcpu))
1223 return paging32E_init_context(vcpu);
1224 else
1225 return paging32_init_context(vcpu);
1226}
1227
1228static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1229{
1230 ASSERT(vcpu);
ad312c7c
ZX
1231 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
1232 vcpu->arch.mmu.free(vcpu);
1233 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
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1234 }
1235}
1236
1237int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK
1238{
1239 destroy_kvm_mmu(vcpu);
1240 return init_kvm_mmu(vcpu);
1241}
8668a3c4 1242EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK
1243
1244int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 1245{
714b93da
AK
1246 int r;
1247
11ec2804 1248 mutex_lock(&vcpu->kvm->lock);
e2dec939 1249 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK
1250 if (r)
1251 goto out;
1252 mmu_alloc_roots(vcpu);
ad312c7c 1253 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
17c3ba9d 1254 kvm_mmu_flush_tlb(vcpu);
714b93da 1255out:
11ec2804 1256 mutex_unlock(&vcpu->kvm->lock);
714b93da 1257 return r;
6aa8b732 1258}
17c3ba9d
AK
1259EXPORT_SYMBOL_GPL(kvm_mmu_load);
1260
1261void kvm_mmu_unload(struct kvm_vcpu *vcpu)
1262{
1263 mmu_free_roots(vcpu);
1264}
6aa8b732 1265
09072daf 1266static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
4db35314 1267 struct kvm_mmu_page *sp,
ac1b714e
AK
1268 u64 *spte)
1269{
1270 u64 pte;
1271 struct kvm_mmu_page *child;
1272
1273 pte = *spte;
c7addb90 1274 if (is_shadow_present_pte(pte)) {
4db35314 1275 if (sp->role.level == PT_PAGE_TABLE_LEVEL)
290fc38d 1276 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK
1277 else {
1278 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 1279 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK
1280 }
1281 }
c7addb90 1282 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
ac1b714e
AK
1283}
1284
0028425f 1285static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4db35314 1286 struct kvm_mmu_page *sp,
0028425f 1287 u64 *spte,
c7addb90
AK
1288 const void *new, int bytes,
1289 int offset_in_pte)
0028425f 1290{
4db35314 1291 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
4cee5764 1292 ++vcpu->kvm->stat.mmu_pde_zapped;
0028425f 1293 return;
4cee5764 1294 }
0028425f 1295
4cee5764 1296 ++vcpu->kvm->stat.mmu_pte_updated;
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AK
1297 if (sp->role.glevels == PT32_ROOT_LEVEL)
1298 paging32_update_pte(vcpu, sp, spte, new, bytes, offset_in_pte);
0028425f 1299 else
4db35314 1300 paging64_update_pte(vcpu, sp, spte, new, bytes, offset_in_pte);
0028425f
AK
1301}
1302
79539cec
AK
1303static bool need_remote_flush(u64 old, u64 new)
1304{
1305 if (!is_shadow_present_pte(old))
1306 return false;
1307 if (!is_shadow_present_pte(new))
1308 return true;
1309 if ((old ^ new) & PT64_BASE_ADDR_MASK)
1310 return true;
1311 old ^= PT64_NX_MASK;
1312 new ^= PT64_NX_MASK;
1313 return (old & ~new & PT64_PERM_MASK) != 0;
1314}
1315
1316static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
1317{
1318 if (need_remote_flush(old, new))
1319 kvm_flush_remote_tlbs(vcpu->kvm);
1320 else
1321 kvm_mmu_flush_tlb(vcpu);
1322}
1323
12b7d28f
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1324static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
1325{
ad312c7c 1326 u64 *spte = vcpu->arch.last_pte_updated;
12b7d28f
AK
1327
1328 return !!(spte && (*spte & PT_ACCESSED_MASK));
1329}
1330
09072daf 1331void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
fe551881 1332 const u8 *new, int bytes)
da4a00f0 1333{
9b7a0325 1334 gfn_t gfn = gpa >> PAGE_SHIFT;
4db35314 1335 struct kvm_mmu_page *sp;
0e7bc4b9 1336 struct hlist_node *node, *n;
9b7a0325
AK
1337 struct hlist_head *bucket;
1338 unsigned index;
79539cec 1339 u64 entry;
9b7a0325 1340 u64 *spte;
9b7a0325 1341 unsigned offset = offset_in_page(gpa);
0e7bc4b9 1342 unsigned pte_size;
9b7a0325 1343 unsigned page_offset;
0e7bc4b9 1344 unsigned misaligned;
fce0657f 1345 unsigned quadrant;
9b7a0325 1346 int level;
86a5ba02 1347 int flooded = 0;
ac1b714e 1348 int npte;
9b7a0325 1349
da4a00f0 1350 pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
4cee5764 1351 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 1352 kvm_mmu_audit(vcpu, "pre pte write");
ad312c7c 1353 if (gfn == vcpu->arch.last_pt_write_gfn
12b7d28f 1354 && !last_updated_pte_accessed(vcpu)) {
ad312c7c
ZX
1355 ++vcpu->arch.last_pt_write_count;
1356 if (vcpu->arch.last_pt_write_count >= 3)
86a5ba02
AK
1357 flooded = 1;
1358 } else {
ad312c7c
ZX
1359 vcpu->arch.last_pt_write_gfn = gfn;
1360 vcpu->arch.last_pt_write_count = 1;
1361 vcpu->arch.last_pte_updated = NULL;
86a5ba02 1362 }
9b7a0325
AK
1363 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
1364 bucket = &vcpu->kvm->mmu_page_hash[index];
4db35314
AK
1365 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
1366 if (sp->gfn != gfn || sp->role.metaphysical)
9b7a0325 1367 continue;
4db35314 1368 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
0e7bc4b9 1369 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 1370 misaligned |= bytes < 4;
86a5ba02 1371 if (misaligned || flooded) {
0e7bc4b9
AK
1372 /*
1373 * Misaligned accesses are too much trouble to fix
1374 * up; also, they usually indicate a page is not used
1375 * as a page table.
86a5ba02
AK
1376 *
1377 * If we're seeing too many writes to a page,
1378 * it may no longer be a page table, or we may be
1379 * forking, in which case it is better to unmap the
1380 * page.
0e7bc4b9
AK
1381 */
1382 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4db35314
AK
1383 gpa, bytes, sp->role.word);
1384 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 1385 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK
1386 continue;
1387 }
9b7a0325 1388 page_offset = offset;
4db35314 1389 level = sp->role.level;
ac1b714e 1390 npte = 1;
4db35314 1391 if (sp->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK
1392 page_offset <<= 1; /* 32->64 */
1393 /*
1394 * A 32-bit pde maps 4MB while the shadow pdes map
1395 * only 2MB. So we need to double the offset again
1396 * and zap two pdes instead of one.
1397 */
1398 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 1399 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK
1400 page_offset <<= 1;
1401 npte = 2;
1402 }
fce0657f 1403 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 1404 page_offset &= ~PAGE_MASK;
4db35314 1405 if (quadrant != sp->role.quadrant)
fce0657f 1406 continue;
9b7a0325 1407 }
4db35314 1408 spte = &sp->spt[page_offset / sizeof(*spte)];
ac1b714e 1409 while (npte--) {
79539cec 1410 entry = *spte;
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1411 mmu_pte_write_zap_pte(vcpu, sp, spte);
1412 mmu_pte_write_new_pte(vcpu, sp, spte, new, bytes,
c7addb90 1413 page_offset & (pte_size - 1));
79539cec 1414 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
ac1b714e 1415 ++spte;
9b7a0325 1416 }
9b7a0325 1417 }
c7addb90 1418 kvm_mmu_audit(vcpu, "post pte write");
da4a00f0
AK
1419}
1420
a436036b
AK
1421int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1422{
ad312c7c 1423 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
a436036b 1424
f67a46f4 1425 return kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
a436036b
AK
1426}
1427
22d95b12 1428void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86
AK
1429{
1430 while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
4db35314 1431 struct kvm_mmu_page *sp;
ebeace86 1432
4db35314
AK
1433 sp = container_of(vcpu->kvm->active_mmu_pages.prev,
1434 struct kvm_mmu_page, link);
1435 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 1436 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK
1437 }
1438}
ebeace86 1439
3067714c
AK
1440int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
1441{
1442 int r;
1443 enum emulation_result er;
1444
1445 mutex_lock(&vcpu->kvm->lock);
ad312c7c 1446 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3067714c
AK
1447 if (r < 0)
1448 goto out;
1449
1450 if (!r) {
1451 r = 1;
1452 goto out;
1453 }
1454
b733bfb5
AK
1455 r = mmu_topup_memory_caches(vcpu);
1456 if (r)
1457 goto out;
1458
3067714c
AK
1459 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
1460 mutex_unlock(&vcpu->kvm->lock);
1461
1462 switch (er) {
1463 case EMULATE_DONE:
1464 return 1;
1465 case EMULATE_DO_MMIO:
1466 ++vcpu->stat.mmio_exits;
1467 return 0;
1468 case EMULATE_FAIL:
1469 kvm_report_emulation_failure(vcpu, "pagetable");
1470 return 1;
1471 default:
1472 BUG();
1473 }
1474out:
1475 mutex_unlock(&vcpu->kvm->lock);
1476 return r;
1477}
1478EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
1479
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1480static void free_mmu_pages(struct kvm_vcpu *vcpu)
1481{
4db35314 1482 struct kvm_mmu_page *sp;
6aa8b732 1483
f51234c2 1484 while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
4db35314
AK
1485 sp = container_of(vcpu->kvm->active_mmu_pages.next,
1486 struct kvm_mmu_page, link);
1487 kvm_mmu_zap_page(vcpu->kvm, sp);
f51234c2 1488 }
ad312c7c 1489 free_page((unsigned long)vcpu->arch.mmu.pae_root);
6aa8b732
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1490}
1491
1492static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1493{
17ac10ad 1494 struct page *page;
6aa8b732
AK
1495 int i;
1496
1497 ASSERT(vcpu);
1498
82ce2c96
IE
1499 if (vcpu->kvm->n_requested_mmu_pages)
1500 vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_requested_mmu_pages;
1501 else
1502 vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_alloc_mmu_pages;
17ac10ad
AK
1503 /*
1504 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1505 * Therefore we need to allocate shadow page tables in the first
1506 * 4GB of memory, which happens to fit the DMA32 zone.
1507 */
1508 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1509 if (!page)
1510 goto error_1;
ad312c7c 1511 vcpu->arch.mmu.pae_root = page_address(page);
17ac10ad 1512 for (i = 0; i < 4; ++i)
ad312c7c 1513 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 1514
6aa8b732
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1515 return 0;
1516
1517error_1:
1518 free_mmu_pages(vcpu);
1519 return -ENOMEM;
1520}
1521
8018c27b 1522int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 1523{
6aa8b732 1524 ASSERT(vcpu);
ad312c7c 1525 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 1526
8018c27b
IM
1527 return alloc_mmu_pages(vcpu);
1528}
6aa8b732 1529
8018c27b
IM
1530int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1531{
1532 ASSERT(vcpu);
ad312c7c 1533 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2c264957 1534
8018c27b 1535 return init_kvm_mmu(vcpu);
6aa8b732
AK
1536}
1537
1538void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1539{
1540 ASSERT(vcpu);
1541
1542 destroy_kvm_mmu(vcpu);
1543 free_mmu_pages(vcpu);
714b93da 1544 mmu_free_memory_caches(vcpu);
6aa8b732
AK
1545}
1546
90cb0529 1547void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732 1548{
4db35314 1549 struct kvm_mmu_page *sp;
6aa8b732 1550
4db35314 1551 list_for_each_entry(sp, &kvm->active_mmu_pages, link) {
6aa8b732
AK
1552 int i;
1553 u64 *pt;
1554
4db35314 1555 if (!test_bit(slot, &sp->slot_bitmap))
6aa8b732
AK
1556 continue;
1557
4db35314 1558 pt = sp->spt;
6aa8b732
AK
1559 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1560 /* avoid RMW */
9647c14c 1561 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 1562 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732
AK
1563 }
1564}
37a7d8b0 1565
90cb0529 1566void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 1567{
4db35314 1568 struct kvm_mmu_page *sp, *node;
e0fa826f 1569
4db35314
AK
1570 list_for_each_entry_safe(sp, node, &kvm->active_mmu_pages, link)
1571 kvm_mmu_zap_page(kvm, sp);
e0fa826f 1572
90cb0529 1573 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL
1574}
1575
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AK
1576void kvm_mmu_module_exit(void)
1577{
1578 if (pte_chain_cache)
1579 kmem_cache_destroy(pte_chain_cache);
1580 if (rmap_desc_cache)
1581 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK
1582 if (mmu_page_header_cache)
1583 kmem_cache_destroy(mmu_page_header_cache);
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AK
1584}
1585
1586int kvm_mmu_module_init(void)
1587{
1588 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
1589 sizeof(struct kvm_pte_chain),
20c2df83 1590 0, 0, NULL);
b5a33a75
AK
1591 if (!pte_chain_cache)
1592 goto nomem;
1593 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
1594 sizeof(struct kvm_rmap_desc),
20c2df83 1595 0, 0, NULL);
b5a33a75
AK
1596 if (!rmap_desc_cache)
1597 goto nomem;
1598
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AK
1599 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
1600 sizeof(struct kvm_mmu_page),
20c2df83 1601 0, 0, NULL);
d3d25b04
AK
1602 if (!mmu_page_header_cache)
1603 goto nomem;
1604
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AK
1605 return 0;
1606
1607nomem:
1608 kvm_mmu_module_exit();
1609 return -ENOMEM;
1610}
1611
3ad82a7e
ZX
1612/*
1613 * Caculate mmu pages needed for kvm.
1614 */
1615unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
1616{
1617 int i;
1618 unsigned int nr_mmu_pages;
1619 unsigned int nr_pages = 0;
1620
1621 for (i = 0; i < kvm->nmemslots; i++)
1622 nr_pages += kvm->memslots[i].npages;
1623
1624 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
1625 nr_mmu_pages = max(nr_mmu_pages,
1626 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
1627
1628 return nr_mmu_pages;
1629}
1630
37a7d8b0
AK
1631#ifdef AUDIT
1632
1633static const char *audit_msg;
1634
1635static gva_t canonicalize(gva_t gva)
1636{
1637#ifdef CONFIG_X86_64
1638 gva = (long long)(gva << 16) >> 16;
1639#endif
1640 return gva;
1641}
1642
1643static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
1644 gva_t va, int level)
1645{
1646 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
1647 int i;
1648 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
1649
1650 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
1651 u64 ent = pt[i];
1652
c7addb90 1653 if (ent == shadow_trap_nonpresent_pte)
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AK
1654 continue;
1655
1656 va = canonicalize(va);
c7addb90
AK
1657 if (level > 1) {
1658 if (ent == shadow_notrap_nonpresent_pte)
1659 printk(KERN_ERR "audit: (%s) nontrapping pte"
1660 " in nonleaf level: levels %d gva %lx"
1661 " level %d pte %llx\n", audit_msg,
ad312c7c 1662 vcpu->arch.mmu.root_level, va, level, ent);
c7addb90 1663
37a7d8b0 1664 audit_mappings_page(vcpu, ent, va, level - 1);
c7addb90 1665 } else {
ad312c7c 1666 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
1d28f5f4
AK
1667 struct page *page = gpa_to_page(vcpu, gpa);
1668 hpa_t hpa = page_to_phys(page);
37a7d8b0 1669
c7addb90 1670 if (is_shadow_present_pte(ent)
37a7d8b0 1671 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK
1672 printk(KERN_ERR "xx audit error: (%s) levels %d"
1673 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
ad312c7c 1674 audit_msg, vcpu->arch.mmu.root_level,
d77c26fc
MD
1675 va, gpa, hpa, ent,
1676 is_shadow_present_pte(ent));
c7addb90
AK
1677 else if (ent == shadow_notrap_nonpresent_pte
1678 && !is_error_hpa(hpa))
1679 printk(KERN_ERR "audit: (%s) notrap shadow,"
1680 " valid guest gva %lx\n", audit_msg, va);
b4231d61 1681 kvm_release_page_clean(page);
c7addb90 1682
37a7d8b0
AK
1683 }
1684 }
1685}
1686
1687static void audit_mappings(struct kvm_vcpu *vcpu)
1688{
1ea252af 1689 unsigned i;
37a7d8b0 1690
ad312c7c
ZX
1691 if (vcpu->arch.mmu.root_level == 4)
1692 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
37a7d8b0
AK
1693 else
1694 for (i = 0; i < 4; ++i)
ad312c7c 1695 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
37a7d8b0 1696 audit_mappings_page(vcpu,
ad312c7c 1697 vcpu->arch.mmu.pae_root[i],
37a7d8b0
AK
1698 i << 30,
1699 2);
1700}
1701
1702static int count_rmaps(struct kvm_vcpu *vcpu)
1703{
1704 int nmaps = 0;
1705 int i, j, k;
1706
1707 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
1708 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
1709 struct kvm_rmap_desc *d;
1710
1711 for (j = 0; j < m->npages; ++j) {
290fc38d 1712 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 1713
290fc38d 1714 if (!*rmapp)
37a7d8b0 1715 continue;
290fc38d 1716 if (!(*rmapp & 1)) {
37a7d8b0
AK
1717 ++nmaps;
1718 continue;
1719 }
290fc38d 1720 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK
1721 while (d) {
1722 for (k = 0; k < RMAP_EXT; ++k)
1723 if (d->shadow_ptes[k])
1724 ++nmaps;
1725 else
1726 break;
1727 d = d->more;
1728 }
1729 }
1730 }
1731 return nmaps;
1732}
1733
1734static int count_writable_mappings(struct kvm_vcpu *vcpu)
1735{
1736 int nmaps = 0;
4db35314 1737 struct kvm_mmu_page *sp;
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1738 int i;
1739
4db35314
AK
1740 list_for_each_entry(sp, &vcpu->kvm->active_mmu_pages, link) {
1741 u64 *pt = sp->spt;
37a7d8b0 1742
4db35314 1743 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
37a7d8b0
AK
1744 continue;
1745
1746 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1747 u64 ent = pt[i];
1748
1749 if (!(ent & PT_PRESENT_MASK))
1750 continue;
1751 if (!(ent & PT_WRITABLE_MASK))
1752 continue;
1753 ++nmaps;
1754 }
1755 }
1756 return nmaps;
1757}
1758
1759static void audit_rmap(struct kvm_vcpu *vcpu)
1760{
1761 int n_rmap = count_rmaps(vcpu);
1762 int n_actual = count_writable_mappings(vcpu);
1763
1764 if (n_rmap != n_actual)
1765 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
1766 __FUNCTION__, audit_msg, n_rmap, n_actual);
1767}
1768
1769static void audit_write_protection(struct kvm_vcpu *vcpu)
1770{
4db35314 1771 struct kvm_mmu_page *sp;
290fc38d
IE
1772 struct kvm_memory_slot *slot;
1773 unsigned long *rmapp;
1774 gfn_t gfn;
37a7d8b0 1775
4db35314
AK
1776 list_for_each_entry(sp, &vcpu->kvm->active_mmu_pages, link) {
1777 if (sp->role.metaphysical)
37a7d8b0
AK
1778 continue;
1779
4db35314
AK
1780 slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
1781 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
290fc38d
IE
1782 rmapp = &slot->rmap[gfn - slot->base_gfn];
1783 if (*rmapp)
37a7d8b0
AK
1784 printk(KERN_ERR "%s: (%s) shadow page has writable"
1785 " mappings: gfn %lx role %x\n",
4db35314
AK
1786 __FUNCTION__, audit_msg, sp->gfn,
1787 sp->role.word);
37a7d8b0
AK
1788 }
1789}
1790
1791static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
1792{
1793 int olddbg = dbg;
1794
1795 dbg = 0;
1796 audit_msg = msg;
1797 audit_rmap(vcpu);
1798 audit_write_protection(vcpu);
1799 audit_mappings(vcpu);
1800 dbg = olddbg;
1801}
1802
1803#endif