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Commit | Line | Data |
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6aa8b732 AK |
1 | /* |
2 | * Kernel-based Virtual Machine driver for Linux | |
3 | * | |
4 | * This module enables machines with Intel VT-x extensions to run virtual | |
5 | * machines without emulation or binary translation. | |
6 | * | |
7 | * MMU support | |
8 | * | |
9 | * Copyright (C) 2006 Qumranet, Inc. | |
10 | * | |
11 | * Authors: | |
12 | * Yaniv Kamay <yaniv@qumranet.com> | |
13 | * Avi Kivity <avi@qumranet.com> | |
14 | * | |
15 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
16 | * the COPYING file in the top-level directory. | |
17 | * | |
18 | */ | |
e495606d AK |
19 | |
20 | #include "vmx.h" | |
21 | #include "kvm.h" | |
34c16eec | 22 | #include "x86.h" |
e495606d | 23 | |
6aa8b732 AK |
24 | #include <linux/types.h> |
25 | #include <linux/string.h> | |
6aa8b732 AK |
26 | #include <linux/mm.h> |
27 | #include <linux/highmem.h> | |
28 | #include <linux/module.h> | |
29 | ||
e495606d AK |
30 | #include <asm/page.h> |
31 | #include <asm/cmpxchg.h> | |
4e542370 | 32 | #include <asm/io.h> |
6aa8b732 | 33 | |
37a7d8b0 AK |
34 | #undef MMU_DEBUG |
35 | ||
36 | #undef AUDIT | |
37 | ||
38 | #ifdef AUDIT | |
39 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg); | |
40 | #else | |
41 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {} | |
42 | #endif | |
43 | ||
44 | #ifdef MMU_DEBUG | |
45 | ||
46 | #define pgprintk(x...) do { if (dbg) printk(x); } while (0) | |
47 | #define rmap_printk(x...) do { if (dbg) printk(x); } while (0) | |
48 | ||
49 | #else | |
50 | ||
51 | #define pgprintk(x...) do { } while (0) | |
52 | #define rmap_printk(x...) do { } while (0) | |
53 | ||
54 | #endif | |
55 | ||
56 | #if defined(MMU_DEBUG) || defined(AUDIT) | |
57 | static int dbg = 1; | |
58 | #endif | |
6aa8b732 | 59 | |
d6c69ee9 YD |
60 | #ifndef MMU_DEBUG |
61 | #define ASSERT(x) do { } while (0) | |
62 | #else | |
6aa8b732 AK |
63 | #define ASSERT(x) \ |
64 | if (!(x)) { \ | |
65 | printk(KERN_WARNING "assertion failed %s:%d: %s\n", \ | |
66 | __FILE__, __LINE__, #x); \ | |
67 | } | |
d6c69ee9 | 68 | #endif |
6aa8b732 | 69 | |
cea0f0e7 AK |
70 | #define PT64_PT_BITS 9 |
71 | #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS) | |
72 | #define PT32_PT_BITS 10 | |
73 | #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS) | |
6aa8b732 AK |
74 | |
75 | #define PT_WRITABLE_SHIFT 1 | |
76 | ||
77 | #define PT_PRESENT_MASK (1ULL << 0) | |
78 | #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT) | |
79 | #define PT_USER_MASK (1ULL << 2) | |
80 | #define PT_PWT_MASK (1ULL << 3) | |
81 | #define PT_PCD_MASK (1ULL << 4) | |
82 | #define PT_ACCESSED_MASK (1ULL << 5) | |
83 | #define PT_DIRTY_MASK (1ULL << 6) | |
84 | #define PT_PAGE_SIZE_MASK (1ULL << 7) | |
85 | #define PT_PAT_MASK (1ULL << 7) | |
86 | #define PT_GLOBAL_MASK (1ULL << 8) | |
87 | #define PT64_NX_MASK (1ULL << 63) | |
88 | ||
89 | #define PT_PAT_SHIFT 7 | |
90 | #define PT_DIR_PAT_SHIFT 12 | |
91 | #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT) | |
92 | ||
93 | #define PT32_DIR_PSE36_SIZE 4 | |
94 | #define PT32_DIR_PSE36_SHIFT 13 | |
d77c26fc MD |
95 | #define PT32_DIR_PSE36_MASK \ |
96 | (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT) | |
6aa8b732 AK |
97 | |
98 | ||
6aa8b732 AK |
99 | #define PT_FIRST_AVAIL_BITS_SHIFT 9 |
100 | #define PT64_SECOND_AVAIL_BITS_SHIFT 52 | |
101 | ||
6aa8b732 AK |
102 | #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT) |
103 | ||
6aa8b732 AK |
104 | #define VALID_PAGE(x) ((x) != INVALID_PAGE) |
105 | ||
106 | #define PT64_LEVEL_BITS 9 | |
107 | ||
108 | #define PT64_LEVEL_SHIFT(level) \ | |
d77c26fc | 109 | (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS) |
6aa8b732 AK |
110 | |
111 | #define PT64_LEVEL_MASK(level) \ | |
112 | (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level)) | |
113 | ||
114 | #define PT64_INDEX(address, level)\ | |
115 | (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1)) | |
116 | ||
117 | ||
118 | #define PT32_LEVEL_BITS 10 | |
119 | ||
120 | #define PT32_LEVEL_SHIFT(level) \ | |
d77c26fc | 121 | (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS) |
6aa8b732 AK |
122 | |
123 | #define PT32_LEVEL_MASK(level) \ | |
124 | (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level)) | |
125 | ||
126 | #define PT32_INDEX(address, level)\ | |
127 | (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1)) | |
128 | ||
129 | ||
27aba766 | 130 | #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1)) |
6aa8b732 AK |
131 | #define PT64_DIR_BASE_ADDR_MASK \ |
132 | (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1)) | |
133 | ||
134 | #define PT32_BASE_ADDR_MASK PAGE_MASK | |
135 | #define PT32_DIR_BASE_ADDR_MASK \ | |
136 | (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1)) | |
137 | ||
79539cec AK |
138 | #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \ |
139 | | PT64_NX_MASK) | |
6aa8b732 AK |
140 | |
141 | #define PFERR_PRESENT_MASK (1U << 0) | |
142 | #define PFERR_WRITE_MASK (1U << 1) | |
143 | #define PFERR_USER_MASK (1U << 2) | |
73b1087e | 144 | #define PFERR_FETCH_MASK (1U << 4) |
6aa8b732 AK |
145 | |
146 | #define PT64_ROOT_LEVEL 4 | |
147 | #define PT32_ROOT_LEVEL 2 | |
148 | #define PT32E_ROOT_LEVEL 3 | |
149 | ||
150 | #define PT_DIRECTORY_LEVEL 2 | |
151 | #define PT_PAGE_TABLE_LEVEL 1 | |
152 | ||
cd4a4e53 AK |
153 | #define RMAP_EXT 4 |
154 | ||
155 | struct kvm_rmap_desc { | |
156 | u64 *shadow_ptes[RMAP_EXT]; | |
157 | struct kvm_rmap_desc *more; | |
158 | }; | |
159 | ||
b5a33a75 AK |
160 | static struct kmem_cache *pte_chain_cache; |
161 | static struct kmem_cache *rmap_desc_cache; | |
d3d25b04 | 162 | static struct kmem_cache *mmu_page_header_cache; |
b5a33a75 | 163 | |
c7addb90 AK |
164 | static u64 __read_mostly shadow_trap_nonpresent_pte; |
165 | static u64 __read_mostly shadow_notrap_nonpresent_pte; | |
166 | ||
167 | void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte) | |
168 | { | |
169 | shadow_trap_nonpresent_pte = trap_pte; | |
170 | shadow_notrap_nonpresent_pte = notrap_pte; | |
171 | } | |
172 | EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes); | |
173 | ||
6aa8b732 AK |
174 | static int is_write_protection(struct kvm_vcpu *vcpu) |
175 | { | |
707d92fa | 176 | return vcpu->cr0 & X86_CR0_WP; |
6aa8b732 AK |
177 | } |
178 | ||
179 | static int is_cpuid_PSE36(void) | |
180 | { | |
181 | return 1; | |
182 | } | |
183 | ||
73b1087e AK |
184 | static int is_nx(struct kvm_vcpu *vcpu) |
185 | { | |
186 | return vcpu->shadow_efer & EFER_NX; | |
187 | } | |
188 | ||
6aa8b732 AK |
189 | static int is_present_pte(unsigned long pte) |
190 | { | |
191 | return pte & PT_PRESENT_MASK; | |
192 | } | |
193 | ||
c7addb90 AK |
194 | static int is_shadow_present_pte(u64 pte) |
195 | { | |
196 | pte &= ~PT_SHADOW_IO_MARK; | |
197 | return pte != shadow_trap_nonpresent_pte | |
198 | && pte != shadow_notrap_nonpresent_pte; | |
199 | } | |
200 | ||
6aa8b732 AK |
201 | static int is_writeble_pte(unsigned long pte) |
202 | { | |
203 | return pte & PT_WRITABLE_MASK; | |
204 | } | |
205 | ||
e3c5e7ec AK |
206 | static int is_dirty_pte(unsigned long pte) |
207 | { | |
208 | return pte & PT_DIRTY_MASK; | |
209 | } | |
210 | ||
6aa8b732 AK |
211 | static int is_io_pte(unsigned long pte) |
212 | { | |
213 | return pte & PT_SHADOW_IO_MARK; | |
214 | } | |
215 | ||
cd4a4e53 AK |
216 | static int is_rmap_pte(u64 pte) |
217 | { | |
9647c14c IE |
218 | return pte != shadow_trap_nonpresent_pte |
219 | && pte != shadow_notrap_nonpresent_pte; | |
cd4a4e53 AK |
220 | } |
221 | ||
da928521 AK |
222 | static gfn_t pse36_gfn_delta(u32 gpte) |
223 | { | |
224 | int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT; | |
225 | ||
226 | return (gpte & PT32_DIR_PSE36_MASK) << shift; | |
227 | } | |
228 | ||
e663ee64 AK |
229 | static void set_shadow_pte(u64 *sptep, u64 spte) |
230 | { | |
231 | #ifdef CONFIG_X86_64 | |
232 | set_64bit((unsigned long *)sptep, spte); | |
233 | #else | |
234 | set_64bit((unsigned long long *)sptep, spte); | |
235 | #endif | |
236 | } | |
237 | ||
e2dec939 | 238 | static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache, |
2e3e5882 | 239 | struct kmem_cache *base_cache, int min) |
714b93da AK |
240 | { |
241 | void *obj; | |
242 | ||
243 | if (cache->nobjs >= min) | |
e2dec939 | 244 | return 0; |
714b93da | 245 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { |
2e3e5882 | 246 | obj = kmem_cache_zalloc(base_cache, GFP_KERNEL); |
714b93da | 247 | if (!obj) |
e2dec939 | 248 | return -ENOMEM; |
714b93da AK |
249 | cache->objects[cache->nobjs++] = obj; |
250 | } | |
e2dec939 | 251 | return 0; |
714b93da AK |
252 | } |
253 | ||
254 | static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc) | |
255 | { | |
256 | while (mc->nobjs) | |
257 | kfree(mc->objects[--mc->nobjs]); | |
258 | } | |
259 | ||
c1158e63 | 260 | static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache, |
2e3e5882 | 261 | int min) |
c1158e63 AK |
262 | { |
263 | struct page *page; | |
264 | ||
265 | if (cache->nobjs >= min) | |
266 | return 0; | |
267 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { | |
2e3e5882 | 268 | page = alloc_page(GFP_KERNEL); |
c1158e63 AK |
269 | if (!page) |
270 | return -ENOMEM; | |
271 | set_page_private(page, 0); | |
272 | cache->objects[cache->nobjs++] = page_address(page); | |
273 | } | |
274 | return 0; | |
275 | } | |
276 | ||
277 | static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc) | |
278 | { | |
279 | while (mc->nobjs) | |
c4d198d5 | 280 | free_page((unsigned long)mc->objects[--mc->nobjs]); |
c1158e63 AK |
281 | } |
282 | ||
2e3e5882 | 283 | static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu) |
714b93da | 284 | { |
e2dec939 AK |
285 | int r; |
286 | ||
2e3e5882 | 287 | kvm_mmu_free_some_pages(vcpu); |
e2dec939 | 288 | r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache, |
2e3e5882 | 289 | pte_chain_cache, 4); |
e2dec939 AK |
290 | if (r) |
291 | goto out; | |
292 | r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache, | |
2e3e5882 | 293 | rmap_desc_cache, 1); |
d3d25b04 AK |
294 | if (r) |
295 | goto out; | |
290fc38d | 296 | r = mmu_topup_memory_cache_page(&vcpu->mmu_page_cache, 8); |
d3d25b04 AK |
297 | if (r) |
298 | goto out; | |
299 | r = mmu_topup_memory_cache(&vcpu->mmu_page_header_cache, | |
2e3e5882 | 300 | mmu_page_header_cache, 4); |
e2dec939 AK |
301 | out: |
302 | return r; | |
714b93da AK |
303 | } |
304 | ||
305 | static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) | |
306 | { | |
307 | mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache); | |
308 | mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache); | |
c1158e63 | 309 | mmu_free_memory_cache_page(&vcpu->mmu_page_cache); |
d3d25b04 | 310 | mmu_free_memory_cache(&vcpu->mmu_page_header_cache); |
714b93da AK |
311 | } |
312 | ||
313 | static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc, | |
314 | size_t size) | |
315 | { | |
316 | void *p; | |
317 | ||
318 | BUG_ON(!mc->nobjs); | |
319 | p = mc->objects[--mc->nobjs]; | |
320 | memset(p, 0, size); | |
321 | return p; | |
322 | } | |
323 | ||
714b93da AK |
324 | static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu) |
325 | { | |
326 | return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache, | |
327 | sizeof(struct kvm_pte_chain)); | |
328 | } | |
329 | ||
90cb0529 | 330 | static void mmu_free_pte_chain(struct kvm_pte_chain *pc) |
714b93da | 331 | { |
90cb0529 | 332 | kfree(pc); |
714b93da AK |
333 | } |
334 | ||
335 | static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu) | |
336 | { | |
337 | return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache, | |
338 | sizeof(struct kvm_rmap_desc)); | |
339 | } | |
340 | ||
90cb0529 | 341 | static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd) |
714b93da | 342 | { |
90cb0529 | 343 | kfree(rd); |
714b93da AK |
344 | } |
345 | ||
290fc38d IE |
346 | /* |
347 | * Take gfn and return the reverse mapping to it. | |
348 | * Note: gfn must be unaliased before this function get called | |
349 | */ | |
350 | ||
351 | static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn) | |
352 | { | |
353 | struct kvm_memory_slot *slot; | |
354 | ||
355 | slot = gfn_to_memslot(kvm, gfn); | |
356 | return &slot->rmap[gfn - slot->base_gfn]; | |
357 | } | |
358 | ||
cd4a4e53 AK |
359 | /* |
360 | * Reverse mapping data structures: | |
361 | * | |
290fc38d IE |
362 | * If rmapp bit zero is zero, then rmapp point to the shadw page table entry |
363 | * that points to page_address(page). | |
cd4a4e53 | 364 | * |
290fc38d IE |
365 | * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc |
366 | * containing more mappings. | |
cd4a4e53 | 367 | */ |
290fc38d | 368 | static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn) |
cd4a4e53 | 369 | { |
4db35314 | 370 | struct kvm_mmu_page *sp; |
cd4a4e53 | 371 | struct kvm_rmap_desc *desc; |
290fc38d | 372 | unsigned long *rmapp; |
cd4a4e53 AK |
373 | int i; |
374 | ||
375 | if (!is_rmap_pte(*spte)) | |
376 | return; | |
290fc38d | 377 | gfn = unalias_gfn(vcpu->kvm, gfn); |
4db35314 AK |
378 | sp = page_header(__pa(spte)); |
379 | sp->gfns[spte - sp->spt] = gfn; | |
290fc38d IE |
380 | rmapp = gfn_to_rmap(vcpu->kvm, gfn); |
381 | if (!*rmapp) { | |
cd4a4e53 | 382 | rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte); |
290fc38d IE |
383 | *rmapp = (unsigned long)spte; |
384 | } else if (!(*rmapp & 1)) { | |
cd4a4e53 | 385 | rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte); |
714b93da | 386 | desc = mmu_alloc_rmap_desc(vcpu); |
290fc38d | 387 | desc->shadow_ptes[0] = (u64 *)*rmapp; |
cd4a4e53 | 388 | desc->shadow_ptes[1] = spte; |
290fc38d | 389 | *rmapp = (unsigned long)desc | 1; |
cd4a4e53 AK |
390 | } else { |
391 | rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte); | |
290fc38d | 392 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
cd4a4e53 AK |
393 | while (desc->shadow_ptes[RMAP_EXT-1] && desc->more) |
394 | desc = desc->more; | |
395 | if (desc->shadow_ptes[RMAP_EXT-1]) { | |
714b93da | 396 | desc->more = mmu_alloc_rmap_desc(vcpu); |
cd4a4e53 AK |
397 | desc = desc->more; |
398 | } | |
399 | for (i = 0; desc->shadow_ptes[i]; ++i) | |
400 | ; | |
401 | desc->shadow_ptes[i] = spte; | |
402 | } | |
403 | } | |
404 | ||
290fc38d | 405 | static void rmap_desc_remove_entry(unsigned long *rmapp, |
cd4a4e53 AK |
406 | struct kvm_rmap_desc *desc, |
407 | int i, | |
408 | struct kvm_rmap_desc *prev_desc) | |
409 | { | |
410 | int j; | |
411 | ||
412 | for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j) | |
413 | ; | |
414 | desc->shadow_ptes[i] = desc->shadow_ptes[j]; | |
11718b4d | 415 | desc->shadow_ptes[j] = NULL; |
cd4a4e53 AK |
416 | if (j != 0) |
417 | return; | |
418 | if (!prev_desc && !desc->more) | |
290fc38d | 419 | *rmapp = (unsigned long)desc->shadow_ptes[0]; |
cd4a4e53 AK |
420 | else |
421 | if (prev_desc) | |
422 | prev_desc->more = desc->more; | |
423 | else | |
290fc38d | 424 | *rmapp = (unsigned long)desc->more | 1; |
90cb0529 | 425 | mmu_free_rmap_desc(desc); |
cd4a4e53 AK |
426 | } |
427 | ||
290fc38d | 428 | static void rmap_remove(struct kvm *kvm, u64 *spte) |
cd4a4e53 | 429 | { |
cd4a4e53 AK |
430 | struct kvm_rmap_desc *desc; |
431 | struct kvm_rmap_desc *prev_desc; | |
4db35314 | 432 | struct kvm_mmu_page *sp; |
76c35c6e | 433 | struct page *page; |
290fc38d | 434 | unsigned long *rmapp; |
cd4a4e53 AK |
435 | int i; |
436 | ||
437 | if (!is_rmap_pte(*spte)) | |
438 | return; | |
4db35314 | 439 | sp = page_header(__pa(spte)); |
76c35c6e | 440 | page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT); |
b4231d61 | 441 | if (is_writeble_pte(*spte)) |
76c35c6e | 442 | kvm_release_page_dirty(page); |
b4231d61 | 443 | else |
76c35c6e | 444 | kvm_release_page_clean(page); |
4db35314 | 445 | rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt]); |
290fc38d | 446 | if (!*rmapp) { |
cd4a4e53 AK |
447 | printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte); |
448 | BUG(); | |
290fc38d | 449 | } else if (!(*rmapp & 1)) { |
cd4a4e53 | 450 | rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte); |
290fc38d | 451 | if ((u64 *)*rmapp != spte) { |
cd4a4e53 AK |
452 | printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n", |
453 | spte, *spte); | |
454 | BUG(); | |
455 | } | |
290fc38d | 456 | *rmapp = 0; |
cd4a4e53 AK |
457 | } else { |
458 | rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte); | |
290fc38d | 459 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
cd4a4e53 AK |
460 | prev_desc = NULL; |
461 | while (desc) { | |
462 | for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) | |
463 | if (desc->shadow_ptes[i] == spte) { | |
290fc38d | 464 | rmap_desc_remove_entry(rmapp, |
714b93da | 465 | desc, i, |
cd4a4e53 AK |
466 | prev_desc); |
467 | return; | |
468 | } | |
469 | prev_desc = desc; | |
470 | desc = desc->more; | |
471 | } | |
472 | BUG(); | |
473 | } | |
474 | } | |
475 | ||
98348e95 | 476 | static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte) |
374cbac0 | 477 | { |
374cbac0 | 478 | struct kvm_rmap_desc *desc; |
98348e95 IE |
479 | struct kvm_rmap_desc *prev_desc; |
480 | u64 *prev_spte; | |
481 | int i; | |
482 | ||
483 | if (!*rmapp) | |
484 | return NULL; | |
485 | else if (!(*rmapp & 1)) { | |
486 | if (!spte) | |
487 | return (u64 *)*rmapp; | |
488 | return NULL; | |
489 | } | |
490 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); | |
491 | prev_desc = NULL; | |
492 | prev_spte = NULL; | |
493 | while (desc) { | |
494 | for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) { | |
495 | if (prev_spte == spte) | |
496 | return desc->shadow_ptes[i]; | |
497 | prev_spte = desc->shadow_ptes[i]; | |
498 | } | |
499 | desc = desc->more; | |
500 | } | |
501 | return NULL; | |
502 | } | |
503 | ||
504 | static void rmap_write_protect(struct kvm *kvm, u64 gfn) | |
505 | { | |
290fc38d | 506 | unsigned long *rmapp; |
374cbac0 AK |
507 | u64 *spte; |
508 | ||
4a4c9924 AL |
509 | gfn = unalias_gfn(kvm, gfn); |
510 | rmapp = gfn_to_rmap(kvm, gfn); | |
374cbac0 | 511 | |
98348e95 IE |
512 | spte = rmap_next(kvm, rmapp, NULL); |
513 | while (spte) { | |
374cbac0 | 514 | BUG_ON(!spte); |
374cbac0 | 515 | BUG_ON(!(*spte & PT_PRESENT_MASK)); |
374cbac0 | 516 | rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte); |
9647c14c IE |
517 | if (is_writeble_pte(*spte)) |
518 | set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK); | |
4a4c9924 | 519 | kvm_flush_remote_tlbs(kvm); |
9647c14c | 520 | spte = rmap_next(kvm, rmapp, spte); |
374cbac0 AK |
521 | } |
522 | } | |
523 | ||
d6c69ee9 | 524 | #ifdef MMU_DEBUG |
47ad8e68 | 525 | static int is_empty_shadow_page(u64 *spt) |
6aa8b732 | 526 | { |
139bdb2d AK |
527 | u64 *pos; |
528 | u64 *end; | |
529 | ||
47ad8e68 | 530 | for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++) |
c7addb90 | 531 | if ((*pos & ~PT_SHADOW_IO_MARK) != shadow_trap_nonpresent_pte) { |
139bdb2d AK |
532 | printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__, |
533 | pos, *pos); | |
6aa8b732 | 534 | return 0; |
139bdb2d | 535 | } |
6aa8b732 AK |
536 | return 1; |
537 | } | |
d6c69ee9 | 538 | #endif |
6aa8b732 | 539 | |
4db35314 | 540 | static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp) |
260746c0 | 541 | { |
4db35314 AK |
542 | ASSERT(is_empty_shadow_page(sp->spt)); |
543 | list_del(&sp->link); | |
544 | __free_page(virt_to_page(sp->spt)); | |
545 | __free_page(virt_to_page(sp->gfns)); | |
546 | kfree(sp); | |
90cb0529 | 547 | ++kvm->n_free_mmu_pages; |
260746c0 AK |
548 | } |
549 | ||
cea0f0e7 AK |
550 | static unsigned kvm_page_table_hashfn(gfn_t gfn) |
551 | { | |
552 | return gfn; | |
553 | } | |
554 | ||
25c0de2c AK |
555 | static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, |
556 | u64 *parent_pte) | |
6aa8b732 | 557 | { |
4db35314 | 558 | struct kvm_mmu_page *sp; |
6aa8b732 | 559 | |
d3d25b04 | 560 | if (!vcpu->kvm->n_free_mmu_pages) |
25c0de2c | 561 | return NULL; |
6aa8b732 | 562 | |
4db35314 AK |
563 | sp = mmu_memory_cache_alloc(&vcpu->mmu_page_header_cache, sizeof *sp); |
564 | sp->spt = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE); | |
565 | sp->gfns = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE); | |
566 | set_page_private(virt_to_page(sp->spt), (unsigned long)sp); | |
567 | list_add(&sp->link, &vcpu->kvm->active_mmu_pages); | |
568 | ASSERT(is_empty_shadow_page(sp->spt)); | |
569 | sp->slot_bitmap = 0; | |
570 | sp->multimapped = 0; | |
571 | sp->parent_pte = parent_pte; | |
ebeace86 | 572 | --vcpu->kvm->n_free_mmu_pages; |
4db35314 | 573 | return sp; |
6aa8b732 AK |
574 | } |
575 | ||
714b93da | 576 | static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu, |
4db35314 | 577 | struct kvm_mmu_page *sp, u64 *parent_pte) |
cea0f0e7 AK |
578 | { |
579 | struct kvm_pte_chain *pte_chain; | |
580 | struct hlist_node *node; | |
581 | int i; | |
582 | ||
583 | if (!parent_pte) | |
584 | return; | |
4db35314 AK |
585 | if (!sp->multimapped) { |
586 | u64 *old = sp->parent_pte; | |
cea0f0e7 AK |
587 | |
588 | if (!old) { | |
4db35314 | 589 | sp->parent_pte = parent_pte; |
cea0f0e7 AK |
590 | return; |
591 | } | |
4db35314 | 592 | sp->multimapped = 1; |
714b93da | 593 | pte_chain = mmu_alloc_pte_chain(vcpu); |
4db35314 AK |
594 | INIT_HLIST_HEAD(&sp->parent_ptes); |
595 | hlist_add_head(&pte_chain->link, &sp->parent_ptes); | |
cea0f0e7 AK |
596 | pte_chain->parent_ptes[0] = old; |
597 | } | |
4db35314 | 598 | hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) { |
cea0f0e7 AK |
599 | if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1]) |
600 | continue; | |
601 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) | |
602 | if (!pte_chain->parent_ptes[i]) { | |
603 | pte_chain->parent_ptes[i] = parent_pte; | |
604 | return; | |
605 | } | |
606 | } | |
714b93da | 607 | pte_chain = mmu_alloc_pte_chain(vcpu); |
cea0f0e7 | 608 | BUG_ON(!pte_chain); |
4db35314 | 609 | hlist_add_head(&pte_chain->link, &sp->parent_ptes); |
cea0f0e7 AK |
610 | pte_chain->parent_ptes[0] = parent_pte; |
611 | } | |
612 | ||
4db35314 | 613 | static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp, |
cea0f0e7 AK |
614 | u64 *parent_pte) |
615 | { | |
616 | struct kvm_pte_chain *pte_chain; | |
617 | struct hlist_node *node; | |
618 | int i; | |
619 | ||
4db35314 AK |
620 | if (!sp->multimapped) { |
621 | BUG_ON(sp->parent_pte != parent_pte); | |
622 | sp->parent_pte = NULL; | |
cea0f0e7 AK |
623 | return; |
624 | } | |
4db35314 | 625 | hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) |
cea0f0e7 AK |
626 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) { |
627 | if (!pte_chain->parent_ptes[i]) | |
628 | break; | |
629 | if (pte_chain->parent_ptes[i] != parent_pte) | |
630 | continue; | |
697fe2e2 AK |
631 | while (i + 1 < NR_PTE_CHAIN_ENTRIES |
632 | && pte_chain->parent_ptes[i + 1]) { | |
cea0f0e7 AK |
633 | pte_chain->parent_ptes[i] |
634 | = pte_chain->parent_ptes[i + 1]; | |
635 | ++i; | |
636 | } | |
637 | pte_chain->parent_ptes[i] = NULL; | |
697fe2e2 AK |
638 | if (i == 0) { |
639 | hlist_del(&pte_chain->link); | |
90cb0529 | 640 | mmu_free_pte_chain(pte_chain); |
4db35314 AK |
641 | if (hlist_empty(&sp->parent_ptes)) { |
642 | sp->multimapped = 0; | |
643 | sp->parent_pte = NULL; | |
697fe2e2 AK |
644 | } |
645 | } | |
cea0f0e7 AK |
646 | return; |
647 | } | |
648 | BUG(); | |
649 | } | |
650 | ||
4db35314 | 651 | static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn) |
cea0f0e7 AK |
652 | { |
653 | unsigned index; | |
654 | struct hlist_head *bucket; | |
4db35314 | 655 | struct kvm_mmu_page *sp; |
cea0f0e7 AK |
656 | struct hlist_node *node; |
657 | ||
658 | pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn); | |
659 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
f67a46f4 | 660 | bucket = &kvm->mmu_page_hash[index]; |
4db35314 AK |
661 | hlist_for_each_entry(sp, node, bucket, hash_link) |
662 | if (sp->gfn == gfn && !sp->role.metaphysical) { | |
cea0f0e7 | 663 | pgprintk("%s: found role %x\n", |
4db35314 AK |
664 | __FUNCTION__, sp->role.word); |
665 | return sp; | |
cea0f0e7 AK |
666 | } |
667 | return NULL; | |
668 | } | |
669 | ||
670 | static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, | |
671 | gfn_t gfn, | |
672 | gva_t gaddr, | |
673 | unsigned level, | |
674 | int metaphysical, | |
d28c6cfb | 675 | unsigned hugepage_access, |
cea0f0e7 AK |
676 | u64 *parent_pte) |
677 | { | |
678 | union kvm_mmu_page_role role; | |
679 | unsigned index; | |
680 | unsigned quadrant; | |
681 | struct hlist_head *bucket; | |
4db35314 | 682 | struct kvm_mmu_page *sp; |
cea0f0e7 AK |
683 | struct hlist_node *node; |
684 | ||
685 | role.word = 0; | |
686 | role.glevels = vcpu->mmu.root_level; | |
687 | role.level = level; | |
688 | role.metaphysical = metaphysical; | |
d28c6cfb | 689 | role.hugepage_access = hugepage_access; |
cea0f0e7 AK |
690 | if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) { |
691 | quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); | |
692 | quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1; | |
693 | role.quadrant = quadrant; | |
694 | } | |
695 | pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__, | |
696 | gfn, role.word); | |
697 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
698 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
4db35314 AK |
699 | hlist_for_each_entry(sp, node, bucket, hash_link) |
700 | if (sp->gfn == gfn && sp->role.word == role.word) { | |
701 | mmu_page_add_parent_pte(vcpu, sp, parent_pte); | |
cea0f0e7 | 702 | pgprintk("%s: found\n", __FUNCTION__); |
4db35314 | 703 | return sp; |
cea0f0e7 | 704 | } |
4db35314 AK |
705 | sp = kvm_mmu_alloc_page(vcpu, parent_pte); |
706 | if (!sp) | |
707 | return sp; | |
cea0f0e7 | 708 | pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word); |
4db35314 AK |
709 | sp->gfn = gfn; |
710 | sp->role = role; | |
711 | hlist_add_head(&sp->hash_link, bucket); | |
712 | vcpu->mmu.prefetch_page(vcpu, sp); | |
374cbac0 | 713 | if (!metaphysical) |
4a4c9924 | 714 | rmap_write_protect(vcpu->kvm, gfn); |
4db35314 | 715 | return sp; |
cea0f0e7 AK |
716 | } |
717 | ||
90cb0529 | 718 | static void kvm_mmu_page_unlink_children(struct kvm *kvm, |
4db35314 | 719 | struct kvm_mmu_page *sp) |
a436036b | 720 | { |
697fe2e2 AK |
721 | unsigned i; |
722 | u64 *pt; | |
723 | u64 ent; | |
724 | ||
4db35314 | 725 | pt = sp->spt; |
697fe2e2 | 726 | |
4db35314 | 727 | if (sp->role.level == PT_PAGE_TABLE_LEVEL) { |
697fe2e2 | 728 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { |
c7addb90 | 729 | if (is_shadow_present_pte(pt[i])) |
290fc38d | 730 | rmap_remove(kvm, &pt[i]); |
c7addb90 | 731 | pt[i] = shadow_trap_nonpresent_pte; |
697fe2e2 | 732 | } |
90cb0529 | 733 | kvm_flush_remote_tlbs(kvm); |
697fe2e2 AK |
734 | return; |
735 | } | |
736 | ||
737 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
738 | ent = pt[i]; | |
739 | ||
c7addb90 AK |
740 | pt[i] = shadow_trap_nonpresent_pte; |
741 | if (!is_shadow_present_pte(ent)) | |
697fe2e2 AK |
742 | continue; |
743 | ent &= PT64_BASE_ADDR_MASK; | |
90cb0529 | 744 | mmu_page_remove_parent_pte(page_header(ent), &pt[i]); |
697fe2e2 | 745 | } |
90cb0529 | 746 | kvm_flush_remote_tlbs(kvm); |
a436036b AK |
747 | } |
748 | ||
4db35314 | 749 | static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte) |
cea0f0e7 | 750 | { |
4db35314 | 751 | mmu_page_remove_parent_pte(sp, parent_pte); |
a436036b AK |
752 | } |
753 | ||
12b7d28f AK |
754 | static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm) |
755 | { | |
756 | int i; | |
757 | ||
758 | for (i = 0; i < KVM_MAX_VCPUS; ++i) | |
759 | if (kvm->vcpus[i]) | |
760 | kvm->vcpus[i]->last_pte_updated = NULL; | |
761 | } | |
762 | ||
4db35314 | 763 | static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp) |
a436036b AK |
764 | { |
765 | u64 *parent_pte; | |
766 | ||
4cee5764 | 767 | ++kvm->stat.mmu_shadow_zapped; |
4db35314 AK |
768 | while (sp->multimapped || sp->parent_pte) { |
769 | if (!sp->multimapped) | |
770 | parent_pte = sp->parent_pte; | |
a436036b AK |
771 | else { |
772 | struct kvm_pte_chain *chain; | |
773 | ||
4db35314 | 774 | chain = container_of(sp->parent_ptes.first, |
a436036b AK |
775 | struct kvm_pte_chain, link); |
776 | parent_pte = chain->parent_ptes[0]; | |
777 | } | |
697fe2e2 | 778 | BUG_ON(!parent_pte); |
4db35314 | 779 | kvm_mmu_put_page(sp, parent_pte); |
c7addb90 | 780 | set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte); |
a436036b | 781 | } |
4db35314 AK |
782 | kvm_mmu_page_unlink_children(kvm, sp); |
783 | if (!sp->root_count) { | |
784 | hlist_del(&sp->hash_link); | |
785 | kvm_mmu_free_page(kvm, sp); | |
36868f7b | 786 | } else |
4db35314 | 787 | list_move(&sp->link, &kvm->active_mmu_pages); |
12b7d28f | 788 | kvm_mmu_reset_last_pte_updated(kvm); |
a436036b AK |
789 | } |
790 | ||
82ce2c96 IE |
791 | /* |
792 | * Changing the number of mmu pages allocated to the vm | |
793 | * Note: if kvm_nr_mmu_pages is too small, you will get dead lock | |
794 | */ | |
795 | void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages) | |
796 | { | |
797 | /* | |
798 | * If we set the number of mmu pages to be smaller be than the | |
799 | * number of actived pages , we must to free some mmu pages before we | |
800 | * change the value | |
801 | */ | |
802 | ||
803 | if ((kvm->n_alloc_mmu_pages - kvm->n_free_mmu_pages) > | |
804 | kvm_nr_mmu_pages) { | |
805 | int n_used_mmu_pages = kvm->n_alloc_mmu_pages | |
806 | - kvm->n_free_mmu_pages; | |
807 | ||
808 | while (n_used_mmu_pages > kvm_nr_mmu_pages) { | |
809 | struct kvm_mmu_page *page; | |
810 | ||
811 | page = container_of(kvm->active_mmu_pages.prev, | |
812 | struct kvm_mmu_page, link); | |
813 | kvm_mmu_zap_page(kvm, page); | |
814 | n_used_mmu_pages--; | |
815 | } | |
816 | kvm->n_free_mmu_pages = 0; | |
817 | } | |
818 | else | |
819 | kvm->n_free_mmu_pages += kvm_nr_mmu_pages | |
820 | - kvm->n_alloc_mmu_pages; | |
821 | ||
822 | kvm->n_alloc_mmu_pages = kvm_nr_mmu_pages; | |
823 | } | |
824 | ||
f67a46f4 | 825 | static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn) |
a436036b AK |
826 | { |
827 | unsigned index; | |
828 | struct hlist_head *bucket; | |
4db35314 | 829 | struct kvm_mmu_page *sp; |
a436036b AK |
830 | struct hlist_node *node, *n; |
831 | int r; | |
832 | ||
833 | pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn); | |
834 | r = 0; | |
835 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
f67a46f4 | 836 | bucket = &kvm->mmu_page_hash[index]; |
4db35314 AK |
837 | hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) |
838 | if (sp->gfn == gfn && !sp->role.metaphysical) { | |
697fe2e2 | 839 | pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn, |
4db35314 AK |
840 | sp->role.word); |
841 | kvm_mmu_zap_page(kvm, sp); | |
a436036b AK |
842 | r = 1; |
843 | } | |
844 | return r; | |
cea0f0e7 AK |
845 | } |
846 | ||
f67a46f4 | 847 | static void mmu_unshadow(struct kvm *kvm, gfn_t gfn) |
97a0a01e | 848 | { |
4db35314 | 849 | struct kvm_mmu_page *sp; |
97a0a01e | 850 | |
4db35314 AK |
851 | while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) { |
852 | pgprintk("%s: zap %lx %x\n", __FUNCTION__, gfn, sp->role.word); | |
853 | kvm_mmu_zap_page(kvm, sp); | |
97a0a01e AK |
854 | } |
855 | } | |
856 | ||
38c335f1 | 857 | static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn) |
6aa8b732 | 858 | { |
38c335f1 | 859 | int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn)); |
4db35314 | 860 | struct kvm_mmu_page *sp = page_header(__pa(pte)); |
6aa8b732 | 861 | |
4db35314 | 862 | __set_bit(slot, &sp->slot_bitmap); |
6aa8b732 AK |
863 | } |
864 | ||
039576c0 AK |
865 | struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva) |
866 | { | |
867 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva); | |
868 | ||
869 | if (gpa == UNMAPPED_GVA) | |
870 | return NULL; | |
1d28f5f4 | 871 | return gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT); |
039576c0 AK |
872 | } |
873 | ||
6aa8b732 AK |
874 | static void nonpaging_new_cr3(struct kvm_vcpu *vcpu) |
875 | { | |
876 | } | |
877 | ||
3f3e7124 | 878 | static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, struct page *page) |
6aa8b732 AK |
879 | { |
880 | int level = PT32E_ROOT_LEVEL; | |
881 | hpa_t table_addr = vcpu->mmu.root_hpa; | |
882 | ||
883 | for (; ; level--) { | |
884 | u32 index = PT64_INDEX(v, level); | |
885 | u64 *table; | |
cea0f0e7 | 886 | u64 pte; |
6aa8b732 AK |
887 | |
888 | ASSERT(VALID_PAGE(table_addr)); | |
889 | table = __va(table_addr); | |
890 | ||
891 | if (level == 1) { | |
9647c14c IE |
892 | int was_rmapped; |
893 | ||
cea0f0e7 | 894 | pte = table[index]; |
9647c14c | 895 | was_rmapped = is_rmap_pte(pte); |
2065b372 | 896 | if (is_shadow_present_pte(pte) && is_writeble_pte(pte)) { |
b4231d61 | 897 | kvm_release_page_clean(page); |
cea0f0e7 | 898 | return 0; |
2065b372 | 899 | } |
6aa8b732 | 900 | mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT); |
38c335f1 AK |
901 | page_header_update_slot(vcpu->kvm, table, |
902 | v >> PAGE_SHIFT); | |
3f3e7124 AK |
903 | table[index] = page_to_phys(page) |
904 | | PT_PRESENT_MASK | PT_WRITABLE_MASK | |
905 | | PT_USER_MASK; | |
9647c14c IE |
906 | if (!was_rmapped) |
907 | rmap_add(vcpu, &table[index], v >> PAGE_SHIFT); | |
8a7ae055 | 908 | else |
b4231d61 IE |
909 | kvm_release_page_clean(page); |
910 | ||
6aa8b732 AK |
911 | return 0; |
912 | } | |
913 | ||
c7addb90 | 914 | if (table[index] == shadow_trap_nonpresent_pte) { |
25c0de2c | 915 | struct kvm_mmu_page *new_table; |
cea0f0e7 | 916 | gfn_t pseudo_gfn; |
6aa8b732 | 917 | |
cea0f0e7 AK |
918 | pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK) |
919 | >> PAGE_SHIFT; | |
920 | new_table = kvm_mmu_get_page(vcpu, pseudo_gfn, | |
921 | v, level - 1, | |
6bfccdc9 | 922 | 1, 3, &table[index]); |
25c0de2c | 923 | if (!new_table) { |
6aa8b732 | 924 | pgprintk("nonpaging_map: ENOMEM\n"); |
b4231d61 | 925 | kvm_release_page_clean(page); |
6aa8b732 AK |
926 | return -ENOMEM; |
927 | } | |
928 | ||
47ad8e68 | 929 | table[index] = __pa(new_table->spt) | PT_PRESENT_MASK |
25c0de2c | 930 | | PT_WRITABLE_MASK | PT_USER_MASK; |
6aa8b732 AK |
931 | } |
932 | table_addr = table[index] & PT64_BASE_ADDR_MASK; | |
933 | } | |
934 | } | |
935 | ||
c7addb90 AK |
936 | static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu, |
937 | struct kvm_mmu_page *sp) | |
938 | { | |
939 | int i; | |
940 | ||
941 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) | |
942 | sp->spt[i] = shadow_trap_nonpresent_pte; | |
943 | } | |
944 | ||
17ac10ad AK |
945 | static void mmu_free_roots(struct kvm_vcpu *vcpu) |
946 | { | |
947 | int i; | |
4db35314 | 948 | struct kvm_mmu_page *sp; |
17ac10ad | 949 | |
7b53aa56 AK |
950 | if (!VALID_PAGE(vcpu->mmu.root_hpa)) |
951 | return; | |
17ac10ad AK |
952 | #ifdef CONFIG_X86_64 |
953 | if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) { | |
954 | hpa_t root = vcpu->mmu.root_hpa; | |
955 | ||
4db35314 AK |
956 | sp = page_header(root); |
957 | --sp->root_count; | |
17ac10ad AK |
958 | vcpu->mmu.root_hpa = INVALID_PAGE; |
959 | return; | |
960 | } | |
961 | #endif | |
962 | for (i = 0; i < 4; ++i) { | |
963 | hpa_t root = vcpu->mmu.pae_root[i]; | |
964 | ||
417726a3 | 965 | if (root) { |
417726a3 | 966 | root &= PT64_BASE_ADDR_MASK; |
4db35314 AK |
967 | sp = page_header(root); |
968 | --sp->root_count; | |
417726a3 | 969 | } |
17ac10ad AK |
970 | vcpu->mmu.pae_root[i] = INVALID_PAGE; |
971 | } | |
972 | vcpu->mmu.root_hpa = INVALID_PAGE; | |
973 | } | |
974 | ||
975 | static void mmu_alloc_roots(struct kvm_vcpu *vcpu) | |
976 | { | |
977 | int i; | |
cea0f0e7 | 978 | gfn_t root_gfn; |
4db35314 | 979 | struct kvm_mmu_page *sp; |
3bb65a22 | 980 | |
cea0f0e7 | 981 | root_gfn = vcpu->cr3 >> PAGE_SHIFT; |
17ac10ad AK |
982 | |
983 | #ifdef CONFIG_X86_64 | |
984 | if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) { | |
985 | hpa_t root = vcpu->mmu.root_hpa; | |
986 | ||
987 | ASSERT(!VALID_PAGE(root)); | |
4db35314 AK |
988 | sp = kvm_mmu_get_page(vcpu, root_gfn, 0, |
989 | PT64_ROOT_LEVEL, 0, 0, NULL); | |
990 | root = __pa(sp->spt); | |
991 | ++sp->root_count; | |
17ac10ad AK |
992 | vcpu->mmu.root_hpa = root; |
993 | return; | |
994 | } | |
995 | #endif | |
996 | for (i = 0; i < 4; ++i) { | |
997 | hpa_t root = vcpu->mmu.pae_root[i]; | |
998 | ||
999 | ASSERT(!VALID_PAGE(root)); | |
417726a3 AK |
1000 | if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) { |
1001 | if (!is_present_pte(vcpu->pdptrs[i])) { | |
1002 | vcpu->mmu.pae_root[i] = 0; | |
1003 | continue; | |
1004 | } | |
cea0f0e7 | 1005 | root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT; |
417726a3 | 1006 | } else if (vcpu->mmu.root_level == 0) |
cea0f0e7 | 1007 | root_gfn = 0; |
4db35314 AK |
1008 | sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30, |
1009 | PT32_ROOT_LEVEL, !is_paging(vcpu), | |
1010 | 0, NULL); | |
1011 | root = __pa(sp->spt); | |
1012 | ++sp->root_count; | |
17ac10ad AK |
1013 | vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK; |
1014 | } | |
1015 | vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root); | |
1016 | } | |
1017 | ||
6aa8b732 AK |
1018 | static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr) |
1019 | { | |
1020 | return vaddr; | |
1021 | } | |
1022 | ||
1023 | static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva, | |
3f3e7124 | 1024 | u32 error_code) |
6aa8b732 | 1025 | { |
3f3e7124 | 1026 | struct page *page; |
e2dec939 | 1027 | int r; |
6aa8b732 | 1028 | |
e2dec939 AK |
1029 | r = mmu_topup_memory_caches(vcpu); |
1030 | if (r) | |
1031 | return r; | |
714b93da | 1032 | |
6aa8b732 AK |
1033 | ASSERT(vcpu); |
1034 | ASSERT(VALID_PAGE(vcpu->mmu.root_hpa)); | |
1035 | ||
3f3e7124 | 1036 | page = gfn_to_page(vcpu->kvm, gva >> PAGE_SHIFT); |
6aa8b732 | 1037 | |
3f3e7124 AK |
1038 | if (is_error_page(page)) { |
1039 | kvm_release_page_clean(page); | |
ebeace86 | 1040 | return 1; |
8a7ae055 | 1041 | } |
6aa8b732 | 1042 | |
3f3e7124 | 1043 | return nonpaging_map(vcpu, gva & PAGE_MASK, page); |
6aa8b732 AK |
1044 | } |
1045 | ||
6aa8b732 AK |
1046 | static void nonpaging_free(struct kvm_vcpu *vcpu) |
1047 | { | |
17ac10ad | 1048 | mmu_free_roots(vcpu); |
6aa8b732 AK |
1049 | } |
1050 | ||
1051 | static int nonpaging_init_context(struct kvm_vcpu *vcpu) | |
1052 | { | |
1053 | struct kvm_mmu *context = &vcpu->mmu; | |
1054 | ||
1055 | context->new_cr3 = nonpaging_new_cr3; | |
1056 | context->page_fault = nonpaging_page_fault; | |
6aa8b732 AK |
1057 | context->gva_to_gpa = nonpaging_gva_to_gpa; |
1058 | context->free = nonpaging_free; | |
c7addb90 | 1059 | context->prefetch_page = nonpaging_prefetch_page; |
cea0f0e7 | 1060 | context->root_level = 0; |
6aa8b732 | 1061 | context->shadow_root_level = PT32E_ROOT_LEVEL; |
17c3ba9d | 1062 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1063 | return 0; |
1064 | } | |
1065 | ||
d835dfec | 1066 | void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu) |
6aa8b732 | 1067 | { |
1165f5fe | 1068 | ++vcpu->stat.tlb_flush; |
cbdd1bea | 1069 | kvm_x86_ops->tlb_flush(vcpu); |
6aa8b732 AK |
1070 | } |
1071 | ||
1072 | static void paging_new_cr3(struct kvm_vcpu *vcpu) | |
1073 | { | |
374cbac0 | 1074 | pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3); |
cea0f0e7 | 1075 | mmu_free_roots(vcpu); |
6aa8b732 AK |
1076 | } |
1077 | ||
6aa8b732 AK |
1078 | static void inject_page_fault(struct kvm_vcpu *vcpu, |
1079 | u64 addr, | |
1080 | u32 err_code) | |
1081 | { | |
cbdd1bea | 1082 | kvm_x86_ops->inject_page_fault(vcpu, addr, err_code); |
6aa8b732 AK |
1083 | } |
1084 | ||
6aa8b732 AK |
1085 | static void paging_free(struct kvm_vcpu *vcpu) |
1086 | { | |
1087 | nonpaging_free(vcpu); | |
1088 | } | |
1089 | ||
1090 | #define PTTYPE 64 | |
1091 | #include "paging_tmpl.h" | |
1092 | #undef PTTYPE | |
1093 | ||
1094 | #define PTTYPE 32 | |
1095 | #include "paging_tmpl.h" | |
1096 | #undef PTTYPE | |
1097 | ||
17ac10ad | 1098 | static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level) |
6aa8b732 AK |
1099 | { |
1100 | struct kvm_mmu *context = &vcpu->mmu; | |
1101 | ||
1102 | ASSERT(is_pae(vcpu)); | |
1103 | context->new_cr3 = paging_new_cr3; | |
1104 | context->page_fault = paging64_page_fault; | |
6aa8b732 | 1105 | context->gva_to_gpa = paging64_gva_to_gpa; |
c7addb90 | 1106 | context->prefetch_page = paging64_prefetch_page; |
6aa8b732 | 1107 | context->free = paging_free; |
17ac10ad AK |
1108 | context->root_level = level; |
1109 | context->shadow_root_level = level; | |
17c3ba9d | 1110 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1111 | return 0; |
1112 | } | |
1113 | ||
17ac10ad AK |
1114 | static int paging64_init_context(struct kvm_vcpu *vcpu) |
1115 | { | |
1116 | return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL); | |
1117 | } | |
1118 | ||
6aa8b732 AK |
1119 | static int paging32_init_context(struct kvm_vcpu *vcpu) |
1120 | { | |
1121 | struct kvm_mmu *context = &vcpu->mmu; | |
1122 | ||
1123 | context->new_cr3 = paging_new_cr3; | |
1124 | context->page_fault = paging32_page_fault; | |
6aa8b732 AK |
1125 | context->gva_to_gpa = paging32_gva_to_gpa; |
1126 | context->free = paging_free; | |
c7addb90 | 1127 | context->prefetch_page = paging32_prefetch_page; |
6aa8b732 AK |
1128 | context->root_level = PT32_ROOT_LEVEL; |
1129 | context->shadow_root_level = PT32E_ROOT_LEVEL; | |
17c3ba9d | 1130 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1131 | return 0; |
1132 | } | |
1133 | ||
1134 | static int paging32E_init_context(struct kvm_vcpu *vcpu) | |
1135 | { | |
17ac10ad | 1136 | return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL); |
6aa8b732 AK |
1137 | } |
1138 | ||
1139 | static int init_kvm_mmu(struct kvm_vcpu *vcpu) | |
1140 | { | |
1141 | ASSERT(vcpu); | |
1142 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
1143 | ||
1144 | if (!is_paging(vcpu)) | |
1145 | return nonpaging_init_context(vcpu); | |
a9058ecd | 1146 | else if (is_long_mode(vcpu)) |
6aa8b732 AK |
1147 | return paging64_init_context(vcpu); |
1148 | else if (is_pae(vcpu)) | |
1149 | return paging32E_init_context(vcpu); | |
1150 | else | |
1151 | return paging32_init_context(vcpu); | |
1152 | } | |
1153 | ||
1154 | static void destroy_kvm_mmu(struct kvm_vcpu *vcpu) | |
1155 | { | |
1156 | ASSERT(vcpu); | |
1157 | if (VALID_PAGE(vcpu->mmu.root_hpa)) { | |
1158 | vcpu->mmu.free(vcpu); | |
1159 | vcpu->mmu.root_hpa = INVALID_PAGE; | |
1160 | } | |
1161 | } | |
1162 | ||
1163 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu) | |
17c3ba9d AK |
1164 | { |
1165 | destroy_kvm_mmu(vcpu); | |
1166 | return init_kvm_mmu(vcpu); | |
1167 | } | |
8668a3c4 | 1168 | EXPORT_SYMBOL_GPL(kvm_mmu_reset_context); |
17c3ba9d AK |
1169 | |
1170 | int kvm_mmu_load(struct kvm_vcpu *vcpu) | |
6aa8b732 | 1171 | { |
714b93da AK |
1172 | int r; |
1173 | ||
11ec2804 | 1174 | mutex_lock(&vcpu->kvm->lock); |
e2dec939 | 1175 | r = mmu_topup_memory_caches(vcpu); |
17c3ba9d AK |
1176 | if (r) |
1177 | goto out; | |
1178 | mmu_alloc_roots(vcpu); | |
cbdd1bea | 1179 | kvm_x86_ops->set_cr3(vcpu, vcpu->mmu.root_hpa); |
17c3ba9d | 1180 | kvm_mmu_flush_tlb(vcpu); |
714b93da | 1181 | out: |
11ec2804 | 1182 | mutex_unlock(&vcpu->kvm->lock); |
714b93da | 1183 | return r; |
6aa8b732 | 1184 | } |
17c3ba9d AK |
1185 | EXPORT_SYMBOL_GPL(kvm_mmu_load); |
1186 | ||
1187 | void kvm_mmu_unload(struct kvm_vcpu *vcpu) | |
1188 | { | |
1189 | mmu_free_roots(vcpu); | |
1190 | } | |
6aa8b732 | 1191 | |
09072daf | 1192 | static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu, |
4db35314 | 1193 | struct kvm_mmu_page *sp, |
ac1b714e AK |
1194 | u64 *spte) |
1195 | { | |
1196 | u64 pte; | |
1197 | struct kvm_mmu_page *child; | |
1198 | ||
1199 | pte = *spte; | |
c7addb90 | 1200 | if (is_shadow_present_pte(pte)) { |
4db35314 | 1201 | if (sp->role.level == PT_PAGE_TABLE_LEVEL) |
290fc38d | 1202 | rmap_remove(vcpu->kvm, spte); |
ac1b714e AK |
1203 | else { |
1204 | child = page_header(pte & PT64_BASE_ADDR_MASK); | |
90cb0529 | 1205 | mmu_page_remove_parent_pte(child, spte); |
ac1b714e AK |
1206 | } |
1207 | } | |
c7addb90 | 1208 | set_shadow_pte(spte, shadow_trap_nonpresent_pte); |
ac1b714e AK |
1209 | } |
1210 | ||
0028425f | 1211 | static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu, |
4db35314 | 1212 | struct kvm_mmu_page *sp, |
0028425f | 1213 | u64 *spte, |
c7addb90 AK |
1214 | const void *new, int bytes, |
1215 | int offset_in_pte) | |
0028425f | 1216 | { |
4db35314 | 1217 | if (sp->role.level != PT_PAGE_TABLE_LEVEL) { |
4cee5764 | 1218 | ++vcpu->kvm->stat.mmu_pde_zapped; |
0028425f | 1219 | return; |
4cee5764 | 1220 | } |
0028425f | 1221 | |
4cee5764 | 1222 | ++vcpu->kvm->stat.mmu_pte_updated; |
4db35314 AK |
1223 | if (sp->role.glevels == PT32_ROOT_LEVEL) |
1224 | paging32_update_pte(vcpu, sp, spte, new, bytes, offset_in_pte); | |
0028425f | 1225 | else |
4db35314 | 1226 | paging64_update_pte(vcpu, sp, spte, new, bytes, offset_in_pte); |
0028425f AK |
1227 | } |
1228 | ||
79539cec AK |
1229 | static bool need_remote_flush(u64 old, u64 new) |
1230 | { | |
1231 | if (!is_shadow_present_pte(old)) | |
1232 | return false; | |
1233 | if (!is_shadow_present_pte(new)) | |
1234 | return true; | |
1235 | if ((old ^ new) & PT64_BASE_ADDR_MASK) | |
1236 | return true; | |
1237 | old ^= PT64_NX_MASK; | |
1238 | new ^= PT64_NX_MASK; | |
1239 | return (old & ~new & PT64_PERM_MASK) != 0; | |
1240 | } | |
1241 | ||
1242 | static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new) | |
1243 | { | |
1244 | if (need_remote_flush(old, new)) | |
1245 | kvm_flush_remote_tlbs(vcpu->kvm); | |
1246 | else | |
1247 | kvm_mmu_flush_tlb(vcpu); | |
1248 | } | |
1249 | ||
12b7d28f AK |
1250 | static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu) |
1251 | { | |
1252 | u64 *spte = vcpu->last_pte_updated; | |
1253 | ||
1254 | return !!(spte && (*spte & PT_ACCESSED_MASK)); | |
1255 | } | |
1256 | ||
09072daf | 1257 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
fe551881 | 1258 | const u8 *new, int bytes) |
da4a00f0 | 1259 | { |
9b7a0325 | 1260 | gfn_t gfn = gpa >> PAGE_SHIFT; |
4db35314 | 1261 | struct kvm_mmu_page *sp; |
0e7bc4b9 | 1262 | struct hlist_node *node, *n; |
9b7a0325 AK |
1263 | struct hlist_head *bucket; |
1264 | unsigned index; | |
79539cec | 1265 | u64 entry; |
9b7a0325 | 1266 | u64 *spte; |
9b7a0325 | 1267 | unsigned offset = offset_in_page(gpa); |
0e7bc4b9 | 1268 | unsigned pte_size; |
9b7a0325 | 1269 | unsigned page_offset; |
0e7bc4b9 | 1270 | unsigned misaligned; |
fce0657f | 1271 | unsigned quadrant; |
9b7a0325 | 1272 | int level; |
86a5ba02 | 1273 | int flooded = 0; |
ac1b714e | 1274 | int npte; |
9b7a0325 | 1275 | |
da4a00f0 | 1276 | pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes); |
4cee5764 | 1277 | ++vcpu->kvm->stat.mmu_pte_write; |
c7addb90 | 1278 | kvm_mmu_audit(vcpu, "pre pte write"); |
12b7d28f AK |
1279 | if (gfn == vcpu->last_pt_write_gfn |
1280 | && !last_updated_pte_accessed(vcpu)) { | |
86a5ba02 AK |
1281 | ++vcpu->last_pt_write_count; |
1282 | if (vcpu->last_pt_write_count >= 3) | |
1283 | flooded = 1; | |
1284 | } else { | |
1285 | vcpu->last_pt_write_gfn = gfn; | |
1286 | vcpu->last_pt_write_count = 1; | |
12b7d28f | 1287 | vcpu->last_pte_updated = NULL; |
86a5ba02 | 1288 | } |
9b7a0325 AK |
1289 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; |
1290 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
4db35314 AK |
1291 | hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) { |
1292 | if (sp->gfn != gfn || sp->role.metaphysical) | |
9b7a0325 | 1293 | continue; |
4db35314 | 1294 | pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8; |
0e7bc4b9 | 1295 | misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); |
e925c5ba | 1296 | misaligned |= bytes < 4; |
86a5ba02 | 1297 | if (misaligned || flooded) { |
0e7bc4b9 AK |
1298 | /* |
1299 | * Misaligned accesses are too much trouble to fix | |
1300 | * up; also, they usually indicate a page is not used | |
1301 | * as a page table. | |
86a5ba02 AK |
1302 | * |
1303 | * If we're seeing too many writes to a page, | |
1304 | * it may no longer be a page table, or we may be | |
1305 | * forking, in which case it is better to unmap the | |
1306 | * page. | |
0e7bc4b9 AK |
1307 | */ |
1308 | pgprintk("misaligned: gpa %llx bytes %d role %x\n", | |
4db35314 AK |
1309 | gpa, bytes, sp->role.word); |
1310 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
4cee5764 | 1311 | ++vcpu->kvm->stat.mmu_flooded; |
0e7bc4b9 AK |
1312 | continue; |
1313 | } | |
9b7a0325 | 1314 | page_offset = offset; |
4db35314 | 1315 | level = sp->role.level; |
ac1b714e | 1316 | npte = 1; |
4db35314 | 1317 | if (sp->role.glevels == PT32_ROOT_LEVEL) { |
ac1b714e AK |
1318 | page_offset <<= 1; /* 32->64 */ |
1319 | /* | |
1320 | * A 32-bit pde maps 4MB while the shadow pdes map | |
1321 | * only 2MB. So we need to double the offset again | |
1322 | * and zap two pdes instead of one. | |
1323 | */ | |
1324 | if (level == PT32_ROOT_LEVEL) { | |
6b8d0f9b | 1325 | page_offset &= ~7; /* kill rounding error */ |
ac1b714e AK |
1326 | page_offset <<= 1; |
1327 | npte = 2; | |
1328 | } | |
fce0657f | 1329 | quadrant = page_offset >> PAGE_SHIFT; |
9b7a0325 | 1330 | page_offset &= ~PAGE_MASK; |
4db35314 | 1331 | if (quadrant != sp->role.quadrant) |
fce0657f | 1332 | continue; |
9b7a0325 | 1333 | } |
4db35314 | 1334 | spte = &sp->spt[page_offset / sizeof(*spte)]; |
ac1b714e | 1335 | while (npte--) { |
79539cec | 1336 | entry = *spte; |
4db35314 AK |
1337 | mmu_pte_write_zap_pte(vcpu, sp, spte); |
1338 | mmu_pte_write_new_pte(vcpu, sp, spte, new, bytes, | |
c7addb90 | 1339 | page_offset & (pte_size - 1)); |
79539cec | 1340 | mmu_pte_write_flush_tlb(vcpu, entry, *spte); |
ac1b714e | 1341 | ++spte; |
9b7a0325 | 1342 | } |
9b7a0325 | 1343 | } |
c7addb90 | 1344 | kvm_mmu_audit(vcpu, "post pte write"); |
da4a00f0 AK |
1345 | } |
1346 | ||
a436036b AK |
1347 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva) |
1348 | { | |
1349 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva); | |
1350 | ||
f67a46f4 | 1351 | return kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT); |
a436036b AK |
1352 | } |
1353 | ||
22d95b12 | 1354 | void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu) |
ebeace86 AK |
1355 | { |
1356 | while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) { | |
4db35314 | 1357 | struct kvm_mmu_page *sp; |
ebeace86 | 1358 | |
4db35314 AK |
1359 | sp = container_of(vcpu->kvm->active_mmu_pages.prev, |
1360 | struct kvm_mmu_page, link); | |
1361 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
4cee5764 | 1362 | ++vcpu->kvm->stat.mmu_recycled; |
ebeace86 AK |
1363 | } |
1364 | } | |
ebeace86 | 1365 | |
3067714c AK |
1366 | int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code) |
1367 | { | |
1368 | int r; | |
1369 | enum emulation_result er; | |
1370 | ||
1371 | mutex_lock(&vcpu->kvm->lock); | |
1372 | r = vcpu->mmu.page_fault(vcpu, cr2, error_code); | |
1373 | if (r < 0) | |
1374 | goto out; | |
1375 | ||
1376 | if (!r) { | |
1377 | r = 1; | |
1378 | goto out; | |
1379 | } | |
1380 | ||
b733bfb5 AK |
1381 | r = mmu_topup_memory_caches(vcpu); |
1382 | if (r) | |
1383 | goto out; | |
1384 | ||
3067714c AK |
1385 | er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0); |
1386 | mutex_unlock(&vcpu->kvm->lock); | |
1387 | ||
1388 | switch (er) { | |
1389 | case EMULATE_DONE: | |
1390 | return 1; | |
1391 | case EMULATE_DO_MMIO: | |
1392 | ++vcpu->stat.mmio_exits; | |
1393 | return 0; | |
1394 | case EMULATE_FAIL: | |
1395 | kvm_report_emulation_failure(vcpu, "pagetable"); | |
1396 | return 1; | |
1397 | default: | |
1398 | BUG(); | |
1399 | } | |
1400 | out: | |
1401 | mutex_unlock(&vcpu->kvm->lock); | |
1402 | return r; | |
1403 | } | |
1404 | EXPORT_SYMBOL_GPL(kvm_mmu_page_fault); | |
1405 | ||
6aa8b732 AK |
1406 | static void free_mmu_pages(struct kvm_vcpu *vcpu) |
1407 | { | |
4db35314 | 1408 | struct kvm_mmu_page *sp; |
6aa8b732 | 1409 | |
f51234c2 | 1410 | while (!list_empty(&vcpu->kvm->active_mmu_pages)) { |
4db35314 AK |
1411 | sp = container_of(vcpu->kvm->active_mmu_pages.next, |
1412 | struct kvm_mmu_page, link); | |
1413 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
f51234c2 | 1414 | } |
17ac10ad | 1415 | free_page((unsigned long)vcpu->mmu.pae_root); |
6aa8b732 AK |
1416 | } |
1417 | ||
1418 | static int alloc_mmu_pages(struct kvm_vcpu *vcpu) | |
1419 | { | |
17ac10ad | 1420 | struct page *page; |
6aa8b732 AK |
1421 | int i; |
1422 | ||
1423 | ASSERT(vcpu); | |
1424 | ||
82ce2c96 IE |
1425 | if (vcpu->kvm->n_requested_mmu_pages) |
1426 | vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_requested_mmu_pages; | |
1427 | else | |
1428 | vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_alloc_mmu_pages; | |
17ac10ad AK |
1429 | /* |
1430 | * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64. | |
1431 | * Therefore we need to allocate shadow page tables in the first | |
1432 | * 4GB of memory, which happens to fit the DMA32 zone. | |
1433 | */ | |
1434 | page = alloc_page(GFP_KERNEL | __GFP_DMA32); | |
1435 | if (!page) | |
1436 | goto error_1; | |
1437 | vcpu->mmu.pae_root = page_address(page); | |
1438 | for (i = 0; i < 4; ++i) | |
1439 | vcpu->mmu.pae_root[i] = INVALID_PAGE; | |
1440 | ||
6aa8b732 AK |
1441 | return 0; |
1442 | ||
1443 | error_1: | |
1444 | free_mmu_pages(vcpu); | |
1445 | return -ENOMEM; | |
1446 | } | |
1447 | ||
8018c27b | 1448 | int kvm_mmu_create(struct kvm_vcpu *vcpu) |
6aa8b732 | 1449 | { |
6aa8b732 AK |
1450 | ASSERT(vcpu); |
1451 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
6aa8b732 | 1452 | |
8018c27b IM |
1453 | return alloc_mmu_pages(vcpu); |
1454 | } | |
6aa8b732 | 1455 | |
8018c27b IM |
1456 | int kvm_mmu_setup(struct kvm_vcpu *vcpu) |
1457 | { | |
1458 | ASSERT(vcpu); | |
1459 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
2c264957 | 1460 | |
8018c27b | 1461 | return init_kvm_mmu(vcpu); |
6aa8b732 AK |
1462 | } |
1463 | ||
1464 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu) | |
1465 | { | |
1466 | ASSERT(vcpu); | |
1467 | ||
1468 | destroy_kvm_mmu(vcpu); | |
1469 | free_mmu_pages(vcpu); | |
714b93da | 1470 | mmu_free_memory_caches(vcpu); |
6aa8b732 AK |
1471 | } |
1472 | ||
90cb0529 | 1473 | void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot) |
6aa8b732 | 1474 | { |
4db35314 | 1475 | struct kvm_mmu_page *sp; |
6aa8b732 | 1476 | |
4db35314 | 1477 | list_for_each_entry(sp, &kvm->active_mmu_pages, link) { |
6aa8b732 AK |
1478 | int i; |
1479 | u64 *pt; | |
1480 | ||
4db35314 | 1481 | if (!test_bit(slot, &sp->slot_bitmap)) |
6aa8b732 AK |
1482 | continue; |
1483 | ||
4db35314 | 1484 | pt = sp->spt; |
6aa8b732 AK |
1485 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) |
1486 | /* avoid RMW */ | |
9647c14c | 1487 | if (pt[i] & PT_WRITABLE_MASK) |
6aa8b732 | 1488 | pt[i] &= ~PT_WRITABLE_MASK; |
6aa8b732 AK |
1489 | } |
1490 | } | |
37a7d8b0 | 1491 | |
90cb0529 | 1492 | void kvm_mmu_zap_all(struct kvm *kvm) |
e0fa826f | 1493 | { |
4db35314 | 1494 | struct kvm_mmu_page *sp, *node; |
e0fa826f | 1495 | |
4db35314 AK |
1496 | list_for_each_entry_safe(sp, node, &kvm->active_mmu_pages, link) |
1497 | kvm_mmu_zap_page(kvm, sp); | |
e0fa826f | 1498 | |
90cb0529 | 1499 | kvm_flush_remote_tlbs(kvm); |
e0fa826f DL |
1500 | } |
1501 | ||
b5a33a75 AK |
1502 | void kvm_mmu_module_exit(void) |
1503 | { | |
1504 | if (pte_chain_cache) | |
1505 | kmem_cache_destroy(pte_chain_cache); | |
1506 | if (rmap_desc_cache) | |
1507 | kmem_cache_destroy(rmap_desc_cache); | |
d3d25b04 AK |
1508 | if (mmu_page_header_cache) |
1509 | kmem_cache_destroy(mmu_page_header_cache); | |
b5a33a75 AK |
1510 | } |
1511 | ||
1512 | int kvm_mmu_module_init(void) | |
1513 | { | |
1514 | pte_chain_cache = kmem_cache_create("kvm_pte_chain", | |
1515 | sizeof(struct kvm_pte_chain), | |
20c2df83 | 1516 | 0, 0, NULL); |
b5a33a75 AK |
1517 | if (!pte_chain_cache) |
1518 | goto nomem; | |
1519 | rmap_desc_cache = kmem_cache_create("kvm_rmap_desc", | |
1520 | sizeof(struct kvm_rmap_desc), | |
20c2df83 | 1521 | 0, 0, NULL); |
b5a33a75 AK |
1522 | if (!rmap_desc_cache) |
1523 | goto nomem; | |
1524 | ||
d3d25b04 AK |
1525 | mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header", |
1526 | sizeof(struct kvm_mmu_page), | |
20c2df83 | 1527 | 0, 0, NULL); |
d3d25b04 AK |
1528 | if (!mmu_page_header_cache) |
1529 | goto nomem; | |
1530 | ||
b5a33a75 AK |
1531 | return 0; |
1532 | ||
1533 | nomem: | |
1534 | kvm_mmu_module_exit(); | |
1535 | return -ENOMEM; | |
1536 | } | |
1537 | ||
3ad82a7e ZX |
1538 | /* |
1539 | * Caculate mmu pages needed for kvm. | |
1540 | */ | |
1541 | unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm) | |
1542 | { | |
1543 | int i; | |
1544 | unsigned int nr_mmu_pages; | |
1545 | unsigned int nr_pages = 0; | |
1546 | ||
1547 | for (i = 0; i < kvm->nmemslots; i++) | |
1548 | nr_pages += kvm->memslots[i].npages; | |
1549 | ||
1550 | nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000; | |
1551 | nr_mmu_pages = max(nr_mmu_pages, | |
1552 | (unsigned int) KVM_MIN_ALLOC_MMU_PAGES); | |
1553 | ||
1554 | return nr_mmu_pages; | |
1555 | } | |
1556 | ||
37a7d8b0 AK |
1557 | #ifdef AUDIT |
1558 | ||
1559 | static const char *audit_msg; | |
1560 | ||
1561 | static gva_t canonicalize(gva_t gva) | |
1562 | { | |
1563 | #ifdef CONFIG_X86_64 | |
1564 | gva = (long long)(gva << 16) >> 16; | |
1565 | #endif | |
1566 | return gva; | |
1567 | } | |
1568 | ||
1569 | static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte, | |
1570 | gva_t va, int level) | |
1571 | { | |
1572 | u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK); | |
1573 | int i; | |
1574 | gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1)); | |
1575 | ||
1576 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) { | |
1577 | u64 ent = pt[i]; | |
1578 | ||
c7addb90 | 1579 | if (ent == shadow_trap_nonpresent_pte) |
37a7d8b0 AK |
1580 | continue; |
1581 | ||
1582 | va = canonicalize(va); | |
c7addb90 AK |
1583 | if (level > 1) { |
1584 | if (ent == shadow_notrap_nonpresent_pte) | |
1585 | printk(KERN_ERR "audit: (%s) nontrapping pte" | |
1586 | " in nonleaf level: levels %d gva %lx" | |
1587 | " level %d pte %llx\n", audit_msg, | |
1588 | vcpu->mmu.root_level, va, level, ent); | |
1589 | ||
37a7d8b0 | 1590 | audit_mappings_page(vcpu, ent, va, level - 1); |
c7addb90 | 1591 | } else { |
37a7d8b0 | 1592 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va); |
1d28f5f4 AK |
1593 | struct page *page = gpa_to_page(vcpu, gpa); |
1594 | hpa_t hpa = page_to_phys(page); | |
37a7d8b0 | 1595 | |
c7addb90 | 1596 | if (is_shadow_present_pte(ent) |
37a7d8b0 | 1597 | && (ent & PT64_BASE_ADDR_MASK) != hpa) |
c7addb90 AK |
1598 | printk(KERN_ERR "xx audit error: (%s) levels %d" |
1599 | " gva %lx gpa %llx hpa %llx ent %llx %d\n", | |
37a7d8b0 | 1600 | audit_msg, vcpu->mmu.root_level, |
d77c26fc MD |
1601 | va, gpa, hpa, ent, |
1602 | is_shadow_present_pte(ent)); | |
c7addb90 AK |
1603 | else if (ent == shadow_notrap_nonpresent_pte |
1604 | && !is_error_hpa(hpa)) | |
1605 | printk(KERN_ERR "audit: (%s) notrap shadow," | |
1606 | " valid guest gva %lx\n", audit_msg, va); | |
b4231d61 | 1607 | kvm_release_page_clean(page); |
c7addb90 | 1608 | |
37a7d8b0 AK |
1609 | } |
1610 | } | |
1611 | } | |
1612 | ||
1613 | static void audit_mappings(struct kvm_vcpu *vcpu) | |
1614 | { | |
1ea252af | 1615 | unsigned i; |
37a7d8b0 AK |
1616 | |
1617 | if (vcpu->mmu.root_level == 4) | |
1618 | audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4); | |
1619 | else | |
1620 | for (i = 0; i < 4; ++i) | |
1621 | if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK) | |
1622 | audit_mappings_page(vcpu, | |
1623 | vcpu->mmu.pae_root[i], | |
1624 | i << 30, | |
1625 | 2); | |
1626 | } | |
1627 | ||
1628 | static int count_rmaps(struct kvm_vcpu *vcpu) | |
1629 | { | |
1630 | int nmaps = 0; | |
1631 | int i, j, k; | |
1632 | ||
1633 | for (i = 0; i < KVM_MEMORY_SLOTS; ++i) { | |
1634 | struct kvm_memory_slot *m = &vcpu->kvm->memslots[i]; | |
1635 | struct kvm_rmap_desc *d; | |
1636 | ||
1637 | for (j = 0; j < m->npages; ++j) { | |
290fc38d | 1638 | unsigned long *rmapp = &m->rmap[j]; |
37a7d8b0 | 1639 | |
290fc38d | 1640 | if (!*rmapp) |
37a7d8b0 | 1641 | continue; |
290fc38d | 1642 | if (!(*rmapp & 1)) { |
37a7d8b0 AK |
1643 | ++nmaps; |
1644 | continue; | |
1645 | } | |
290fc38d | 1646 | d = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
37a7d8b0 AK |
1647 | while (d) { |
1648 | for (k = 0; k < RMAP_EXT; ++k) | |
1649 | if (d->shadow_ptes[k]) | |
1650 | ++nmaps; | |
1651 | else | |
1652 | break; | |
1653 | d = d->more; | |
1654 | } | |
1655 | } | |
1656 | } | |
1657 | return nmaps; | |
1658 | } | |
1659 | ||
1660 | static int count_writable_mappings(struct kvm_vcpu *vcpu) | |
1661 | { | |
1662 | int nmaps = 0; | |
4db35314 | 1663 | struct kvm_mmu_page *sp; |
37a7d8b0 AK |
1664 | int i; |
1665 | ||
4db35314 AK |
1666 | list_for_each_entry(sp, &vcpu->kvm->active_mmu_pages, link) { |
1667 | u64 *pt = sp->spt; | |
37a7d8b0 | 1668 | |
4db35314 | 1669 | if (sp->role.level != PT_PAGE_TABLE_LEVEL) |
37a7d8b0 AK |
1670 | continue; |
1671 | ||
1672 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
1673 | u64 ent = pt[i]; | |
1674 | ||
1675 | if (!(ent & PT_PRESENT_MASK)) | |
1676 | continue; | |
1677 | if (!(ent & PT_WRITABLE_MASK)) | |
1678 | continue; | |
1679 | ++nmaps; | |
1680 | } | |
1681 | } | |
1682 | return nmaps; | |
1683 | } | |
1684 | ||
1685 | static void audit_rmap(struct kvm_vcpu *vcpu) | |
1686 | { | |
1687 | int n_rmap = count_rmaps(vcpu); | |
1688 | int n_actual = count_writable_mappings(vcpu); | |
1689 | ||
1690 | if (n_rmap != n_actual) | |
1691 | printk(KERN_ERR "%s: (%s) rmap %d actual %d\n", | |
1692 | __FUNCTION__, audit_msg, n_rmap, n_actual); | |
1693 | } | |
1694 | ||
1695 | static void audit_write_protection(struct kvm_vcpu *vcpu) | |
1696 | { | |
4db35314 | 1697 | struct kvm_mmu_page *sp; |
290fc38d IE |
1698 | struct kvm_memory_slot *slot; |
1699 | unsigned long *rmapp; | |
1700 | gfn_t gfn; | |
37a7d8b0 | 1701 | |
4db35314 AK |
1702 | list_for_each_entry(sp, &vcpu->kvm->active_mmu_pages, link) { |
1703 | if (sp->role.metaphysical) | |
37a7d8b0 AK |
1704 | continue; |
1705 | ||
4db35314 AK |
1706 | slot = gfn_to_memslot(vcpu->kvm, sp->gfn); |
1707 | gfn = unalias_gfn(vcpu->kvm, sp->gfn); | |
290fc38d IE |
1708 | rmapp = &slot->rmap[gfn - slot->base_gfn]; |
1709 | if (*rmapp) | |
37a7d8b0 AK |
1710 | printk(KERN_ERR "%s: (%s) shadow page has writable" |
1711 | " mappings: gfn %lx role %x\n", | |
4db35314 AK |
1712 | __FUNCTION__, audit_msg, sp->gfn, |
1713 | sp->role.word); | |
37a7d8b0 AK |
1714 | } |
1715 | } | |
1716 | ||
1717 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) | |
1718 | { | |
1719 | int olddbg = dbg; | |
1720 | ||
1721 | dbg = 0; | |
1722 | audit_msg = msg; | |
1723 | audit_rmap(vcpu); | |
1724 | audit_write_protection(vcpu); | |
1725 | audit_mappings(vcpu); | |
1726 | dbg = olddbg; | |
1727 | } | |
1728 | ||
1729 | #endif |