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[PATCH] KVM: Simplify mmu_alloc_roots()
[mirror_ubuntu-artful-kernel.git] / drivers / kvm / svm.c
CommitLineData
6aa8b732
AK		 1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * AMD SVM support
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 *
8 * Authors:
9 * Yaniv Kamay <yaniv@qumranet.com>
10 * Avi Kivity <avi@qumranet.com>
11 *
12 * This work is licensed under the terms of the GNU GPL, version 2. See
13 * the COPYING file in the top-level directory.
14 *
15 */
16
17#include <linux/module.h>
18#include <linux/vmalloc.h>
19#include <linux/highmem.h>
20#include <asm/desc.h>
21
22#include "kvm_svm.h"
23#include "x86_emulate.h"
24
25MODULE_AUTHOR("Qumranet");
26MODULE_LICENSE("GPL");
27
28#define IOPM_ALLOC_ORDER 2
29#define MSRPM_ALLOC_ORDER 1
30
31#define DB_VECTOR 1
32#define UD_VECTOR 6
33#define GP_VECTOR 13
34
35#define DR7_GD_MASK (1 << 13)
36#define DR6_BD_MASK (1 << 13)
37#define CR4_DE_MASK (1UL << 3)
38
39#define SEG_TYPE_LDT 2
40#define SEG_TYPE_BUSY_TSS16 3
41
42#define KVM_EFER_LMA (1 << 10)
43#define KVM_EFER_LME (1 << 8)
44
45unsigned long iopm_base;
46unsigned long msrpm_base;
47
48struct kvm_ldttss_desc {
49 u16 limit0;
50 u16 base0;
51 unsigned base1 : 8, type : 5, dpl : 2, p : 1;
52 unsigned limit1 : 4, zero0 : 3, g : 1, base2 : 8;
53 u32 base3;
54 u32 zero1;
55} __attribute__((packed));
56
57struct svm_cpu_data {
58 int cpu;
59
60 uint64_t asid_generation;
61 uint32_t max_asid;
62 uint32_t next_asid;
63 struct kvm_ldttss_desc *tss_desc;
64
65 struct page *save_area;
66};
67
68static DEFINE_PER_CPU(struct svm_cpu_data *, svm_data);
69
70struct svm_init_data {
71 int cpu;
72 int r;
73};
74
75static u32 msrpm_ranges[] = {0, 0xc0000000, 0xc0010000};
76
77#define NUM_MSR_MAPS (sizeof(msrpm_ranges) / sizeof(*msrpm_ranges))
78#define MSRS_RANGE_SIZE 2048
79#define MSRS_IN_RANGE (MSRS_RANGE_SIZE * 8 / 2)
80
81#define MAX_INST_SIZE 15
82
83static unsigned get_addr_size(struct kvm_vcpu *vcpu)
84{
85 struct vmcb_save_area *sa = &vcpu->svm->vmcb->save;
86 u16 cs_attrib;
87
88 if (!(sa->cr0 & CR0_PE_MASK) || (sa->rflags & X86_EFLAGS_VM))
89 return 2;
90
91 cs_attrib = sa->cs.attrib;
92
93 return (cs_attrib & SVM_SELECTOR_L_MASK) ? 8 :
94 (cs_attrib & SVM_SELECTOR_DB_MASK) ? 4 : 2;
95}
96
97static inline u8 pop_irq(struct kvm_vcpu *vcpu)
98{
99 int word_index = __ffs(vcpu->irq_summary);
100 int bit_index = __ffs(vcpu->irq_pending[word_index]);
101 int irq = word_index * BITS_PER_LONG + bit_index;
102
103 clear_bit(bit_index, &vcpu->irq_pending[word_index]);
104 if (!vcpu->irq_pending[word_index])
105 clear_bit(word_index, &vcpu->irq_summary);
106 return irq;
107}
108
109static inline void push_irq(struct kvm_vcpu *vcpu, u8 irq)
110{
111 set_bit(irq, vcpu->irq_pending);
112 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
113}
114
115static inline void clgi(void)
116{
117 asm volatile (SVM_CLGI);
118}
119
120static inline void stgi(void)
121{
122 asm volatile (SVM_STGI);
123}
124
125static inline void invlpga(unsigned long addr, u32 asid)
126{
127 asm volatile (SVM_INVLPGA :: "a"(addr), "c"(asid));
128}
129
130static inline unsigned long kvm_read_cr2(void)
131{
132 unsigned long cr2;
133
134 asm volatile ("mov %%cr2, %0" : "=r" (cr2));
135 return cr2;
136}
137
138static inline void kvm_write_cr2(unsigned long val)
139{
140 asm volatile ("mov %0, %%cr2" :: "r" (val));
141}
142
143static inline unsigned long read_dr6(void)
144{
145 unsigned long dr6;
146
147 asm volatile ("mov %%dr6, %0" : "=r" (dr6));
148 return dr6;
149}
150
151static inline void write_dr6(unsigned long val)
152{
153 asm volatile ("mov %0, %%dr6" :: "r" (val));
154}
155
156static inline unsigned long read_dr7(void)
157{
158 unsigned long dr7;
159
160 asm volatile ("mov %%dr7, %0" : "=r" (dr7));
161 return dr7;
162}
163
164static inline void write_dr7(unsigned long val)
165{
166 asm volatile ("mov %0, %%dr7" :: "r" (val));
167}
168
6aa8b732
AK		 169static inline void force_new_asid(struct kvm_vcpu *vcpu)
170{
171 vcpu->svm->asid_generation--;
172}
173
174static inline void flush_guest_tlb(struct kvm_vcpu *vcpu)
175{
176 force_new_asid(vcpu);
177}
178
179static void svm_set_efer(struct kvm_vcpu *vcpu, u64 efer)
180{
181 if (!(efer & KVM_EFER_LMA))
182 efer &= ~KVM_EFER_LME;
183
184 vcpu->svm->vmcb->save.efer = efer | MSR_EFER_SVME_MASK;
185 vcpu->shadow_efer = efer;
186}
187
188static void svm_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
189{
190 vcpu->svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
191 SVM_EVTINJ_VALID_ERR |
192 SVM_EVTINJ_TYPE_EXEPT |
193 GP_VECTOR;
194 vcpu->svm->vmcb->control.event_inj_err = error_code;
195}
196
197static void inject_ud(struct kvm_vcpu *vcpu)
198{
199 vcpu->svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
200 SVM_EVTINJ_TYPE_EXEPT |
201 UD_VECTOR;
202}
203
204static void inject_db(struct kvm_vcpu *vcpu)
205{
206 vcpu->svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
207 SVM_EVTINJ_TYPE_EXEPT |
208 DB_VECTOR;
209}
210
211static int is_page_fault(uint32_t info)
212{
213 info &= SVM_EVTINJ_VEC_MASK | SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
214 return info == (PF_VECTOR | SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_EXEPT);
215}
216
217static int is_external_interrupt(u32 info)
218{
219 info &= SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
220 return info == (SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_INTR);
221}
222
223static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
224{
225 if (!vcpu->svm->next_rip) {
226 printk(KERN_DEBUG "%s: NOP\n", __FUNCTION__);
227 return;
228 }
229 if (vcpu->svm->next_rip - vcpu->svm->vmcb->save.rip > 15) {
230 printk(KERN_ERR "%s: ip 0x%llx next 0x%llx\n",
231 __FUNCTION__,
232 vcpu->svm->vmcb->save.rip,
233 vcpu->svm->next_rip);
234 }
235
236 vcpu->rip = vcpu->svm->vmcb->save.rip = vcpu->svm->next_rip;
237 vcpu->svm->vmcb->control.int_state &= ~SVM_INTERRUPT_SHADOW_MASK;
c1150d8c
DL		 238
239 vcpu->interrupt_window_open = 1;
6aa8b732
AK		 240}
241
242static int has_svm(void)
243{
244 uint32_t eax, ebx, ecx, edx;
245
1e885461 246 if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) {
6aa8b732
AK		 247 printk(KERN_INFO "has_svm: not amd\n");
248 return 0;
249 }
250
251 cpuid(0x80000000, &eax, &ebx, &ecx, &edx);
252 if (eax < SVM_CPUID_FUNC) {
253 printk(KERN_INFO "has_svm: can't execute cpuid_8000000a\n");
254 return 0;
255 }
256
257 cpuid(0x80000001, &eax, &ebx, &ecx, &edx);
258 if (!(ecx & (1 << SVM_CPUID_FEATURE_SHIFT))) {
259 printk(KERN_DEBUG "has_svm: svm not available\n");
260 return 0;
261 }
262 return 1;
263}
264
265static void svm_hardware_disable(void *garbage)
266{
267 struct svm_cpu_data *svm_data
268 = per_cpu(svm_data, raw_smp_processor_id());
269
270 if (svm_data) {
271 uint64_t efer;
272
273 wrmsrl(MSR_VM_HSAVE_PA, 0);
274 rdmsrl(MSR_EFER, efer);
275 wrmsrl(MSR_EFER, efer & ~MSR_EFER_SVME_MASK);
276 per_cpu(svm_data, raw_smp_processor_id()) = 0;
277 __free_page(svm_data->save_area);
278 kfree(svm_data);
279 }
280}
281
282static void svm_hardware_enable(void *garbage)
283{
284
285 struct svm_cpu_data *svm_data;
286 uint64_t efer;
05b3e0c2 287#ifdef CONFIG_X86_64
6aa8b732
AK		 288 struct desc_ptr gdt_descr;
289#else
290 struct Xgt_desc_struct gdt_descr;
291#endif
292 struct desc_struct *gdt;
293 int me = raw_smp_processor_id();
294
295 if (!has_svm()) {
296 printk(KERN_ERR "svm_cpu_init: err EOPNOTSUPP on %d\n", me);
297 return;
298 }
299 svm_data = per_cpu(svm_data, me);
300
301 if (!svm_data) {
302 printk(KERN_ERR "svm_cpu_init: svm_data is NULL on %d\n",
303 me);
304 return;
305 }
306
307 svm_data->asid_generation = 1;
308 svm_data->max_asid = cpuid_ebx(SVM_CPUID_FUNC) - 1;
309 svm_data->next_asid = svm_data->max_asid + 1;
310
311 asm volatile ( "sgdt %0" : "=m"(gdt_descr) );
312 gdt = (struct desc_struct *)gdt_descr.address;
313 svm_data->tss_desc = (struct kvm_ldttss_desc *)(gdt + GDT_ENTRY_TSS);
314
315 rdmsrl(MSR_EFER, efer);
316 wrmsrl(MSR_EFER, efer | MSR_EFER_SVME_MASK);
317
318 wrmsrl(MSR_VM_HSAVE_PA,
319 page_to_pfn(svm_data->save_area) << PAGE_SHIFT);
320}
321
322static int svm_cpu_init(int cpu)
323{
324 struct svm_cpu_data *svm_data;
325 int r;
326
327 svm_data = kzalloc(sizeof(struct svm_cpu_data), GFP_KERNEL);
328 if (!svm_data)
329 return -ENOMEM;
330 svm_data->cpu = cpu;
331 svm_data->save_area = alloc_page(GFP_KERNEL);
332 r = -ENOMEM;
333 if (!svm_data->save_area)
334 goto err_1;
335
336 per_cpu(svm_data, cpu) = svm_data;
337
338 return 0;
339
340err_1:
341 kfree(svm_data);
342 return r;
343
344}
345
346static int set_msr_interception(u32 *msrpm, unsigned msr,
347 int read, int write)
348{
349 int i;
350
351 for (i = 0; i < NUM_MSR_MAPS; i++) {
352 if (msr >= msrpm_ranges[i] &&
353 msr < msrpm_ranges[i] + MSRS_IN_RANGE) {
354 u32 msr_offset = (i * MSRS_IN_RANGE + msr -
355 msrpm_ranges[i]) * 2;
356
357 u32 *base = msrpm + (msr_offset / 32);
358 u32 msr_shift = msr_offset % 32;
359 u32 mask = ((write) ? 0 : 2) | ((read) ? 0 : 1);
360 *base = (*base & ~(0x3 << msr_shift)) |
361 (mask << msr_shift);
362 return 1;
363 }
364 }
365 printk(KERN_DEBUG "%s: not found 0x%x\n", __FUNCTION__, msr);
366 return 0;
367}
368
369static __init int svm_hardware_setup(void)
370{
371 int cpu;
372 struct page *iopm_pages;
373 struct page *msrpm_pages;
374 void *msrpm_va;
375 int r;
376
873a7c42 377 kvm_emulator_want_group7_invlpg();
6aa8b732
AK		 378
379 iopm_pages = alloc_pages(GFP_KERNEL, IOPM_ALLOC_ORDER);
380
381 if (!iopm_pages)
382 return -ENOMEM;
383 memset(page_address(iopm_pages), 0xff,
384 PAGE_SIZE * (1 << IOPM_ALLOC_ORDER));
385 iopm_base = page_to_pfn(iopm_pages) << PAGE_SHIFT;
386
387
388 msrpm_pages = alloc_pages(GFP_KERNEL, MSRPM_ALLOC_ORDER);
389
390 r = -ENOMEM;
391 if (!msrpm_pages)
392 goto err_1;
393
394 msrpm_va = page_address(msrpm_pages);
395 memset(msrpm_va, 0xff, PAGE_SIZE * (1 << MSRPM_ALLOC_ORDER));
396 msrpm_base = page_to_pfn(msrpm_pages) << PAGE_SHIFT;
397
05b3e0c2 398#ifdef CONFIG_X86_64
6aa8b732
AK		 399 set_msr_interception(msrpm_va, MSR_GS_BASE, 1, 1);
400 set_msr_interception(msrpm_va, MSR_FS_BASE, 1, 1);
401 set_msr_interception(msrpm_va, MSR_KERNEL_GS_BASE, 1, 1);
6aa8b732
AK		 402 set_msr_interception(msrpm_va, MSR_LSTAR, 1, 1);
403 set_msr_interception(msrpm_va, MSR_CSTAR, 1, 1);
404 set_msr_interception(msrpm_va, MSR_SYSCALL_MASK, 1, 1);
405#endif
0e859cac 406 set_msr_interception(msrpm_va, MSR_K6_STAR, 1, 1);
6aa8b732
AK		 407 set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_CS, 1, 1);
408 set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_ESP, 1, 1);
409 set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_EIP, 1, 1);
410
411 for_each_online_cpu(cpu) {
412 r = svm_cpu_init(cpu);
413 if (r)
414 goto err_2;
415 }
416 return 0;
417
418err_2:
419 __free_pages(msrpm_pages, MSRPM_ALLOC_ORDER);
420 msrpm_base = 0;
421err_1:
422 __free_pages(iopm_pages, IOPM_ALLOC_ORDER);
423 iopm_base = 0;
424 return r;
425}
426
427static __exit void svm_hardware_unsetup(void)
428{
429 __free_pages(pfn_to_page(msrpm_base >> PAGE_SHIFT), MSRPM_ALLOC_ORDER);
430 __free_pages(pfn_to_page(iopm_base >> PAGE_SHIFT), IOPM_ALLOC_ORDER);
431 iopm_base = msrpm_base = 0;
432}
433
434static void init_seg(struct vmcb_seg *seg)
435{
436 seg->selector = 0;
437 seg->attrib = SVM_SELECTOR_P_MASK | SVM_SELECTOR_S_MASK |
438 SVM_SELECTOR_WRITE_MASK; /* Read/Write Data Segment */
439 seg->limit = 0xffff;
440 seg->base = 0;
441}
442
443static void init_sys_seg(struct vmcb_seg *seg, uint32_t type)
444{
445 seg->selector = 0;
446 seg->attrib = SVM_SELECTOR_P_MASK | type;
447 seg->limit = 0xffff;
448 seg->base = 0;
449}
450
451static int svm_vcpu_setup(struct kvm_vcpu *vcpu)
452{
453 return 0;
454}
455
456static void init_vmcb(struct vmcb *vmcb)
457{
458 struct vmcb_control_area *control = &vmcb->control;
459 struct vmcb_save_area *save = &vmcb->save;
460 u64 tsc;
461
462 control->intercept_cr_read = INTERCEPT_CR0_MASK |
463 INTERCEPT_CR3_MASK |
464 INTERCEPT_CR4_MASK;
465
466 control->intercept_cr_write = INTERCEPT_CR0_MASK |
467 INTERCEPT_CR3_MASK |
468 INTERCEPT_CR4_MASK;
469
470 control->intercept_dr_read = INTERCEPT_DR0_MASK |
471 INTERCEPT_DR1_MASK |
472 INTERCEPT_DR2_MASK |
473 INTERCEPT_DR3_MASK;
474
475 control->intercept_dr_write = INTERCEPT_DR0_MASK |
476 INTERCEPT_DR1_MASK |
477 INTERCEPT_DR2_MASK |
478 INTERCEPT_DR3_MASK |
479 INTERCEPT_DR5_MASK |
480 INTERCEPT_DR7_MASK;
481
482 control->intercept_exceptions = 1 << PF_VECTOR;
483
484
485 control->intercept = (1ULL << INTERCEPT_INTR) |
486 (1ULL << INTERCEPT_NMI) |
487 /*
488 * selective cr0 intercept bug?
489 * 0: 0f 22 d8 mov %eax,%cr3
490 * 3: 0f 20 c0 mov %cr0,%eax
491 * 6: 0d 00 00 00 80 or $0x80000000,%eax
492 * b: 0f 22 c0 mov %eax,%cr0
493 * set cr3 ->interception
494 * get cr0 ->interception
495 * set cr0 -> no interception
496 */
497 /* (1ULL << INTERCEPT_SELECTIVE_CR0) | */
498 (1ULL << INTERCEPT_CPUID) |
499 (1ULL << INTERCEPT_HLT) |
6aa8b732
AK		 500 (1ULL << INTERCEPT_INVLPGA) |
501 (1ULL << INTERCEPT_IOIO_PROT) |
502 (1ULL << INTERCEPT_MSR_PROT) |
503 (1ULL << INTERCEPT_TASK_SWITCH) |
504 (1ULL << INTERCEPT_VMRUN) |
505 (1ULL << INTERCEPT_VMMCALL) |
506 (1ULL << INTERCEPT_VMLOAD) |
507 (1ULL << INTERCEPT_VMSAVE) |
508 (1ULL << INTERCEPT_STGI) |
509 (1ULL << INTERCEPT_CLGI) |
510 (1ULL << INTERCEPT_SKINIT);
511
512 control->iopm_base_pa = iopm_base;
513 control->msrpm_base_pa = msrpm_base;
514 rdtscll(tsc);
515 control->tsc_offset = -tsc;
516 control->int_ctl = V_INTR_MASKING_MASK;
517
518 init_seg(&save->es);
519 init_seg(&save->ss);
520 init_seg(&save->ds);
521 init_seg(&save->fs);
522 init_seg(&save->gs);
523
524 save->cs.selector = 0xf000;
525 /* Executable/Readable Code Segment */
526 save->cs.attrib = SVM_SELECTOR_READ_MASK | SVM_SELECTOR_P_MASK |
527 SVM_SELECTOR_S_MASK | SVM_SELECTOR_CODE_MASK;
528 save->cs.limit = 0xffff;
529 save->cs.base = 0xffff0000;
530
531 save->gdtr.limit = 0xffff;
532 save->idtr.limit = 0xffff;
533
534 init_sys_seg(&save->ldtr, SEG_TYPE_LDT);
535 init_sys_seg(&save->tr, SEG_TYPE_BUSY_TSS16);
536
537 save->efer = MSR_EFER_SVME_MASK;
538
539 save->dr6 = 0xffff0ff0;
540 save->dr7 = 0x400;
541 save->rflags = 2;
542 save->rip = 0x0000fff0;
543
544 /*
545 * cr0 val on cpu init should be 0x60000010, we enable cpu
546 * cache by default. the orderly way is to enable cache in bios.
547 */
548 save->cr0 = 0x00000010 | CR0_PG_MASK;
549 save->cr4 = CR4_PAE_MASK;
550 /* rdx = ?? */
551}
552
553static int svm_create_vcpu(struct kvm_vcpu *vcpu)
554{
555 struct page *page;
556 int r;
557
558 r = -ENOMEM;
559 vcpu->svm = kzalloc(sizeof *vcpu->svm, GFP_KERNEL);
560 if (!vcpu->svm)
561 goto out1;
562 page = alloc_page(GFP_KERNEL);
563 if (!page)
564 goto out2;
565
566 vcpu->svm->vmcb = page_address(page);
567 memset(vcpu->svm->vmcb, 0, PAGE_SIZE);
568 vcpu->svm->vmcb_pa = page_to_pfn(page) << PAGE_SHIFT;
569 vcpu->svm->cr0 = 0x00000010;
570 vcpu->svm->asid_generation = 0;
571 memset(vcpu->svm->db_regs, 0, sizeof(vcpu->svm->db_regs));
572 init_vmcb(vcpu->svm->vmcb);
573
36241b8c
AK		 574 fx_init(vcpu);
575
6aa8b732
AK		 576 return 0;
577
578out2:
579 kfree(vcpu->svm);
580out1:
581 return r;
582}
583
584static void svm_free_vcpu(struct kvm_vcpu *vcpu)
585{
586 if (!vcpu->svm)
587 return;
588 if (vcpu->svm->vmcb)
589 __free_page(pfn_to_page(vcpu->svm->vmcb_pa >> PAGE_SHIFT));
590 kfree(vcpu->svm);
591}
592
593static struct kvm_vcpu *svm_vcpu_load(struct kvm_vcpu *vcpu)
594{
595 get_cpu();
596 return vcpu;
597}
598
599static void svm_vcpu_put(struct kvm_vcpu *vcpu)
600{
601 put_cpu();
602}
603
604static void svm_cache_regs(struct kvm_vcpu *vcpu)
605{
606 vcpu->regs[VCPU_REGS_RAX] = vcpu->svm->vmcb->save.rax;
607 vcpu->regs[VCPU_REGS_RSP] = vcpu->svm->vmcb->save.rsp;
608 vcpu->rip = vcpu->svm->vmcb->save.rip;
609}
610
611static void svm_decache_regs(struct kvm_vcpu *vcpu)
612{
613 vcpu->svm->vmcb->save.rax = vcpu->regs[VCPU_REGS_RAX];
614 vcpu->svm->vmcb->save.rsp = vcpu->regs[VCPU_REGS_RSP];
615 vcpu->svm->vmcb->save.rip = vcpu->rip;
616}
617
618static unsigned long svm_get_rflags(struct kvm_vcpu *vcpu)
619{
620 return vcpu->svm->vmcb->save.rflags;
621}
622
623static void svm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
624{
625 vcpu->svm->vmcb->save.rflags = rflags;
626}
627
628static struct vmcb_seg *svm_seg(struct kvm_vcpu *vcpu, int seg)
629{
630 struct vmcb_save_area *save = &vcpu->svm->vmcb->save;
631
632 switch (seg) {
633 case VCPU_SREG_CS: return &save->cs;
634 case VCPU_SREG_DS: return &save->ds;
635 case VCPU_SREG_ES: return &save->es;
636 case VCPU_SREG_FS: return &save->fs;
637 case VCPU_SREG_GS: return &save->gs;
638 case VCPU_SREG_SS: return &save->ss;
639 case VCPU_SREG_TR: return &save->tr;
640 case VCPU_SREG_LDTR: return &save->ldtr;
641 }
642 BUG();
643 return 0;
644}
645
646static u64 svm_get_segment_base(struct kvm_vcpu *vcpu, int seg)
647{
648 struct vmcb_seg *s = svm_seg(vcpu, seg);
649
650 return s->base;
651}
652
653static void svm_get_segment(struct kvm_vcpu *vcpu,
654 struct kvm_segment *var, int seg)
655{
656 struct vmcb_seg *s = svm_seg(vcpu, seg);
657
658 var->base = s->base;
659 var->limit = s->limit;
660 var->selector = s->selector;
661 var->type = s->attrib & SVM_SELECTOR_TYPE_MASK;
662 var->s = (s->attrib >> SVM_SELECTOR_S_SHIFT) & 1;
663 var->dpl = (s->attrib >> SVM_SELECTOR_DPL_SHIFT) & 3;
664 var->present = (s->attrib >> SVM_SELECTOR_P_SHIFT) & 1;
665 var->avl = (s->attrib >> SVM_SELECTOR_AVL_SHIFT) & 1;
666 var->l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
667 var->db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
668 var->g = (s->attrib >> SVM_SELECTOR_G_SHIFT) & 1;
669 var->unusable = !var->present;
670}
671
672static void svm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
673{
674 struct vmcb_seg *s = svm_seg(vcpu, VCPU_SREG_CS);
675
676 *db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
677 *l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
678}
679
680static void svm_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
681{
682 dt->limit = vcpu->svm->vmcb->save.ldtr.limit;
683 dt->base = vcpu->svm->vmcb->save.ldtr.base;
684}
685
686static void svm_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
687{
688 vcpu->svm->vmcb->save.ldtr.limit = dt->limit;
689 vcpu->svm->vmcb->save.ldtr.base = dt->base ;
690}
691
692static void svm_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
693{
694 dt->limit = vcpu->svm->vmcb->save.gdtr.limit;
695 dt->base = vcpu->svm->vmcb->save.gdtr.base;
696}
697
698static void svm_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
699{
700 vcpu->svm->vmcb->save.gdtr.limit = dt->limit;
701 vcpu->svm->vmcb->save.gdtr.base = dt->base ;
702}
703
399badf3
AK		 704static void svm_decache_cr0_cr4_guest_bits(struct kvm_vcpu *vcpu)
705{
706}
707
6aa8b732
AK		 708static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
709{
05b3e0c2 710#ifdef CONFIG_X86_64
6aa8b732
AK		 711 if (vcpu->shadow_efer & KVM_EFER_LME) {
712 if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK)) {
713 vcpu->shadow_efer |= KVM_EFER_LMA;
714 vcpu->svm->vmcb->save.efer |= KVM_EFER_LMA | KVM_EFER_LME;
715 }
716
717 if (is_paging(vcpu) && !(cr0 & CR0_PG_MASK) ) {
718 vcpu->shadow_efer &= ~KVM_EFER_LMA;
719 vcpu->svm->vmcb->save.efer &= ~(KVM_EFER_LMA | KVM_EFER_LME);
720 }
721 }
722#endif
723 vcpu->svm->cr0 = cr0;
724 vcpu->svm->vmcb->save.cr0 = cr0 | CR0_PG_MASK;
725 vcpu->cr0 = cr0;
726}
727
728static void svm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
729{
730 vcpu->cr4 = cr4;
731 vcpu->svm->vmcb->save.cr4 = cr4 | CR4_PAE_MASK;
732}
733
734static void svm_set_segment(struct kvm_vcpu *vcpu,
735 struct kvm_segment *var, int seg)
736{
737 struct vmcb_seg *s = svm_seg(vcpu, seg);
738
739 s->base = var->base;
740 s->limit = var->limit;
741 s->selector = var->selector;
742 if (var->unusable)
743 s->attrib = 0;
744 else {
745 s->attrib = (var->type & SVM_SELECTOR_TYPE_MASK);
746 s->attrib |= (var->s & 1) << SVM_SELECTOR_S_SHIFT;
747 s->attrib |= (var->dpl & 3) << SVM_SELECTOR_DPL_SHIFT;
748 s->attrib |= (var->present & 1) << SVM_SELECTOR_P_SHIFT;
749 s->attrib |= (var->avl & 1) << SVM_SELECTOR_AVL_SHIFT;
750 s->attrib |= (var->l & 1) << SVM_SELECTOR_L_SHIFT;
751 s->attrib |= (var->db & 1) << SVM_SELECTOR_DB_SHIFT;
752 s->attrib |= (var->g & 1) << SVM_SELECTOR_G_SHIFT;
753 }
754 if (seg == VCPU_SREG_CS)
755 vcpu->svm->vmcb->save.cpl
756 = (vcpu->svm->vmcb->save.cs.attrib
757 >> SVM_SELECTOR_DPL_SHIFT) & 3;
758
759}
760
761/* FIXME:
762
763 vcpu->svm->vmcb->control.int_ctl &= ~V_TPR_MASK;
764 vcpu->svm->vmcb->control.int_ctl |= (sregs->cr8 & V_TPR_MASK);
765
766*/
767
768static int svm_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
769{
770 return -EOPNOTSUPP;
771}
772
773static void load_host_msrs(struct kvm_vcpu *vcpu)
774{
775 int i;
776
777 for ( i = 0; i < NR_HOST_SAVE_MSRS; i++)
778 wrmsrl(host_save_msrs[i], vcpu->svm->host_msrs[i]);
779}
780
781static void save_host_msrs(struct kvm_vcpu *vcpu)
782{
783 int i;
784
785 for ( i = 0; i < NR_HOST_SAVE_MSRS; i++)
786 rdmsrl(host_save_msrs[i], vcpu->svm->host_msrs[i]);
787}
788
789static void new_asid(struct kvm_vcpu *vcpu, struct svm_cpu_data *svm_data)
790{
791 if (svm_data->next_asid > svm_data->max_asid) {
792 ++svm_data->asid_generation;
793 svm_data->next_asid = 1;
794 vcpu->svm->vmcb->control.tlb_ctl = TLB_CONTROL_FLUSH_ALL_ASID;
795 }
796
797 vcpu->cpu = svm_data->cpu;
798 vcpu->svm->asid_generation = svm_data->asid_generation;
799 vcpu->svm->vmcb->control.asid = svm_data->next_asid++;
800}
801
802static void svm_invlpg(struct kvm_vcpu *vcpu, gva_t address)
803{
804 invlpga(address, vcpu->svm->vmcb->control.asid); // is needed?
805}
806
807static unsigned long svm_get_dr(struct kvm_vcpu *vcpu, int dr)
808{
809 return vcpu->svm->db_regs[dr];
810}
811
812static void svm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long value,
813 int *exception)
814{
815 *exception = 0;
816
817 if (vcpu->svm->vmcb->save.dr7 & DR7_GD_MASK) {
818 vcpu->svm->vmcb->save.dr7 &= ~DR7_GD_MASK;
819 vcpu->svm->vmcb->save.dr6 |= DR6_BD_MASK;
820 *exception = DB_VECTOR;
821 return;
822 }
823
824 switch (dr) {
825 case 0 ... 3:
826 vcpu->svm->db_regs[dr] = value;
827 return;
828 case 4 ... 5:
829 if (vcpu->cr4 & CR4_DE_MASK) {
830 *exception = UD_VECTOR;
831 return;
832 }
833 case 7: {
834 if (value & ~((1ULL << 32) - 1)) {
835 *exception = GP_VECTOR;
836 return;
837 }
838 vcpu->svm->vmcb->save.dr7 = value;
839 return;
840 }
841 default:
842 printk(KERN_DEBUG "%s: unexpected dr %u\n",
843 __FUNCTION__, dr);
844 *exception = UD_VECTOR;
845 return;
846 }
847}
848
849static int pf_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
850{
851 u32 exit_int_info = vcpu->svm->vmcb->control.exit_int_info;
852 u64 fault_address;
853 u32 error_code;
854 enum emulation_result er;
e2dec939 855 int r;
6aa8b732
AK		 856
857 if (is_external_interrupt(exit_int_info))
858 push_irq(vcpu, exit_int_info & SVM_EVTINJ_VEC_MASK);
859
860 spin_lock(&vcpu->kvm->lock);
861
862 fault_address = vcpu->svm->vmcb->control.exit_info_2;
863 error_code = vcpu->svm->vmcb->control.exit_info_1;
e2dec939
AK		 864 r = kvm_mmu_page_fault(vcpu, fault_address, error_code);
865 if (r < 0) {
866 spin_unlock(&vcpu->kvm->lock);
867 return r;
868 }
869 if (!r) {
6aa8b732
AK		 870 spin_unlock(&vcpu->kvm->lock);
871 return 1;
872 }
873 er = emulate_instruction(vcpu, kvm_run, fault_address, error_code);
874 spin_unlock(&vcpu->kvm->lock);
875
876 switch (er) {
877 case EMULATE_DONE:
878 return 1;
879 case EMULATE_DO_MMIO:
880 ++kvm_stat.mmio_exits;
881 kvm_run->exit_reason = KVM_EXIT_MMIO;
882 return 0;
883 case EMULATE_FAIL:
884 vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
885 break;
886 default:
887 BUG();
888 }
889
890 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
891 return 0;
892}
893
894static int io_get_override(struct kvm_vcpu *vcpu,
895 struct vmcb_seg **seg,
896 int *addr_override)
897{
898 u8 inst[MAX_INST_SIZE];
899 unsigned ins_length;
900 gva_t rip;
901 int i;
902
903 rip = vcpu->svm->vmcb->save.rip;
904 ins_length = vcpu->svm->next_rip - rip;
905 rip += vcpu->svm->vmcb->save.cs.base;
906
907 if (ins_length > MAX_INST_SIZE)
908 printk(KERN_DEBUG
909 "%s: inst length err, cs base 0x%llx rip 0x%llx "
910 "next rip 0x%llx ins_length %u\n",
911 __FUNCTION__,
912 vcpu->svm->vmcb->save.cs.base,
913 vcpu->svm->vmcb->save.rip,
914 vcpu->svm->vmcb->control.exit_info_2,
915 ins_length);
916
917 if (kvm_read_guest(vcpu, rip, ins_length, inst) != ins_length)
918 /* #PF */
919 return 0;
920
921 *addr_override = 0;
922 *seg = 0;
923 for (i = 0; i < ins_length; i++)
924 switch (inst[i]) {
925 case 0xf0:
926 case 0xf2:
927 case 0xf3:
928 case 0x66:
929 continue;
930 case 0x67:
931 *addr_override = 1;
932 continue;
933 case 0x2e:
934 *seg = &vcpu->svm->vmcb->save.cs;
935 continue;
936 case 0x36:
937 *seg = &vcpu->svm->vmcb->save.ss;
938 continue;
939 case 0x3e:
940 *seg = &vcpu->svm->vmcb->save.ds;
941 continue;
942 case 0x26:
943 *seg = &vcpu->svm->vmcb->save.es;
944 continue;
945 case 0x64:
946 *seg = &vcpu->svm->vmcb->save.fs;
947 continue;
948 case 0x65:
949 *seg = &vcpu->svm->vmcb->save.gs;
950 continue;
951 default:
952 return 1;
953 }
954 printk(KERN_DEBUG "%s: unexpected\n", __FUNCTION__);
955 return 0;
956}
957
958static unsigned long io_adress(struct kvm_vcpu *vcpu, int ins, u64 *address)
959{
960 unsigned long addr_mask;
961 unsigned long *reg;
962 struct vmcb_seg *seg;
963 int addr_override;
964 struct vmcb_save_area *save_area = &vcpu->svm->vmcb->save;
965 u16 cs_attrib = save_area->cs.attrib;
966 unsigned addr_size = get_addr_size(vcpu);
967
968 if (!io_get_override(vcpu, &seg, &addr_override))
969 return 0;
970
971 if (addr_override)
972 addr_size = (addr_size == 2) ? 4: (addr_size >> 1);
973
974 if (ins) {
975 reg = &vcpu->regs[VCPU_REGS_RDI];
976 seg = &vcpu->svm->vmcb->save.es;
977 } else {
978 reg = &vcpu->regs[VCPU_REGS_RSI];
979 seg = (seg) ? seg : &vcpu->svm->vmcb->save.ds;
980 }
981
982 addr_mask = ~0ULL >> (64 - (addr_size * 8));
983
984 if ((cs_attrib & SVM_SELECTOR_L_MASK) &&
985 !(vcpu->svm->vmcb->save.rflags & X86_EFLAGS_VM)) {
986 *address = (*reg & addr_mask);
987 return addr_mask;
988 }
989
990 if (!(seg->attrib & SVM_SELECTOR_P_SHIFT)) {
991 svm_inject_gp(vcpu, 0);
992 return 0;
993 }
994
995 *address = (*reg & addr_mask) + seg->base;
996 return addr_mask;
997}
998
999static int io_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1000{
1001 u32 io_info = vcpu->svm->vmcb->control.exit_info_1; //address size bug?
1002 int _in = io_info & SVM_IOIO_TYPE_MASK;
1003
1004 ++kvm_stat.io_exits;
1005
1006 vcpu->svm->next_rip = vcpu->svm->vmcb->control.exit_info_2;
1007
1008 kvm_run->exit_reason = KVM_EXIT_IO;
1009 kvm_run->io.port = io_info >> 16;
1010 kvm_run->io.direction = (_in) ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
1011 kvm_run->io.size = ((io_info & SVM_IOIO_SIZE_MASK) >> SVM_IOIO_SIZE_SHIFT);
1012 kvm_run->io.string = (io_info & SVM_IOIO_STR_MASK) != 0;
1013 kvm_run->io.rep = (io_info & SVM_IOIO_REP_MASK) != 0;
1014
1015 if (kvm_run->io.string) {
1016 unsigned addr_mask;
1017
1018 addr_mask = io_adress(vcpu, _in, &kvm_run->io.address);
1019 if (!addr_mask) {
1020 printk(KERN_DEBUG "%s: get io address failed\n", __FUNCTION__);
1021 return 1;
1022 }
1023
1024 if (kvm_run->io.rep) {
1025 kvm_run->io.count = vcpu->regs[VCPU_REGS_RCX] & addr_mask;
1026 kvm_run->io.string_down = (vcpu->svm->vmcb->save.rflags
1027 & X86_EFLAGS_DF) != 0;
1028 }
1029 } else {
1030 kvm_run->io.value = vcpu->svm->vmcb->save.rax;
1031 }
1032 return 0;
1033}
1034
1035
1036static int nop_on_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1037{
1038 return 1;
1039}
1040
1041static int halt_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1042{
1043 vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 1;
1044 skip_emulated_instruction(vcpu);
c1150d8c 1045 if (vcpu->irq_summary)
6aa8b732
AK		 1046 return 1;
1047
1048 kvm_run->exit_reason = KVM_EXIT_HLT;
c1150d8c 1049 ++kvm_stat.halt_exits;
6aa8b732
AK		 1050 return 0;
1051}
1052
1053static int invalid_op_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1054{
1055 inject_ud(vcpu);
1056 return 1;
1057}
1058
1059static int task_switch_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1060{
1061 printk(KERN_DEBUG "%s: task swiche is unsupported\n", __FUNCTION__);
1062 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1063 return 0;
1064}
1065
1066static int cpuid_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1067{
1068 vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1069 kvm_run->exit_reason = KVM_EXIT_CPUID;
1070 return 0;
1071}
1072
1073static int emulate_on_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1074{
1075 if (emulate_instruction(vcpu, 0, 0, 0) != EMULATE_DONE)
1076 printk(KERN_ERR "%s: failed\n", __FUNCTION__);
1077 return 1;
1078}
1079
1080static int svm_get_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 *data)
1081{
1082 switch (ecx) {
6aa8b732
AK		 1083 case MSR_IA32_TIME_STAMP_COUNTER: {
1084 u64 tsc;
1085
1086 rdtscll(tsc);
1087 *data = vcpu->svm->vmcb->control.tsc_offset + tsc;
1088 break;
1089 }
0e859cac 1090 case MSR_K6_STAR:
6aa8b732
AK		 1091 *data = vcpu->svm->vmcb->save.star;
1092 break;
0e859cac 1093#ifdef CONFIG_X86_64
6aa8b732
AK		 1094 case MSR_LSTAR:
1095 *data = vcpu->svm->vmcb->save.lstar;
1096 break;
1097 case MSR_CSTAR:
1098 *data = vcpu->svm->vmcb->save.cstar;
1099 break;
1100 case MSR_KERNEL_GS_BASE:
1101 *data = vcpu->svm->vmcb->save.kernel_gs_base;
1102 break;
1103 case MSR_SYSCALL_MASK:
1104 *data = vcpu->svm->vmcb->save.sfmask;
1105 break;
1106#endif
1107 case MSR_IA32_SYSENTER_CS:
1108 *data = vcpu->svm->vmcb->save.sysenter_cs;
1109 break;
1110 case MSR_IA32_SYSENTER_EIP:
1111 *data = vcpu->svm->vmcb->save.sysenter_eip;
1112 break;
1113 case MSR_IA32_SYSENTER_ESP:
1114 *data = vcpu->svm->vmcb->save.sysenter_esp;
1115 break;
1116 default:
3bab1f5d 1117 return kvm_get_msr_common(vcpu, ecx, data);
6aa8b732
AK		 1118 }
1119 return 0;
1120}
1121
1122static int rdmsr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1123{
1124 u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1125 u64 data;
1126
1127 if (svm_get_msr(vcpu, ecx, &data))
1128 svm_inject_gp(vcpu, 0);
1129 else {
1130 vcpu->svm->vmcb->save.rax = data & 0xffffffff;
1131 vcpu->regs[VCPU_REGS_RDX] = data >> 32;
1132 vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1133 skip_emulated_instruction(vcpu);
1134 }
1135 return 1;
1136}
1137
1138static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data)
1139{
1140 switch (ecx) {
6aa8b732
AK		 1141 case MSR_IA32_TIME_STAMP_COUNTER: {
1142 u64 tsc;
1143
1144 rdtscll(tsc);
1145 vcpu->svm->vmcb->control.tsc_offset = data - tsc;
1146 break;
1147 }
0e859cac 1148 case MSR_K6_STAR:
6aa8b732
AK		 1149 vcpu->svm->vmcb->save.star = data;
1150 break;
0e859cac 1151#ifdef CONFIG_X86_64_
6aa8b732
AK		 1152 case MSR_LSTAR:
1153 vcpu->svm->vmcb->save.lstar = data;
1154 break;
1155 case MSR_CSTAR:
1156 vcpu->svm->vmcb->save.cstar = data;
1157 break;
1158 case MSR_KERNEL_GS_BASE:
1159 vcpu->svm->vmcb->save.kernel_gs_base = data;
1160 break;
1161 case MSR_SYSCALL_MASK:
1162 vcpu->svm->vmcb->save.sfmask = data;
1163 break;
1164#endif
1165 case MSR_IA32_SYSENTER_CS:
1166 vcpu->svm->vmcb->save.sysenter_cs = data;
1167 break;
1168 case MSR_IA32_SYSENTER_EIP:
1169 vcpu->svm->vmcb->save.sysenter_eip = data;
1170 break;
1171 case MSR_IA32_SYSENTER_ESP:
1172 vcpu->svm->vmcb->save.sysenter_esp = data;
1173 break;
1174 default:
3bab1f5d 1175 return kvm_set_msr_common(vcpu, ecx, data);
6aa8b732
AK		 1176 }
1177 return 0;
1178}
1179
1180static int wrmsr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1181{
1182 u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1183 u64 data = (vcpu->svm->vmcb->save.rax & -1u)
1184 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1185 vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1186 if (svm_set_msr(vcpu, ecx, data))
1187 svm_inject_gp(vcpu, 0);
1188 else
1189 skip_emulated_instruction(vcpu);
1190 return 1;
1191}
1192
1193static int msr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1194{
1195 if (vcpu->svm->vmcb->control.exit_info_1)
1196 return wrmsr_interception(vcpu, kvm_run);
1197 else
1198 return rdmsr_interception(vcpu, kvm_run);
1199}
1200
c1150d8c
DL		 1201static int interrupt_window_interception(struct kvm_vcpu *vcpu,
1202 struct kvm_run *kvm_run)
1203{
1204 /*
1205 * If the user space waits to inject interrupts, exit as soon as
1206 * possible
1207 */
1208 if (kvm_run->request_interrupt_window &&
1209 !vcpu->irq_summary &&
1210 (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF)) {
1211 ++kvm_stat.irq_window_exits;
1212 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1213 return 0;
1214 }
1215
1216 return 1;
1217}
1218
6aa8b732
AK		 1219static int (*svm_exit_handlers[])(struct kvm_vcpu *vcpu,
1220 struct kvm_run *kvm_run) = {
1221 [SVM_EXIT_READ_CR0] = emulate_on_interception,
1222 [SVM_EXIT_READ_CR3] = emulate_on_interception,
1223 [SVM_EXIT_READ_CR4] = emulate_on_interception,
1224 /* for now: */
1225 [SVM_EXIT_WRITE_CR0] = emulate_on_interception,
1226 [SVM_EXIT_WRITE_CR3] = emulate_on_interception,
1227 [SVM_EXIT_WRITE_CR4] = emulate_on_interception,
1228 [SVM_EXIT_READ_DR0] = emulate_on_interception,
1229 [SVM_EXIT_READ_DR1] = emulate_on_interception,
1230 [SVM_EXIT_READ_DR2] = emulate_on_interception,
1231 [SVM_EXIT_READ_DR3] = emulate_on_interception,
1232 [SVM_EXIT_WRITE_DR0] = emulate_on_interception,
1233 [SVM_EXIT_WRITE_DR1] = emulate_on_interception,
1234 [SVM_EXIT_WRITE_DR2] = emulate_on_interception,
1235 [SVM_EXIT_WRITE_DR3] = emulate_on_interception,
1236 [SVM_EXIT_WRITE_DR5] = emulate_on_interception,
1237 [SVM_EXIT_WRITE_DR7] = emulate_on_interception,
1238 [SVM_EXIT_EXCP_BASE + PF_VECTOR] = pf_interception,
1239 [SVM_EXIT_INTR] = nop_on_interception,
1240 [SVM_EXIT_NMI] = nop_on_interception,
1241 [SVM_EXIT_SMI] = nop_on_interception,
1242 [SVM_EXIT_INIT] = nop_on_interception,
c1150d8c 1243 [SVM_EXIT_VINTR] = interrupt_window_interception,
6aa8b732
AK		 1244 /* [SVM_EXIT_CR0_SEL_WRITE] = emulate_on_interception, */
1245 [SVM_EXIT_CPUID] = cpuid_interception,
1246 [SVM_EXIT_HLT] = halt_interception,
1247 [SVM_EXIT_INVLPG] = emulate_on_interception,
1248 [SVM_EXIT_INVLPGA] = invalid_op_interception,
1249 [SVM_EXIT_IOIO] = io_interception,
1250 [SVM_EXIT_MSR] = msr_interception,
1251 [SVM_EXIT_TASK_SWITCH] = task_switch_interception,
1252 [SVM_EXIT_VMRUN] = invalid_op_interception,
1253 [SVM_EXIT_VMMCALL] = invalid_op_interception,
1254 [SVM_EXIT_VMLOAD] = invalid_op_interception,
1255 [SVM_EXIT_VMSAVE] = invalid_op_interception,
1256 [SVM_EXIT_STGI] = invalid_op_interception,
1257 [SVM_EXIT_CLGI] = invalid_op_interception,
1258 [SVM_EXIT_SKINIT] = invalid_op_interception,
1259};
1260
1261
1262static int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1263{
1264 u32 exit_code = vcpu->svm->vmcb->control.exit_code;
1265
1266 kvm_run->exit_type = KVM_EXIT_TYPE_VM_EXIT;
1267
1268 if (is_external_interrupt(vcpu->svm->vmcb->control.exit_int_info) &&
1269 exit_code != SVM_EXIT_EXCP_BASE + PF_VECTOR)
1270 printk(KERN_ERR "%s: unexpected exit_ini_info 0x%x "
1271 "exit_code 0x%x\n",
1272 __FUNCTION__, vcpu->svm->vmcb->control.exit_int_info,
1273 exit_code);
1274
1275 if (exit_code >= sizeof(svm_exit_handlers) / sizeof(*svm_exit_handlers)
1276 || svm_exit_handlers[exit_code] == 0) {
1277 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1278 printk(KERN_ERR "%s: 0x%x @ 0x%llx cr0 0x%lx rflags 0x%llx\n",
1279 __FUNCTION__,
1280 exit_code,
1281 vcpu->svm->vmcb->save.rip,
1282 vcpu->cr0,
1283 vcpu->svm->vmcb->save.rflags);
1284 return 0;
1285 }
1286
1287 return svm_exit_handlers[exit_code](vcpu, kvm_run);
1288}
1289
1290static void reload_tss(struct kvm_vcpu *vcpu)
1291{
1292 int cpu = raw_smp_processor_id();
1293
1294 struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1295 svm_data->tss_desc->type = 9; //available 32/64-bit TSS
1296 load_TR_desc();
1297}
1298
1299static void pre_svm_run(struct kvm_vcpu *vcpu)
1300{
1301 int cpu = raw_smp_processor_id();
1302
1303 struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1304
1305 vcpu->svm->vmcb->control.tlb_ctl = TLB_CONTROL_DO_NOTHING;
1306 if (vcpu->cpu != cpu ||
1307 vcpu->svm->asid_generation != svm_data->asid_generation)
1308 new_asid(vcpu, svm_data);
1309}
1310
1311
c1150d8c 1312static inline void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
6aa8b732
AK		 1313{
1314 struct vmcb_control_area *control;
1315
6aa8b732 1316 control = &vcpu->svm->vmcb->control;
6aa8b732
AK		 1317 control->int_vector = pop_irq(vcpu);
1318 control->int_ctl &= ~V_INTR_PRIO_MASK;
1319 control->int_ctl |= V_IRQ_MASK |
1320 ((/*control->int_vector >> 4*/ 0xf) << V_INTR_PRIO_SHIFT);
1321}
1322
1323static void kvm_reput_irq(struct kvm_vcpu *vcpu)
1324{
1325 struct vmcb_control_area *control = &vcpu->svm->vmcb->control;
1326
1327 if (control->int_ctl & V_IRQ_MASK) {
1328 control->int_ctl &= ~V_IRQ_MASK;
1329 push_irq(vcpu, control->int_vector);
1330 }
c1150d8c
DL		 1331
1332 vcpu->interrupt_window_open =
1333 !(control->int_state & SVM_INTERRUPT_SHADOW_MASK);
1334}
1335
1336static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1337 struct kvm_run *kvm_run)
1338{
1339 struct vmcb_control_area *control = &vcpu->svm->vmcb->control;
1340
1341 vcpu->interrupt_window_open =
1342 (!(control->int_state & SVM_INTERRUPT_SHADOW_MASK) &&
1343 (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF));
1344
1345 if (vcpu->interrupt_window_open && vcpu->irq_summary)
1346 /*
1347 * If interrupts enabled, and not blocked by sti or mov ss. Good.
1348 */
1349 kvm_do_inject_irq(vcpu);
1350
1351 /*
1352 * Interrupts blocked. Wait for unblock.
1353 */
1354 if (!vcpu->interrupt_window_open &&
1355 (vcpu->irq_summary || kvm_run->request_interrupt_window)) {
1356 control->intercept |= 1ULL << INTERCEPT_VINTR;
1357 } else
1358 control->intercept &= ~(1ULL << INTERCEPT_VINTR);
1359}
1360
1361static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1362 struct kvm_run *kvm_run)
1363{
1364 kvm_run->ready_for_interrupt_injection = (vcpu->interrupt_window_open &&
1365 vcpu->irq_summary == 0);
1366 kvm_run->if_flag = (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF) != 0;
1367 kvm_run->cr8 = vcpu->cr8;
1368 kvm_run->apic_base = vcpu->apic_base;
1369}
1370
1371/*
1372 * Check if userspace requested an interrupt window, and that the
1373 * interrupt window is open.
1374 *
1375 * No need to exit to userspace if we already have an interrupt queued.
1376 */
1377static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1378 struct kvm_run *kvm_run)
1379{
1380 return (!vcpu->irq_summary &&
1381 kvm_run->request_interrupt_window &&
1382 vcpu->interrupt_window_open &&
1383 (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF));
6aa8b732
AK		 1384}
1385
1386static void save_db_regs(unsigned long *db_regs)
1387{
5aff458e
AK		 1388 asm volatile ("mov %%dr0, %0" : "=r"(db_regs[0]));
1389 asm volatile ("mov %%dr1, %0" : "=r"(db_regs[1]));
1390 asm volatile ("mov %%dr2, %0" : "=r"(db_regs[2]));
1391 asm volatile ("mov %%dr3, %0" : "=r"(db_regs[3]));
6aa8b732
AK		 1392}
1393
1394static void load_db_regs(unsigned long *db_regs)
1395{
5aff458e
AK		 1396 asm volatile ("mov %0, %%dr0" : : "r"(db_regs[0]));
1397 asm volatile ("mov %0, %%dr1" : : "r"(db_regs[1]));
1398 asm volatile ("mov %0, %%dr2" : : "r"(db_regs[2]));
1399 asm volatile ("mov %0, %%dr3" : : "r"(db_regs[3]));
6aa8b732
AK		 1400}
1401
1402static int svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1403{
1404 u16 fs_selector;
1405 u16 gs_selector;
1406 u16 ldt_selector;
e2dec939 1407 int r;
6aa8b732
AK		 1408
1409again:
c1150d8c 1410 do_interrupt_requests(vcpu, kvm_run);
6aa8b732
AK		 1411
1412 clgi();
1413
1414 pre_svm_run(vcpu);
1415
1416 save_host_msrs(vcpu);
1417 fs_selector = read_fs();
1418 gs_selector = read_gs();
1419 ldt_selector = read_ldt();
1420 vcpu->svm->host_cr2 = kvm_read_cr2();
1421 vcpu->svm->host_dr6 = read_dr6();
1422 vcpu->svm->host_dr7 = read_dr7();
1423 vcpu->svm->vmcb->save.cr2 = vcpu->cr2;
1424
1425 if (vcpu->svm->vmcb->save.dr7 & 0xff) {
1426 write_dr7(0);
1427 save_db_regs(vcpu->svm->host_db_regs);
1428 load_db_regs(vcpu->svm->db_regs);
1429 }
36241b8c
AK		 1430
1431 fx_save(vcpu->host_fx_image);
1432 fx_restore(vcpu->guest_fx_image);
1433
6aa8b732 1434 asm volatile (
05b3e0c2 1435#ifdef CONFIG_X86_64
6aa8b732
AK		 1436 "push %%rbx; push %%rcx; push %%rdx;"
1437 "push %%rsi; push %%rdi; push %%rbp;"
1438 "push %%r8; push %%r9; push %%r10; push %%r11;"
1439 "push %%r12; push %%r13; push %%r14; push %%r15;"
1440#else
1441 "push %%ebx; push %%ecx; push %%edx;"
1442 "push %%esi; push %%edi; push %%ebp;"
1443#endif
1444
05b3e0c2 1445#ifdef CONFIG_X86_64
6aa8b732
AK		 1446 "mov %c[rbx](%[vcpu]), %%rbx \n\t"
1447 "mov %c[rcx](%[vcpu]), %%rcx \n\t"
1448 "mov %c[rdx](%[vcpu]), %%rdx \n\t"
1449 "mov %c[rsi](%[vcpu]), %%rsi \n\t"
1450 "mov %c[rdi](%[vcpu]), %%rdi \n\t"
1451 "mov %c[rbp](%[vcpu]), %%rbp \n\t"
1452 "mov %c[r8](%[vcpu]), %%r8 \n\t"
1453 "mov %c[r9](%[vcpu]), %%r9 \n\t"
1454 "mov %c[r10](%[vcpu]), %%r10 \n\t"
1455 "mov %c[r11](%[vcpu]), %%r11 \n\t"
1456 "mov %c[r12](%[vcpu]), %%r12 \n\t"
1457 "mov %c[r13](%[vcpu]), %%r13 \n\t"
1458 "mov %c[r14](%[vcpu]), %%r14 \n\t"
1459 "mov %c[r15](%[vcpu]), %%r15 \n\t"
1460#else
1461 "mov %c[rbx](%[vcpu]), %%ebx \n\t"
1462 "mov %c[rcx](%[vcpu]), %%ecx \n\t"
1463 "mov %c[rdx](%[vcpu]), %%edx \n\t"
1464 "mov %c[rsi](%[vcpu]), %%esi \n\t"
1465 "mov %c[rdi](%[vcpu]), %%edi \n\t"
1466 "mov %c[rbp](%[vcpu]), %%ebp \n\t"
1467#endif
1468
05b3e0c2 1469#ifdef CONFIG_X86_64
6aa8b732
AK		 1470 /* Enter guest mode */
1471 "push %%rax \n\t"
1472 "mov %c[svm](%[vcpu]), %%rax \n\t"
1473 "mov %c[vmcb](%%rax), %%rax \n\t"
1474 SVM_VMLOAD "\n\t"
1475 SVM_VMRUN "\n\t"
1476 SVM_VMSAVE "\n\t"
1477 "pop %%rax \n\t"
1478#else
1479 /* Enter guest mode */
1480 "push %%eax \n\t"
1481 "mov %c[svm](%[vcpu]), %%eax \n\t"
1482 "mov %c[vmcb](%%eax), %%eax \n\t"
1483 SVM_VMLOAD "\n\t"
1484 SVM_VMRUN "\n\t"
1485 SVM_VMSAVE "\n\t"
1486 "pop %%eax \n\t"
1487#endif
1488
1489 /* Save guest registers, load host registers */
05b3e0c2 1490#ifdef CONFIG_X86_64
6aa8b732
AK		 1491 "mov %%rbx, %c[rbx](%[vcpu]) \n\t"
1492 "mov %%rcx, %c[rcx](%[vcpu]) \n\t"
1493 "mov %%rdx, %c[rdx](%[vcpu]) \n\t"
1494 "mov %%rsi, %c[rsi](%[vcpu]) \n\t"
1495 "mov %%rdi, %c[rdi](%[vcpu]) \n\t"
1496 "mov %%rbp, %c[rbp](%[vcpu]) \n\t"
1497 "mov %%r8, %c[r8](%[vcpu]) \n\t"
1498 "mov %%r9, %c[r9](%[vcpu]) \n\t"
1499 "mov %%r10, %c[r10](%[vcpu]) \n\t"
1500 "mov %%r11, %c[r11](%[vcpu]) \n\t"
1501 "mov %%r12, %c[r12](%[vcpu]) \n\t"
1502 "mov %%r13, %c[r13](%[vcpu]) \n\t"
1503 "mov %%r14, %c[r14](%[vcpu]) \n\t"
1504 "mov %%r15, %c[r15](%[vcpu]) \n\t"
1505
1506 "pop %%r15; pop %%r14; pop %%r13; pop %%r12;"
1507 "pop %%r11; pop %%r10; pop %%r9; pop %%r8;"
1508 "pop %%rbp; pop %%rdi; pop %%rsi;"
1509 "pop %%rdx; pop %%rcx; pop %%rbx; \n\t"
1510#else
1511 "mov %%ebx, %c[rbx](%[vcpu]) \n\t"
1512 "mov %%ecx, %c[rcx](%[vcpu]) \n\t"
1513 "mov %%edx, %c[rdx](%[vcpu]) \n\t"
1514 "mov %%esi, %c[rsi](%[vcpu]) \n\t"
1515 "mov %%edi, %c[rdi](%[vcpu]) \n\t"
1516 "mov %%ebp, %c[rbp](%[vcpu]) \n\t"
1517
1518 "pop %%ebp; pop %%edi; pop %%esi;"
1519 "pop %%edx; pop %%ecx; pop %%ebx; \n\t"
1520#endif
1521 :
1522 : [vcpu]"a"(vcpu),
1523 [svm]"i"(offsetof(struct kvm_vcpu, svm)),
1524 [vmcb]"i"(offsetof(struct vcpu_svm, vmcb_pa)),
1525 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
1526 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
1527 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
1528 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
1529 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
1530 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP]))
05b3e0c2 1531#ifdef CONFIG_X86_64
6aa8b732
AK		 1532 ,[r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
1533 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
1534 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
1535 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
1536 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
1537 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
1538 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
1539 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15]))
1540#endif
1541 : "cc", "memory" );
1542
36241b8c
AK		 1543 fx_save(vcpu->guest_fx_image);
1544 fx_restore(vcpu->host_fx_image);
1545
6aa8b732
AK		 1546 if ((vcpu->svm->vmcb->save.dr7 & 0xff))
1547 load_db_regs(vcpu->svm->host_db_regs);
1548
1549 vcpu->cr2 = vcpu->svm->vmcb->save.cr2;
1550
1551 write_dr6(vcpu->svm->host_dr6);
1552 write_dr7(vcpu->svm->host_dr7);
1553 kvm_write_cr2(vcpu->svm->host_cr2);
1554
1555 load_fs(fs_selector);
1556 load_gs(gs_selector);
1557 load_ldt(ldt_selector);
1558 load_host_msrs(vcpu);
1559
1560 reload_tss(vcpu);
1561
1562 stgi();
1563
1564 kvm_reput_irq(vcpu);
1565
1566 vcpu->svm->next_rip = 0;
1567
1568 if (vcpu->svm->vmcb->control.exit_code == SVM_EXIT_ERR) {
1569 kvm_run->exit_type = KVM_EXIT_TYPE_FAIL_ENTRY;
1570 kvm_run->exit_reason = vcpu->svm->vmcb->control.exit_code;
c1150d8c 1571 post_kvm_run_save(vcpu, kvm_run);
6aa8b732
AK		 1572 return 0;
1573 }
1574
e2dec939
AK		 1575 r = handle_exit(vcpu, kvm_run);
1576 if (r > 0) {
6aa8b732
AK		 1577 if (signal_pending(current)) {
1578 ++kvm_stat.signal_exits;
c1150d8c
DL		 1579 post_kvm_run_save(vcpu, kvm_run);
1580 return -EINTR;
1581 }
1582
1583 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
1584 ++kvm_stat.request_irq_exits;
1585 post_kvm_run_save(vcpu, kvm_run);
6aa8b732
AK		 1586 return -EINTR;
1587 }
1588 kvm_resched(vcpu);
1589 goto again;
1590 }
c1150d8c 1591 post_kvm_run_save(vcpu, kvm_run);
e2dec939 1592 return r;
6aa8b732
AK		 1593}
1594
1595static void svm_flush_tlb(struct kvm_vcpu *vcpu)
1596{
1597 force_new_asid(vcpu);
1598}
1599
1600static void svm_set_cr3(struct kvm_vcpu *vcpu, unsigned long root)
1601{
1602 vcpu->svm->vmcb->save.cr3 = root;
1603 force_new_asid(vcpu);
1604}
1605
1606static void svm_inject_page_fault(struct kvm_vcpu *vcpu,
1607 unsigned long addr,
1608 uint32_t err_code)
1609{
1610 uint32_t exit_int_info = vcpu->svm->vmcb->control.exit_int_info;
1611
1612 ++kvm_stat.pf_guest;
1613
1614 if (is_page_fault(exit_int_info)) {
1615
1616 vcpu->svm->vmcb->control.event_inj_err = 0;
1617 vcpu->svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
1618 SVM_EVTINJ_VALID_ERR |
1619 SVM_EVTINJ_TYPE_EXEPT |
1620 DF_VECTOR;
1621 return;
1622 }
1623 vcpu->cr2 = addr;
1624 vcpu->svm->vmcb->save.cr2 = addr;
1625 vcpu->svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
1626 SVM_EVTINJ_VALID_ERR |
1627 SVM_EVTINJ_TYPE_EXEPT |
1628 PF_VECTOR;
1629 vcpu->svm->vmcb->control.event_inj_err = err_code;
1630}
1631
1632
1633static int is_disabled(void)
1634{
1635 return 0;
1636}
1637
1638static struct kvm_arch_ops svm_arch_ops = {
1639 .cpu_has_kvm_support = has_svm,
1640 .disabled_by_bios = is_disabled,
1641 .hardware_setup = svm_hardware_setup,
1642 .hardware_unsetup = svm_hardware_unsetup,
1643 .hardware_enable = svm_hardware_enable,
1644 .hardware_disable = svm_hardware_disable,
1645
1646 .vcpu_create = svm_create_vcpu,
1647 .vcpu_free = svm_free_vcpu,
1648
1649 .vcpu_load = svm_vcpu_load,
1650 .vcpu_put = svm_vcpu_put,
1651
1652 .set_guest_debug = svm_guest_debug,
1653 .get_msr = svm_get_msr,
1654 .set_msr = svm_set_msr,
1655 .get_segment_base = svm_get_segment_base,
1656 .get_segment = svm_get_segment,
1657 .set_segment = svm_set_segment,
6aa8b732 1658 .get_cs_db_l_bits = svm_get_cs_db_l_bits,
399badf3 1659 .decache_cr0_cr4_guest_bits = svm_decache_cr0_cr4_guest_bits,
6aa8b732
AK		 1660 .set_cr0 = svm_set_cr0,
1661 .set_cr0_no_modeswitch = svm_set_cr0,
1662 .set_cr3 = svm_set_cr3,
1663 .set_cr4 = svm_set_cr4,
1664 .set_efer = svm_set_efer,
1665 .get_idt = svm_get_idt,
1666 .set_idt = svm_set_idt,
1667 .get_gdt = svm_get_gdt,
1668 .set_gdt = svm_set_gdt,
1669 .get_dr = svm_get_dr,
1670 .set_dr = svm_set_dr,
1671 .cache_regs = svm_cache_regs,
1672 .decache_regs = svm_decache_regs,
1673 .get_rflags = svm_get_rflags,
1674 .set_rflags = svm_set_rflags,
1675
1676 .invlpg = svm_invlpg,
1677 .tlb_flush = svm_flush_tlb,
1678 .inject_page_fault = svm_inject_page_fault,
1679
1680 .inject_gp = svm_inject_gp,
1681
1682 .run = svm_vcpu_run,
1683 .skip_emulated_instruction = skip_emulated_instruction,
1684 .vcpu_setup = svm_vcpu_setup,
1685};
1686
1687static int __init svm_init(void)
1688{
873a7c42 1689 return kvm_init_arch(&svm_arch_ops, THIS_MODULE);
6aa8b732
AK		 1690}
1691
1692static void __exit svm_exit(void)
1693{
1694 kvm_exit_arch();
1695}
1696
1697module_init(svm_init)
1698module_exit(svm_exit)
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