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[PATCH] Update the rtc-rs5c372 driver
[mirror_ubuntu-bionic-kernel.git] / drivers / kvm / svm.c
CommitLineData
6aa8b732
AK		 1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * AMD SVM support
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 *
8 * Authors:
9 * Yaniv Kamay <yaniv@qumranet.com>
10 * Avi Kivity <avi@qumranet.com>
11 *
12 * This work is licensed under the terms of the GNU GPL, version 2. See
13 * the COPYING file in the top-level directory.
14 *
15 */
16
17#include <linux/module.h>
18#include <linux/vmalloc.h>
19#include <linux/highmem.h>
20#include <asm/desc.h>
21
22#include "kvm_svm.h"
23#include "x86_emulate.h"
24
25MODULE_AUTHOR("Qumranet");
26MODULE_LICENSE("GPL");
27
28#define IOPM_ALLOC_ORDER 2
29#define MSRPM_ALLOC_ORDER 1
30
31#define DB_VECTOR 1
32#define UD_VECTOR 6
33#define GP_VECTOR 13
34
35#define DR7_GD_MASK (1 << 13)
36#define DR6_BD_MASK (1 << 13)
37#define CR4_DE_MASK (1UL << 3)
38
39#define SEG_TYPE_LDT 2
40#define SEG_TYPE_BUSY_TSS16 3
41
42#define KVM_EFER_LMA (1 << 10)
43#define KVM_EFER_LME (1 << 8)
44
45unsigned long iopm_base;
46unsigned long msrpm_base;
47
48struct kvm_ldttss_desc {
49 u16 limit0;
50 u16 base0;
51 unsigned base1 : 8, type : 5, dpl : 2, p : 1;
52 unsigned limit1 : 4, zero0 : 3, g : 1, base2 : 8;
53 u32 base3;
54 u32 zero1;
55} __attribute__((packed));
56
57struct svm_cpu_data {
58 int cpu;
59
60 uint64_t asid_generation;
61 uint32_t max_asid;
62 uint32_t next_asid;
63 struct kvm_ldttss_desc *tss_desc;
64
65 struct page *save_area;
66};
67
68static DEFINE_PER_CPU(struct svm_cpu_data *, svm_data);
69
70struct svm_init_data {
71 int cpu;
72 int r;
73};
74
75static u32 msrpm_ranges[] = {0, 0xc0000000, 0xc0010000};
76
77#define NUM_MSR_MAPS (sizeof(msrpm_ranges) / sizeof(*msrpm_ranges))
78#define MSRS_RANGE_SIZE 2048
79#define MSRS_IN_RANGE (MSRS_RANGE_SIZE * 8 / 2)
80
81#define MAX_INST_SIZE 15
82
83static unsigned get_addr_size(struct kvm_vcpu *vcpu)
84{
85 struct vmcb_save_area *sa = &vcpu->svm->vmcb->save;
86 u16 cs_attrib;
87
88 if (!(sa->cr0 & CR0_PE_MASK) || (sa->rflags & X86_EFLAGS_VM))
89 return 2;
90
91 cs_attrib = sa->cs.attrib;
92
93 return (cs_attrib & SVM_SELECTOR_L_MASK) ? 8 :
94 (cs_attrib & SVM_SELECTOR_DB_MASK) ? 4 : 2;
95}
96
97static inline u8 pop_irq(struct kvm_vcpu *vcpu)
98{
99 int word_index = __ffs(vcpu->irq_summary);
100 int bit_index = __ffs(vcpu->irq_pending[word_index]);
101 int irq = word_index * BITS_PER_LONG + bit_index;
102
103 clear_bit(bit_index, &vcpu->irq_pending[word_index]);
104 if (!vcpu->irq_pending[word_index])
105 clear_bit(word_index, &vcpu->irq_summary);
106 return irq;
107}
108
109static inline void push_irq(struct kvm_vcpu *vcpu, u8 irq)
110{
111 set_bit(irq, vcpu->irq_pending);
112 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
113}
114
115static inline void clgi(void)
116{
117 asm volatile (SVM_CLGI);
118}
119
120static inline void stgi(void)
121{
122 asm volatile (SVM_STGI);
123}
124
125static inline void invlpga(unsigned long addr, u32 asid)
126{
127 asm volatile (SVM_INVLPGA :: "a"(addr), "c"(asid));
128}
129
130static inline unsigned long kvm_read_cr2(void)
131{
132 unsigned long cr2;
133
134 asm volatile ("mov %%cr2, %0" : "=r" (cr2));
135 return cr2;
136}
137
138static inline void kvm_write_cr2(unsigned long val)
139{
140 asm volatile ("mov %0, %%cr2" :: "r" (val));
141}
142
143static inline unsigned long read_dr6(void)
144{
145 unsigned long dr6;
146
147 asm volatile ("mov %%dr6, %0" : "=r" (dr6));
148 return dr6;
149}
150
151static inline void write_dr6(unsigned long val)
152{
153 asm volatile ("mov %0, %%dr6" :: "r" (val));
154}
155
156static inline unsigned long read_dr7(void)
157{
158 unsigned long dr7;
159
160 asm volatile ("mov %%dr7, %0" : "=r" (dr7));
161 return dr7;
162}
163
164static inline void write_dr7(unsigned long val)
165{
166 asm volatile ("mov %0, %%dr7" :: "r" (val));
167}
168
6aa8b732
AK		 169static inline void force_new_asid(struct kvm_vcpu *vcpu)
170{
171 vcpu->svm->asid_generation--;
172}
173
174static inline void flush_guest_tlb(struct kvm_vcpu *vcpu)
175{
176 force_new_asid(vcpu);
177}
178
179static void svm_set_efer(struct kvm_vcpu *vcpu, u64 efer)
180{
181 if (!(efer & KVM_EFER_LMA))
182 efer &= ~KVM_EFER_LME;
183
184 vcpu->svm->vmcb->save.efer = efer | MSR_EFER_SVME_MASK;
185 vcpu->shadow_efer = efer;
186}
187
188static void svm_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
189{
190 vcpu->svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
191 SVM_EVTINJ_VALID_ERR |
192 SVM_EVTINJ_TYPE_EXEPT |
193 GP_VECTOR;
194 vcpu->svm->vmcb->control.event_inj_err = error_code;
195}
196
197static void inject_ud(struct kvm_vcpu *vcpu)
198{
199 vcpu->svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
200 SVM_EVTINJ_TYPE_EXEPT |
201 UD_VECTOR;
202}
203
204static void inject_db(struct kvm_vcpu *vcpu)
205{
206 vcpu->svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
207 SVM_EVTINJ_TYPE_EXEPT |
208 DB_VECTOR;
209}
210
211static int is_page_fault(uint32_t info)
212{
213 info &= SVM_EVTINJ_VEC_MASK | SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
214 return info == (PF_VECTOR | SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_EXEPT);
215}
216
217static int is_external_interrupt(u32 info)
218{
219 info &= SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
220 return info == (SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_INTR);
221}
222
223static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
224{
225 if (!vcpu->svm->next_rip) {
226 printk(KERN_DEBUG "%s: NOP\n", __FUNCTION__);
227 return;
228 }
229 if (vcpu->svm->next_rip - vcpu->svm->vmcb->save.rip > 15) {
230 printk(KERN_ERR "%s: ip 0x%llx next 0x%llx\n",
231 __FUNCTION__,
232 vcpu->svm->vmcb->save.rip,
233 vcpu->svm->next_rip);
234 }
235
236 vcpu->rip = vcpu->svm->vmcb->save.rip = vcpu->svm->next_rip;
237 vcpu->svm->vmcb->control.int_state &= ~SVM_INTERRUPT_SHADOW_MASK;
c1150d8c
DL		 238
239 vcpu->interrupt_window_open = 1;
6aa8b732
AK		 240}
241
242static int has_svm(void)
243{
244 uint32_t eax, ebx, ecx, edx;
245
1e885461 246 if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) {
6aa8b732
AK		 247 printk(KERN_INFO "has_svm: not amd\n");
248 return 0;
249 }
250
251 cpuid(0x80000000, &eax, &ebx, &ecx, &edx);
252 if (eax < SVM_CPUID_FUNC) {
253 printk(KERN_INFO "has_svm: can't execute cpuid_8000000a\n");
254 return 0;
255 }
256
257 cpuid(0x80000001, &eax, &ebx, &ecx, &edx);
258 if (!(ecx & (1 << SVM_CPUID_FEATURE_SHIFT))) {
259 printk(KERN_DEBUG "has_svm: svm not available\n");
260 return 0;
261 }
262 return 1;
263}
264
265static void svm_hardware_disable(void *garbage)
266{
267 struct svm_cpu_data *svm_data
268 = per_cpu(svm_data, raw_smp_processor_id());
269
270 if (svm_data) {
271 uint64_t efer;
272
273 wrmsrl(MSR_VM_HSAVE_PA, 0);
274 rdmsrl(MSR_EFER, efer);
275 wrmsrl(MSR_EFER, efer & ~MSR_EFER_SVME_MASK);
276 per_cpu(svm_data, raw_smp_processor_id()) = 0;
277 __free_page(svm_data->save_area);
278 kfree(svm_data);
279 }
280}
281
282static void svm_hardware_enable(void *garbage)
283{
284
285 struct svm_cpu_data *svm_data;
286 uint64_t efer;
05b3e0c2 287#ifdef CONFIG_X86_64
6aa8b732
AK		 288 struct desc_ptr gdt_descr;
289#else
290 struct Xgt_desc_struct gdt_descr;
291#endif
292 struct desc_struct *gdt;
293 int me = raw_smp_processor_id();
294
295 if (!has_svm()) {
296 printk(KERN_ERR "svm_cpu_init: err EOPNOTSUPP on %d\n", me);
297 return;
298 }
299 svm_data = per_cpu(svm_data, me);
300
301 if (!svm_data) {
302 printk(KERN_ERR "svm_cpu_init: svm_data is NULL on %d\n",
303 me);
304 return;
305 }
306
307 svm_data->asid_generation = 1;
308 svm_data->max_asid = cpuid_ebx(SVM_CPUID_FUNC) - 1;
309 svm_data->next_asid = svm_data->max_asid + 1;
310
311 asm volatile ( "sgdt %0" : "=m"(gdt_descr) );
312 gdt = (struct desc_struct *)gdt_descr.address;
313 svm_data->tss_desc = (struct kvm_ldttss_desc *)(gdt + GDT_ENTRY_TSS);
314
315 rdmsrl(MSR_EFER, efer);
316 wrmsrl(MSR_EFER, efer | MSR_EFER_SVME_MASK);
317
318 wrmsrl(MSR_VM_HSAVE_PA,
319 page_to_pfn(svm_data->save_area) << PAGE_SHIFT);
320}
321
322static int svm_cpu_init(int cpu)
323{
324 struct svm_cpu_data *svm_data;
325 int r;
326
327 svm_data = kzalloc(sizeof(struct svm_cpu_data), GFP_KERNEL);
328 if (!svm_data)
329 return -ENOMEM;
330 svm_data->cpu = cpu;
331 svm_data->save_area = alloc_page(GFP_KERNEL);
332 r = -ENOMEM;
333 if (!svm_data->save_area)
334 goto err_1;
335
336 per_cpu(svm_data, cpu) = svm_data;
337
338 return 0;
339
340err_1:
341 kfree(svm_data);
342 return r;
343
344}
345
346static int set_msr_interception(u32 *msrpm, unsigned msr,
347 int read, int write)
348{
349 int i;
350
351 for (i = 0; i < NUM_MSR_MAPS; i++) {
352 if (msr >= msrpm_ranges[i] &&
353 msr < msrpm_ranges[i] + MSRS_IN_RANGE) {
354 u32 msr_offset = (i * MSRS_IN_RANGE + msr -
355 msrpm_ranges[i]) * 2;
356
357 u32 *base = msrpm + (msr_offset / 32);
358 u32 msr_shift = msr_offset % 32;
359 u32 mask = ((write) ? 0 : 2) | ((read) ? 0 : 1);
360 *base = (*base & ~(0x3 << msr_shift)) |
361 (mask << msr_shift);
362 return 1;
363 }
364 }
365 printk(KERN_DEBUG "%s: not found 0x%x\n", __FUNCTION__, msr);
366 return 0;
367}
368
369static __init int svm_hardware_setup(void)
370{
371 int cpu;
372 struct page *iopm_pages;
373 struct page *msrpm_pages;
374 void *msrpm_va;
375 int r;
376
873a7c42 377 kvm_emulator_want_group7_invlpg();
6aa8b732
AK		 378
379 iopm_pages = alloc_pages(GFP_KERNEL, IOPM_ALLOC_ORDER);
380
381 if (!iopm_pages)
382 return -ENOMEM;
383 memset(page_address(iopm_pages), 0xff,
384 PAGE_SIZE * (1 << IOPM_ALLOC_ORDER));
385 iopm_base = page_to_pfn(iopm_pages) << PAGE_SHIFT;
386
387
388 msrpm_pages = alloc_pages(GFP_KERNEL, MSRPM_ALLOC_ORDER);
389
390 r = -ENOMEM;
391 if (!msrpm_pages)
392 goto err_1;
393
394 msrpm_va = page_address(msrpm_pages);
395 memset(msrpm_va, 0xff, PAGE_SIZE * (1 << MSRPM_ALLOC_ORDER));
396 msrpm_base = page_to_pfn(msrpm_pages) << PAGE_SHIFT;
397
05b3e0c2 398#ifdef CONFIG_X86_64
6aa8b732
AK		 399 set_msr_interception(msrpm_va, MSR_GS_BASE, 1, 1);
400 set_msr_interception(msrpm_va, MSR_FS_BASE, 1, 1);
401 set_msr_interception(msrpm_va, MSR_KERNEL_GS_BASE, 1, 1);
6aa8b732
AK		 402 set_msr_interception(msrpm_va, MSR_LSTAR, 1, 1);
403 set_msr_interception(msrpm_va, MSR_CSTAR, 1, 1);
404 set_msr_interception(msrpm_va, MSR_SYSCALL_MASK, 1, 1);
405#endif
0e859cac 406 set_msr_interception(msrpm_va, MSR_K6_STAR, 1, 1);
6aa8b732
AK		 407 set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_CS, 1, 1);
408 set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_ESP, 1, 1);
409 set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_EIP, 1, 1);
410
411 for_each_online_cpu(cpu) {
412 r = svm_cpu_init(cpu);
413 if (r)
414 goto err_2;
415 }
416 return 0;
417
418err_2:
419 __free_pages(msrpm_pages, MSRPM_ALLOC_ORDER);
420 msrpm_base = 0;
421err_1:
422 __free_pages(iopm_pages, IOPM_ALLOC_ORDER);
423 iopm_base = 0;
424 return r;
425}
426
427static __exit void svm_hardware_unsetup(void)
428{
429 __free_pages(pfn_to_page(msrpm_base >> PAGE_SHIFT), MSRPM_ALLOC_ORDER);
430 __free_pages(pfn_to_page(iopm_base >> PAGE_SHIFT), IOPM_ALLOC_ORDER);
431 iopm_base = msrpm_base = 0;
432}
433
434static void init_seg(struct vmcb_seg *seg)
435{
436 seg->selector = 0;
437 seg->attrib = SVM_SELECTOR_P_MASK | SVM_SELECTOR_S_MASK |
438 SVM_SELECTOR_WRITE_MASK; /* Read/Write Data Segment */
439 seg->limit = 0xffff;
440 seg->base = 0;
441}
442
443static void init_sys_seg(struct vmcb_seg *seg, uint32_t type)
444{
445 seg->selector = 0;
446 seg->attrib = SVM_SELECTOR_P_MASK | type;
447 seg->limit = 0xffff;
448 seg->base = 0;
449}
450
451static int svm_vcpu_setup(struct kvm_vcpu *vcpu)
452{
453 return 0;
454}
455
456static void init_vmcb(struct vmcb *vmcb)
457{
458 struct vmcb_control_area *control = &vmcb->control;
459 struct vmcb_save_area *save = &vmcb->save;
460 u64 tsc;
461
462 control->intercept_cr_read = INTERCEPT_CR0_MASK |
463 INTERCEPT_CR3_MASK |
464 INTERCEPT_CR4_MASK;
465
466 control->intercept_cr_write = INTERCEPT_CR0_MASK |
467 INTERCEPT_CR3_MASK |
468 INTERCEPT_CR4_MASK;
469
470 control->intercept_dr_read = INTERCEPT_DR0_MASK |
471 INTERCEPT_DR1_MASK |
472 INTERCEPT_DR2_MASK |
473 INTERCEPT_DR3_MASK;
474
475 control->intercept_dr_write = INTERCEPT_DR0_MASK |
476 INTERCEPT_DR1_MASK |
477 INTERCEPT_DR2_MASK |
478 INTERCEPT_DR3_MASK |
479 INTERCEPT_DR5_MASK |
480 INTERCEPT_DR7_MASK;
481
482 control->intercept_exceptions = 1 << PF_VECTOR;
483
484
485 control->intercept = (1ULL << INTERCEPT_INTR) |
486 (1ULL << INTERCEPT_NMI) |
487 /*
488 * selective cr0 intercept bug?
489 * 0: 0f 22 d8 mov %eax,%cr3
490 * 3: 0f 20 c0 mov %cr0,%eax
491 * 6: 0d 00 00 00 80 or $0x80000000,%eax
492 * b: 0f 22 c0 mov %eax,%cr0
493 * set cr3 ->interception
494 * get cr0 ->interception
495 * set cr0 -> no interception
496 */
497 /* (1ULL << INTERCEPT_SELECTIVE_CR0) | */
498 (1ULL << INTERCEPT_CPUID) |
499 (1ULL << INTERCEPT_HLT) |
500 (1ULL << INTERCEPT_INVLPG) |
501 (1ULL << INTERCEPT_INVLPGA) |
502 (1ULL << INTERCEPT_IOIO_PROT) |
503 (1ULL << INTERCEPT_MSR_PROT) |
504 (1ULL << INTERCEPT_TASK_SWITCH) |
505 (1ULL << INTERCEPT_VMRUN) |
506 (1ULL << INTERCEPT_VMMCALL) |
507 (1ULL << INTERCEPT_VMLOAD) |
508 (1ULL << INTERCEPT_VMSAVE) |
509 (1ULL << INTERCEPT_STGI) |
510 (1ULL << INTERCEPT_CLGI) |
511 (1ULL << INTERCEPT_SKINIT);
512
513 control->iopm_base_pa = iopm_base;
514 control->msrpm_base_pa = msrpm_base;
515 rdtscll(tsc);
516 control->tsc_offset = -tsc;
517 control->int_ctl = V_INTR_MASKING_MASK;
518
519 init_seg(&save->es);
520 init_seg(&save->ss);
521 init_seg(&save->ds);
522 init_seg(&save->fs);
523 init_seg(&save->gs);
524
525 save->cs.selector = 0xf000;
526 /* Executable/Readable Code Segment */
527 save->cs.attrib = SVM_SELECTOR_READ_MASK | SVM_SELECTOR_P_MASK |
528 SVM_SELECTOR_S_MASK | SVM_SELECTOR_CODE_MASK;
529 save->cs.limit = 0xffff;
530 save->cs.base = 0xffff0000;
531
532 save->gdtr.limit = 0xffff;
533 save->idtr.limit = 0xffff;
534
535 init_sys_seg(&save->ldtr, SEG_TYPE_LDT);
536 init_sys_seg(&save->tr, SEG_TYPE_BUSY_TSS16);
537
538 save->efer = MSR_EFER_SVME_MASK;
539
540 save->dr6 = 0xffff0ff0;
541 save->dr7 = 0x400;
542 save->rflags = 2;
543 save->rip = 0x0000fff0;
544
545 /*
546 * cr0 val on cpu init should be 0x60000010, we enable cpu
547 * cache by default. the orderly way is to enable cache in bios.
548 */
549 save->cr0 = 0x00000010 | CR0_PG_MASK;
550 save->cr4 = CR4_PAE_MASK;
551 /* rdx = ?? */
552}
553
554static int svm_create_vcpu(struct kvm_vcpu *vcpu)
555{
556 struct page *page;
557 int r;
558
559 r = -ENOMEM;
560 vcpu->svm = kzalloc(sizeof *vcpu->svm, GFP_KERNEL);
561 if (!vcpu->svm)
562 goto out1;
563 page = alloc_page(GFP_KERNEL);
564 if (!page)
565 goto out2;
566
567 vcpu->svm->vmcb = page_address(page);
568 memset(vcpu->svm->vmcb, 0, PAGE_SIZE);
569 vcpu->svm->vmcb_pa = page_to_pfn(page) << PAGE_SHIFT;
570 vcpu->svm->cr0 = 0x00000010;
571 vcpu->svm->asid_generation = 0;
572 memset(vcpu->svm->db_regs, 0, sizeof(vcpu->svm->db_regs));
573 init_vmcb(vcpu->svm->vmcb);
574
36241b8c
AK		 575 fx_init(vcpu);
576
6aa8b732
AK		 577 return 0;
578
579out2:
580 kfree(vcpu->svm);
581out1:
582 return r;
583}
584
585static void svm_free_vcpu(struct kvm_vcpu *vcpu)
586{
587 if (!vcpu->svm)
588 return;
589 if (vcpu->svm->vmcb)
590 __free_page(pfn_to_page(vcpu->svm->vmcb_pa >> PAGE_SHIFT));
591 kfree(vcpu->svm);
592}
593
594static struct kvm_vcpu *svm_vcpu_load(struct kvm_vcpu *vcpu)
595{
596 get_cpu();
597 return vcpu;
598}
599
600static void svm_vcpu_put(struct kvm_vcpu *vcpu)
601{
602 put_cpu();
603}
604
605static void svm_cache_regs(struct kvm_vcpu *vcpu)
606{
607 vcpu->regs[VCPU_REGS_RAX] = vcpu->svm->vmcb->save.rax;
608 vcpu->regs[VCPU_REGS_RSP] = vcpu->svm->vmcb->save.rsp;
609 vcpu->rip = vcpu->svm->vmcb->save.rip;
610}
611
612static void svm_decache_regs(struct kvm_vcpu *vcpu)
613{
614 vcpu->svm->vmcb->save.rax = vcpu->regs[VCPU_REGS_RAX];
615 vcpu->svm->vmcb->save.rsp = vcpu->regs[VCPU_REGS_RSP];
616 vcpu->svm->vmcb->save.rip = vcpu->rip;
617}
618
619static unsigned long svm_get_rflags(struct kvm_vcpu *vcpu)
620{
621 return vcpu->svm->vmcb->save.rflags;
622}
623
624static void svm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
625{
626 vcpu->svm->vmcb->save.rflags = rflags;
627}
628
629static struct vmcb_seg *svm_seg(struct kvm_vcpu *vcpu, int seg)
630{
631 struct vmcb_save_area *save = &vcpu->svm->vmcb->save;
632
633 switch (seg) {
634 case VCPU_SREG_CS: return &save->cs;
635 case VCPU_SREG_DS: return &save->ds;
636 case VCPU_SREG_ES: return &save->es;
637 case VCPU_SREG_FS: return &save->fs;
638 case VCPU_SREG_GS: return &save->gs;
639 case VCPU_SREG_SS: return &save->ss;
640 case VCPU_SREG_TR: return &save->tr;
641 case VCPU_SREG_LDTR: return &save->ldtr;
642 }
643 BUG();
644 return 0;
645}
646
647static u64 svm_get_segment_base(struct kvm_vcpu *vcpu, int seg)
648{
649 struct vmcb_seg *s = svm_seg(vcpu, seg);
650
651 return s->base;
652}
653
654static void svm_get_segment(struct kvm_vcpu *vcpu,
655 struct kvm_segment *var, int seg)
656{
657 struct vmcb_seg *s = svm_seg(vcpu, seg);
658
659 var->base = s->base;
660 var->limit = s->limit;
661 var->selector = s->selector;
662 var->type = s->attrib & SVM_SELECTOR_TYPE_MASK;
663 var->s = (s->attrib >> SVM_SELECTOR_S_SHIFT) & 1;
664 var->dpl = (s->attrib >> SVM_SELECTOR_DPL_SHIFT) & 3;
665 var->present = (s->attrib >> SVM_SELECTOR_P_SHIFT) & 1;
666 var->avl = (s->attrib >> SVM_SELECTOR_AVL_SHIFT) & 1;
667 var->l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
668 var->db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
669 var->g = (s->attrib >> SVM_SELECTOR_G_SHIFT) & 1;
670 var->unusable = !var->present;
671}
672
673static void svm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
674{
675 struct vmcb_seg *s = svm_seg(vcpu, VCPU_SREG_CS);
676
677 *db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
678 *l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
679}
680
681static void svm_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
682{
683 dt->limit = vcpu->svm->vmcb->save.ldtr.limit;
684 dt->base = vcpu->svm->vmcb->save.ldtr.base;
685}
686
687static void svm_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
688{
689 vcpu->svm->vmcb->save.ldtr.limit = dt->limit;
690 vcpu->svm->vmcb->save.ldtr.base = dt->base ;
691}
692
693static void svm_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
694{
695 dt->limit = vcpu->svm->vmcb->save.gdtr.limit;
696 dt->base = vcpu->svm->vmcb->save.gdtr.base;
697}
698
699static void svm_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
700{
701 vcpu->svm->vmcb->save.gdtr.limit = dt->limit;
702 vcpu->svm->vmcb->save.gdtr.base = dt->base ;
703}
704
705static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
706{
05b3e0c2 707#ifdef CONFIG_X86_64
6aa8b732
AK		 708 if (vcpu->shadow_efer & KVM_EFER_LME) {
709 if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK)) {
710 vcpu->shadow_efer |= KVM_EFER_LMA;
711 vcpu->svm->vmcb->save.efer |= KVM_EFER_LMA | KVM_EFER_LME;
712 }
713
714 if (is_paging(vcpu) && !(cr0 & CR0_PG_MASK) ) {
715 vcpu->shadow_efer &= ~KVM_EFER_LMA;
716 vcpu->svm->vmcb->save.efer &= ~(KVM_EFER_LMA | KVM_EFER_LME);
717 }
718 }
719#endif
720 vcpu->svm->cr0 = cr0;
721 vcpu->svm->vmcb->save.cr0 = cr0 | CR0_PG_MASK;
722 vcpu->cr0 = cr0;
723}
724
725static void svm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
726{
727 vcpu->cr4 = cr4;
728 vcpu->svm->vmcb->save.cr4 = cr4 | CR4_PAE_MASK;
729}
730
731static void svm_set_segment(struct kvm_vcpu *vcpu,
732 struct kvm_segment *var, int seg)
733{
734 struct vmcb_seg *s = svm_seg(vcpu, seg);
735
736 s->base = var->base;
737 s->limit = var->limit;
738 s->selector = var->selector;
739 if (var->unusable)
740 s->attrib = 0;
741 else {
742 s->attrib = (var->type & SVM_SELECTOR_TYPE_MASK);
743 s->attrib |= (var->s & 1) << SVM_SELECTOR_S_SHIFT;
744 s->attrib |= (var->dpl & 3) << SVM_SELECTOR_DPL_SHIFT;
745 s->attrib |= (var->present & 1) << SVM_SELECTOR_P_SHIFT;
746 s->attrib |= (var->avl & 1) << SVM_SELECTOR_AVL_SHIFT;
747 s->attrib |= (var->l & 1) << SVM_SELECTOR_L_SHIFT;
748 s->attrib |= (var->db & 1) << SVM_SELECTOR_DB_SHIFT;
749 s->attrib |= (var->g & 1) << SVM_SELECTOR_G_SHIFT;
750 }
751 if (seg == VCPU_SREG_CS)
752 vcpu->svm->vmcb->save.cpl
753 = (vcpu->svm->vmcb->save.cs.attrib
754 >> SVM_SELECTOR_DPL_SHIFT) & 3;
755
756}
757
758/* FIXME:
759
760 vcpu->svm->vmcb->control.int_ctl &= ~V_TPR_MASK;
761 vcpu->svm->vmcb->control.int_ctl |= (sregs->cr8 & V_TPR_MASK);
762
763*/
764
765static int svm_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
766{
767 return -EOPNOTSUPP;
768}
769
770static void load_host_msrs(struct kvm_vcpu *vcpu)
771{
772 int i;
773
774 for ( i = 0; i < NR_HOST_SAVE_MSRS; i++)
775 wrmsrl(host_save_msrs[i], vcpu->svm->host_msrs[i]);
776}
777
778static void save_host_msrs(struct kvm_vcpu *vcpu)
779{
780 int i;
781
782 for ( i = 0; i < NR_HOST_SAVE_MSRS; i++)
783 rdmsrl(host_save_msrs[i], vcpu->svm->host_msrs[i]);
784}
785
786static void new_asid(struct kvm_vcpu *vcpu, struct svm_cpu_data *svm_data)
787{
788 if (svm_data->next_asid > svm_data->max_asid) {
789 ++svm_data->asid_generation;
790 svm_data->next_asid = 1;
791 vcpu->svm->vmcb->control.tlb_ctl = TLB_CONTROL_FLUSH_ALL_ASID;
792 }
793
794 vcpu->cpu = svm_data->cpu;
795 vcpu->svm->asid_generation = svm_data->asid_generation;
796 vcpu->svm->vmcb->control.asid = svm_data->next_asid++;
797}
798
799static void svm_invlpg(struct kvm_vcpu *vcpu, gva_t address)
800{
801 invlpga(address, vcpu->svm->vmcb->control.asid); // is needed?
802}
803
804static unsigned long svm_get_dr(struct kvm_vcpu *vcpu, int dr)
805{
806 return vcpu->svm->db_regs[dr];
807}
808
809static void svm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long value,
810 int *exception)
811{
812 *exception = 0;
813
814 if (vcpu->svm->vmcb->save.dr7 & DR7_GD_MASK) {
815 vcpu->svm->vmcb->save.dr7 &= ~DR7_GD_MASK;
816 vcpu->svm->vmcb->save.dr6 |= DR6_BD_MASK;
817 *exception = DB_VECTOR;
818 return;
819 }
820
821 switch (dr) {
822 case 0 ... 3:
823 vcpu->svm->db_regs[dr] = value;
824 return;
825 case 4 ... 5:
826 if (vcpu->cr4 & CR4_DE_MASK) {
827 *exception = UD_VECTOR;
828 return;
829 }
830 case 7: {
831 if (value & ~((1ULL << 32) - 1)) {
832 *exception = GP_VECTOR;
833 return;
834 }
835 vcpu->svm->vmcb->save.dr7 = value;
836 return;
837 }
838 default:
839 printk(KERN_DEBUG "%s: unexpected dr %u\n",
840 __FUNCTION__, dr);
841 *exception = UD_VECTOR;
842 return;
843 }
844}
845
846static int pf_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
847{
848 u32 exit_int_info = vcpu->svm->vmcb->control.exit_int_info;
849 u64 fault_address;
850 u32 error_code;
851 enum emulation_result er;
852
853 if (is_external_interrupt(exit_int_info))
854 push_irq(vcpu, exit_int_info & SVM_EVTINJ_VEC_MASK);
855
856 spin_lock(&vcpu->kvm->lock);
857
858 fault_address = vcpu->svm->vmcb->control.exit_info_2;
859 error_code = vcpu->svm->vmcb->control.exit_info_1;
860 if (!vcpu->mmu.page_fault(vcpu, fault_address, error_code)) {
861 spin_unlock(&vcpu->kvm->lock);
862 return 1;
863 }
864 er = emulate_instruction(vcpu, kvm_run, fault_address, error_code);
865 spin_unlock(&vcpu->kvm->lock);
866
867 switch (er) {
868 case EMULATE_DONE:
869 return 1;
870 case EMULATE_DO_MMIO:
871 ++kvm_stat.mmio_exits;
872 kvm_run->exit_reason = KVM_EXIT_MMIO;
873 return 0;
874 case EMULATE_FAIL:
875 vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
876 break;
877 default:
878 BUG();
879 }
880
881 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
882 return 0;
883}
884
885static int io_get_override(struct kvm_vcpu *vcpu,
886 struct vmcb_seg **seg,
887 int *addr_override)
888{
889 u8 inst[MAX_INST_SIZE];
890 unsigned ins_length;
891 gva_t rip;
892 int i;
893
894 rip = vcpu->svm->vmcb->save.rip;
895 ins_length = vcpu->svm->next_rip - rip;
896 rip += vcpu->svm->vmcb->save.cs.base;
897
898 if (ins_length > MAX_INST_SIZE)
899 printk(KERN_DEBUG
900 "%s: inst length err, cs base 0x%llx rip 0x%llx "
901 "next rip 0x%llx ins_length %u\n",
902 __FUNCTION__,
903 vcpu->svm->vmcb->save.cs.base,
904 vcpu->svm->vmcb->save.rip,
905 vcpu->svm->vmcb->control.exit_info_2,
906 ins_length);
907
908 if (kvm_read_guest(vcpu, rip, ins_length, inst) != ins_length)
909 /* #PF */
910 return 0;
911
912 *addr_override = 0;
913 *seg = 0;
914 for (i = 0; i < ins_length; i++)
915 switch (inst[i]) {
916 case 0xf0:
917 case 0xf2:
918 case 0xf3:
919 case 0x66:
920 continue;
921 case 0x67:
922 *addr_override = 1;
923 continue;
924 case 0x2e:
925 *seg = &vcpu->svm->vmcb->save.cs;
926 continue;
927 case 0x36:
928 *seg = &vcpu->svm->vmcb->save.ss;
929 continue;
930 case 0x3e:
931 *seg = &vcpu->svm->vmcb->save.ds;
932 continue;
933 case 0x26:
934 *seg = &vcpu->svm->vmcb->save.es;
935 continue;
936 case 0x64:
937 *seg = &vcpu->svm->vmcb->save.fs;
938 continue;
939 case 0x65:
940 *seg = &vcpu->svm->vmcb->save.gs;
941 continue;
942 default:
943 return 1;
944 }
945 printk(KERN_DEBUG "%s: unexpected\n", __FUNCTION__);
946 return 0;
947}
948
949static unsigned long io_adress(struct kvm_vcpu *vcpu, int ins, u64 *address)
950{
951 unsigned long addr_mask;
952 unsigned long *reg;
953 struct vmcb_seg *seg;
954 int addr_override;
955 struct vmcb_save_area *save_area = &vcpu->svm->vmcb->save;
956 u16 cs_attrib = save_area->cs.attrib;
957 unsigned addr_size = get_addr_size(vcpu);
958
959 if (!io_get_override(vcpu, &seg, &addr_override))
960 return 0;
961
962 if (addr_override)
963 addr_size = (addr_size == 2) ? 4: (addr_size >> 1);
964
965 if (ins) {
966 reg = &vcpu->regs[VCPU_REGS_RDI];
967 seg = &vcpu->svm->vmcb->save.es;
968 } else {
969 reg = &vcpu->regs[VCPU_REGS_RSI];
970 seg = (seg) ? seg : &vcpu->svm->vmcb->save.ds;
971 }
972
973 addr_mask = ~0ULL >> (64 - (addr_size * 8));
974
975 if ((cs_attrib & SVM_SELECTOR_L_MASK) &&
976 !(vcpu->svm->vmcb->save.rflags & X86_EFLAGS_VM)) {
977 *address = (*reg & addr_mask);
978 return addr_mask;
979 }
980
981 if (!(seg->attrib & SVM_SELECTOR_P_SHIFT)) {
982 svm_inject_gp(vcpu, 0);
983 return 0;
984 }
985
986 *address = (*reg & addr_mask) + seg->base;
987 return addr_mask;
988}
989
990static int io_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
991{
992 u32 io_info = vcpu->svm->vmcb->control.exit_info_1; //address size bug?
993 int _in = io_info & SVM_IOIO_TYPE_MASK;
994
995 ++kvm_stat.io_exits;
996
997 vcpu->svm->next_rip = vcpu->svm->vmcb->control.exit_info_2;
998
999 kvm_run->exit_reason = KVM_EXIT_IO;
1000 kvm_run->io.port = io_info >> 16;
1001 kvm_run->io.direction = (_in) ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
1002 kvm_run->io.size = ((io_info & SVM_IOIO_SIZE_MASK) >> SVM_IOIO_SIZE_SHIFT);
1003 kvm_run->io.string = (io_info & SVM_IOIO_STR_MASK) != 0;
1004 kvm_run->io.rep = (io_info & SVM_IOIO_REP_MASK) != 0;
1005
1006 if (kvm_run->io.string) {
1007 unsigned addr_mask;
1008
1009 addr_mask = io_adress(vcpu, _in, &kvm_run->io.address);
1010 if (!addr_mask) {
1011 printk(KERN_DEBUG "%s: get io address failed\n", __FUNCTION__);
1012 return 1;
1013 }
1014
1015 if (kvm_run->io.rep) {
1016 kvm_run->io.count = vcpu->regs[VCPU_REGS_RCX] & addr_mask;
1017 kvm_run->io.string_down = (vcpu->svm->vmcb->save.rflags
1018 & X86_EFLAGS_DF) != 0;
1019 }
1020 } else {
1021 kvm_run->io.value = vcpu->svm->vmcb->save.rax;
1022 }
1023 return 0;
1024}
1025
1026
1027static int nop_on_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1028{
1029 return 1;
1030}
1031
1032static int halt_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1033{
1034 vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 1;
1035 skip_emulated_instruction(vcpu);
c1150d8c 1036 if (vcpu->irq_summary)
6aa8b732
AK		 1037 return 1;
1038
1039 kvm_run->exit_reason = KVM_EXIT_HLT;
c1150d8c 1040 ++kvm_stat.halt_exits;
6aa8b732
AK		 1041 return 0;
1042}
1043
1044static int invalid_op_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1045{
1046 inject_ud(vcpu);
1047 return 1;
1048}
1049
1050static int task_switch_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1051{
1052 printk(KERN_DEBUG "%s: task swiche is unsupported\n", __FUNCTION__);
1053 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1054 return 0;
1055}
1056
1057static int cpuid_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1058{
1059 vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1060 kvm_run->exit_reason = KVM_EXIT_CPUID;
1061 return 0;
1062}
1063
1064static int emulate_on_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1065{
1066 if (emulate_instruction(vcpu, 0, 0, 0) != EMULATE_DONE)
1067 printk(KERN_ERR "%s: failed\n", __FUNCTION__);
1068 return 1;
1069}
1070
1071static int svm_get_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 *data)
1072{
1073 switch (ecx) {
6aa8b732
AK		 1074 case MSR_IA32_TIME_STAMP_COUNTER: {
1075 u64 tsc;
1076
1077 rdtscll(tsc);
1078 *data = vcpu->svm->vmcb->control.tsc_offset + tsc;
1079 break;
1080 }
0e859cac 1081 case MSR_K6_STAR:
6aa8b732
AK		 1082 *data = vcpu->svm->vmcb->save.star;
1083 break;
0e859cac 1084#ifdef CONFIG_X86_64
6aa8b732
AK		 1085 case MSR_LSTAR:
1086 *data = vcpu->svm->vmcb->save.lstar;
1087 break;
1088 case MSR_CSTAR:
1089 *data = vcpu->svm->vmcb->save.cstar;
1090 break;
1091 case MSR_KERNEL_GS_BASE:
1092 *data = vcpu->svm->vmcb->save.kernel_gs_base;
1093 break;
1094 case MSR_SYSCALL_MASK:
1095 *data = vcpu->svm->vmcb->save.sfmask;
1096 break;
1097#endif
1098 case MSR_IA32_SYSENTER_CS:
1099 *data = vcpu->svm->vmcb->save.sysenter_cs;
1100 break;
1101 case MSR_IA32_SYSENTER_EIP:
1102 *data = vcpu->svm->vmcb->save.sysenter_eip;
1103 break;
1104 case MSR_IA32_SYSENTER_ESP:
1105 *data = vcpu->svm->vmcb->save.sysenter_esp;
1106 break;
1107 default:
3bab1f5d 1108 return kvm_get_msr_common(vcpu, ecx, data);
6aa8b732
AK		 1109 }
1110 return 0;
1111}
1112
1113static int rdmsr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1114{
1115 u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1116 u64 data;
1117
1118 if (svm_get_msr(vcpu, ecx, &data))
1119 svm_inject_gp(vcpu, 0);
1120 else {
1121 vcpu->svm->vmcb->save.rax = data & 0xffffffff;
1122 vcpu->regs[VCPU_REGS_RDX] = data >> 32;
1123 vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1124 skip_emulated_instruction(vcpu);
1125 }
1126 return 1;
1127}
1128
1129static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data)
1130{
1131 switch (ecx) {
6aa8b732
AK		 1132 case MSR_IA32_TIME_STAMP_COUNTER: {
1133 u64 tsc;
1134
1135 rdtscll(tsc);
1136 vcpu->svm->vmcb->control.tsc_offset = data - tsc;
1137 break;
1138 }
0e859cac 1139 case MSR_K6_STAR:
6aa8b732
AK		 1140 vcpu->svm->vmcb->save.star = data;
1141 break;
0e859cac 1142#ifdef CONFIG_X86_64_
6aa8b732
AK		 1143 case MSR_LSTAR:
1144 vcpu->svm->vmcb->save.lstar = data;
1145 break;
1146 case MSR_CSTAR:
1147 vcpu->svm->vmcb->save.cstar = data;
1148 break;
1149 case MSR_KERNEL_GS_BASE:
1150 vcpu->svm->vmcb->save.kernel_gs_base = data;
1151 break;
1152 case MSR_SYSCALL_MASK:
1153 vcpu->svm->vmcb->save.sfmask = data;
1154 break;
1155#endif
1156 case MSR_IA32_SYSENTER_CS:
1157 vcpu->svm->vmcb->save.sysenter_cs = data;
1158 break;
1159 case MSR_IA32_SYSENTER_EIP:
1160 vcpu->svm->vmcb->save.sysenter_eip = data;
1161 break;
1162 case MSR_IA32_SYSENTER_ESP:
1163 vcpu->svm->vmcb->save.sysenter_esp = data;
1164 break;
1165 default:
3bab1f5d 1166 return kvm_set_msr_common(vcpu, ecx, data);
6aa8b732
AK		 1167 }
1168 return 0;
1169}
1170
1171static int wrmsr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1172{
1173 u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1174 u64 data = (vcpu->svm->vmcb->save.rax & -1u)
1175 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1176 vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1177 if (svm_set_msr(vcpu, ecx, data))
1178 svm_inject_gp(vcpu, 0);
1179 else
1180 skip_emulated_instruction(vcpu);
1181 return 1;
1182}
1183
1184static int msr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1185{
1186 if (vcpu->svm->vmcb->control.exit_info_1)
1187 return wrmsr_interception(vcpu, kvm_run);
1188 else
1189 return rdmsr_interception(vcpu, kvm_run);
1190}
1191
c1150d8c
DL		 1192static int interrupt_window_interception(struct kvm_vcpu *vcpu,
1193 struct kvm_run *kvm_run)
1194{
1195 /*
1196 * If the user space waits to inject interrupts, exit as soon as
1197 * possible
1198 */
1199 if (kvm_run->request_interrupt_window &&
1200 !vcpu->irq_summary &&
1201 (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF)) {
1202 ++kvm_stat.irq_window_exits;
1203 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1204 return 0;
1205 }
1206
1207 return 1;
1208}
1209
6aa8b732
AK		 1210static int (*svm_exit_handlers[])(struct kvm_vcpu *vcpu,
1211 struct kvm_run *kvm_run) = {
1212 [SVM_EXIT_READ_CR0] = emulate_on_interception,
1213 [SVM_EXIT_READ_CR3] = emulate_on_interception,
1214 [SVM_EXIT_READ_CR4] = emulate_on_interception,
1215 /* for now: */
1216 [SVM_EXIT_WRITE_CR0] = emulate_on_interception,
1217 [SVM_EXIT_WRITE_CR3] = emulate_on_interception,
1218 [SVM_EXIT_WRITE_CR4] = emulate_on_interception,
1219 [SVM_EXIT_READ_DR0] = emulate_on_interception,
1220 [SVM_EXIT_READ_DR1] = emulate_on_interception,
1221 [SVM_EXIT_READ_DR2] = emulate_on_interception,
1222 [SVM_EXIT_READ_DR3] = emulate_on_interception,
1223 [SVM_EXIT_WRITE_DR0] = emulate_on_interception,
1224 [SVM_EXIT_WRITE_DR1] = emulate_on_interception,
1225 [SVM_EXIT_WRITE_DR2] = emulate_on_interception,
1226 [SVM_EXIT_WRITE_DR3] = emulate_on_interception,
1227 [SVM_EXIT_WRITE_DR5] = emulate_on_interception,
1228 [SVM_EXIT_WRITE_DR7] = emulate_on_interception,
1229 [SVM_EXIT_EXCP_BASE + PF_VECTOR] = pf_interception,
1230 [SVM_EXIT_INTR] = nop_on_interception,
1231 [SVM_EXIT_NMI] = nop_on_interception,
1232 [SVM_EXIT_SMI] = nop_on_interception,
1233 [SVM_EXIT_INIT] = nop_on_interception,
c1150d8c 1234 [SVM_EXIT_VINTR] = interrupt_window_interception,
6aa8b732
AK		 1235 /* [SVM_EXIT_CR0_SEL_WRITE] = emulate_on_interception, */
1236 [SVM_EXIT_CPUID] = cpuid_interception,
1237 [SVM_EXIT_HLT] = halt_interception,
1238 [SVM_EXIT_INVLPG] = emulate_on_interception,
1239 [SVM_EXIT_INVLPGA] = invalid_op_interception,
1240 [SVM_EXIT_IOIO] = io_interception,
1241 [SVM_EXIT_MSR] = msr_interception,
1242 [SVM_EXIT_TASK_SWITCH] = task_switch_interception,
1243 [SVM_EXIT_VMRUN] = invalid_op_interception,
1244 [SVM_EXIT_VMMCALL] = invalid_op_interception,
1245 [SVM_EXIT_VMLOAD] = invalid_op_interception,
1246 [SVM_EXIT_VMSAVE] = invalid_op_interception,
1247 [SVM_EXIT_STGI] = invalid_op_interception,
1248 [SVM_EXIT_CLGI] = invalid_op_interception,
1249 [SVM_EXIT_SKINIT] = invalid_op_interception,
1250};
1251
1252
1253static int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1254{
1255 u32 exit_code = vcpu->svm->vmcb->control.exit_code;
1256
1257 kvm_run->exit_type = KVM_EXIT_TYPE_VM_EXIT;
1258
1259 if (is_external_interrupt(vcpu->svm->vmcb->control.exit_int_info) &&
1260 exit_code != SVM_EXIT_EXCP_BASE + PF_VECTOR)
1261 printk(KERN_ERR "%s: unexpected exit_ini_info 0x%x "
1262 "exit_code 0x%x\n",
1263 __FUNCTION__, vcpu->svm->vmcb->control.exit_int_info,
1264 exit_code);
1265
1266 if (exit_code >= sizeof(svm_exit_handlers) / sizeof(*svm_exit_handlers)
1267 || svm_exit_handlers[exit_code] == 0) {
1268 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1269 printk(KERN_ERR "%s: 0x%x @ 0x%llx cr0 0x%lx rflags 0x%llx\n",
1270 __FUNCTION__,
1271 exit_code,
1272 vcpu->svm->vmcb->save.rip,
1273 vcpu->cr0,
1274 vcpu->svm->vmcb->save.rflags);
1275 return 0;
1276 }
1277
1278 return svm_exit_handlers[exit_code](vcpu, kvm_run);
1279}
1280
1281static void reload_tss(struct kvm_vcpu *vcpu)
1282{
1283 int cpu = raw_smp_processor_id();
1284
1285 struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1286 svm_data->tss_desc->type = 9; //available 32/64-bit TSS
1287 load_TR_desc();
1288}
1289
1290static void pre_svm_run(struct kvm_vcpu *vcpu)
1291{
1292 int cpu = raw_smp_processor_id();
1293
1294 struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1295
1296 vcpu->svm->vmcb->control.tlb_ctl = TLB_CONTROL_DO_NOTHING;
1297 if (vcpu->cpu != cpu ||
1298 vcpu->svm->asid_generation != svm_data->asid_generation)
1299 new_asid(vcpu, svm_data);
1300}
1301
1302
c1150d8c 1303static inline void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
6aa8b732
AK		 1304{
1305 struct vmcb_control_area *control;
1306
6aa8b732 1307 control = &vcpu->svm->vmcb->control;
6aa8b732
AK		 1308 control->int_vector = pop_irq(vcpu);
1309 control->int_ctl &= ~V_INTR_PRIO_MASK;
1310 control->int_ctl |= V_IRQ_MASK |
1311 ((/*control->int_vector >> 4*/ 0xf) << V_INTR_PRIO_SHIFT);
1312}
1313
1314static void kvm_reput_irq(struct kvm_vcpu *vcpu)
1315{
1316 struct vmcb_control_area *control = &vcpu->svm->vmcb->control;
1317
1318 if (control->int_ctl & V_IRQ_MASK) {
1319 control->int_ctl &= ~V_IRQ_MASK;
1320 push_irq(vcpu, control->int_vector);
1321 }
c1150d8c
DL		 1322
1323 vcpu->interrupt_window_open =
1324 !(control->int_state & SVM_INTERRUPT_SHADOW_MASK);
1325}
1326
1327static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1328 struct kvm_run *kvm_run)
1329{
1330 struct vmcb_control_area *control = &vcpu->svm->vmcb->control;
1331
1332 vcpu->interrupt_window_open =
1333 (!(control->int_state & SVM_INTERRUPT_SHADOW_MASK) &&
1334 (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF));
1335
1336 if (vcpu->interrupt_window_open && vcpu->irq_summary)
1337 /*
1338 * If interrupts enabled, and not blocked by sti or mov ss. Good.
1339 */
1340 kvm_do_inject_irq(vcpu);
1341
1342 /*
1343 * Interrupts blocked. Wait for unblock.
1344 */
1345 if (!vcpu->interrupt_window_open &&
1346 (vcpu->irq_summary || kvm_run->request_interrupt_window)) {
1347 control->intercept |= 1ULL << INTERCEPT_VINTR;
1348 } else
1349 control->intercept &= ~(1ULL << INTERCEPT_VINTR);
1350}
1351
1352static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1353 struct kvm_run *kvm_run)
1354{
1355 kvm_run->ready_for_interrupt_injection = (vcpu->interrupt_window_open &&
1356 vcpu->irq_summary == 0);
1357 kvm_run->if_flag = (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF) != 0;
1358 kvm_run->cr8 = vcpu->cr8;
1359 kvm_run->apic_base = vcpu->apic_base;
1360}
1361
1362/*
1363 * Check if userspace requested an interrupt window, and that the
1364 * interrupt window is open.
1365 *
1366 * No need to exit to userspace if we already have an interrupt queued.
1367 */
1368static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1369 struct kvm_run *kvm_run)
1370{
1371 return (!vcpu->irq_summary &&
1372 kvm_run->request_interrupt_window &&
1373 vcpu->interrupt_window_open &&
1374 (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF));
6aa8b732
AK		 1375}
1376
1377static void save_db_regs(unsigned long *db_regs)
1378{
5aff458e
AK		 1379 asm volatile ("mov %%dr0, %0" : "=r"(db_regs[0]));
1380 asm volatile ("mov %%dr1, %0" : "=r"(db_regs[1]));
1381 asm volatile ("mov %%dr2, %0" : "=r"(db_regs[2]));
1382 asm volatile ("mov %%dr3, %0" : "=r"(db_regs[3]));
6aa8b732
AK		 1383}
1384
1385static void load_db_regs(unsigned long *db_regs)
1386{
5aff458e
AK		 1387 asm volatile ("mov %0, %%dr0" : : "r"(db_regs[0]));
1388 asm volatile ("mov %0, %%dr1" : : "r"(db_regs[1]));
1389 asm volatile ("mov %0, %%dr2" : : "r"(db_regs[2]));
1390 asm volatile ("mov %0, %%dr3" : : "r"(db_regs[3]));
6aa8b732
AK		 1391}
1392
1393static int svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1394{
1395 u16 fs_selector;
1396 u16 gs_selector;
1397 u16 ldt_selector;
1398
1399again:
c1150d8c 1400 do_interrupt_requests(vcpu, kvm_run);
6aa8b732
AK		 1401
1402 clgi();
1403
1404 pre_svm_run(vcpu);
1405
1406 save_host_msrs(vcpu);
1407 fs_selector = read_fs();
1408 gs_selector = read_gs();
1409 ldt_selector = read_ldt();
1410 vcpu->svm->host_cr2 = kvm_read_cr2();
1411 vcpu->svm->host_dr6 = read_dr6();
1412 vcpu->svm->host_dr7 = read_dr7();
1413 vcpu->svm->vmcb->save.cr2 = vcpu->cr2;
1414
1415 if (vcpu->svm->vmcb->save.dr7 & 0xff) {
1416 write_dr7(0);
1417 save_db_regs(vcpu->svm->host_db_regs);
1418 load_db_regs(vcpu->svm->db_regs);
1419 }
36241b8c
AK		 1420
1421 fx_save(vcpu->host_fx_image);
1422 fx_restore(vcpu->guest_fx_image);
1423
6aa8b732 1424 asm volatile (
05b3e0c2 1425#ifdef CONFIG_X86_64
6aa8b732
AK		 1426 "push %%rbx; push %%rcx; push %%rdx;"
1427 "push %%rsi; push %%rdi; push %%rbp;"
1428 "push %%r8; push %%r9; push %%r10; push %%r11;"
1429 "push %%r12; push %%r13; push %%r14; push %%r15;"
1430#else
1431 "push %%ebx; push %%ecx; push %%edx;"
1432 "push %%esi; push %%edi; push %%ebp;"
1433#endif
1434
05b3e0c2 1435#ifdef CONFIG_X86_64
6aa8b732
AK		 1436 "mov %c[rbx](%[vcpu]), %%rbx \n\t"
1437 "mov %c[rcx](%[vcpu]), %%rcx \n\t"
1438 "mov %c[rdx](%[vcpu]), %%rdx \n\t"
1439 "mov %c[rsi](%[vcpu]), %%rsi \n\t"
1440 "mov %c[rdi](%[vcpu]), %%rdi \n\t"
1441 "mov %c[rbp](%[vcpu]), %%rbp \n\t"
1442 "mov %c[r8](%[vcpu]), %%r8 \n\t"
1443 "mov %c[r9](%[vcpu]), %%r9 \n\t"
1444 "mov %c[r10](%[vcpu]), %%r10 \n\t"
1445 "mov %c[r11](%[vcpu]), %%r11 \n\t"
1446 "mov %c[r12](%[vcpu]), %%r12 \n\t"
1447 "mov %c[r13](%[vcpu]), %%r13 \n\t"
1448 "mov %c[r14](%[vcpu]), %%r14 \n\t"
1449 "mov %c[r15](%[vcpu]), %%r15 \n\t"
1450#else
1451 "mov %c[rbx](%[vcpu]), %%ebx \n\t"
1452 "mov %c[rcx](%[vcpu]), %%ecx \n\t"
1453 "mov %c[rdx](%[vcpu]), %%edx \n\t"
1454 "mov %c[rsi](%[vcpu]), %%esi \n\t"
1455 "mov %c[rdi](%[vcpu]), %%edi \n\t"
1456 "mov %c[rbp](%[vcpu]), %%ebp \n\t"
1457#endif
1458
05b3e0c2 1459#ifdef CONFIG_X86_64
6aa8b732
AK		 1460 /* Enter guest mode */
1461 "push %%rax \n\t"
1462 "mov %c[svm](%[vcpu]), %%rax \n\t"
1463 "mov %c[vmcb](%%rax), %%rax \n\t"
1464 SVM_VMLOAD "\n\t"
1465 SVM_VMRUN "\n\t"
1466 SVM_VMSAVE "\n\t"
1467 "pop %%rax \n\t"
1468#else
1469 /* Enter guest mode */
1470 "push %%eax \n\t"
1471 "mov %c[svm](%[vcpu]), %%eax \n\t"
1472 "mov %c[vmcb](%%eax), %%eax \n\t"
1473 SVM_VMLOAD "\n\t"
1474 SVM_VMRUN "\n\t"
1475 SVM_VMSAVE "\n\t"
1476 "pop %%eax \n\t"
1477#endif
1478
1479 /* Save guest registers, load host registers */
05b3e0c2 1480#ifdef CONFIG_X86_64
6aa8b732
AK		 1481 "mov %%rbx, %c[rbx](%[vcpu]) \n\t"
1482 "mov %%rcx, %c[rcx](%[vcpu]) \n\t"
1483 "mov %%rdx, %c[rdx](%[vcpu]) \n\t"
1484 "mov %%rsi, %c[rsi](%[vcpu]) \n\t"
1485 "mov %%rdi, %c[rdi](%[vcpu]) \n\t"
1486 "mov %%rbp, %c[rbp](%[vcpu]) \n\t"
1487 "mov %%r8, %c[r8](%[vcpu]) \n\t"
1488 "mov %%r9, %c[r9](%[vcpu]) \n\t"
1489 "mov %%r10, %c[r10](%[vcpu]) \n\t"
1490 "mov %%r11, %c[r11](%[vcpu]) \n\t"
1491 "mov %%r12, %c[r12](%[vcpu]) \n\t"
1492 "mov %%r13, %c[r13](%[vcpu]) \n\t"
1493 "mov %%r14, %c[r14](%[vcpu]) \n\t"
1494 "mov %%r15, %c[r15](%[vcpu]) \n\t"
1495
1496 "pop %%r15; pop %%r14; pop %%r13; pop %%r12;"
1497 "pop %%r11; pop %%r10; pop %%r9; pop %%r8;"
1498 "pop %%rbp; pop %%rdi; pop %%rsi;"
1499 "pop %%rdx; pop %%rcx; pop %%rbx; \n\t"
1500#else
1501 "mov %%ebx, %c[rbx](%[vcpu]) \n\t"
1502 "mov %%ecx, %c[rcx](%[vcpu]) \n\t"
1503 "mov %%edx, %c[rdx](%[vcpu]) \n\t"
1504 "mov %%esi, %c[rsi](%[vcpu]) \n\t"
1505 "mov %%edi, %c[rdi](%[vcpu]) \n\t"
1506 "mov %%ebp, %c[rbp](%[vcpu]) \n\t"
1507
1508 "pop %%ebp; pop %%edi; pop %%esi;"
1509 "pop %%edx; pop %%ecx; pop %%ebx; \n\t"
1510#endif
1511 :
1512 : [vcpu]"a"(vcpu),
1513 [svm]"i"(offsetof(struct kvm_vcpu, svm)),
1514 [vmcb]"i"(offsetof(struct vcpu_svm, vmcb_pa)),
1515 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
1516 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
1517 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
1518 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
1519 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
1520 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP]))
05b3e0c2 1521#ifdef CONFIG_X86_64
6aa8b732
AK		 1522 ,[r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
1523 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
1524 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
1525 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
1526 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
1527 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
1528 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
1529 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15]))
1530#endif
1531 : "cc", "memory" );
1532
36241b8c
AK		 1533 fx_save(vcpu->guest_fx_image);
1534 fx_restore(vcpu->host_fx_image);
1535
6aa8b732
AK		 1536 if ((vcpu->svm->vmcb->save.dr7 & 0xff))
1537 load_db_regs(vcpu->svm->host_db_regs);
1538
1539 vcpu->cr2 = vcpu->svm->vmcb->save.cr2;
1540
1541 write_dr6(vcpu->svm->host_dr6);
1542 write_dr7(vcpu->svm->host_dr7);
1543 kvm_write_cr2(vcpu->svm->host_cr2);
1544
1545 load_fs(fs_selector);
1546 load_gs(gs_selector);
1547 load_ldt(ldt_selector);
1548 load_host_msrs(vcpu);
1549
1550 reload_tss(vcpu);
1551
1552 stgi();
1553
1554 kvm_reput_irq(vcpu);
1555
1556 vcpu->svm->next_rip = 0;
1557
1558 if (vcpu->svm->vmcb->control.exit_code == SVM_EXIT_ERR) {
1559 kvm_run->exit_type = KVM_EXIT_TYPE_FAIL_ENTRY;
1560 kvm_run->exit_reason = vcpu->svm->vmcb->control.exit_code;
c1150d8c 1561 post_kvm_run_save(vcpu, kvm_run);
6aa8b732
AK		 1562 return 0;
1563 }
1564
1565 if (handle_exit(vcpu, kvm_run)) {
1566 if (signal_pending(current)) {
1567 ++kvm_stat.signal_exits;
c1150d8c
DL		 1568 post_kvm_run_save(vcpu, kvm_run);
1569 return -EINTR;
1570 }
1571
1572 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
1573 ++kvm_stat.request_irq_exits;
1574 post_kvm_run_save(vcpu, kvm_run);
6aa8b732
AK		 1575 return -EINTR;
1576 }
1577 kvm_resched(vcpu);
1578 goto again;
1579 }
c1150d8c 1580 post_kvm_run_save(vcpu, kvm_run);
6aa8b732
AK		 1581 return 0;
1582}
1583
1584static void svm_flush_tlb(struct kvm_vcpu *vcpu)
1585{
1586 force_new_asid(vcpu);
1587}
1588
1589static void svm_set_cr3(struct kvm_vcpu *vcpu, unsigned long root)
1590{
1591 vcpu->svm->vmcb->save.cr3 = root;
1592 force_new_asid(vcpu);
1593}
1594
1595static void svm_inject_page_fault(struct kvm_vcpu *vcpu,
1596 unsigned long addr,
1597 uint32_t err_code)
1598{
1599 uint32_t exit_int_info = vcpu->svm->vmcb->control.exit_int_info;
1600
1601 ++kvm_stat.pf_guest;
1602
1603 if (is_page_fault(exit_int_info)) {
1604
1605 vcpu->svm->vmcb->control.event_inj_err = 0;
1606 vcpu->svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
1607 SVM_EVTINJ_VALID_ERR |
1608 SVM_EVTINJ_TYPE_EXEPT |
1609 DF_VECTOR;
1610 return;
1611 }
1612 vcpu->cr2 = addr;
1613 vcpu->svm->vmcb->save.cr2 = addr;
1614 vcpu->svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
1615 SVM_EVTINJ_VALID_ERR |
1616 SVM_EVTINJ_TYPE_EXEPT |
1617 PF_VECTOR;
1618 vcpu->svm->vmcb->control.event_inj_err = err_code;
1619}
1620
1621
1622static int is_disabled(void)
1623{
1624 return 0;
1625}
1626
1627static struct kvm_arch_ops svm_arch_ops = {
1628 .cpu_has_kvm_support = has_svm,
1629 .disabled_by_bios = is_disabled,
1630 .hardware_setup = svm_hardware_setup,
1631 .hardware_unsetup = svm_hardware_unsetup,
1632 .hardware_enable = svm_hardware_enable,
1633 .hardware_disable = svm_hardware_disable,
1634
1635 .vcpu_create = svm_create_vcpu,
1636 .vcpu_free = svm_free_vcpu,
1637
1638 .vcpu_load = svm_vcpu_load,
1639 .vcpu_put = svm_vcpu_put,
1640
1641 .set_guest_debug = svm_guest_debug,
1642 .get_msr = svm_get_msr,
1643 .set_msr = svm_set_msr,
1644 .get_segment_base = svm_get_segment_base,
1645 .get_segment = svm_get_segment,
1646 .set_segment = svm_set_segment,
6aa8b732
AK		 1647 .get_cs_db_l_bits = svm_get_cs_db_l_bits,
1648 .set_cr0 = svm_set_cr0,
1649 .set_cr0_no_modeswitch = svm_set_cr0,
1650 .set_cr3 = svm_set_cr3,
1651 .set_cr4 = svm_set_cr4,
1652 .set_efer = svm_set_efer,
1653 .get_idt = svm_get_idt,
1654 .set_idt = svm_set_idt,
1655 .get_gdt = svm_get_gdt,
1656 .set_gdt = svm_set_gdt,
1657 .get_dr = svm_get_dr,
1658 .set_dr = svm_set_dr,
1659 .cache_regs = svm_cache_regs,
1660 .decache_regs = svm_decache_regs,
1661 .get_rflags = svm_get_rflags,
1662 .set_rflags = svm_set_rflags,
1663
1664 .invlpg = svm_invlpg,
1665 .tlb_flush = svm_flush_tlb,
1666 .inject_page_fault = svm_inject_page_fault,
1667
1668 .inject_gp = svm_inject_gp,
1669
1670 .run = svm_vcpu_run,
1671 .skip_emulated_instruction = skip_emulated_instruction,
1672 .vcpu_setup = svm_vcpu_setup,
1673};
1674
1675static int __init svm_init(void)
1676{
873a7c42 1677 return kvm_init_arch(&svm_arch_ops, THIS_MODULE);
6aa8b732
AK		 1678}
1679
1680static void __exit svm_exit(void)
1681{
1682 kvm_exit_arch();
1683}
1684
1685module_init(svm_init)
1686module_exit(svm_exit)
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