[mirror_ubuntu-jammy-kernel.git] / drivers / leds / leds-lp5521.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * LP5521 LED chip driver.
 *
 * Copyright (C) 2010 Nokia Corporation
 * Copyright (C) 2012 Texas Instruments
 *
 * Contact: Samu Onkalo <samu.p.onkalo@nokia.com>
 *          Milo(Woogyom) Kim <milo.kim@ti.com>
 */

#include <linux/delay.h>
#include <linux/firmware.h>
#include <linux/i2c.h>
#include <linux/leds.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/platform_data/leds-lp55xx.h>
#include <linux/slab.h>
#include <linux/of.h>

#include "leds-lp55xx-common.h"

#define LP5521_PROGRAM_LENGTH		32
#define LP5521_MAX_LEDS			3
#define LP5521_CMD_DIRECT		0x3F

/* Registers */
#define LP5521_REG_ENABLE		0x00
#define LP5521_REG_OP_MODE		0x01
#define LP5521_REG_R_PWM		0x02
#define LP5521_REG_G_PWM		0x03
#define LP5521_REG_B_PWM		0x04
#define LP5521_REG_R_CURRENT		0x05
#define LP5521_REG_G_CURRENT		0x06
#define LP5521_REG_B_CURRENT		0x07
#define LP5521_REG_CONFIG		0x08
#define LP5521_REG_STATUS		0x0C
#define LP5521_REG_RESET		0x0D
#define LP5521_REG_R_PROG_MEM		0x10
#define LP5521_REG_G_PROG_MEM		0x30
#define LP5521_REG_B_PROG_MEM		0x50

/* Base register to set LED current */
#define LP5521_REG_LED_CURRENT_BASE	LP5521_REG_R_CURRENT
/* Base register to set the brightness */
#define LP5521_REG_LED_PWM_BASE		LP5521_REG_R_PWM

/* Bits in ENABLE register */
#define LP5521_MASTER_ENABLE		0x40	/* Chip master enable */
#define LP5521_LOGARITHMIC_PWM		0x80	/* Logarithmic PWM adjustment */
#define LP5521_EXEC_RUN			0x2A
#define LP5521_ENABLE_DEFAULT	\
	(LP5521_MASTER_ENABLE | LP5521_LOGARITHMIC_PWM)
#define LP5521_ENABLE_RUN_PROGRAM	\
	(LP5521_ENABLE_DEFAULT | LP5521_EXEC_RUN)

/* CONFIG register */
#define LP5521_PWM_HF			0x40	/* PWM: 0 = 256Hz, 1 = 558Hz */
#define LP5521_PWRSAVE_EN		0x20	/* 1 = Power save mode */
#define LP5521_CP_MODE_OFF		0	/* Charge pump (CP) off */
#define LP5521_CP_MODE_BYPASS		8	/* CP forced to bypass mode */
#define LP5521_CP_MODE_1X5		0x10	/* CP forced to 1.5x mode */
#define LP5521_CP_MODE_AUTO		0x18	/* Automatic mode selection */
#define LP5521_R_TO_BATT		0x04	/* R out: 0 = CP, 1 = Vbat */
#define LP5521_CLK_INT			0x01	/* Internal clock */
#define LP5521_DEFAULT_CFG		\
	(LP5521_PWM_HF | LP5521_PWRSAVE_EN | LP5521_CP_MODE_AUTO)

/* Status */
#define LP5521_EXT_CLK_USED		0x08

/* default R channel current register value */
#define LP5521_REG_R_CURR_DEFAULT	0xAF

/* Reset register value */
#define LP5521_RESET			0xFF

/* Program Memory Operations */
#define LP5521_MODE_R_M			0x30	/* Operation Mode Register */
#define LP5521_MODE_G_M			0x0C
#define LP5521_MODE_B_M			0x03
#define LP5521_LOAD_R			0x10
#define LP5521_LOAD_G			0x04
#define LP5521_LOAD_B			0x01

#define LP5521_R_IS_LOADING(mode)	\
	((mode & LP5521_MODE_R_M) == LP5521_LOAD_R)
#define LP5521_G_IS_LOADING(mode)	\
	((mode & LP5521_MODE_G_M) == LP5521_LOAD_G)
#define LP5521_B_IS_LOADING(mode)	\
	((mode & LP5521_MODE_B_M) == LP5521_LOAD_B)

#define LP5521_EXEC_R_M			0x30	/* Enable Register */
#define LP5521_EXEC_G_M			0x0C
#define LP5521_EXEC_B_M			0x03
#define LP5521_EXEC_M			0x3F
#define LP5521_RUN_R			0x20
#define LP5521_RUN_G			0x08
#define LP5521_RUN_B			0x02

static inline void lp5521_wait_opmode_done(void)
{
	/* operation mode change needs to be longer than 153 us */
	usleep_range(200, 300);
}

static inline void lp5521_wait_enable_done(void)
{
	/* it takes more 488 us to update ENABLE register */
	usleep_range(500, 600);
}

static void lp5521_set_led_current(struct lp55xx_led *led, u8 led_current)
{
	led->led_current = led_current;
	lp55xx_write(led->chip, LP5521_REG_LED_CURRENT_BASE + led->chan_nr,
		led_current);
}

static void lp5521_load_engine(struct lp55xx_chip *chip)
{
	enum lp55xx_engine_index idx = chip->engine_idx;
	static const u8 mask[] = {
		[LP55XX_ENGINE_1] = LP5521_MODE_R_M,
		[LP55XX_ENGINE_2] = LP5521_MODE_G_M,
		[LP55XX_ENGINE_3] = LP5521_MODE_B_M,
	};

	static const u8 val[] = {
		[LP55XX_ENGINE_1] = LP5521_LOAD_R,
		[LP55XX_ENGINE_2] = LP5521_LOAD_G,
		[LP55XX_ENGINE_3] = LP5521_LOAD_B,
	};

	lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], val[idx]);

	lp5521_wait_opmode_done();
}

static void lp5521_stop_all_engines(struct lp55xx_chip *chip)
{
	lp55xx_write(chip, LP5521_REG_OP_MODE, 0);
	lp5521_wait_opmode_done();
}

static void lp5521_stop_engine(struct lp55xx_chip *chip)
{
	enum lp55xx_engine_index idx = chip->engine_idx;
	static const u8 mask[] = {
		[LP55XX_ENGINE_1] = LP5521_MODE_R_M,
		[LP55XX_ENGINE_2] = LP5521_MODE_G_M,
		[LP55XX_ENGINE_3] = LP5521_MODE_B_M,
	};

	lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], 0);

	lp5521_wait_opmode_done();
}

static void lp5521_run_engine(struct lp55xx_chip *chip, bool start)
{
	int ret;
	u8 mode;
	u8 exec;

	/* stop engine */
	if (!start) {
		lp5521_stop_engine(chip);
		lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT);
		lp5521_wait_opmode_done();
		return;
	}

	/*
	 * To run the engine,
	 * operation mode and enable register should updated at the same time
	 */

	ret = lp55xx_read(chip, LP5521_REG_OP_MODE, &mode);
	if (ret)
		return;

	ret = lp55xx_read(chip, LP5521_REG_ENABLE, &exec);
	if (ret)
		return;

	/* change operation mode to RUN only when each engine is loading */
	if (LP5521_R_IS_LOADING(mode)) {
		mode = (mode & ~LP5521_MODE_R_M) | LP5521_RUN_R;
		exec = (exec & ~LP5521_EXEC_R_M) | LP5521_RUN_R;
	}

	if (LP5521_G_IS_LOADING(mode)) {
		mode = (mode & ~LP5521_MODE_G_M) | LP5521_RUN_G;
		exec = (exec & ~LP5521_EXEC_G_M) | LP5521_RUN_G;
	}

	if (LP5521_B_IS_LOADING(mode)) {
		mode = (mode & ~LP5521_MODE_B_M) | LP5521_RUN_B;
		exec = (exec & ~LP5521_EXEC_B_M) | LP5521_RUN_B;
	}

	lp55xx_write(chip, LP5521_REG_OP_MODE, mode);
	lp5521_wait_opmode_done();

	lp55xx_update_bits(chip, LP5521_REG_ENABLE, LP5521_EXEC_M, exec);
	lp5521_wait_enable_done();
}

static int lp5521_update_program_memory(struct lp55xx_chip *chip,
					const u8 *data, size_t size)
{
	enum lp55xx_engine_index idx = chip->engine_idx;
	u8 pattern[LP5521_PROGRAM_LENGTH] = {0};
	static const u8 addr[] = {
		[LP55XX_ENGINE_1] = LP5521_REG_R_PROG_MEM,
		[LP55XX_ENGINE_2] = LP5521_REG_G_PROG_MEM,
		[LP55XX_ENGINE_3] = LP5521_REG_B_PROG_MEM,
	};
	unsigned cmd;
	char c[3];
	int nrchars;
	int ret;
	int offset = 0;
	int i = 0;

	while ((offset < size - 1) && (i < LP5521_PROGRAM_LENGTH)) {
		/* separate sscanfs because length is working only for %s */
		ret = sscanf(data + offset, "%2s%n ", c, &nrchars);
		if (ret != 1)
			goto err;

		ret = sscanf(c, "%2x", &cmd);
		if (ret != 1)
			goto err;

		pattern[i] = (u8)cmd;
		offset += nrchars;
		i++;
	}

	/* Each instruction is 16bit long. Check that length is even */
	if (i % 2)
		goto err;

	for (i = 0; i < LP5521_PROGRAM_LENGTH; i++) {
		ret = lp55xx_write(chip, addr[idx] + i, pattern[i]);
		if (ret)
			return -EINVAL;
	}

	return size;

err:
	dev_err(&chip->cl->dev, "wrong pattern format\n");
	return -EINVAL;
}

static void lp5521_firmware_loaded(struct lp55xx_chip *chip)
{
	const struct firmware *fw = chip->fw;

	if (fw->size > LP5521_PROGRAM_LENGTH) {
		dev_err(&chip->cl->dev, "firmware data size overflow: %zu\n",
			fw->size);
		return;
	}

	/*
	 * Program memory sequence
	 *  1) set engine mode to "LOAD"
	 *  2) write firmware data into program memory
	 */

	lp5521_load_engine(chip);
	lp5521_update_program_memory(chip, fw->data, fw->size);
}

static int lp5521_post_init_device(struct lp55xx_chip *chip)
{
	int ret;
	u8 val;

	/*
	 * Make sure that the chip is reset by reading back the r channel
	 * current reg. This is dummy read is required on some platforms -
	 * otherwise further access to the R G B channels in the
	 * LP5521_REG_ENABLE register will not have any effect - strange!
	 */
	ret = lp55xx_read(chip, LP5521_REG_R_CURRENT, &val);
	if (ret) {
		dev_err(&chip->cl->dev, "error in resetting chip\n");
		return ret;
	}
	if (val != LP5521_REG_R_CURR_DEFAULT) {
		dev_err(&chip->cl->dev,
			"unexpected data in register (expected 0x%x got 0x%x)\n",
			LP5521_REG_R_CURR_DEFAULT, val);
		ret = -EINVAL;
		return ret;
	}
	usleep_range(10000, 20000);

	/* Set all PWMs to direct control mode */
	ret = lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT);

	/* Update configuration for the clock setting */
	val = LP5521_DEFAULT_CFG;
	if (!lp55xx_is_extclk_used(chip))
		val |= LP5521_CLK_INT;

	ret = lp55xx_write(chip, LP5521_REG_CONFIG, val);
	if (ret)
		return ret;

	/* Initialize all channels PWM to zero -> leds off */
	lp55xx_write(chip, LP5521_REG_R_PWM, 0);
	lp55xx_write(chip, LP5521_REG_G_PWM, 0);
	lp55xx_write(chip, LP5521_REG_B_PWM, 0);

	/* Set engines are set to run state when OP_MODE enables engines */
	ret = lp55xx_write(chip, LP5521_REG_ENABLE, LP5521_ENABLE_RUN_PROGRAM);
	if (ret)
		return ret;

	lp5521_wait_enable_done();

	return 0;
}

static int lp5521_run_selftest(struct lp55xx_chip *chip, char *buf)
{
	struct lp55xx_platform_data *pdata = chip->pdata;
	int ret;
	u8 status;

	ret = lp55xx_read(chip, LP5521_REG_STATUS, &status);
	if (ret < 0)
		return ret;

	if (pdata->clock_mode != LP55XX_CLOCK_EXT)
		return 0;

	/* Check that ext clock is really in use if requested */
	if  ((status & LP5521_EXT_CLK_USED) == 0)
		return -EIO;

	return 0;
}

static int lp5521_multicolor_brightness(struct lp55xx_led *led)
{
	struct lp55xx_chip *chip = led->chip;
	int ret;
	int i;

	mutex_lock(&chip->lock);
	for (i = 0; i < led->mc_cdev.num_colors; i++) {
		ret = lp55xx_write(chip,
				   LP5521_REG_LED_PWM_BASE +
				   led->mc_cdev.subled_info[i].channel,
				   led->mc_cdev.subled_info[i].brightness);
		if (ret)
			break;
	}
	mutex_unlock(&chip->lock);
	return ret;
}

static int lp5521_led_brightness(struct lp55xx_led *led)
{
	struct lp55xx_chip *chip = led->chip;
	int ret;

	mutex_lock(&chip->lock);
	ret = lp55xx_write(chip, LP5521_REG_LED_PWM_BASE + led->chan_nr,
		led->brightness);
	mutex_unlock(&chip->lock);

	return ret;
}

static ssize_t show_engine_mode(struct device *dev,
				struct device_attribute *attr,
				char *buf, int nr)
{
	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
	struct lp55xx_chip *chip = led->chip;
	enum lp55xx_engine_mode mode = chip->engines[nr - 1].mode;

	switch (mode) {
	case LP55XX_ENGINE_RUN:
		return sprintf(buf, "run\n");
	case LP55XX_ENGINE_LOAD:
		return sprintf(buf, "load\n");
	case LP55XX_ENGINE_DISABLED:
	default:
		return sprintf(buf, "disabled\n");
	}
}
show_mode(1)
show_mode(2)
show_mode(3)

static ssize_t store_engine_mode(struct device *dev,
				 struct device_attribute *attr,
				 const char *buf, size_t len, int nr)
{
	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
	struct lp55xx_chip *chip = led->chip;
	struct lp55xx_engine *engine = &chip->engines[nr - 1];

	mutex_lock(&chip->lock);

	chip->engine_idx = nr;

	if (!strncmp(buf, "run", 3)) {
		lp5521_run_engine(chip, true);
		engine->mode = LP55XX_ENGINE_RUN;
	} else if (!strncmp(buf, "load", 4)) {
		lp5521_stop_engine(chip);
		lp5521_load_engine(chip);
		engine->mode = LP55XX_ENGINE_LOAD;
	} else if (!strncmp(buf, "disabled", 8)) {
		lp5521_stop_engine(chip);
		engine->mode = LP55XX_ENGINE_DISABLED;
	}

	mutex_unlock(&chip->lock);

	return len;
}
store_mode(1)
store_mode(2)
store_mode(3)

static ssize_t store_engine_load(struct device *dev,
			     struct device_attribute *attr,
			     const char *buf, size_t len, int nr)
{
	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
	struct lp55xx_chip *chip = led->chip;
	int ret;

	mutex_lock(&chip->lock);

	chip->engine_idx = nr;
	lp5521_load_engine(chip);
	ret = lp5521_update_program_memory(chip, buf, len);

	mutex_unlock(&chip->lock);

	return ret;
}
store_load(1)
store_load(2)
store_load(3)

static ssize_t lp5521_selftest(struct device *dev,
			       struct device_attribute *attr,
			       char *buf)
{
	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
	struct lp55xx_chip *chip = led->chip;
	int ret;

	mutex_lock(&chip->lock);
	ret = lp5521_run_selftest(chip, buf);
	mutex_unlock(&chip->lock);

	return scnprintf(buf, PAGE_SIZE, "%s\n", ret ? "FAIL" : "OK");
}

/* device attributes */
static LP55XX_DEV_ATTR_RW(engine1_mode, show_engine1_mode, store_engine1_mode);
static LP55XX_DEV_ATTR_RW(engine2_mode, show_engine2_mode, store_engine2_mode);
static LP55XX_DEV_ATTR_RW(engine3_mode, show_engine3_mode, store_engine3_mode);
static LP55XX_DEV_ATTR_WO(engine1_load, store_engine1_load);
static LP55XX_DEV_ATTR_WO(engine2_load, store_engine2_load);
static LP55XX_DEV_ATTR_WO(engine3_load, store_engine3_load);
static LP55XX_DEV_ATTR_RO(selftest, lp5521_selftest);

static struct attribute *lp5521_attributes[] = {
	&dev_attr_engine1_mode.attr,
	&dev_attr_engine2_mode.attr,
	&dev_attr_engine3_mode.attr,
	&dev_attr_engine1_load.attr,
	&dev_attr_engine2_load.attr,
	&dev_attr_engine3_load.attr,
	&dev_attr_selftest.attr,
	NULL
};

static const struct attribute_group lp5521_group = {
	.attrs = lp5521_attributes,
};

/* Chip specific configurations */
static struct lp55xx_device_config lp5521_cfg = {
	.reset = {
		.addr = LP5521_REG_RESET,
		.val  = LP5521_RESET,
	},
	.enable = {
		.addr = LP5521_REG_ENABLE,
		.val  = LP5521_ENABLE_DEFAULT,
	},
	.max_channel  = LP5521_MAX_LEDS,
	.post_init_device   = lp5521_post_init_device,
	.brightness_fn      = lp5521_led_brightness,
	.multicolor_brightness_fn = lp5521_multicolor_brightness,
	.set_led_current    = lp5521_set_led_current,
	.firmware_cb        = lp5521_firmware_loaded,
	.run_engine         = lp5521_run_engine,
	.dev_attr_group     = &lp5521_group,
};

static int lp5521_probe(struct i2c_client *client,
			const struct i2c_device_id *id)
{
	int ret;
	struct lp55xx_chip *chip;
	struct lp55xx_led *led;
	struct lp55xx_platform_data *pdata = dev_get_platdata(&client->dev);
	struct device_node *np = dev_of_node(&client->dev);

	chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
	if (!chip)
		return -ENOMEM;

	chip->cfg = &lp5521_cfg;

	if (!pdata) {
		if (np) {
			pdata = lp55xx_of_populate_pdata(&client->dev, np,
							 chip);
			if (IS_ERR(pdata))
				return PTR_ERR(pdata);
		} else {
			dev_err(&client->dev, "no platform data\n");
			return -EINVAL;
		}
	}

	led = devm_kcalloc(&client->dev,
			pdata->num_channels, sizeof(*led), GFP_KERNEL);
	if (!led)
		return -ENOMEM;

	chip->cl = client;
	chip->pdata = pdata;

	mutex_init(&chip->lock);

	i2c_set_clientdata(client, led);

	ret = lp55xx_init_device(chip);
	if (ret)
		goto err_init;

	dev_info(&client->dev, "%s programmable led chip found\n", id->name);

	ret = lp55xx_register_leds(led, chip);
	if (ret)
		goto err_out;

	ret = lp55xx_register_sysfs(chip);
	if (ret) {
		dev_err(&client->dev, "registering sysfs failed\n");
		goto err_out;
	}

	return 0;

err_out:
	lp55xx_deinit_device(chip);
err_init:
	return ret;
}

static int lp5521_remove(struct i2c_client *client)
{
	struct lp55xx_led *led = i2c_get_clientdata(client);
	struct lp55xx_chip *chip = led->chip;

	lp5521_stop_all_engines(chip);
	lp55xx_unregister_sysfs(chip);
	lp55xx_deinit_device(chip);

	return 0;
}

static const struct i2c_device_id lp5521_id[] = {
	{ "lp5521", 0 }, /* Three channel chip */
	{ }
};
MODULE_DEVICE_TABLE(i2c, lp5521_id);

#ifdef CONFIG_OF
static const struct of_device_id of_lp5521_leds_match[] = {
	{ .compatible = "national,lp5521", },
	{},
};

MODULE_DEVICE_TABLE(of, of_lp5521_leds_match);
#endif
static struct i2c_driver lp5521_driver = {
	.driver = {
		.name	= "lp5521",
		.of_match_table = of_match_ptr(of_lp5521_leds_match),
	},
	.probe		= lp5521_probe,
	.remove		= lp5521_remove,
	.id_table	= lp5521_id,
};

module_i2c_driver(lp5521_driver);

MODULE_AUTHOR("Mathias Nyman, Yuri Zaporozhets, Samu Onkalo");
MODULE_AUTHOR("Milo Kim <milo.kim@ti.com>");
MODULE_DESCRIPTION("LP5521 LED engine");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
2b27bdcc	1	// SPDX-License-Identifier: GPL-2.0-only
500fe141 SO	2	/*
	3	* LP5521 LED chip driver.
	4	*
	5	* Copyright (C) 2010 Nokia Corporation
a2387cb9	6	* Copyright (C) 2012 Texas Instruments
500fe141 SO	7	*
500fe141 SO	8	* Contact: Samu Onkalo <samu.p.onkalo@nokia.com>
a2387cb9	9	* Milo(Woogyom) Kim <milo.kim@ti.com>
500fe141 SO	10	*/
500fe141 SO	11
500fe141	12	#include <linux/delay.h>
79bcc10b MWK	13	#include <linux/firmware.h>
79bcc10b MWK	14	#include <linux/i2c.h>
500fe141	15	#include <linux/leds.h>
79bcc10b MWK	16	#include <linux/module.h>
79bcc10b MWK	17	#include <linux/mutex.h>
6a0c9a47	18	#include <linux/platform_data/leds-lp55xx.h>
79bcc10b	19	#include <linux/slab.h>
7542a04b	20	#include <linux/of.h>
6a0c9a47 MWK	21
6a0c9a47 MWK	22	#include "leds-lp55xx-common.h"
500fe141	23
12f022d2 MWK	24	#define LP5521_PROGRAM_LENGTH 32
	25	#define LP5521_MAX_LEDS 3
	26	#define LP5521_CMD_DIRECT 0x3F
500fe141 SO	27
	28	/* Registers */
	29	#define LP5521_REG_ENABLE 0x00
	30	#define LP5521_REG_OP_MODE 0x01
	31	#define LP5521_REG_R_PWM 0x02
	32	#define LP5521_REG_G_PWM 0x03
	33	#define LP5521_REG_B_PWM 0x04
	34	#define LP5521_REG_R_CURRENT 0x05
	35	#define LP5521_REG_G_CURRENT 0x06
	36	#define LP5521_REG_B_CURRENT 0x07
	37	#define LP5521_REG_CONFIG 0x08
500fe141 SO	38	#define LP5521_REG_STATUS 0x0C
500fe141 SO	39	#define LP5521_REG_RESET 0x0D
500fe141 SO	40	#define LP5521_REG_R_PROG_MEM 0x10
	41	#define LP5521_REG_G_PROG_MEM 0x30
	42	#define LP5521_REG_B_PROG_MEM 0x50
	43
500fe141 SO	44	/* Base register to set LED current */
500fe141 SO	45	#define LP5521_REG_LED_CURRENT_BASE LP5521_REG_R_CURRENT
500fe141 SO	46	/* Base register to set the brightness */
	47	#define LP5521_REG_LED_PWM_BASE LP5521_REG_R_PWM
	48
	49	/* Bits in ENABLE register */
	50	#define LP5521_MASTER_ENABLE 0x40 /* Chip master enable */
	51	#define LP5521_LOGARITHMIC_PWM 0x80 /* Logarithmic PWM adjustment */
	52	#define LP5521_EXEC_RUN 0x2A
32a2f747 KM	53	#define LP5521_ENABLE_DEFAULT \
	54	(LP5521_MASTER_ENABLE \| LP5521_LOGARITHMIC_PWM)
	55	#define LP5521_ENABLE_RUN_PROGRAM \
	56	(LP5521_ENABLE_DEFAULT \| LP5521_EXEC_RUN)
500fe141	57
81f2a5b4 KM	58	/* CONFIG register */
	59	#define LP5521_PWM_HF 0x40 /* PWM: 0 = 256Hz, 1 = 558Hz */
	60	#define LP5521_PWRSAVE_EN 0x20 /* 1 = Power save mode */
	61	#define LP5521_CP_MODE_OFF 0 /* Charge pump (CP) off */
	62	#define LP5521_CP_MODE_BYPASS 8 /* CP forced to bypass mode */
	63	#define LP5521_CP_MODE_1X5 0x10 /* CP forced to 1.5x mode */
	64	#define LP5521_CP_MODE_AUTO 0x18 /* Automatic mode selection */
	65	#define LP5521_R_TO_BATT 0x04 /* R out: 0 = CP, 1 = Vbat */
	66	#define LP5521_CLK_INT 0x01 /* Internal clock */
	67	#define LP5521_DEFAULT_CFG \
	68	(LP5521_PWM_HF \| LP5521_PWRSAVE_EN \| LP5521_CP_MODE_AUTO)
	69
500fe141 SO	70	/* Status */
	71	#define LP5521_EXT_CLK_USED 0x08
	72
b3c49c05 SK	73	/* default R channel current register value */
	74	#define LP5521_REG_R_CURR_DEFAULT 0xAF
	75
48068d5d MWK	76	/* Reset register value */
	77	#define LP5521_RESET 0xFF
	78
9ce7cb17 MWK	79	/* Program Memory Operations */
	80	#define LP5521_MODE_R_M 0x30 /* Operation Mode Register */
	81	#define LP5521_MODE_G_M 0x0C
	82	#define LP5521_MODE_B_M 0x03
	83	#define LP5521_LOAD_R 0x10
	84	#define LP5521_LOAD_G 0x04
	85	#define LP5521_LOAD_B 0x01
	86
	87	#define LP5521_R_IS_LOADING(mode) \
	88	((mode & LP5521_MODE_R_M) == LP5521_LOAD_R)
	89	#define LP5521_G_IS_LOADING(mode) \
	90	((mode & LP5521_MODE_G_M) == LP5521_LOAD_G)
	91	#define LP5521_B_IS_LOADING(mode) \
	92	((mode & LP5521_MODE_B_M) == LP5521_LOAD_B)
	93
	94	#define LP5521_EXEC_R_M 0x30 /* Enable Register */
	95	#define LP5521_EXEC_G_M 0x0C
	96	#define LP5521_EXEC_B_M 0x03
	97	#define LP5521_EXEC_M 0x3F
	98	#define LP5521_RUN_R 0x20
	99	#define LP5521_RUN_G 0x08
	100	#define LP5521_RUN_B 0x02
500fe141	101
9ce7cb17 MWK	102	static inline void lp5521_wait_opmode_done(void)
	103	{
	104	/* operation mode change needs to be longer than 153 us */
	105	usleep_range(200, 300);
	106	}
	107
94482174 MWK	108	static inline void lp5521_wait_enable_done(void)
	109	{
	110	/* it takes more 488 us to update ENABLE register */
	111	usleep_range(500, 600);
	112	}
	113
a96bfa13 MWK	114	static void lp5521_set_led_current(struct lp55xx_led *led, u8 led_current)
	115	{
	116	led->led_current = led_current;
	117	lp55xx_write(led->chip, LP5521_REG_LED_CURRENT_BASE + led->chan_nr,
	118	led_current);
	119	}
	120
9ce7cb17	121	static void lp5521_load_engine(struct lp55xx_chip *chip)
500fe141	122	{
9ce7cb17	123	enum lp55xx_engine_index idx = chip->engine_idx;
f01a59ef	124	static const u8 mask[] = {
9ce7cb17 MWK	125	[LP55XX_ENGINE_1] = LP5521_MODE_R_M,
	126	[LP55XX_ENGINE_2] = LP5521_MODE_G_M,
	127	[LP55XX_ENGINE_3] = LP5521_MODE_B_M,
	128	};
500fe141	129
f01a59ef	130	static const u8 val[] = {
9ce7cb17 MWK	131	[LP55XX_ENGINE_1] = LP5521_LOAD_R,
	132	[LP55XX_ENGINE_2] = LP5521_LOAD_G,
	133	[LP55XX_ENGINE_3] = LP5521_LOAD_B,
	134	};
500fe141	135
9ce7cb17	136	lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], val[idx]);
500fe141	137
9ce7cb17 MWK	138	lp5521_wait_opmode_done();
9ce7cb17 MWK	139	}
500fe141	140
28c9266b	141	static void lp5521_stop_all_engines(struct lp55xx_chip *chip)
9ce7cb17 MWK	142	{
	143	lp55xx_write(chip, LP5521_REG_OP_MODE, 0);
	144	lp5521_wait_opmode_done();
500fe141 SO	145	}
500fe141 SO	146
28c9266b MK	147	static void lp5521_stop_engine(struct lp55xx_chip *chip)
	148	{
	149	enum lp55xx_engine_index idx = chip->engine_idx;
f01a59ef	150	static const u8 mask[] = {
28c9266b MK	151	[LP55XX_ENGINE_1] = LP5521_MODE_R_M,
	152	[LP55XX_ENGINE_2] = LP5521_MODE_G_M,
	153	[LP55XX_ENGINE_3] = LP5521_MODE_B_M,
	154	};
	155
	156	lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], 0);
	157
	158	lp5521_wait_opmode_done();
	159	}
	160
9ce7cb17	161	static void lp5521_run_engine(struct lp55xx_chip *chip, bool start)
500fe141	162	{
500fe141	163	int ret;
500fe141	164	u8 mode;
9ce7cb17	165	u8 exec;
500fe141	166
9ce7cb17 MWK	167	/* stop engine */
	168	if (!start) {
	169	lp5521_stop_engine(chip);
	170	lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT);
	171	lp5521_wait_opmode_done();
	172	return;
	173	}
	174
	175	/*
	176	* To run the engine,
	177	* operation mode and enable register should updated at the same time
	178	*/
	179
	180	ret = lp55xx_read(chip, LP5521_REG_OP_MODE, &mode);
5bc9ad77	181	if (ret)
9ce7cb17	182	return;
5bc9ad77	183
9ce7cb17	184	ret = lp55xx_read(chip, LP5521_REG_ENABLE, &exec);
5bc9ad77	185	if (ret)
9ce7cb17 MWK	186	return;
	187
	188	/* change operation mode to RUN only when each engine is loading */
	189	if (LP5521_R_IS_LOADING(mode)) {
	190	mode = (mode & ~LP5521_MODE_R_M) \| LP5521_RUN_R;
	191	exec = (exec & ~LP5521_EXEC_R_M) \| LP5521_RUN_R;
	192	}
	193
	194	if (LP5521_G_IS_LOADING(mode)) {
	195	mode = (mode & ~LP5521_MODE_G_M) \| LP5521_RUN_G;
	196	exec = (exec & ~LP5521_EXEC_G_M) \| LP5521_RUN_G;
	197	}
	198
	199	if (LP5521_B_IS_LOADING(mode)) {
	200	mode = (mode & ~LP5521_MODE_B_M) \| LP5521_RUN_B;
	201	exec = (exec & ~LP5521_EXEC_B_M) \| LP5521_RUN_B;
	202	}
	203
	204	lp55xx_write(chip, LP5521_REG_OP_MODE, mode);
	205	lp5521_wait_opmode_done();
	206
	207	lp55xx_update_bits(chip, LP5521_REG_ENABLE, LP5521_EXEC_M, exec);
	208	lp5521_wait_enable_done();
	209	}
	210
	211	static int lp5521_update_program_memory(struct lp55xx_chip *chip,
	212	const u8 *data, size_t size)
	213	{
	214	enum lp55xx_engine_index idx = chip->engine_idx;
	215	u8 pattern[LP5521_PROGRAM_LENGTH] = {0};
f01a59ef	216	static const u8 addr[] = {
9ce7cb17 MWK	217	[LP55XX_ENGINE_1] = LP5521_REG_R_PROG_MEM,
	218	[LP55XX_ENGINE_2] = LP5521_REG_G_PROG_MEM,
	219	[LP55XX_ENGINE_3] = LP5521_REG_B_PROG_MEM,
	220	};
	221	unsigned cmd;
	222	char c[3];
9ce7cb17	223	int nrchars;
9ce7cb17	224	int ret;
1eca0b3a MK	225	int offset = 0;
1eca0b3a MK	226	int i = 0;
9ce7cb17	227
9ce7cb17 MWK	228	while ((offset < size - 1) && (i < LP5521_PROGRAM_LENGTH)) {
	229	/* separate sscanfs because length is working only for %s */
	230	ret = sscanf(data + offset, "%2s%n ", c, &nrchars);
	231	if (ret != 1)
	232	goto err;
	233
	234	ret = sscanf(c, "%2x", &cmd);
	235	if (ret != 1)
	236	goto err;
	237
	238	pattern[i] = (u8)cmd;
	239	offset += nrchars;
	240	i++;
	241	}
	242
	243	/* Each instruction is 16bit long. Check that length is even */
	244	if (i % 2)
	245	goto err;
	246
1eca0b3a	247	for (i = 0; i < LP5521_PROGRAM_LENGTH; i++) {
c0e5e9b5	248	ret = lp55xx_write(chip, addr[idx] + i, pattern[i]);
e70988d1	249	if (ret)
c0e5e9b5	250	return -EINVAL;
c0e5e9b5 MK	251	}
c0e5e9b5 MK	252
c0e5e9b5	253	return size;
9ce7cb17 MWK	254
	255	err:
	256	dev_err(&chip->cl->dev, "wrong pattern format\n");
	257	return -EINVAL;
	258	}
	259
	260	static void lp5521_firmware_loaded(struct lp55xx_chip *chip)
	261	{
	262	const struct firmware *fw = chip->fw;
	263
	264	if (fw->size > LP5521_PROGRAM_LENGTH) {
	265	dev_err(&chip->cl->dev, "firmware data size overflow: %zu\n",
	266	fw->size);
	267	return;
	268	}
500fe141	269
9ce7cb17	270	/*
d1b7c934	271	* Program memory sequence
9ce7cb17 MWK	272	* 1) set engine mode to "LOAD"
	273	* 2) write firmware data into program memory
	274	*/
	275
	276	lp5521_load_engine(chip);
	277	lp5521_update_program_memory(chip, fw->data, fw->size);
500fe141 SO	278	}
500fe141 SO	279
ffbdccdb	280	static int lp5521_post_init_device(struct lp55xx_chip *chip)
500fe141	281	{
500fe141	282	int ret;
94482174	283	u8 val;
500fe141	284
94482174 MWK	285	/*
	286	* Make sure that the chip is reset by reading back the r channel
	287	* current reg. This is dummy read is required on some platforms -
	288	* otherwise further access to the R G B channels in the
	289	* LP5521_REG_ENABLE register will not have any effect - strange!
	290	*/
ffbdccdb	291	ret = lp55xx_read(chip, LP5521_REG_R_CURRENT, &val);
94482174	292	if (ret) {
ffbdccdb	293	dev_err(&chip->cl->dev, "error in resetting chip\n");
94482174 MWK	294	return ret;
	295	}
	296	if (val != LP5521_REG_R_CURR_DEFAULT) {
ffbdccdb	297	dev_err(&chip->cl->dev,
94482174 MWK	298	"unexpected data in register (expected 0x%x got 0x%x)\n",
	299	LP5521_REG_R_CURR_DEFAULT, val);
	300	ret = -EINVAL;
	301	return ret;
	302	}
	303	usleep_range(10000, 20000);
500fe141	304
500fe141	305	/* Set all PWMs to direct control mode */
ffbdccdb	306	ret = lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT);
500fe141	307
81f2a5b4 KM	308	/* Update configuration for the clock setting */
	309	val = LP5521_DEFAULT_CFG;
	310	if (!lp55xx_is_extclk_used(chip))
	311	val \|= LP5521_CLK_INT;
	312
ffbdccdb	313	ret = lp55xx_write(chip, LP5521_REG_CONFIG, val);
94482174 MWK	314	if (ret)
94482174 MWK	315	return ret;
500fe141 SO	316
500fe141 SO	317	/* Initialize all channels PWM to zero -> leds off */
ffbdccdb MWK	318	lp55xx_write(chip, LP5521_REG_R_PWM, 0);
	319	lp55xx_write(chip, LP5521_REG_G_PWM, 0);
	320	lp55xx_write(chip, LP5521_REG_B_PWM, 0);
500fe141 SO	321
500fe141 SO	322	/* Set engines are set to run state when OP_MODE enables engines */
ffbdccdb	323	ret = lp55xx_write(chip, LP5521_REG_ENABLE, LP5521_ENABLE_RUN_PROGRAM);
94482174 MWK	324	if (ret)
94482174 MWK	325	return ret;
500fe141	326
94482174 MWK	327	lp5521_wait_enable_done();
	328
	329	return 0;
500fe141 SO	330	}
500fe141 SO	331
9ca3bd80	332	static int lp5521_run_selftest(struct lp55xx_chip chip, char buf)
500fe141	333	{
9ca3bd80	334	struct lp55xx_platform_data *pdata = chip->pdata;
500fe141 SO	335	int ret;
	336	u8 status;
	337
9ca3bd80	338	ret = lp55xx_read(chip, LP5521_REG_STATUS, &status);
500fe141 SO	339	if (ret < 0)
	340	return ret;
	341
9ca3bd80 MWK	342	if (pdata->clock_mode != LP55XX_CLOCK_EXT)
	343	return 0;
	344
500fe141	345	/* Check that ext clock is really in use if requested */
9ca3bd80 MWK	346	if ((status & LP5521_EXT_CLK_USED) == 0)
	347	return -EIO;
	348
500fe141 SO	349	return 0;
	350	}
	351
00253ec2 DM	352	static int lp5521_multicolor_brightness(struct lp55xx_led *led)
	353	{
	354	struct lp55xx_chip *chip = led->chip;
	355	int ret;
	356	int i;
	357
	358	mutex_lock(&chip->lock);
	359	for (i = 0; i < led->mc_cdev.num_colors; i++) {
	360	ret = lp55xx_write(chip,
	361	LP5521_REG_LED_PWM_BASE +
	362	led->mc_cdev.subled_info[i].channel,
	363	led->mc_cdev.subled_info[i].brightness);
	364	if (ret)
	365	break;
	366	}
	367	mutex_unlock(&chip->lock);
	368	return ret;
	369	}
	370
95b2af63	371	static int lp5521_led_brightness(struct lp55xx_led *led)
500fe141	372	{
a6e4679a	373	struct lp55xx_chip *chip = led->chip;
95b2af63	374	int ret;
500fe141 SO	375
500fe141 SO	376	mutex_lock(&chip->lock);
95b2af63	377	ret = lp55xx_write(chip, LP5521_REG_LED_PWM_BASE + led->chan_nr,
500fe141 SO	378	led->brightness);
500fe141 SO	379	mutex_unlock(&chip->lock);
95b2af63 AL	380
95b2af63 AL	381	return ret;
500fe141 SO	382	}
500fe141 SO	383
c0e5e9b5 MK	384	static ssize_t show_engine_mode(struct device *dev,
	385	struct device_attribute *attr,
	386	char *buf, int nr)
	387	{
	388	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
	389	struct lp55xx_chip *chip = led->chip;
	390	enum lp55xx_engine_mode mode = chip->engines[nr - 1].mode;
	391
	392	switch (mode) {
	393	case LP55XX_ENGINE_RUN:
	394	return sprintf(buf, "run\n");
	395	case LP55XX_ENGINE_LOAD:
	396	return sprintf(buf, "load\n");
	397	case LP55XX_ENGINE_DISABLED:
	398	default:
	399	return sprintf(buf, "disabled\n");
	400	}
	401	}
	402	show_mode(1)
	403	show_mode(2)
	404	show_mode(3)
	405
	406	static ssize_t store_engine_mode(struct device *dev,
	407	struct device_attribute *attr,
	408	const char *buf, size_t len, int nr)
	409	{
	410	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
	411	struct lp55xx_chip *chip = led->chip;
	412	struct lp55xx_engine *engine = &chip->engines[nr - 1];
	413
	414	mutex_lock(&chip->lock);
	415
	416	chip->engine_idx = nr;
	417
	418	if (!strncmp(buf, "run", 3)) {
	419	lp5521_run_engine(chip, true);
	420	engine->mode = LP55XX_ENGINE_RUN;
	421	} else if (!strncmp(buf, "load", 4)) {
	422	lp5521_stop_engine(chip);
	423	lp5521_load_engine(chip);
	424	engine->mode = LP55XX_ENGINE_LOAD;
	425	} else if (!strncmp(buf, "disabled", 8)) {
	426	lp5521_stop_engine(chip);
	427	engine->mode = LP55XX_ENGINE_DISABLED;
	428	}
	429
	430	mutex_unlock(&chip->lock);
	431
	432	return len;
	433	}
	434	store_mode(1)
	435	store_mode(2)
	436	store_mode(3)
	437
	438	static ssize_t store_engine_load(struct device *dev,
	439	struct device_attribute *attr,
	440	const char *buf, size_t len, int nr)
	441	{
	442	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
	443	struct lp55xx_chip *chip = led->chip;
e70988d1	444	int ret;
c0e5e9b5 MK	445
	446	mutex_lock(&chip->lock);
	447
	448	chip->engine_idx = nr;
	449	lp5521_load_engine(chip);
e70988d1	450	ret = lp5521_update_program_memory(chip, buf, len);
c0e5e9b5 MK	451
	452	mutex_unlock(&chip->lock);
	453
e70988d1	454	return ret;
c0e5e9b5 MK	455	}
	456	store_load(1)
	457	store_load(2)
	458	store_load(3)
	459
500fe141 SO	460	static ssize_t lp5521_selftest(struct device *dev,
	461	struct device_attribute *attr,
	462	char *buf)
	463	{
9ca3bd80 MWK	464	struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
9ca3bd80 MWK	465	struct lp55xx_chip *chip = led->chip;
500fe141 SO	466	int ret;
	467
	468	mutex_lock(&chip->lock);
	469	ret = lp5521_run_selftest(chip, buf);
	470	mutex_unlock(&chip->lock);
24d32128 KM	471
24d32128 KM	472	return scnprintf(buf, PAGE_SIZE, "%s\n", ret ? "FAIL" : "OK");
500fe141 SO	473	}
500fe141 SO	474
500fe141	475	/* device attributes */
c0e5e9b5 MK	476	static LP55XX_DEV_ATTR_RW(engine1_mode, show_engine1_mode, store_engine1_mode);
	477	static LP55XX_DEV_ATTR_RW(engine2_mode, show_engine2_mode, store_engine2_mode);
	478	static LP55XX_DEV_ATTR_RW(engine3_mode, show_engine3_mode, store_engine3_mode);
	479	static LP55XX_DEV_ATTR_WO(engine1_load, store_engine1_load);
	480	static LP55XX_DEV_ATTR_WO(engine2_load, store_engine2_load);
	481	static LP55XX_DEV_ATTR_WO(engine3_load, store_engine3_load);
	482	static LP55XX_DEV_ATTR_RO(selftest, lp5521_selftest);
500fe141 SO	483
500fe141 SO	484	static struct attribute *lp5521_attributes[] = {
c0e5e9b5 MK	485	&dev_attr_engine1_mode.attr,
	486	&dev_attr_engine2_mode.attr,
	487	&dev_attr_engine3_mode.attr,
	488	&dev_attr_engine1_load.attr,
	489	&dev_attr_engine2_load.attr,
	490	&dev_attr_engine3_load.attr,
500fe141	491	&dev_attr_selftest.attr,
500fe141 SO	492	NULL
	493	};
	494
	495	static const struct attribute_group lp5521_group = {
	496	.attrs = lp5521_attributes,
	497	};
	498
48068d5d MWK	499	/* Chip specific configurations */
	500	static struct lp55xx_device_config lp5521_cfg = {
	501	.reset = {
	502	.addr = LP5521_REG_RESET,
	503	.val = LP5521_RESET,
	504	},
e3a700d8 MWK	505	.enable = {
	506	.addr = LP5521_REG_ENABLE,
	507	.val = LP5521_ENABLE_DEFAULT,
	508	},
0e202346	509	.max_channel = LP5521_MAX_LEDS,
ffbdccdb	510	.post_init_device = lp5521_post_init_device,
95b2af63	511	.brightness_fn = lp5521_led_brightness,
00253ec2	512	.multicolor_brightness_fn = lp5521_multicolor_brightness,
a96bfa13	513	.set_led_current = lp5521_set_led_current,
9ce7cb17 MWK	514	.firmware_cb = lp5521_firmware_loaded,
9ce7cb17 MWK	515	.run_engine = lp5521_run_engine,
e73c0ce6	516	.dev_attr_group = &lp5521_group,
48068d5d MWK	517	};
48068d5d MWK	518
98ea1ea2	519	static int lp5521_probe(struct i2c_client *client,
500fe141 SO	520	const struct i2c_device_id *id)
500fe141 SO	521	{
1904f83d	522	int ret;
6a0c9a47 MWK	523	struct lp55xx_chip *chip;
6a0c9a47 MWK	524	struct lp55xx_led *led;
ed133352	525	struct lp55xx_platform_data *pdata = dev_get_platdata(&client->dev);
8853c95e	526	struct device_node *np = dev_of_node(&client->dev);
7542a04b	527
92a81562 DM	528	chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
	529	if (!chip)
	530	return -ENOMEM;
	531
	532	chip->cfg = &lp5521_cfg;
	533
ed133352	534	if (!pdata) {
7542a04b	535	if (np) {
92a81562 DM	536	pdata = lp55xx_of_populate_pdata(&client->dev, np,
92a81562 DM	537	chip);
ed133352 MK	538	if (IS_ERR(pdata))
ed133352 MK	539	return PTR_ERR(pdata);
7542a04b LW	540	} else {
	541	dev_err(&client->dev, "no platform data\n");
	542	return -EINVAL;
	543	}
500fe141 SO	544	}
500fe141 SO	545
a86854d0 KC	546	led = devm_kcalloc(&client->dev,
a86854d0 KC	547	pdata->num_channels, sizeof(*led), GFP_KERNEL);
6a0c9a47 MWK	548	if (!led)
	549	return -ENOMEM;
	550
	551	chip->cl = client;
	552	chip->pdata = pdata;
	553
	554	mutex_init(&chip->lock);
500fe141	555
6a0c9a47	556	i2c_set_clientdata(client, led);
500fe141	557
22ebeb48	558	ret = lp55xx_init_device(chip);
944f7b1d	559	if (ret)
f6c64c6f	560	goto err_init;
500fe141 SO	561
	562	dev_info(&client->dev, "%s programmable led chip found\n", id->name);
	563
9e9b3db1	564	ret = lp55xx_register_leds(led, chip);
f6524808	565	if (ret)
c732eaf0	566	goto err_out;
500fe141	567
e73c0ce6	568	ret = lp55xx_register_sysfs(chip);
500fe141 SO	569	if (ret) {
500fe141 SO	570	dev_err(&client->dev, "registering sysfs failed\n");
c732eaf0	571	goto err_out;
500fe141	572	}
e73c0ce6 MWK	573
	574	return 0;
	575
c732eaf0	576	err_out:
6ce61762	577	lp55xx_deinit_device(chip);
f6c64c6f	578	err_init:
500fe141 SO	579	return ret;
	580	}
	581
678e8a6b	582	static int lp5521_remove(struct i2c_client *client)
500fe141	583	{
6ce61762 MWK	584	struct lp55xx_led *led = i2c_get_clientdata(client);
6ce61762 MWK	585	struct lp55xx_chip *chip = led->chip;
500fe141	586
28c9266b	587	lp5521_stop_all_engines(chip);
87cc4bde	588	lp55xx_unregister_sysfs(chip);
6ce61762	589	lp55xx_deinit_device(chip);
500fe141	590
500fe141 SO	591	return 0;
	592	}
	593
	594	static const struct i2c_device_id lp5521_id[] = {
	595	{ "lp5521", 0 }, /* Three channel chip */
	596	{ }
	597	};
	598	MODULE_DEVICE_TABLE(i2c, lp5521_id);
	599
b548a34b AL	600	#ifdef CONFIG_OF
	601	static const struct of_device_id of_lp5521_leds_match[] = {
	602	{ .compatible = "national,lp5521", },
	603	{},
	604	};
	605
	606	MODULE_DEVICE_TABLE(of, of_lp5521_leds_match);
	607	#endif
500fe141 SO	608	static struct i2c_driver lp5521_driver = {
	609	.driver = {
	610	.name = "lp5521",
b548a34b	611	.of_match_table = of_match_ptr(of_lp5521_leds_match),
500fe141 SO	612	},
500fe141 SO	613	.probe = lp5521_probe,
df07cf81	614	.remove = lp5521_remove,
500fe141 SO	615	.id_table = lp5521_id,
	616	};
	617
09a0d183	618	module_i2c_driver(lp5521_driver);
500fe141 SO	619
500fe141 SO	620	MODULE_AUTHOR("Mathias Nyman, Yuri Zaporozhets, Samu Onkalo");
a2387cb9	621	MODULE_AUTHOR("Milo Kim <milo.kim@ti.com>");
500fe141 SO	622	MODULE_DESCRIPTION("LP5521 LED engine");
500fe141 SO	623	MODULE_LICENSE("GPL v2");