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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * PowerMac G5 SMU driver | |
3 | * | |
4 | * Copyright 2004 J. Mayer <l_indien@magic.fr> | |
5 | * Copyright 2005 Benjamin Herrenschmidt, IBM Corp. | |
6 | * | |
7 | * Released under the term of the GNU GPL v2. | |
8 | */ | |
9 | ||
10 | /* | |
1da177e4 | 11 | * TODO: |
0365ba7f BH |
12 | * - maybe add timeout to commands ? |
13 | * - blocking version of time functions | |
14 | * - polling version of i2c commands (including timer that works with | |
f18816ba | 15 | * interrupts off) |
0365ba7f BH |
16 | * - maybe avoid some data copies with i2c by directly using the smu cmd |
17 | * buffer and a lower level internal interface | |
18 | * - understand SMU -> CPU events and implement reception of them via | |
19 | * the userland interface | |
1da177e4 LT |
20 | */ |
21 | ||
1da177e4 LT |
22 | #include <linux/types.h> |
23 | #include <linux/kernel.h> | |
24 | #include <linux/device.h> | |
25 | #include <linux/dmapool.h> | |
26 | #include <linux/bootmem.h> | |
27 | #include <linux/vmalloc.h> | |
28 | #include <linux/highmem.h> | |
29 | #include <linux/jiffies.h> | |
30 | #include <linux/interrupt.h> | |
31 | #include <linux/rtc.h> | |
0365ba7f BH |
32 | #include <linux/completion.h> |
33 | #include <linux/miscdevice.h> | |
34 | #include <linux/delay.h> | |
0365ba7f | 35 | #include <linux/poll.h> |
14cc3e2b | 36 | #include <linux/mutex.h> |
ad9e05ae SR |
37 | #include <linux/of_device.h> |
38 | #include <linux/of_platform.h> | |
5a0e3ad6 | 39 | #include <linux/slab.h> |
1da177e4 LT |
40 | |
41 | #include <asm/byteorder.h> | |
42 | #include <asm/io.h> | |
43 | #include <asm/prom.h> | |
44 | #include <asm/machdep.h> | |
45 | #include <asm/pmac_feature.h> | |
46 | #include <asm/smu.h> | |
47 | #include <asm/sections.h> | |
0365ba7f | 48 | #include <asm/uaccess.h> |
0365ba7f | 49 | |
183d0202 | 50 | #define VERSION "0.7" |
0365ba7f | 51 | #define AUTHOR "(c) 2005 Benjamin Herrenschmidt, IBM Corp." |
1da177e4 | 52 | |
0365ba7f | 53 | #undef DEBUG_SMU |
1da177e4 LT |
54 | |
55 | #ifdef DEBUG_SMU | |
1beb6a7d | 56 | #define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0) |
1da177e4 LT |
57 | #else |
58 | #define DPRINTK(fmt, args...) do { } while (0) | |
59 | #endif | |
60 | ||
61 | /* | |
62 | * This is the command buffer passed to the SMU hardware | |
63 | */ | |
0365ba7f BH |
64 | #define SMU_MAX_DATA 254 |
65 | ||
1da177e4 LT |
66 | struct smu_cmd_buf { |
67 | u8 cmd; | |
68 | u8 length; | |
0365ba7f | 69 | u8 data[SMU_MAX_DATA]; |
1da177e4 LT |
70 | }; |
71 | ||
72 | struct smu_device { | |
73 | spinlock_t lock; | |
74 | struct device_node *of_node; | |
2dc11581 | 75 | struct platform_device *of_dev; |
0365ba7f | 76 | int doorbell; /* doorbell gpio */ |
1da177e4 | 77 | u32 __iomem *db_buf; /* doorbell buffer */ |
f620753b BH |
78 | struct device_node *db_node; |
79 | unsigned int db_irq; | |
0365ba7f | 80 | int msg; |
f620753b BH |
81 | struct device_node *msg_node; |
82 | unsigned int msg_irq; | |
1da177e4 LT |
83 | struct smu_cmd_buf *cmd_buf; /* command buffer virtual */ |
84 | u32 cmd_buf_abs; /* command buffer absolute */ | |
0365ba7f BH |
85 | struct list_head cmd_list; |
86 | struct smu_cmd *cmd_cur; /* pending command */ | |
592a607b | 87 | int broken_nap; |
0365ba7f BH |
88 | struct list_head cmd_i2c_list; |
89 | struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */ | |
90 | struct timer_list i2c_timer; | |
1da177e4 LT |
91 | }; |
92 | ||
93 | /* | |
94 | * I don't think there will ever be more than one SMU, so | |
95 | * for now, just hard code that | |
96 | */ | |
d851b6e0 | 97 | static DEFINE_MUTEX(smu_mutex); |
1da177e4 | 98 | static struct smu_device *smu; |
14cc3e2b | 99 | static DEFINE_MUTEX(smu_part_access); |
f620753b | 100 | static int smu_irq_inited; |
0365ba7f | 101 | |
730745a5 BH |
102 | static void smu_i2c_retry(unsigned long data); |
103 | ||
1da177e4 | 104 | /* |
0365ba7f | 105 | * SMU driver low level stuff |
1da177e4 | 106 | */ |
1da177e4 | 107 | |
0365ba7f | 108 | static void smu_start_cmd(void) |
1da177e4 | 109 | { |
0365ba7f BH |
110 | unsigned long faddr, fend; |
111 | struct smu_cmd *cmd; | |
1da177e4 | 112 | |
0365ba7f BH |
113 | if (list_empty(&smu->cmd_list)) |
114 | return; | |
115 | ||
116 | /* Fetch first command in queue */ | |
117 | cmd = list_entry(smu->cmd_list.next, struct smu_cmd, link); | |
118 | smu->cmd_cur = cmd; | |
119 | list_del(&cmd->link); | |
120 | ||
121 | DPRINTK("SMU: starting cmd %x, %d bytes data\n", cmd->cmd, | |
122 | cmd->data_len); | |
183d0202 | 123 | DPRINTK("SMU: data buffer: %02x %02x %02x %02x %02x %02x %02x %02x\n", |
0365ba7f | 124 | ((u8 *)cmd->data_buf)[0], ((u8 *)cmd->data_buf)[1], |
183d0202 BH |
125 | ((u8 *)cmd->data_buf)[2], ((u8 *)cmd->data_buf)[3], |
126 | ((u8 *)cmd->data_buf)[4], ((u8 *)cmd->data_buf)[5], | |
127 | ((u8 *)cmd->data_buf)[6], ((u8 *)cmd->data_buf)[7]); | |
0365ba7f BH |
128 | |
129 | /* Fill the SMU command buffer */ | |
130 | smu->cmd_buf->cmd = cmd->cmd; | |
131 | smu->cmd_buf->length = cmd->data_len; | |
132 | memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len); | |
133 | ||
134 | /* Flush command and data to RAM */ | |
135 | faddr = (unsigned long)smu->cmd_buf; | |
136 | fend = faddr + smu->cmd_buf->length + 2; | |
137 | flush_inval_dcache_range(faddr, fend); | |
138 | ||
592a607b BH |
139 | |
140 | /* We also disable NAP mode for the duration of the command | |
141 | * on U3 based machines. | |
142 | * This is slightly racy as it can be written back to 1 by a sysctl | |
143 | * but that never happens in practice. There seem to be an issue with | |
144 | * U3 based machines such as the iMac G5 where napping for the | |
145 | * whole duration of the command prevents the SMU from fetching it | |
146 | * from memory. This might be related to the strange i2c based | |
147 | * mechanism the SMU uses to access memory. | |
148 | */ | |
149 | if (smu->broken_nap) | |
150 | powersave_nap = 0; | |
151 | ||
0365ba7f | 152 | /* This isn't exactly a DMA mapping here, I suspect |
1da177e4 LT |
153 | * the SMU is actually communicating with us via i2c to the |
154 | * northbridge or the CPU to access RAM. | |
155 | */ | |
0365ba7f | 156 | writel(smu->cmd_buf_abs, smu->db_buf); |
1da177e4 LT |
157 | |
158 | /* Ring the SMU doorbell */ | |
0365ba7f | 159 | pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, smu->doorbell, 4); |
1da177e4 LT |
160 | } |
161 | ||
0365ba7f | 162 | |
7d12e780 | 163 | static irqreturn_t smu_db_intr(int irq, void *arg) |
1da177e4 | 164 | { |
0365ba7f BH |
165 | unsigned long flags; |
166 | struct smu_cmd *cmd; | |
167 | void (*done)(struct smu_cmd *cmd, void *misc) = NULL; | |
168 | void *misc = NULL; | |
169 | u8 gpio; | |
170 | int rc = 0; | |
1da177e4 | 171 | |
0365ba7f BH |
172 | /* SMU completed the command, well, we hope, let's make sure |
173 | * of it | |
174 | */ | |
175 | spin_lock_irqsave(&smu->lock, flags); | |
1da177e4 | 176 | |
0365ba7f | 177 | gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell); |
a44fe13e BH |
178 | if ((gpio & 7) != 7) { |
179 | spin_unlock_irqrestore(&smu->lock, flags); | |
0365ba7f | 180 | return IRQ_HANDLED; |
a44fe13e | 181 | } |
0365ba7f BH |
182 | |
183 | cmd = smu->cmd_cur; | |
184 | smu->cmd_cur = NULL; | |
185 | if (cmd == NULL) | |
186 | goto bail; | |
187 | ||
188 | if (rc == 0) { | |
189 | unsigned long faddr; | |
190 | int reply_len; | |
191 | u8 ack; | |
192 | ||
193 | /* CPU might have brought back the cache line, so we need | |
194 | * to flush again before peeking at the SMU response. We | |
195 | * flush the entire buffer for now as we haven't read the | |
efad798b | 196 | * reply length (it's only 2 cache lines anyway) |
0365ba7f BH |
197 | */ |
198 | faddr = (unsigned long)smu->cmd_buf; | |
199 | flush_inval_dcache_range(faddr, faddr + 256); | |
200 | ||
201 | /* Now check ack */ | |
202 | ack = (~cmd->cmd) & 0xff; | |
203 | if (ack != smu->cmd_buf->cmd) { | |
204 | DPRINTK("SMU: incorrect ack, want %x got %x\n", | |
205 | ack, smu->cmd_buf->cmd); | |
206 | rc = -EIO; | |
207 | } | |
208 | reply_len = rc == 0 ? smu->cmd_buf->length : 0; | |
209 | DPRINTK("SMU: reply len: %d\n", reply_len); | |
210 | if (reply_len > cmd->reply_len) { | |
211 | printk(KERN_WARNING "SMU: reply buffer too small," | |
212 | "got %d bytes for a %d bytes buffer\n", | |
213 | reply_len, cmd->reply_len); | |
214 | reply_len = cmd->reply_len; | |
215 | } | |
216 | cmd->reply_len = reply_len; | |
217 | if (cmd->reply_buf && reply_len) | |
218 | memcpy(cmd->reply_buf, smu->cmd_buf->data, reply_len); | |
219 | } | |
220 | ||
221 | /* Now complete the command. Write status last in order as we lost | |
222 | * ownership of the command structure as soon as it's no longer -1 | |
223 | */ | |
224 | done = cmd->done; | |
225 | misc = cmd->misc; | |
226 | mb(); | |
227 | cmd->status = rc; | |
592a607b BH |
228 | |
229 | /* Re-enable NAP mode */ | |
230 | if (smu->broken_nap) | |
231 | powersave_nap = 1; | |
0365ba7f BH |
232 | bail: |
233 | /* Start next command if any */ | |
234 | smu_start_cmd(); | |
235 | spin_unlock_irqrestore(&smu->lock, flags); | |
236 | ||
237 | /* Call command completion handler if any */ | |
238 | if (done) | |
239 | done(cmd, misc); | |
240 | ||
241 | /* It's an edge interrupt, nothing to do */ | |
242 | return IRQ_HANDLED; | |
1da177e4 LT |
243 | } |
244 | ||
0365ba7f | 245 | |
7d12e780 | 246 | static irqreturn_t smu_msg_intr(int irq, void *arg) |
1da177e4 | 247 | { |
0365ba7f BH |
248 | /* I don't quite know what to do with this one, we seem to never |
249 | * receive it, so I suspect we have to arm it someway in the SMU | |
250 | * to start getting events that way. | |
251 | */ | |
252 | ||
253 | printk(KERN_INFO "SMU: message interrupt !\n"); | |
1da177e4 | 254 | |
0365ba7f BH |
255 | /* It's an edge interrupt, nothing to do */ |
256 | return IRQ_HANDLED; | |
257 | } | |
1da177e4 | 258 | |
1da177e4 | 259 | |
0365ba7f BH |
260 | /* |
261 | * Queued command management. | |
262 | * | |
263 | */ | |
1da177e4 | 264 | |
0365ba7f BH |
265 | int smu_queue_cmd(struct smu_cmd *cmd) |
266 | { | |
267 | unsigned long flags; | |
1da177e4 | 268 | |
0365ba7f BH |
269 | if (smu == NULL) |
270 | return -ENODEV; | |
271 | if (cmd->data_len > SMU_MAX_DATA || | |
272 | cmd->reply_len > SMU_MAX_DATA) | |
273 | return -EINVAL; | |
274 | ||
275 | cmd->status = 1; | |
276 | spin_lock_irqsave(&smu->lock, flags); | |
277 | list_add_tail(&cmd->link, &smu->cmd_list); | |
278 | if (smu->cmd_cur == NULL) | |
279 | smu_start_cmd(); | |
280 | spin_unlock_irqrestore(&smu->lock, flags); | |
281 | ||
f620753b BH |
282 | /* Workaround for early calls when irq isn't available */ |
283 | if (!smu_irq_inited || smu->db_irq == NO_IRQ) | |
284 | smu_spinwait_cmd(cmd); | |
285 | ||
0365ba7f | 286 | return 0; |
1da177e4 | 287 | } |
0365ba7f | 288 | EXPORT_SYMBOL(smu_queue_cmd); |
1da177e4 | 289 | |
0365ba7f BH |
290 | |
291 | int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command, | |
292 | unsigned int data_len, | |
293 | void (*done)(struct smu_cmd *cmd, void *misc), | |
294 | void *misc, ...) | |
1da177e4 | 295 | { |
0365ba7f BH |
296 | struct smu_cmd *cmd = &scmd->cmd; |
297 | va_list list; | |
298 | int i; | |
299 | ||
300 | if (data_len > sizeof(scmd->buffer)) | |
301 | return -EINVAL; | |
302 | ||
303 | memset(scmd, 0, sizeof(*scmd)); | |
304 | cmd->cmd = command; | |
305 | cmd->data_len = data_len; | |
306 | cmd->data_buf = scmd->buffer; | |
307 | cmd->reply_len = sizeof(scmd->buffer); | |
308 | cmd->reply_buf = scmd->buffer; | |
309 | cmd->done = done; | |
310 | cmd->misc = misc; | |
311 | ||
312 | va_start(list, misc); | |
313 | for (i = 0; i < data_len; ++i) | |
314 | scmd->buffer[i] = (u8)va_arg(list, int); | |
315 | va_end(list); | |
316 | ||
317 | return smu_queue_cmd(cmd); | |
1da177e4 | 318 | } |
0365ba7f | 319 | EXPORT_SYMBOL(smu_queue_simple); |
1da177e4 | 320 | |
0365ba7f BH |
321 | |
322 | void smu_poll(void) | |
1da177e4 | 323 | { |
0365ba7f BH |
324 | u8 gpio; |
325 | ||
326 | if (smu == NULL) | |
327 | return; | |
328 | ||
329 | gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell); | |
330 | if ((gpio & 7) == 7) | |
7d12e780 | 331 | smu_db_intr(smu->db_irq, smu); |
1da177e4 | 332 | } |
0365ba7f BH |
333 | EXPORT_SYMBOL(smu_poll); |
334 | ||
1da177e4 | 335 | |
0365ba7f | 336 | void smu_done_complete(struct smu_cmd *cmd, void *misc) |
1da177e4 | 337 | { |
0365ba7f BH |
338 | struct completion *comp = misc; |
339 | ||
340 | complete(comp); | |
1da177e4 | 341 | } |
0365ba7f BH |
342 | EXPORT_SYMBOL(smu_done_complete); |
343 | ||
1da177e4 | 344 | |
0365ba7f | 345 | void smu_spinwait_cmd(struct smu_cmd *cmd) |
1da177e4 | 346 | { |
0365ba7f BH |
347 | while(cmd->status == 1) |
348 | smu_poll(); | |
349 | } | |
350 | EXPORT_SYMBOL(smu_spinwait_cmd); | |
351 | ||
352 | ||
353 | /* RTC low level commands */ | |
354 | static inline int bcd2hex (int n) | |
355 | { | |
356 | return (((n & 0xf0) >> 4) * 10) + (n & 0xf); | |
1da177e4 LT |
357 | } |
358 | ||
0365ba7f BH |
359 | |
360 | static inline int hex2bcd (int n) | |
1da177e4 | 361 | { |
0365ba7f | 362 | return ((n / 10) << 4) + (n % 10); |
1da177e4 | 363 | } |
0365ba7f | 364 | |
1da177e4 LT |
365 | |
366 | static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf, | |
367 | struct rtc_time *time) | |
368 | { | |
369 | cmd_buf->cmd = 0x8e; | |
370 | cmd_buf->length = 8; | |
371 | cmd_buf->data[0] = 0x80; | |
372 | cmd_buf->data[1] = hex2bcd(time->tm_sec); | |
373 | cmd_buf->data[2] = hex2bcd(time->tm_min); | |
374 | cmd_buf->data[3] = hex2bcd(time->tm_hour); | |
375 | cmd_buf->data[4] = time->tm_wday; | |
376 | cmd_buf->data[5] = hex2bcd(time->tm_mday); | |
377 | cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1; | |
378 | cmd_buf->data[7] = hex2bcd(time->tm_year - 100); | |
379 | } | |
380 | ||
1da177e4 | 381 | |
0365ba7f | 382 | int smu_get_rtc_time(struct rtc_time *time, int spinwait) |
1da177e4 | 383 | { |
0365ba7f | 384 | struct smu_simple_cmd cmd; |
1da177e4 LT |
385 | int rc; |
386 | ||
387 | if (smu == NULL) | |
388 | return -ENODEV; | |
389 | ||
390 | memset(time, 0, sizeof(struct rtc_time)); | |
0365ba7f BH |
391 | rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 1, NULL, NULL, |
392 | SMU_CMD_RTC_GET_DATETIME); | |
393 | if (rc) | |
394 | return rc; | |
395 | smu_spinwait_simple(&cmd); | |
1da177e4 | 396 | |
0365ba7f BH |
397 | time->tm_sec = bcd2hex(cmd.buffer[0]); |
398 | time->tm_min = bcd2hex(cmd.buffer[1]); | |
399 | time->tm_hour = bcd2hex(cmd.buffer[2]); | |
400 | time->tm_wday = bcd2hex(cmd.buffer[3]); | |
401 | time->tm_mday = bcd2hex(cmd.buffer[4]); | |
402 | time->tm_mon = bcd2hex(cmd.buffer[5]) - 1; | |
403 | time->tm_year = bcd2hex(cmd.buffer[6]) + 100; | |
404 | ||
405 | return 0; | |
1da177e4 LT |
406 | } |
407 | ||
0365ba7f BH |
408 | |
409 | int smu_set_rtc_time(struct rtc_time *time, int spinwait) | |
1da177e4 | 410 | { |
0365ba7f | 411 | struct smu_simple_cmd cmd; |
1da177e4 LT |
412 | int rc; |
413 | ||
414 | if (smu == NULL) | |
415 | return -ENODEV; | |
416 | ||
0365ba7f BH |
417 | rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 8, NULL, NULL, |
418 | SMU_CMD_RTC_SET_DATETIME, | |
419 | hex2bcd(time->tm_sec), | |
420 | hex2bcd(time->tm_min), | |
421 | hex2bcd(time->tm_hour), | |
422 | time->tm_wday, | |
423 | hex2bcd(time->tm_mday), | |
424 | hex2bcd(time->tm_mon) + 1, | |
425 | hex2bcd(time->tm_year - 100)); | |
426 | if (rc) | |
427 | return rc; | |
428 | smu_spinwait_simple(&cmd); | |
1da177e4 | 429 | |
0365ba7f | 430 | return 0; |
1da177e4 LT |
431 | } |
432 | ||
0365ba7f | 433 | |
1da177e4 LT |
434 | void smu_shutdown(void) |
435 | { | |
0365ba7f | 436 | struct smu_simple_cmd cmd; |
1da177e4 LT |
437 | |
438 | if (smu == NULL) | |
439 | return; | |
440 | ||
0365ba7f BH |
441 | if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 9, NULL, NULL, |
442 | 'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0)) | |
443 | return; | |
444 | smu_spinwait_simple(&cmd); | |
1da177e4 LT |
445 | for (;;) |
446 | ; | |
1da177e4 LT |
447 | } |
448 | ||
0365ba7f | 449 | |
1da177e4 LT |
450 | void smu_restart(void) |
451 | { | |
0365ba7f | 452 | struct smu_simple_cmd cmd; |
1da177e4 LT |
453 | |
454 | if (smu == NULL) | |
455 | return; | |
456 | ||
0365ba7f BH |
457 | if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, NULL, NULL, |
458 | 'R', 'E', 'S', 'T', 'A', 'R', 'T', 0)) | |
459 | return; | |
460 | smu_spinwait_simple(&cmd); | |
1da177e4 LT |
461 | for (;;) |
462 | ; | |
1da177e4 LT |
463 | } |
464 | ||
0365ba7f | 465 | |
1da177e4 LT |
466 | int smu_present(void) |
467 | { | |
468 | return smu != NULL; | |
469 | } | |
0365ba7f | 470 | EXPORT_SYMBOL(smu_present); |
1da177e4 LT |
471 | |
472 | ||
183d0202 | 473 | int __init smu_init (void) |
1da177e4 LT |
474 | { |
475 | struct device_node *np; | |
018a3d1d | 476 | const u32 *data; |
73f38fe1 | 477 | int ret = 0; |
1da177e4 LT |
478 | |
479 | np = of_find_node_by_type(NULL, "smu"); | |
480 | if (np == NULL) | |
481 | return -ENODEV; | |
482 | ||
592a607b | 483 | printk(KERN_INFO "SMU: Driver %s %s\n", VERSION, AUTHOR); |
0365ba7f | 484 | |
1da177e4 LT |
485 | if (smu_cmdbuf_abs == 0) { |
486 | printk(KERN_ERR "SMU: Command buffer not allocated !\n"); | |
73f38fe1 JL |
487 | ret = -EINVAL; |
488 | goto fail_np; | |
1da177e4 LT |
489 | } |
490 | ||
491 | smu = alloc_bootmem(sizeof(struct smu_device)); | |
1da177e4 LT |
492 | |
493 | spin_lock_init(&smu->lock); | |
0365ba7f BH |
494 | INIT_LIST_HEAD(&smu->cmd_list); |
495 | INIT_LIST_HEAD(&smu->cmd_i2c_list); | |
1da177e4 | 496 | smu->of_node = np; |
0365ba7f BH |
497 | smu->db_irq = NO_IRQ; |
498 | smu->msg_irq = NO_IRQ; | |
0365ba7f | 499 | |
1da177e4 LT |
500 | /* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a |
501 | * 32 bits value safely | |
502 | */ | |
503 | smu->cmd_buf_abs = (u32)smu_cmdbuf_abs; | |
48817c58 | 504 | smu->cmd_buf = __va(smu_cmdbuf_abs); |
1da177e4 | 505 | |
f620753b BH |
506 | smu->db_node = of_find_node_by_name(NULL, "smu-doorbell"); |
507 | if (smu->db_node == NULL) { | |
1da177e4 | 508 | printk(KERN_ERR "SMU: Can't find doorbell GPIO !\n"); |
73f38fe1 JL |
509 | ret = -ENXIO; |
510 | goto fail_bootmem; | |
1da177e4 | 511 | } |
01b2726d | 512 | data = of_get_property(smu->db_node, "reg", NULL); |
1da177e4 LT |
513 | if (data == NULL) { |
514 | printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n"); | |
73f38fe1 JL |
515 | ret = -ENXIO; |
516 | goto fail_db_node; | |
1da177e4 LT |
517 | } |
518 | ||
519 | /* Current setup has one doorbell GPIO that does both doorbell | |
520 | * and ack. GPIOs are at 0x50, best would be to find that out | |
521 | * in the device-tree though. | |
522 | */ | |
0365ba7f BH |
523 | smu->doorbell = *data; |
524 | if (smu->doorbell < 0x50) | |
525 | smu->doorbell += 0x50; | |
0365ba7f BH |
526 | |
527 | /* Now look for the smu-interrupt GPIO */ | |
528 | do { | |
f620753b BH |
529 | smu->msg_node = of_find_node_by_name(NULL, "smu-interrupt"); |
530 | if (smu->msg_node == NULL) | |
0365ba7f | 531 | break; |
01b2726d | 532 | data = of_get_property(smu->msg_node, "reg", NULL); |
0365ba7f | 533 | if (data == NULL) { |
f620753b BH |
534 | of_node_put(smu->msg_node); |
535 | smu->msg_node = NULL; | |
0365ba7f BH |
536 | break; |
537 | } | |
538 | smu->msg = *data; | |
539 | if (smu->msg < 0x50) | |
540 | smu->msg += 0x50; | |
0365ba7f | 541 | } while(0); |
1da177e4 LT |
542 | |
543 | /* Doorbell buffer is currently hard-coded, I didn't find a proper | |
544 | * device-tree entry giving the address. Best would probably to use | |
545 | * an offset for K2 base though, but let's do it that way for now. | |
546 | */ | |
547 | smu->db_buf = ioremap(0x8000860c, 0x1000); | |
548 | if (smu->db_buf == NULL) { | |
549 | printk(KERN_ERR "SMU: Can't map doorbell buffer pointer !\n"); | |
73f38fe1 JL |
550 | ret = -ENXIO; |
551 | goto fail_msg_node; | |
1da177e4 LT |
552 | } |
553 | ||
592a607b BH |
554 | /* U3 has an issue with NAP mode when issuing SMU commands */ |
555 | smu->broken_nap = pmac_get_uninorth_variant() < 4; | |
556 | if (smu->broken_nap) | |
557 | printk(KERN_INFO "SMU: using NAP mode workaround\n"); | |
558 | ||
1da177e4 LT |
559 | sys_ctrler = SYS_CTRLER_SMU; |
560 | return 0; | |
561 | ||
73f38fe1 JL |
562 | fail_msg_node: |
563 | if (smu->msg_node) | |
564 | of_node_put(smu->msg_node); | |
565 | fail_db_node: | |
566 | of_node_put(smu->db_node); | |
567 | fail_bootmem: | |
81df9bff | 568 | free_bootmem(__pa(smu), sizeof(struct smu_device)); |
1da177e4 | 569 | smu = NULL; |
73f38fe1 JL |
570 | fail_np: |
571 | of_node_put(np); | |
572 | return ret; | |
1da177e4 | 573 | } |
0365ba7f BH |
574 | |
575 | ||
576 | static int smu_late_init(void) | |
577 | { | |
578 | if (!smu) | |
579 | return 0; | |
580 | ||
730745a5 BH |
581 | init_timer(&smu->i2c_timer); |
582 | smu->i2c_timer.function = smu_i2c_retry; | |
583 | smu->i2c_timer.data = (unsigned long)smu; | |
584 | ||
f620753b BH |
585 | if (smu->db_node) { |
586 | smu->db_irq = irq_of_parse_and_map(smu->db_node, 0); | |
587 | if (smu->db_irq == NO_IRQ) | |
588 | printk(KERN_ERR "smu: failed to map irq for node %s\n", | |
589 | smu->db_node->full_name); | |
590 | } | |
591 | if (smu->msg_node) { | |
592 | smu->msg_irq = irq_of_parse_and_map(smu->msg_node, 0); | |
593 | if (smu->msg_irq == NO_IRQ) | |
594 | printk(KERN_ERR "smu: failed to map irq for node %s\n", | |
595 | smu->msg_node->full_name); | |
596 | } | |
597 | ||
0365ba7f BH |
598 | /* |
599 | * Try to request the interrupts | |
600 | */ | |
601 | ||
602 | if (smu->db_irq != NO_IRQ) { | |
603 | if (request_irq(smu->db_irq, smu_db_intr, | |
dace1453 | 604 | IRQF_SHARED, "SMU doorbell", smu) < 0) { |
0365ba7f BH |
605 | printk(KERN_WARNING "SMU: can't " |
606 | "request interrupt %d\n", | |
607 | smu->db_irq); | |
608 | smu->db_irq = NO_IRQ; | |
609 | } | |
610 | } | |
611 | ||
612 | if (smu->msg_irq != NO_IRQ) { | |
613 | if (request_irq(smu->msg_irq, smu_msg_intr, | |
dace1453 | 614 | IRQF_SHARED, "SMU message", smu) < 0) { |
0365ba7f BH |
615 | printk(KERN_WARNING "SMU: can't " |
616 | "request interrupt %d\n", | |
617 | smu->msg_irq); | |
618 | smu->msg_irq = NO_IRQ; | |
619 | } | |
620 | } | |
621 | ||
f620753b | 622 | smu_irq_inited = 1; |
0365ba7f BH |
623 | return 0; |
624 | } | |
730745a5 BH |
625 | /* This has to be before arch_initcall as the low i2c stuff relies on the |
626 | * above having been done before we reach arch_initcalls | |
627 | */ | |
628 | core_initcall(smu_late_init); | |
0365ba7f BH |
629 | |
630 | /* | |
631 | * sysfs visibility | |
632 | */ | |
633 | ||
c4028958 | 634 | static void smu_expose_childs(struct work_struct *unused) |
0365ba7f | 635 | { |
a28d3af2 BH |
636 | struct device_node *np; |
637 | ||
638 | for (np = NULL; (np = of_get_next_child(smu->of_node, np)) != NULL;) | |
55b61fec | 639 | if (of_device_is_compatible(np, "smu-sensors")) |
730745a5 BH |
640 | of_platform_device_create(np, "smu-sensors", |
641 | &smu->of_dev->dev); | |
0365ba7f BH |
642 | } |
643 | ||
c4028958 | 644 | static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs); |
0365ba7f | 645 | |
00006124 | 646 | static int smu_platform_probe(struct platform_device* dev) |
0365ba7f BH |
647 | { |
648 | if (!smu) | |
649 | return -ENODEV; | |
650 | smu->of_dev = dev; | |
651 | ||
652 | /* | |
653 | * Ok, we are matched, now expose all i2c busses. We have to defer | |
654 | * that unfortunately or it would deadlock inside the device model | |
655 | */ | |
656 | schedule_work(&smu_expose_childs_work); | |
657 | ||
658 | return 0; | |
659 | } | |
660 | ||
46759a7c | 661 | static const struct of_device_id smu_platform_match[] = |
0365ba7f BH |
662 | { |
663 | { | |
664 | .type = "smu", | |
665 | }, | |
666 | {}, | |
667 | }; | |
668 | ||
00006124 | 669 | static struct platform_driver smu_of_platform_driver = |
0365ba7f | 670 | { |
4018294b GL |
671 | .driver = { |
672 | .name = "smu", | |
673 | .owner = THIS_MODULE, | |
674 | .of_match_table = smu_platform_match, | |
675 | }, | |
0365ba7f BH |
676 | .probe = smu_platform_probe, |
677 | }; | |
678 | ||
679 | static int __init smu_init_sysfs(void) | |
680 | { | |
0365ba7f | 681 | /* |
0365ba7f BH |
682 | * For now, we don't power manage machines with an SMU chip, |
683 | * I'm a bit too far from figuring out how that works with those | |
684 | * new chipsets, but that will come back and bite us | |
685 | */ | |
00006124 | 686 | platform_driver_register(&smu_of_platform_driver); |
0365ba7f BH |
687 | return 0; |
688 | } | |
689 | ||
690 | device_initcall(smu_init_sysfs); | |
691 | ||
2dc11581 | 692 | struct platform_device *smu_get_ofdev(void) |
0365ba7f BH |
693 | { |
694 | if (!smu) | |
695 | return NULL; | |
696 | return smu->of_dev; | |
697 | } | |
698 | ||
699 | EXPORT_SYMBOL_GPL(smu_get_ofdev); | |
700 | ||
701 | /* | |
702 | * i2c interface | |
703 | */ | |
704 | ||
705 | static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail) | |
706 | { | |
707 | void (*done)(struct smu_i2c_cmd *cmd, void *misc) = cmd->done; | |
708 | void *misc = cmd->misc; | |
709 | unsigned long flags; | |
710 | ||
711 | /* Check for read case */ | |
712 | if (!fail && cmd->read) { | |
713 | if (cmd->pdata[0] < 1) | |
714 | fail = 1; | |
715 | else | |
716 | memcpy(cmd->info.data, &cmd->pdata[1], | |
717 | cmd->info.datalen); | |
718 | } | |
719 | ||
720 | DPRINTK("SMU: completing, success: %d\n", !fail); | |
721 | ||
722 | /* Update status and mark no pending i2c command with lock | |
723 | * held so nobody comes in while we dequeue an eventual | |
724 | * pending next i2c command | |
725 | */ | |
726 | spin_lock_irqsave(&smu->lock, flags); | |
727 | smu->cmd_i2c_cur = NULL; | |
728 | wmb(); | |
729 | cmd->status = fail ? -EIO : 0; | |
730 | ||
731 | /* Is there another i2c command waiting ? */ | |
732 | if (!list_empty(&smu->cmd_i2c_list)) { | |
733 | struct smu_i2c_cmd *newcmd; | |
734 | ||
735 | /* Fetch it, new current, remove from list */ | |
736 | newcmd = list_entry(smu->cmd_i2c_list.next, | |
737 | struct smu_i2c_cmd, link); | |
738 | smu->cmd_i2c_cur = newcmd; | |
739 | list_del(&cmd->link); | |
740 | ||
741 | /* Queue with low level smu */ | |
742 | list_add_tail(&cmd->scmd.link, &smu->cmd_list); | |
743 | if (smu->cmd_cur == NULL) | |
744 | smu_start_cmd(); | |
745 | } | |
746 | spin_unlock_irqrestore(&smu->lock, flags); | |
747 | ||
748 | /* Call command completion handler if any */ | |
749 | if (done) | |
750 | done(cmd, misc); | |
751 | ||
752 | } | |
753 | ||
754 | ||
755 | static void smu_i2c_retry(unsigned long data) | |
756 | { | |
730745a5 | 757 | struct smu_i2c_cmd *cmd = smu->cmd_i2c_cur; |
0365ba7f BH |
758 | |
759 | DPRINTK("SMU: i2c failure, requeuing...\n"); | |
760 | ||
761 | /* requeue command simply by resetting reply_len */ | |
762 | cmd->pdata[0] = 0xff; | |
730745a5 | 763 | cmd->scmd.reply_len = sizeof(cmd->pdata); |
0365ba7f BH |
764 | smu_queue_cmd(&cmd->scmd); |
765 | } | |
766 | ||
767 | ||
768 | static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc) | |
769 | { | |
770 | struct smu_i2c_cmd *cmd = misc; | |
771 | int fail = 0; | |
772 | ||
773 | DPRINTK("SMU: i2c compl. stage=%d status=%x pdata[0]=%x rlen: %x\n", | |
774 | cmd->stage, scmd->status, cmd->pdata[0], scmd->reply_len); | |
775 | ||
776 | /* Check for possible status */ | |
777 | if (scmd->status < 0) | |
778 | fail = 1; | |
779 | else if (cmd->read) { | |
780 | if (cmd->stage == 0) | |
781 | fail = cmd->pdata[0] != 0; | |
782 | else | |
783 | fail = cmd->pdata[0] >= 0x80; | |
784 | } else { | |
785 | fail = cmd->pdata[0] != 0; | |
786 | } | |
787 | ||
788 | /* Handle failures by requeuing command, after 5ms interval | |
789 | */ | |
790 | if (fail && --cmd->retries > 0) { | |
791 | DPRINTK("SMU: i2c failure, starting timer...\n"); | |
730745a5 | 792 | BUG_ON(cmd != smu->cmd_i2c_cur); |
f620753b BH |
793 | if (!smu_irq_inited) { |
794 | mdelay(5); | |
795 | smu_i2c_retry(0); | |
796 | return; | |
797 | } | |
730745a5 | 798 | mod_timer(&smu->i2c_timer, jiffies + msecs_to_jiffies(5)); |
0365ba7f BH |
799 | return; |
800 | } | |
801 | ||
802 | /* If failure or stage 1, command is complete */ | |
803 | if (fail || cmd->stage != 0) { | |
804 | smu_i2c_complete_command(cmd, fail); | |
805 | return; | |
806 | } | |
807 | ||
808 | DPRINTK("SMU: going to stage 1\n"); | |
809 | ||
810 | /* Ok, initial command complete, now poll status */ | |
811 | scmd->reply_buf = cmd->pdata; | |
730745a5 | 812 | scmd->reply_len = sizeof(cmd->pdata); |
0365ba7f BH |
813 | scmd->data_buf = cmd->pdata; |
814 | scmd->data_len = 1; | |
815 | cmd->pdata[0] = 0; | |
816 | cmd->stage = 1; | |
817 | cmd->retries = 20; | |
818 | smu_queue_cmd(scmd); | |
819 | } | |
820 | ||
821 | ||
822 | int smu_queue_i2c(struct smu_i2c_cmd *cmd) | |
823 | { | |
824 | unsigned long flags; | |
825 | ||
826 | if (smu == NULL) | |
827 | return -ENODEV; | |
828 | ||
829 | /* Fill most fields of scmd */ | |
830 | cmd->scmd.cmd = SMU_CMD_I2C_COMMAND; | |
831 | cmd->scmd.done = smu_i2c_low_completion; | |
832 | cmd->scmd.misc = cmd; | |
833 | cmd->scmd.reply_buf = cmd->pdata; | |
730745a5 | 834 | cmd->scmd.reply_len = sizeof(cmd->pdata); |
0365ba7f BH |
835 | cmd->scmd.data_buf = (u8 *)(char *)&cmd->info; |
836 | cmd->scmd.status = 1; | |
837 | cmd->stage = 0; | |
838 | cmd->pdata[0] = 0xff; | |
839 | cmd->retries = 20; | |
840 | cmd->status = 1; | |
841 | ||
842 | /* Check transfer type, sanitize some "info" fields | |
843 | * based on transfer type and do more checking | |
844 | */ | |
845 | cmd->info.caddr = cmd->info.devaddr; | |
846 | cmd->read = cmd->info.devaddr & 0x01; | |
847 | switch(cmd->info.type) { | |
848 | case SMU_I2C_TRANSFER_SIMPLE: | |
849 | memset(&cmd->info.sublen, 0, 4); | |
850 | break; | |
851 | case SMU_I2C_TRANSFER_COMBINED: | |
852 | cmd->info.devaddr &= 0xfe; | |
853 | case SMU_I2C_TRANSFER_STDSUB: | |
854 | if (cmd->info.sublen > 3) | |
855 | return -EINVAL; | |
856 | break; | |
857 | default: | |
858 | return -EINVAL; | |
859 | } | |
860 | ||
861 | /* Finish setting up command based on transfer direction | |
862 | */ | |
863 | if (cmd->read) { | |
864 | if (cmd->info.datalen > SMU_I2C_READ_MAX) | |
865 | return -EINVAL; | |
866 | memset(cmd->info.data, 0xff, cmd->info.datalen); | |
867 | cmd->scmd.data_len = 9; | |
868 | } else { | |
869 | if (cmd->info.datalen > SMU_I2C_WRITE_MAX) | |
870 | return -EINVAL; | |
871 | cmd->scmd.data_len = 9 + cmd->info.datalen; | |
872 | } | |
873 | ||
874 | DPRINTK("SMU: i2c enqueuing command\n"); | |
875 | DPRINTK("SMU: %s, len=%d bus=%x addr=%x sub0=%x type=%x\n", | |
876 | cmd->read ? "read" : "write", cmd->info.datalen, | |
877 | cmd->info.bus, cmd->info.caddr, | |
878 | cmd->info.subaddr[0], cmd->info.type); | |
879 | ||
880 | ||
881 | /* Enqueue command in i2c list, and if empty, enqueue also in | |
882 | * main command list | |
883 | */ | |
884 | spin_lock_irqsave(&smu->lock, flags); | |
885 | if (smu->cmd_i2c_cur == NULL) { | |
886 | smu->cmd_i2c_cur = cmd; | |
887 | list_add_tail(&cmd->scmd.link, &smu->cmd_list); | |
888 | if (smu->cmd_cur == NULL) | |
889 | smu_start_cmd(); | |
890 | } else | |
891 | list_add_tail(&cmd->link, &smu->cmd_i2c_list); | |
892 | spin_unlock_irqrestore(&smu->lock, flags); | |
893 | ||
894 | return 0; | |
895 | } | |
896 | ||
183d0202 BH |
897 | /* |
898 | * Handling of "partitions" | |
899 | */ | |
900 | ||
901 | static int smu_read_datablock(u8 *dest, unsigned int addr, unsigned int len) | |
902 | { | |
6e9a4738 | 903 | DECLARE_COMPLETION_ONSTACK(comp); |
183d0202 BH |
904 | unsigned int chunk; |
905 | struct smu_cmd cmd; | |
906 | int rc; | |
907 | u8 params[8]; | |
908 | ||
909 | /* We currently use a chunk size of 0xe. We could check the | |
910 | * SMU firmware version and use bigger sizes though | |
911 | */ | |
912 | chunk = 0xe; | |
913 | ||
914 | while (len) { | |
915 | unsigned int clen = min(len, chunk); | |
916 | ||
917 | cmd.cmd = SMU_CMD_MISC_ee_COMMAND; | |
918 | cmd.data_len = 7; | |
919 | cmd.data_buf = params; | |
920 | cmd.reply_len = chunk; | |
921 | cmd.reply_buf = dest; | |
922 | cmd.done = smu_done_complete; | |
923 | cmd.misc = ∁ | |
924 | params[0] = SMU_CMD_MISC_ee_GET_DATABLOCK_REC; | |
925 | params[1] = 0x4; | |
926 | *((u32 *)¶ms[2]) = addr; | |
927 | params[6] = clen; | |
928 | ||
929 | rc = smu_queue_cmd(&cmd); | |
930 | if (rc) | |
931 | return rc; | |
932 | wait_for_completion(&comp); | |
933 | if (cmd.status != 0) | |
934 | return rc; | |
935 | if (cmd.reply_len != clen) { | |
936 | printk(KERN_DEBUG "SMU: short read in " | |
937 | "smu_read_datablock, got: %d, want: %d\n", | |
938 | cmd.reply_len, clen); | |
939 | return -EIO; | |
940 | } | |
941 | len -= clen; | |
942 | addr += clen; | |
943 | dest += clen; | |
944 | } | |
945 | return 0; | |
946 | } | |
947 | ||
948 | static struct smu_sdbp_header *smu_create_sdb_partition(int id) | |
949 | { | |
6e9a4738 | 950 | DECLARE_COMPLETION_ONSTACK(comp); |
183d0202 BH |
951 | struct smu_simple_cmd cmd; |
952 | unsigned int addr, len, tlen; | |
953 | struct smu_sdbp_header *hdr; | |
954 | struct property *prop; | |
955 | ||
956 | /* First query the partition info */ | |
1beb6a7d | 957 | DPRINTK("SMU: Query partition infos ... (irq=%d)\n", smu->db_irq); |
183d0202 BH |
958 | smu_queue_simple(&cmd, SMU_CMD_PARTITION_COMMAND, 2, |
959 | smu_done_complete, &comp, | |
960 | SMU_CMD_PARTITION_LATEST, id); | |
961 | wait_for_completion(&comp); | |
1beb6a7d BH |
962 | DPRINTK("SMU: done, status: %d, reply_len: %d\n", |
963 | cmd.cmd.status, cmd.cmd.reply_len); | |
183d0202 BH |
964 | |
965 | /* Partition doesn't exist (or other error) */ | |
966 | if (cmd.cmd.status != 0 || cmd.cmd.reply_len != 6) | |
967 | return NULL; | |
968 | ||
969 | /* Fetch address and length from reply */ | |
970 | addr = *((u16 *)cmd.buffer); | |
971 | len = cmd.buffer[3] << 2; | |
972 | /* Calucluate total length to allocate, including the 17 bytes | |
973 | * for "sdb-partition-XX" that we append at the end of the buffer | |
974 | */ | |
975 | tlen = sizeof(struct property) + len + 18; | |
976 | ||
cd861280 | 977 | prop = kzalloc(tlen, GFP_KERNEL); |
183d0202 BH |
978 | if (prop == NULL) |
979 | return NULL; | |
980 | hdr = (struct smu_sdbp_header *)(prop + 1); | |
981 | prop->name = ((char *)prop) + tlen - 18; | |
982 | sprintf(prop->name, "sdb-partition-%02x", id); | |
983 | prop->length = len; | |
1a38147e | 984 | prop->value = hdr; |
183d0202 BH |
985 | prop->next = NULL; |
986 | ||
987 | /* Read the datablock */ | |
988 | if (smu_read_datablock((u8 *)hdr, addr, len)) { | |
989 | printk(KERN_DEBUG "SMU: datablock read failed while reading " | |
990 | "partition %02x !\n", id); | |
991 | goto failure; | |
992 | } | |
993 | ||
994 | /* Got it, check a few things and create the property */ | |
995 | if (hdr->id != id) { | |
996 | printk(KERN_DEBUG "SMU: Reading partition %02x and got " | |
997 | "%02x !\n", id, hdr->id); | |
998 | goto failure; | |
999 | } | |
79d1c712 | 1000 | if (of_add_property(smu->of_node, prop)) { |
183d0202 BH |
1001 | printk(KERN_DEBUG "SMU: Failed creating sdb-partition-%02x " |
1002 | "property !\n", id); | |
1003 | goto failure; | |
1004 | } | |
1005 | ||
1006 | return hdr; | |
1007 | failure: | |
1008 | kfree(prop); | |
1009 | return NULL; | |
1010 | } | |
1011 | ||
1012 | /* Note: Only allowed to return error code in pointers (using ERR_PTR) | |
1013 | * when interruptible is 1 | |
1014 | */ | |
018a3d1d JK |
1015 | const struct smu_sdbp_header *__smu_get_sdb_partition(int id, |
1016 | unsigned int *size, int interruptible) | |
4350147a BH |
1017 | { |
1018 | char pname[32]; | |
018a3d1d | 1019 | const struct smu_sdbp_header *part; |
4350147a BH |
1020 | |
1021 | if (!smu) | |
1022 | return NULL; | |
1023 | ||
1024 | sprintf(pname, "sdb-partition-%02x", id); | |
183d0202 | 1025 | |
1beb6a7d BH |
1026 | DPRINTK("smu_get_sdb_partition(%02x)\n", id); |
1027 | ||
183d0202 BH |
1028 | if (interruptible) { |
1029 | int rc; | |
14cc3e2b | 1030 | rc = mutex_lock_interruptible(&smu_part_access); |
183d0202 BH |
1031 | if (rc) |
1032 | return ERR_PTR(rc); | |
1033 | } else | |
14cc3e2b | 1034 | mutex_lock(&smu_part_access); |
183d0202 | 1035 | |
01b2726d | 1036 | part = of_get_property(smu->of_node, pname, size); |
183d0202 | 1037 | if (part == NULL) { |
1beb6a7d | 1038 | DPRINTK("trying to extract from SMU ...\n"); |
183d0202 BH |
1039 | part = smu_create_sdb_partition(id); |
1040 | if (part != NULL && size) | |
1041 | *size = part->len << 2; | |
1042 | } | |
14cc3e2b | 1043 | mutex_unlock(&smu_part_access); |
183d0202 BH |
1044 | return part; |
1045 | } | |
1046 | ||
018a3d1d | 1047 | const struct smu_sdbp_header *smu_get_sdb_partition(int id, unsigned int *size) |
183d0202 BH |
1048 | { |
1049 | return __smu_get_sdb_partition(id, size, 0); | |
4350147a BH |
1050 | } |
1051 | EXPORT_SYMBOL(smu_get_sdb_partition); | |
0365ba7f BH |
1052 | |
1053 | ||
1054 | /* | |
1055 | * Userland driver interface | |
1056 | */ | |
1057 | ||
1058 | ||
1059 | static LIST_HEAD(smu_clist); | |
1060 | static DEFINE_SPINLOCK(smu_clist_lock); | |
1061 | ||
1062 | enum smu_file_mode { | |
1063 | smu_file_commands, | |
1064 | smu_file_events, | |
1065 | smu_file_closing | |
1066 | }; | |
1067 | ||
1068 | struct smu_private | |
1069 | { | |
1070 | struct list_head list; | |
1071 | enum smu_file_mode mode; | |
1072 | int busy; | |
1073 | struct smu_cmd cmd; | |
1074 | spinlock_t lock; | |
1075 | wait_queue_head_t wait; | |
1076 | u8 buffer[SMU_MAX_DATA]; | |
1077 | }; | |
1078 | ||
1079 | ||
1080 | static int smu_open(struct inode *inode, struct file *file) | |
1081 | { | |
1082 | struct smu_private *pp; | |
1083 | unsigned long flags; | |
1084 | ||
dd00cc48 | 1085 | pp = kzalloc(sizeof(struct smu_private), GFP_KERNEL); |
0365ba7f BH |
1086 | if (pp == 0) |
1087 | return -ENOMEM; | |
0365ba7f BH |
1088 | spin_lock_init(&pp->lock); |
1089 | pp->mode = smu_file_commands; | |
1090 | init_waitqueue_head(&pp->wait); | |
1091 | ||
d851b6e0 | 1092 | mutex_lock(&smu_mutex); |
0365ba7f BH |
1093 | spin_lock_irqsave(&smu_clist_lock, flags); |
1094 | list_add(&pp->list, &smu_clist); | |
1095 | spin_unlock_irqrestore(&smu_clist_lock, flags); | |
1096 | file->private_data = pp; | |
d851b6e0 | 1097 | mutex_unlock(&smu_mutex); |
0365ba7f BH |
1098 | |
1099 | return 0; | |
1100 | } | |
1101 | ||
1102 | ||
1103 | static void smu_user_cmd_done(struct smu_cmd *cmd, void *misc) | |
1104 | { | |
1105 | struct smu_private *pp = misc; | |
1106 | ||
1107 | wake_up_all(&pp->wait); | |
1108 | } | |
1109 | ||
1110 | ||
1111 | static ssize_t smu_write(struct file *file, const char __user *buf, | |
1112 | size_t count, loff_t *ppos) | |
1113 | { | |
1114 | struct smu_private *pp = file->private_data; | |
1115 | unsigned long flags; | |
1116 | struct smu_user_cmd_hdr hdr; | |
1117 | int rc = 0; | |
1118 | ||
1119 | if (pp->busy) | |
1120 | return -EBUSY; | |
1121 | else if (copy_from_user(&hdr, buf, sizeof(hdr))) | |
1122 | return -EFAULT; | |
1123 | else if (hdr.cmdtype == SMU_CMDTYPE_WANTS_EVENTS) { | |
1124 | pp->mode = smu_file_events; | |
1125 | return 0; | |
183d0202 | 1126 | } else if (hdr.cmdtype == SMU_CMDTYPE_GET_PARTITION) { |
018a3d1d | 1127 | const struct smu_sdbp_header *part; |
183d0202 BH |
1128 | part = __smu_get_sdb_partition(hdr.cmd, NULL, 1); |
1129 | if (part == NULL) | |
1130 | return -EINVAL; | |
1131 | else if (IS_ERR(part)) | |
1132 | return PTR_ERR(part); | |
1133 | return 0; | |
0365ba7f BH |
1134 | } else if (hdr.cmdtype != SMU_CMDTYPE_SMU) |
1135 | return -EINVAL; | |
1136 | else if (pp->mode != smu_file_commands) | |
1137 | return -EBADFD; | |
1138 | else if (hdr.data_len > SMU_MAX_DATA) | |
1139 | return -EINVAL; | |
1140 | ||
1141 | spin_lock_irqsave(&pp->lock, flags); | |
1142 | if (pp->busy) { | |
1143 | spin_unlock_irqrestore(&pp->lock, flags); | |
1144 | return -EBUSY; | |
1145 | } | |
1146 | pp->busy = 1; | |
1147 | pp->cmd.status = 1; | |
1148 | spin_unlock_irqrestore(&pp->lock, flags); | |
1149 | ||
1150 | if (copy_from_user(pp->buffer, buf + sizeof(hdr), hdr.data_len)) { | |
1151 | pp->busy = 0; | |
1152 | return -EFAULT; | |
1153 | } | |
1154 | ||
1155 | pp->cmd.cmd = hdr.cmd; | |
1156 | pp->cmd.data_len = hdr.data_len; | |
1157 | pp->cmd.reply_len = SMU_MAX_DATA; | |
1158 | pp->cmd.data_buf = pp->buffer; | |
1159 | pp->cmd.reply_buf = pp->buffer; | |
1160 | pp->cmd.done = smu_user_cmd_done; | |
1161 | pp->cmd.misc = pp; | |
1162 | rc = smu_queue_cmd(&pp->cmd); | |
1163 | if (rc < 0) | |
1164 | return rc; | |
1165 | return count; | |
1166 | } | |
1167 | ||
1168 | ||
1169 | static ssize_t smu_read_command(struct file *file, struct smu_private *pp, | |
1170 | char __user *buf, size_t count) | |
1171 | { | |
1172 | DECLARE_WAITQUEUE(wait, current); | |
1173 | struct smu_user_reply_hdr hdr; | |
1174 | unsigned long flags; | |
1175 | int size, rc = 0; | |
1176 | ||
1177 | if (!pp->busy) | |
1178 | return 0; | |
1179 | if (count < sizeof(struct smu_user_reply_hdr)) | |
1180 | return -EOVERFLOW; | |
1181 | spin_lock_irqsave(&pp->lock, flags); | |
1182 | if (pp->cmd.status == 1) { | |
86e4754a JL |
1183 | if (file->f_flags & O_NONBLOCK) { |
1184 | spin_unlock_irqrestore(&pp->lock, flags); | |
0365ba7f | 1185 | return -EAGAIN; |
86e4754a | 1186 | } |
0365ba7f BH |
1187 | add_wait_queue(&pp->wait, &wait); |
1188 | for (;;) { | |
1189 | set_current_state(TASK_INTERRUPTIBLE); | |
1190 | rc = 0; | |
1191 | if (pp->cmd.status != 1) | |
1192 | break; | |
1193 | rc = -ERESTARTSYS; | |
1194 | if (signal_pending(current)) | |
1195 | break; | |
1196 | spin_unlock_irqrestore(&pp->lock, flags); | |
1197 | schedule(); | |
1198 | spin_lock_irqsave(&pp->lock, flags); | |
1199 | } | |
1200 | set_current_state(TASK_RUNNING); | |
1201 | remove_wait_queue(&pp->wait, &wait); | |
1202 | } | |
1203 | spin_unlock_irqrestore(&pp->lock, flags); | |
1204 | if (rc) | |
1205 | return rc; | |
1206 | if (pp->cmd.status != 0) | |
1207 | pp->cmd.reply_len = 0; | |
1208 | size = sizeof(hdr) + pp->cmd.reply_len; | |
1209 | if (count < size) | |
1210 | size = count; | |
1211 | rc = size; | |
1212 | hdr.status = pp->cmd.status; | |
1213 | hdr.reply_len = pp->cmd.reply_len; | |
1214 | if (copy_to_user(buf, &hdr, sizeof(hdr))) | |
1215 | return -EFAULT; | |
1216 | size -= sizeof(hdr); | |
1217 | if (size && copy_to_user(buf + sizeof(hdr), pp->buffer, size)) | |
1218 | return -EFAULT; | |
1219 | pp->busy = 0; | |
1220 | ||
1221 | return rc; | |
1222 | } | |
1223 | ||
1224 | ||
1225 | static ssize_t smu_read_events(struct file *file, struct smu_private *pp, | |
1226 | char __user *buf, size_t count) | |
1227 | { | |
1228 | /* Not implemented */ | |
1229 | msleep_interruptible(1000); | |
1230 | return 0; | |
1231 | } | |
1232 | ||
1233 | ||
1234 | static ssize_t smu_read(struct file *file, char __user *buf, | |
1235 | size_t count, loff_t *ppos) | |
1236 | { | |
1237 | struct smu_private *pp = file->private_data; | |
1238 | ||
1239 | if (pp->mode == smu_file_commands) | |
1240 | return smu_read_command(file, pp, buf, count); | |
1241 | if (pp->mode == smu_file_events) | |
1242 | return smu_read_events(file, pp, buf, count); | |
1243 | ||
1244 | return -EBADFD; | |
1245 | } | |
1246 | ||
1247 | static unsigned int smu_fpoll(struct file *file, poll_table *wait) | |
1248 | { | |
1249 | struct smu_private *pp = file->private_data; | |
1250 | unsigned int mask = 0; | |
1251 | unsigned long flags; | |
1252 | ||
1253 | if (pp == 0) | |
1254 | return 0; | |
1255 | ||
1256 | if (pp->mode == smu_file_commands) { | |
1257 | poll_wait(file, &pp->wait, wait); | |
1258 | ||
1259 | spin_lock_irqsave(&pp->lock, flags); | |
1260 | if (pp->busy && pp->cmd.status != 1) | |
1261 | mask |= POLLIN; | |
1262 | spin_unlock_irqrestore(&pp->lock, flags); | |
1263 | } if (pp->mode == smu_file_events) { | |
1264 | /* Not yet implemented */ | |
1265 | } | |
1266 | return mask; | |
1267 | } | |
1268 | ||
1269 | static int smu_release(struct inode *inode, struct file *file) | |
1270 | { | |
1271 | struct smu_private *pp = file->private_data; | |
1272 | unsigned long flags; | |
1273 | unsigned int busy; | |
1274 | ||
1275 | if (pp == 0) | |
1276 | return 0; | |
1277 | ||
1278 | file->private_data = NULL; | |
1279 | ||
1280 | /* Mark file as closing to avoid races with new request */ | |
1281 | spin_lock_irqsave(&pp->lock, flags); | |
1282 | pp->mode = smu_file_closing; | |
1283 | busy = pp->busy; | |
1284 | ||
1285 | /* Wait for any pending request to complete */ | |
1286 | if (busy && pp->cmd.status == 1) { | |
1287 | DECLARE_WAITQUEUE(wait, current); | |
1288 | ||
1289 | add_wait_queue(&pp->wait, &wait); | |
1290 | for (;;) { | |
1291 | set_current_state(TASK_UNINTERRUPTIBLE); | |
1292 | if (pp->cmd.status != 1) | |
1293 | break; | |
0365ba7f | 1294 | spin_unlock_irqrestore(&pp->lock, flags); |
94256dd6 AM |
1295 | schedule(); |
1296 | spin_lock_irqsave(&pp->lock, flags); | |
0365ba7f BH |
1297 | } |
1298 | set_current_state(TASK_RUNNING); | |
1299 | remove_wait_queue(&pp->wait, &wait); | |
1300 | } | |
1301 | spin_unlock_irqrestore(&pp->lock, flags); | |
1302 | ||
1303 | spin_lock_irqsave(&smu_clist_lock, flags); | |
1304 | list_del(&pp->list); | |
1305 | spin_unlock_irqrestore(&smu_clist_lock, flags); | |
1306 | kfree(pp); | |
1307 | ||
1308 | return 0; | |
1309 | } | |
1310 | ||
1311 | ||
fa027c2a | 1312 | static const struct file_operations smu_device_fops = { |
0365ba7f BH |
1313 | .llseek = no_llseek, |
1314 | .read = smu_read, | |
1315 | .write = smu_write, | |
1316 | .poll = smu_fpoll, | |
1317 | .open = smu_open, | |
1318 | .release = smu_release, | |
1319 | }; | |
1320 | ||
6b67f62c | 1321 | static struct miscdevice pmu_device = { |
0365ba7f BH |
1322 | MISC_DYNAMIC_MINOR, "smu", &smu_device_fops |
1323 | }; | |
1324 | ||
1325 | static int smu_device_init(void) | |
1326 | { | |
1327 | if (!smu) | |
1328 | return -ENODEV; | |
1329 | if (misc_register(&pmu_device) < 0) | |
1330 | printk(KERN_ERR "via-pmu: cannot register misc device.\n"); | |
1331 | return 0; | |
1332 | } | |
1333 | device_initcall(smu_device_init); |