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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * PowerMac G5 SMU driver | |
3 | * | |
4 | * Copyright 2004 J. Mayer <l_indien@magic.fr> | |
5 | * Copyright 2005 Benjamin Herrenschmidt, IBM Corp. | |
6 | * | |
7 | * Released under the term of the GNU GPL v2. | |
8 | */ | |
9 | ||
10 | /* | |
1da177e4 | 11 | * TODO: |
0365ba7f BH |
12 | * - maybe add timeout to commands ? |
13 | * - blocking version of time functions | |
14 | * - polling version of i2c commands (including timer that works with | |
15 | * interrutps off) | |
16 | * - maybe avoid some data copies with i2c by directly using the smu cmd | |
17 | * buffer and a lower level internal interface | |
18 | * - understand SMU -> CPU events and implement reception of them via | |
19 | * the userland interface | |
1da177e4 LT |
20 | */ |
21 | ||
22 | #include <linux/config.h> | |
23 | #include <linux/types.h> | |
24 | #include <linux/kernel.h> | |
25 | #include <linux/device.h> | |
26 | #include <linux/dmapool.h> | |
27 | #include <linux/bootmem.h> | |
28 | #include <linux/vmalloc.h> | |
29 | #include <linux/highmem.h> | |
30 | #include <linux/jiffies.h> | |
31 | #include <linux/interrupt.h> | |
32 | #include <linux/rtc.h> | |
0365ba7f BH |
33 | #include <linux/completion.h> |
34 | #include <linux/miscdevice.h> | |
35 | #include <linux/delay.h> | |
36 | #include <linux/sysdev.h> | |
37 | #include <linux/poll.h> | |
1da177e4 LT |
38 | |
39 | #include <asm/byteorder.h> | |
40 | #include <asm/io.h> | |
41 | #include <asm/prom.h> | |
42 | #include <asm/machdep.h> | |
43 | #include <asm/pmac_feature.h> | |
44 | #include <asm/smu.h> | |
45 | #include <asm/sections.h> | |
46 | #include <asm/abs_addr.h> | |
0365ba7f BH |
47 | #include <asm/uaccess.h> |
48 | #include <asm/of_device.h> | |
49 | ||
50 | #define VERSION "0.6" | |
51 | #define AUTHOR "(c) 2005 Benjamin Herrenschmidt, IBM Corp." | |
1da177e4 | 52 | |
0365ba7f | 53 | #undef DEBUG_SMU |
1da177e4 LT |
54 | |
55 | #ifdef DEBUG_SMU | |
56 | #define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0) | |
57 | #else | |
58 | #define DPRINTK(fmt, args...) do { } while (0) | |
59 | #endif | |
60 | ||
61 | /* | |
62 | * This is the command buffer passed to the SMU hardware | |
63 | */ | |
0365ba7f BH |
64 | #define SMU_MAX_DATA 254 |
65 | ||
1da177e4 LT |
66 | struct smu_cmd_buf { |
67 | u8 cmd; | |
68 | u8 length; | |
0365ba7f | 69 | u8 data[SMU_MAX_DATA]; |
1da177e4 LT |
70 | }; |
71 | ||
72 | struct smu_device { | |
73 | spinlock_t lock; | |
74 | struct device_node *of_node; | |
0365ba7f BH |
75 | struct of_device *of_dev; |
76 | int doorbell; /* doorbell gpio */ | |
1da177e4 | 77 | u32 __iomem *db_buf; /* doorbell buffer */ |
0365ba7f BH |
78 | int db_irq; |
79 | int msg; | |
80 | int msg_irq; | |
1da177e4 LT |
81 | struct smu_cmd_buf *cmd_buf; /* command buffer virtual */ |
82 | u32 cmd_buf_abs; /* command buffer absolute */ | |
0365ba7f BH |
83 | struct list_head cmd_list; |
84 | struct smu_cmd *cmd_cur; /* pending command */ | |
85 | struct list_head cmd_i2c_list; | |
86 | struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */ | |
87 | struct timer_list i2c_timer; | |
1da177e4 LT |
88 | }; |
89 | ||
90 | /* | |
91 | * I don't think there will ever be more than one SMU, so | |
92 | * for now, just hard code that | |
93 | */ | |
94 | static struct smu_device *smu; | |
95 | ||
0365ba7f | 96 | |
1da177e4 | 97 | /* |
0365ba7f | 98 | * SMU driver low level stuff |
1da177e4 | 99 | */ |
1da177e4 | 100 | |
0365ba7f | 101 | static void smu_start_cmd(void) |
1da177e4 | 102 | { |
0365ba7f BH |
103 | unsigned long faddr, fend; |
104 | struct smu_cmd *cmd; | |
1da177e4 | 105 | |
0365ba7f BH |
106 | if (list_empty(&smu->cmd_list)) |
107 | return; | |
108 | ||
109 | /* Fetch first command in queue */ | |
110 | cmd = list_entry(smu->cmd_list.next, struct smu_cmd, link); | |
111 | smu->cmd_cur = cmd; | |
112 | list_del(&cmd->link); | |
113 | ||
114 | DPRINTK("SMU: starting cmd %x, %d bytes data\n", cmd->cmd, | |
115 | cmd->data_len); | |
116 | DPRINTK("SMU: data buffer: %02x %02x %02x %02x ...\n", | |
117 | ((u8 *)cmd->data_buf)[0], ((u8 *)cmd->data_buf)[1], | |
118 | ((u8 *)cmd->data_buf)[2], ((u8 *)cmd->data_buf)[3]); | |
119 | ||
120 | /* Fill the SMU command buffer */ | |
121 | smu->cmd_buf->cmd = cmd->cmd; | |
122 | smu->cmd_buf->length = cmd->data_len; | |
123 | memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len); | |
124 | ||
125 | /* Flush command and data to RAM */ | |
126 | faddr = (unsigned long)smu->cmd_buf; | |
127 | fend = faddr + smu->cmd_buf->length + 2; | |
128 | flush_inval_dcache_range(faddr, fend); | |
129 | ||
130 | /* This isn't exactly a DMA mapping here, I suspect | |
1da177e4 LT |
131 | * the SMU is actually communicating with us via i2c to the |
132 | * northbridge or the CPU to access RAM. | |
133 | */ | |
0365ba7f | 134 | writel(smu->cmd_buf_abs, smu->db_buf); |
1da177e4 LT |
135 | |
136 | /* Ring the SMU doorbell */ | |
0365ba7f | 137 | pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, smu->doorbell, 4); |
1da177e4 LT |
138 | } |
139 | ||
0365ba7f BH |
140 | |
141 | static irqreturn_t smu_db_intr(int irq, void *arg, struct pt_regs *regs) | |
1da177e4 | 142 | { |
0365ba7f BH |
143 | unsigned long flags; |
144 | struct smu_cmd *cmd; | |
145 | void (*done)(struct smu_cmd *cmd, void *misc) = NULL; | |
146 | void *misc = NULL; | |
147 | u8 gpio; | |
148 | int rc = 0; | |
1da177e4 | 149 | |
0365ba7f BH |
150 | /* SMU completed the command, well, we hope, let's make sure |
151 | * of it | |
152 | */ | |
153 | spin_lock_irqsave(&smu->lock, flags); | |
1da177e4 | 154 | |
0365ba7f BH |
155 | gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell); |
156 | if ((gpio & 7) != 7) | |
157 | return IRQ_HANDLED; | |
158 | ||
159 | cmd = smu->cmd_cur; | |
160 | smu->cmd_cur = NULL; | |
161 | if (cmd == NULL) | |
162 | goto bail; | |
163 | ||
164 | if (rc == 0) { | |
165 | unsigned long faddr; | |
166 | int reply_len; | |
167 | u8 ack; | |
168 | ||
169 | /* CPU might have brought back the cache line, so we need | |
170 | * to flush again before peeking at the SMU response. We | |
171 | * flush the entire buffer for now as we haven't read the | |
172 | * reply lenght (it's only 2 cache lines anyway) | |
173 | */ | |
174 | faddr = (unsigned long)smu->cmd_buf; | |
175 | flush_inval_dcache_range(faddr, faddr + 256); | |
176 | ||
177 | /* Now check ack */ | |
178 | ack = (~cmd->cmd) & 0xff; | |
179 | if (ack != smu->cmd_buf->cmd) { | |
180 | DPRINTK("SMU: incorrect ack, want %x got %x\n", | |
181 | ack, smu->cmd_buf->cmd); | |
182 | rc = -EIO; | |
183 | } | |
184 | reply_len = rc == 0 ? smu->cmd_buf->length : 0; | |
185 | DPRINTK("SMU: reply len: %d\n", reply_len); | |
186 | if (reply_len > cmd->reply_len) { | |
187 | printk(KERN_WARNING "SMU: reply buffer too small," | |
188 | "got %d bytes for a %d bytes buffer\n", | |
189 | reply_len, cmd->reply_len); | |
190 | reply_len = cmd->reply_len; | |
191 | } | |
192 | cmd->reply_len = reply_len; | |
193 | if (cmd->reply_buf && reply_len) | |
194 | memcpy(cmd->reply_buf, smu->cmd_buf->data, reply_len); | |
195 | } | |
196 | ||
197 | /* Now complete the command. Write status last in order as we lost | |
198 | * ownership of the command structure as soon as it's no longer -1 | |
199 | */ | |
200 | done = cmd->done; | |
201 | misc = cmd->misc; | |
202 | mb(); | |
203 | cmd->status = rc; | |
204 | bail: | |
205 | /* Start next command if any */ | |
206 | smu_start_cmd(); | |
207 | spin_unlock_irqrestore(&smu->lock, flags); | |
208 | ||
209 | /* Call command completion handler if any */ | |
210 | if (done) | |
211 | done(cmd, misc); | |
212 | ||
213 | /* It's an edge interrupt, nothing to do */ | |
214 | return IRQ_HANDLED; | |
1da177e4 LT |
215 | } |
216 | ||
0365ba7f BH |
217 | |
218 | static irqreturn_t smu_msg_intr(int irq, void *arg, struct pt_regs *regs) | |
1da177e4 | 219 | { |
0365ba7f BH |
220 | /* I don't quite know what to do with this one, we seem to never |
221 | * receive it, so I suspect we have to arm it someway in the SMU | |
222 | * to start getting events that way. | |
223 | */ | |
224 | ||
225 | printk(KERN_INFO "SMU: message interrupt !\n"); | |
1da177e4 | 226 | |
0365ba7f BH |
227 | /* It's an edge interrupt, nothing to do */ |
228 | return IRQ_HANDLED; | |
229 | } | |
1da177e4 | 230 | |
1da177e4 | 231 | |
0365ba7f BH |
232 | /* |
233 | * Queued command management. | |
234 | * | |
235 | */ | |
1da177e4 | 236 | |
0365ba7f BH |
237 | int smu_queue_cmd(struct smu_cmd *cmd) |
238 | { | |
239 | unsigned long flags; | |
1da177e4 | 240 | |
0365ba7f BH |
241 | if (smu == NULL) |
242 | return -ENODEV; | |
243 | if (cmd->data_len > SMU_MAX_DATA || | |
244 | cmd->reply_len > SMU_MAX_DATA) | |
245 | return -EINVAL; | |
246 | ||
247 | cmd->status = 1; | |
248 | spin_lock_irqsave(&smu->lock, flags); | |
249 | list_add_tail(&cmd->link, &smu->cmd_list); | |
250 | if (smu->cmd_cur == NULL) | |
251 | smu_start_cmd(); | |
252 | spin_unlock_irqrestore(&smu->lock, flags); | |
253 | ||
254 | return 0; | |
1da177e4 | 255 | } |
0365ba7f | 256 | EXPORT_SYMBOL(smu_queue_cmd); |
1da177e4 | 257 | |
0365ba7f BH |
258 | |
259 | int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command, | |
260 | unsigned int data_len, | |
261 | void (*done)(struct smu_cmd *cmd, void *misc), | |
262 | void *misc, ...) | |
1da177e4 | 263 | { |
0365ba7f BH |
264 | struct smu_cmd *cmd = &scmd->cmd; |
265 | va_list list; | |
266 | int i; | |
267 | ||
268 | if (data_len > sizeof(scmd->buffer)) | |
269 | return -EINVAL; | |
270 | ||
271 | memset(scmd, 0, sizeof(*scmd)); | |
272 | cmd->cmd = command; | |
273 | cmd->data_len = data_len; | |
274 | cmd->data_buf = scmd->buffer; | |
275 | cmd->reply_len = sizeof(scmd->buffer); | |
276 | cmd->reply_buf = scmd->buffer; | |
277 | cmd->done = done; | |
278 | cmd->misc = misc; | |
279 | ||
280 | va_start(list, misc); | |
281 | for (i = 0; i < data_len; ++i) | |
282 | scmd->buffer[i] = (u8)va_arg(list, int); | |
283 | va_end(list); | |
284 | ||
285 | return smu_queue_cmd(cmd); | |
1da177e4 | 286 | } |
0365ba7f | 287 | EXPORT_SYMBOL(smu_queue_simple); |
1da177e4 | 288 | |
0365ba7f BH |
289 | |
290 | void smu_poll(void) | |
1da177e4 | 291 | { |
0365ba7f BH |
292 | u8 gpio; |
293 | ||
294 | if (smu == NULL) | |
295 | return; | |
296 | ||
297 | gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell); | |
298 | if ((gpio & 7) == 7) | |
299 | smu_db_intr(smu->db_irq, smu, NULL); | |
1da177e4 | 300 | } |
0365ba7f BH |
301 | EXPORT_SYMBOL(smu_poll); |
302 | ||
1da177e4 | 303 | |
0365ba7f | 304 | void smu_done_complete(struct smu_cmd *cmd, void *misc) |
1da177e4 | 305 | { |
0365ba7f BH |
306 | struct completion *comp = misc; |
307 | ||
308 | complete(comp); | |
1da177e4 | 309 | } |
0365ba7f BH |
310 | EXPORT_SYMBOL(smu_done_complete); |
311 | ||
1da177e4 | 312 | |
0365ba7f | 313 | void smu_spinwait_cmd(struct smu_cmd *cmd) |
1da177e4 | 314 | { |
0365ba7f BH |
315 | while(cmd->status == 1) |
316 | smu_poll(); | |
317 | } | |
318 | EXPORT_SYMBOL(smu_spinwait_cmd); | |
319 | ||
320 | ||
321 | /* RTC low level commands */ | |
322 | static inline int bcd2hex (int n) | |
323 | { | |
324 | return (((n & 0xf0) >> 4) * 10) + (n & 0xf); | |
1da177e4 LT |
325 | } |
326 | ||
0365ba7f BH |
327 | |
328 | static inline int hex2bcd (int n) | |
1da177e4 | 329 | { |
0365ba7f | 330 | return ((n / 10) << 4) + (n % 10); |
1da177e4 | 331 | } |
0365ba7f | 332 | |
1da177e4 LT |
333 | |
334 | static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf, | |
335 | struct rtc_time *time) | |
336 | { | |
337 | cmd_buf->cmd = 0x8e; | |
338 | cmd_buf->length = 8; | |
339 | cmd_buf->data[0] = 0x80; | |
340 | cmd_buf->data[1] = hex2bcd(time->tm_sec); | |
341 | cmd_buf->data[2] = hex2bcd(time->tm_min); | |
342 | cmd_buf->data[3] = hex2bcd(time->tm_hour); | |
343 | cmd_buf->data[4] = time->tm_wday; | |
344 | cmd_buf->data[5] = hex2bcd(time->tm_mday); | |
345 | cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1; | |
346 | cmd_buf->data[7] = hex2bcd(time->tm_year - 100); | |
347 | } | |
348 | ||
1da177e4 | 349 | |
0365ba7f | 350 | int smu_get_rtc_time(struct rtc_time *time, int spinwait) |
1da177e4 | 351 | { |
0365ba7f | 352 | struct smu_simple_cmd cmd; |
1da177e4 LT |
353 | int rc; |
354 | ||
355 | if (smu == NULL) | |
356 | return -ENODEV; | |
357 | ||
358 | memset(time, 0, sizeof(struct rtc_time)); | |
0365ba7f BH |
359 | rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 1, NULL, NULL, |
360 | SMU_CMD_RTC_GET_DATETIME); | |
361 | if (rc) | |
362 | return rc; | |
363 | smu_spinwait_simple(&cmd); | |
1da177e4 | 364 | |
0365ba7f BH |
365 | time->tm_sec = bcd2hex(cmd.buffer[0]); |
366 | time->tm_min = bcd2hex(cmd.buffer[1]); | |
367 | time->tm_hour = bcd2hex(cmd.buffer[2]); | |
368 | time->tm_wday = bcd2hex(cmd.buffer[3]); | |
369 | time->tm_mday = bcd2hex(cmd.buffer[4]); | |
370 | time->tm_mon = bcd2hex(cmd.buffer[5]) - 1; | |
371 | time->tm_year = bcd2hex(cmd.buffer[6]) + 100; | |
372 | ||
373 | return 0; | |
1da177e4 LT |
374 | } |
375 | ||
0365ba7f BH |
376 | |
377 | int smu_set_rtc_time(struct rtc_time *time, int spinwait) | |
1da177e4 | 378 | { |
0365ba7f | 379 | struct smu_simple_cmd cmd; |
1da177e4 LT |
380 | int rc; |
381 | ||
382 | if (smu == NULL) | |
383 | return -ENODEV; | |
384 | ||
0365ba7f BH |
385 | rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 8, NULL, NULL, |
386 | SMU_CMD_RTC_SET_DATETIME, | |
387 | hex2bcd(time->tm_sec), | |
388 | hex2bcd(time->tm_min), | |
389 | hex2bcd(time->tm_hour), | |
390 | time->tm_wday, | |
391 | hex2bcd(time->tm_mday), | |
392 | hex2bcd(time->tm_mon) + 1, | |
393 | hex2bcd(time->tm_year - 100)); | |
394 | if (rc) | |
395 | return rc; | |
396 | smu_spinwait_simple(&cmd); | |
1da177e4 | 397 | |
0365ba7f | 398 | return 0; |
1da177e4 LT |
399 | } |
400 | ||
0365ba7f | 401 | |
1da177e4 LT |
402 | void smu_shutdown(void) |
403 | { | |
0365ba7f | 404 | struct smu_simple_cmd cmd; |
1da177e4 LT |
405 | |
406 | if (smu == NULL) | |
407 | return; | |
408 | ||
0365ba7f BH |
409 | if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 9, NULL, NULL, |
410 | 'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0)) | |
411 | return; | |
412 | smu_spinwait_simple(&cmd); | |
1da177e4 LT |
413 | for (;;) |
414 | ; | |
1da177e4 LT |
415 | } |
416 | ||
0365ba7f | 417 | |
1da177e4 LT |
418 | void smu_restart(void) |
419 | { | |
0365ba7f | 420 | struct smu_simple_cmd cmd; |
1da177e4 LT |
421 | |
422 | if (smu == NULL) | |
423 | return; | |
424 | ||
0365ba7f BH |
425 | if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, NULL, NULL, |
426 | 'R', 'E', 'S', 'T', 'A', 'R', 'T', 0)) | |
427 | return; | |
428 | smu_spinwait_simple(&cmd); | |
1da177e4 LT |
429 | for (;;) |
430 | ; | |
1da177e4 LT |
431 | } |
432 | ||
0365ba7f | 433 | |
1da177e4 LT |
434 | int smu_present(void) |
435 | { | |
436 | return smu != NULL; | |
437 | } | |
0365ba7f | 438 | EXPORT_SYMBOL(smu_present); |
1da177e4 LT |
439 | |
440 | ||
441 | int smu_init (void) | |
442 | { | |
443 | struct device_node *np; | |
444 | u32 *data; | |
445 | ||
446 | np = of_find_node_by_type(NULL, "smu"); | |
447 | if (np == NULL) | |
448 | return -ENODEV; | |
449 | ||
0365ba7f BH |
450 | printk(KERN_INFO "SMU driver %s %s\n", VERSION, AUTHOR); |
451 | ||
1da177e4 LT |
452 | if (smu_cmdbuf_abs == 0) { |
453 | printk(KERN_ERR "SMU: Command buffer not allocated !\n"); | |
454 | return -EINVAL; | |
455 | } | |
456 | ||
457 | smu = alloc_bootmem(sizeof(struct smu_device)); | |
458 | if (smu == NULL) | |
459 | return -ENOMEM; | |
460 | memset(smu, 0, sizeof(*smu)); | |
461 | ||
462 | spin_lock_init(&smu->lock); | |
0365ba7f BH |
463 | INIT_LIST_HEAD(&smu->cmd_list); |
464 | INIT_LIST_HEAD(&smu->cmd_i2c_list); | |
1da177e4 | 465 | smu->of_node = np; |
0365ba7f BH |
466 | smu->db_irq = NO_IRQ; |
467 | smu->msg_irq = NO_IRQ; | |
468 | init_timer(&smu->i2c_timer); | |
469 | ||
1da177e4 LT |
470 | /* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a |
471 | * 32 bits value safely | |
472 | */ | |
473 | smu->cmd_buf_abs = (u32)smu_cmdbuf_abs; | |
474 | smu->cmd_buf = (struct smu_cmd_buf *)abs_to_virt(smu_cmdbuf_abs); | |
475 | ||
476 | np = of_find_node_by_name(NULL, "smu-doorbell"); | |
477 | if (np == NULL) { | |
478 | printk(KERN_ERR "SMU: Can't find doorbell GPIO !\n"); | |
479 | goto fail; | |
480 | } | |
481 | data = (u32 *)get_property(np, "reg", NULL); | |
1da177e4 | 482 | if (data == NULL) { |
0365ba7f | 483 | of_node_put(np); |
1da177e4 LT |
484 | printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n"); |
485 | goto fail; | |
486 | } | |
487 | ||
488 | /* Current setup has one doorbell GPIO that does both doorbell | |
489 | * and ack. GPIOs are at 0x50, best would be to find that out | |
490 | * in the device-tree though. | |
491 | */ | |
0365ba7f BH |
492 | smu->doorbell = *data; |
493 | if (smu->doorbell < 0x50) | |
494 | smu->doorbell += 0x50; | |
495 | if (np->n_intrs > 0) | |
496 | smu->db_irq = np->intrs[0].line; | |
497 | ||
498 | of_node_put(np); | |
499 | ||
500 | /* Now look for the smu-interrupt GPIO */ | |
501 | do { | |
502 | np = of_find_node_by_name(NULL, "smu-interrupt"); | |
503 | if (np == NULL) | |
504 | break; | |
505 | data = (u32 *)get_property(np, "reg", NULL); | |
506 | if (data == NULL) { | |
507 | of_node_put(np); | |
508 | break; | |
509 | } | |
510 | smu->msg = *data; | |
511 | if (smu->msg < 0x50) | |
512 | smu->msg += 0x50; | |
513 | if (np->n_intrs > 0) | |
514 | smu->msg_irq = np->intrs[0].line; | |
515 | of_node_put(np); | |
516 | } while(0); | |
1da177e4 LT |
517 | |
518 | /* Doorbell buffer is currently hard-coded, I didn't find a proper | |
519 | * device-tree entry giving the address. Best would probably to use | |
520 | * an offset for K2 base though, but let's do it that way for now. | |
521 | */ | |
522 | smu->db_buf = ioremap(0x8000860c, 0x1000); | |
523 | if (smu->db_buf == NULL) { | |
524 | printk(KERN_ERR "SMU: Can't map doorbell buffer pointer !\n"); | |
525 | goto fail; | |
526 | } | |
527 | ||
528 | sys_ctrler = SYS_CTRLER_SMU; | |
529 | return 0; | |
530 | ||
531 | fail: | |
532 | smu = NULL; | |
533 | return -ENXIO; | |
534 | ||
535 | } | |
0365ba7f BH |
536 | |
537 | ||
538 | static int smu_late_init(void) | |
539 | { | |
540 | if (!smu) | |
541 | return 0; | |
542 | ||
543 | /* | |
544 | * Try to request the interrupts | |
545 | */ | |
546 | ||
547 | if (smu->db_irq != NO_IRQ) { | |
548 | if (request_irq(smu->db_irq, smu_db_intr, | |
549 | SA_SHIRQ, "SMU doorbell", smu) < 0) { | |
550 | printk(KERN_WARNING "SMU: can't " | |
551 | "request interrupt %d\n", | |
552 | smu->db_irq); | |
553 | smu->db_irq = NO_IRQ; | |
554 | } | |
555 | } | |
556 | ||
557 | if (smu->msg_irq != NO_IRQ) { | |
558 | if (request_irq(smu->msg_irq, smu_msg_intr, | |
559 | SA_SHIRQ, "SMU message", smu) < 0) { | |
560 | printk(KERN_WARNING "SMU: can't " | |
561 | "request interrupt %d\n", | |
562 | smu->msg_irq); | |
563 | smu->msg_irq = NO_IRQ; | |
564 | } | |
565 | } | |
566 | ||
567 | return 0; | |
568 | } | |
569 | arch_initcall(smu_late_init); | |
570 | ||
571 | /* | |
572 | * sysfs visibility | |
573 | */ | |
574 | ||
575 | static void smu_expose_childs(void *unused) | |
576 | { | |
577 | struct device_node *np; | |
578 | ||
579 | for (np = NULL; (np = of_get_next_child(smu->of_node, np)) != NULL;) { | |
580 | if (device_is_compatible(np, "smu-i2c")) { | |
581 | char name[32]; | |
582 | u32 *reg = (u32 *)get_property(np, "reg", NULL); | |
583 | ||
584 | if (reg == NULL) | |
585 | continue; | |
586 | sprintf(name, "smu-i2c-%02x", *reg); | |
587 | of_platform_device_create(np, name, &smu->of_dev->dev); | |
588 | } | |
589 | } | |
590 | ||
591 | } | |
592 | ||
593 | static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs, NULL); | |
594 | ||
595 | static int smu_platform_probe(struct of_device* dev, | |
596 | const struct of_device_id *match) | |
597 | { | |
598 | if (!smu) | |
599 | return -ENODEV; | |
600 | smu->of_dev = dev; | |
601 | ||
602 | /* | |
603 | * Ok, we are matched, now expose all i2c busses. We have to defer | |
604 | * that unfortunately or it would deadlock inside the device model | |
605 | */ | |
606 | schedule_work(&smu_expose_childs_work); | |
607 | ||
608 | return 0; | |
609 | } | |
610 | ||
611 | static struct of_device_id smu_platform_match[] = | |
612 | { | |
613 | { | |
614 | .type = "smu", | |
615 | }, | |
616 | {}, | |
617 | }; | |
618 | ||
619 | static struct of_platform_driver smu_of_platform_driver = | |
620 | { | |
621 | .name = "smu", | |
622 | .match_table = smu_platform_match, | |
623 | .probe = smu_platform_probe, | |
624 | }; | |
625 | ||
626 | static int __init smu_init_sysfs(void) | |
627 | { | |
628 | int rc; | |
629 | ||
630 | /* | |
631 | * Due to sysfs bogosity, a sysdev is not a real device, so | |
632 | * we should in fact create both if we want sysdev semantics | |
633 | * for power management. | |
634 | * For now, we don't power manage machines with an SMU chip, | |
635 | * I'm a bit too far from figuring out how that works with those | |
636 | * new chipsets, but that will come back and bite us | |
637 | */ | |
638 | rc = of_register_driver(&smu_of_platform_driver); | |
639 | return 0; | |
640 | } | |
641 | ||
642 | device_initcall(smu_init_sysfs); | |
643 | ||
644 | struct of_device *smu_get_ofdev(void) | |
645 | { | |
646 | if (!smu) | |
647 | return NULL; | |
648 | return smu->of_dev; | |
649 | } | |
650 | ||
651 | EXPORT_SYMBOL_GPL(smu_get_ofdev); | |
652 | ||
653 | /* | |
654 | * i2c interface | |
655 | */ | |
656 | ||
657 | static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail) | |
658 | { | |
659 | void (*done)(struct smu_i2c_cmd *cmd, void *misc) = cmd->done; | |
660 | void *misc = cmd->misc; | |
661 | unsigned long flags; | |
662 | ||
663 | /* Check for read case */ | |
664 | if (!fail && cmd->read) { | |
665 | if (cmd->pdata[0] < 1) | |
666 | fail = 1; | |
667 | else | |
668 | memcpy(cmd->info.data, &cmd->pdata[1], | |
669 | cmd->info.datalen); | |
670 | } | |
671 | ||
672 | DPRINTK("SMU: completing, success: %d\n", !fail); | |
673 | ||
674 | /* Update status and mark no pending i2c command with lock | |
675 | * held so nobody comes in while we dequeue an eventual | |
676 | * pending next i2c command | |
677 | */ | |
678 | spin_lock_irqsave(&smu->lock, flags); | |
679 | smu->cmd_i2c_cur = NULL; | |
680 | wmb(); | |
681 | cmd->status = fail ? -EIO : 0; | |
682 | ||
683 | /* Is there another i2c command waiting ? */ | |
684 | if (!list_empty(&smu->cmd_i2c_list)) { | |
685 | struct smu_i2c_cmd *newcmd; | |
686 | ||
687 | /* Fetch it, new current, remove from list */ | |
688 | newcmd = list_entry(smu->cmd_i2c_list.next, | |
689 | struct smu_i2c_cmd, link); | |
690 | smu->cmd_i2c_cur = newcmd; | |
691 | list_del(&cmd->link); | |
692 | ||
693 | /* Queue with low level smu */ | |
694 | list_add_tail(&cmd->scmd.link, &smu->cmd_list); | |
695 | if (smu->cmd_cur == NULL) | |
696 | smu_start_cmd(); | |
697 | } | |
698 | spin_unlock_irqrestore(&smu->lock, flags); | |
699 | ||
700 | /* Call command completion handler if any */ | |
701 | if (done) | |
702 | done(cmd, misc); | |
703 | ||
704 | } | |
705 | ||
706 | ||
707 | static void smu_i2c_retry(unsigned long data) | |
708 | { | |
709 | struct smu_i2c_cmd *cmd = (struct smu_i2c_cmd *)data; | |
710 | ||
711 | DPRINTK("SMU: i2c failure, requeuing...\n"); | |
712 | ||
713 | /* requeue command simply by resetting reply_len */ | |
714 | cmd->pdata[0] = 0xff; | |
715 | cmd->scmd.reply_len = 0x10; | |
716 | smu_queue_cmd(&cmd->scmd); | |
717 | } | |
718 | ||
719 | ||
720 | static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc) | |
721 | { | |
722 | struct smu_i2c_cmd *cmd = misc; | |
723 | int fail = 0; | |
724 | ||
725 | DPRINTK("SMU: i2c compl. stage=%d status=%x pdata[0]=%x rlen: %x\n", | |
726 | cmd->stage, scmd->status, cmd->pdata[0], scmd->reply_len); | |
727 | ||
728 | /* Check for possible status */ | |
729 | if (scmd->status < 0) | |
730 | fail = 1; | |
731 | else if (cmd->read) { | |
732 | if (cmd->stage == 0) | |
733 | fail = cmd->pdata[0] != 0; | |
734 | else | |
735 | fail = cmd->pdata[0] >= 0x80; | |
736 | } else { | |
737 | fail = cmd->pdata[0] != 0; | |
738 | } | |
739 | ||
740 | /* Handle failures by requeuing command, after 5ms interval | |
741 | */ | |
742 | if (fail && --cmd->retries > 0) { | |
743 | DPRINTK("SMU: i2c failure, starting timer...\n"); | |
744 | smu->i2c_timer.function = smu_i2c_retry; | |
745 | smu->i2c_timer.data = (unsigned long)cmd; | |
746 | smu->i2c_timer.expires = jiffies + msecs_to_jiffies(5); | |
747 | add_timer(&smu->i2c_timer); | |
748 | return; | |
749 | } | |
750 | ||
751 | /* If failure or stage 1, command is complete */ | |
752 | if (fail || cmd->stage != 0) { | |
753 | smu_i2c_complete_command(cmd, fail); | |
754 | return; | |
755 | } | |
756 | ||
757 | DPRINTK("SMU: going to stage 1\n"); | |
758 | ||
759 | /* Ok, initial command complete, now poll status */ | |
760 | scmd->reply_buf = cmd->pdata; | |
761 | scmd->reply_len = 0x10; | |
762 | scmd->data_buf = cmd->pdata; | |
763 | scmd->data_len = 1; | |
764 | cmd->pdata[0] = 0; | |
765 | cmd->stage = 1; | |
766 | cmd->retries = 20; | |
767 | smu_queue_cmd(scmd); | |
768 | } | |
769 | ||
770 | ||
771 | int smu_queue_i2c(struct smu_i2c_cmd *cmd) | |
772 | { | |
773 | unsigned long flags; | |
774 | ||
775 | if (smu == NULL) | |
776 | return -ENODEV; | |
777 | ||
778 | /* Fill most fields of scmd */ | |
779 | cmd->scmd.cmd = SMU_CMD_I2C_COMMAND; | |
780 | cmd->scmd.done = smu_i2c_low_completion; | |
781 | cmd->scmd.misc = cmd; | |
782 | cmd->scmd.reply_buf = cmd->pdata; | |
783 | cmd->scmd.reply_len = 0x10; | |
784 | cmd->scmd.data_buf = (u8 *)(char *)&cmd->info; | |
785 | cmd->scmd.status = 1; | |
786 | cmd->stage = 0; | |
787 | cmd->pdata[0] = 0xff; | |
788 | cmd->retries = 20; | |
789 | cmd->status = 1; | |
790 | ||
791 | /* Check transfer type, sanitize some "info" fields | |
792 | * based on transfer type and do more checking | |
793 | */ | |
794 | cmd->info.caddr = cmd->info.devaddr; | |
795 | cmd->read = cmd->info.devaddr & 0x01; | |
796 | switch(cmd->info.type) { | |
797 | case SMU_I2C_TRANSFER_SIMPLE: | |
798 | memset(&cmd->info.sublen, 0, 4); | |
799 | break; | |
800 | case SMU_I2C_TRANSFER_COMBINED: | |
801 | cmd->info.devaddr &= 0xfe; | |
802 | case SMU_I2C_TRANSFER_STDSUB: | |
803 | if (cmd->info.sublen > 3) | |
804 | return -EINVAL; | |
805 | break; | |
806 | default: | |
807 | return -EINVAL; | |
808 | } | |
809 | ||
810 | /* Finish setting up command based on transfer direction | |
811 | */ | |
812 | if (cmd->read) { | |
813 | if (cmd->info.datalen > SMU_I2C_READ_MAX) | |
814 | return -EINVAL; | |
815 | memset(cmd->info.data, 0xff, cmd->info.datalen); | |
816 | cmd->scmd.data_len = 9; | |
817 | } else { | |
818 | if (cmd->info.datalen > SMU_I2C_WRITE_MAX) | |
819 | return -EINVAL; | |
820 | cmd->scmd.data_len = 9 + cmd->info.datalen; | |
821 | } | |
822 | ||
823 | DPRINTK("SMU: i2c enqueuing command\n"); | |
824 | DPRINTK("SMU: %s, len=%d bus=%x addr=%x sub0=%x type=%x\n", | |
825 | cmd->read ? "read" : "write", cmd->info.datalen, | |
826 | cmd->info.bus, cmd->info.caddr, | |
827 | cmd->info.subaddr[0], cmd->info.type); | |
828 | ||
829 | ||
830 | /* Enqueue command in i2c list, and if empty, enqueue also in | |
831 | * main command list | |
832 | */ | |
833 | spin_lock_irqsave(&smu->lock, flags); | |
834 | if (smu->cmd_i2c_cur == NULL) { | |
835 | smu->cmd_i2c_cur = cmd; | |
836 | list_add_tail(&cmd->scmd.link, &smu->cmd_list); | |
837 | if (smu->cmd_cur == NULL) | |
838 | smu_start_cmd(); | |
839 | } else | |
840 | list_add_tail(&cmd->link, &smu->cmd_i2c_list); | |
841 | spin_unlock_irqrestore(&smu->lock, flags); | |
842 | ||
843 | return 0; | |
844 | } | |
845 | ||
846 | ||
847 | ||
848 | /* | |
849 | * Userland driver interface | |
850 | */ | |
851 | ||
852 | ||
853 | static LIST_HEAD(smu_clist); | |
854 | static DEFINE_SPINLOCK(smu_clist_lock); | |
855 | ||
856 | enum smu_file_mode { | |
857 | smu_file_commands, | |
858 | smu_file_events, | |
859 | smu_file_closing | |
860 | }; | |
861 | ||
862 | struct smu_private | |
863 | { | |
864 | struct list_head list; | |
865 | enum smu_file_mode mode; | |
866 | int busy; | |
867 | struct smu_cmd cmd; | |
868 | spinlock_t lock; | |
869 | wait_queue_head_t wait; | |
870 | u8 buffer[SMU_MAX_DATA]; | |
871 | }; | |
872 | ||
873 | ||
874 | static int smu_open(struct inode *inode, struct file *file) | |
875 | { | |
876 | struct smu_private *pp; | |
877 | unsigned long flags; | |
878 | ||
879 | pp = kmalloc(sizeof(struct smu_private), GFP_KERNEL); | |
880 | if (pp == 0) | |
881 | return -ENOMEM; | |
882 | memset(pp, 0, sizeof(struct smu_private)); | |
883 | spin_lock_init(&pp->lock); | |
884 | pp->mode = smu_file_commands; | |
885 | init_waitqueue_head(&pp->wait); | |
886 | ||
887 | spin_lock_irqsave(&smu_clist_lock, flags); | |
888 | list_add(&pp->list, &smu_clist); | |
889 | spin_unlock_irqrestore(&smu_clist_lock, flags); | |
890 | file->private_data = pp; | |
891 | ||
892 | return 0; | |
893 | } | |
894 | ||
895 | ||
896 | static void smu_user_cmd_done(struct smu_cmd *cmd, void *misc) | |
897 | { | |
898 | struct smu_private *pp = misc; | |
899 | ||
900 | wake_up_all(&pp->wait); | |
901 | } | |
902 | ||
903 | ||
904 | static ssize_t smu_write(struct file *file, const char __user *buf, | |
905 | size_t count, loff_t *ppos) | |
906 | { | |
907 | struct smu_private *pp = file->private_data; | |
908 | unsigned long flags; | |
909 | struct smu_user_cmd_hdr hdr; | |
910 | int rc = 0; | |
911 | ||
912 | if (pp->busy) | |
913 | return -EBUSY; | |
914 | else if (copy_from_user(&hdr, buf, sizeof(hdr))) | |
915 | return -EFAULT; | |
916 | else if (hdr.cmdtype == SMU_CMDTYPE_WANTS_EVENTS) { | |
917 | pp->mode = smu_file_events; | |
918 | return 0; | |
919 | } else if (hdr.cmdtype != SMU_CMDTYPE_SMU) | |
920 | return -EINVAL; | |
921 | else if (pp->mode != smu_file_commands) | |
922 | return -EBADFD; | |
923 | else if (hdr.data_len > SMU_MAX_DATA) | |
924 | return -EINVAL; | |
925 | ||
926 | spin_lock_irqsave(&pp->lock, flags); | |
927 | if (pp->busy) { | |
928 | spin_unlock_irqrestore(&pp->lock, flags); | |
929 | return -EBUSY; | |
930 | } | |
931 | pp->busy = 1; | |
932 | pp->cmd.status = 1; | |
933 | spin_unlock_irqrestore(&pp->lock, flags); | |
934 | ||
935 | if (copy_from_user(pp->buffer, buf + sizeof(hdr), hdr.data_len)) { | |
936 | pp->busy = 0; | |
937 | return -EFAULT; | |
938 | } | |
939 | ||
940 | pp->cmd.cmd = hdr.cmd; | |
941 | pp->cmd.data_len = hdr.data_len; | |
942 | pp->cmd.reply_len = SMU_MAX_DATA; | |
943 | pp->cmd.data_buf = pp->buffer; | |
944 | pp->cmd.reply_buf = pp->buffer; | |
945 | pp->cmd.done = smu_user_cmd_done; | |
946 | pp->cmd.misc = pp; | |
947 | rc = smu_queue_cmd(&pp->cmd); | |
948 | if (rc < 0) | |
949 | return rc; | |
950 | return count; | |
951 | } | |
952 | ||
953 | ||
954 | static ssize_t smu_read_command(struct file *file, struct smu_private *pp, | |
955 | char __user *buf, size_t count) | |
956 | { | |
957 | DECLARE_WAITQUEUE(wait, current); | |
958 | struct smu_user_reply_hdr hdr; | |
959 | unsigned long flags; | |
960 | int size, rc = 0; | |
961 | ||
962 | if (!pp->busy) | |
963 | return 0; | |
964 | if (count < sizeof(struct smu_user_reply_hdr)) | |
965 | return -EOVERFLOW; | |
966 | spin_lock_irqsave(&pp->lock, flags); | |
967 | if (pp->cmd.status == 1) { | |
968 | if (file->f_flags & O_NONBLOCK) | |
969 | return -EAGAIN; | |
970 | add_wait_queue(&pp->wait, &wait); | |
971 | for (;;) { | |
972 | set_current_state(TASK_INTERRUPTIBLE); | |
973 | rc = 0; | |
974 | if (pp->cmd.status != 1) | |
975 | break; | |
976 | rc = -ERESTARTSYS; | |
977 | if (signal_pending(current)) | |
978 | break; | |
979 | spin_unlock_irqrestore(&pp->lock, flags); | |
980 | schedule(); | |
981 | spin_lock_irqsave(&pp->lock, flags); | |
982 | } | |
983 | set_current_state(TASK_RUNNING); | |
984 | remove_wait_queue(&pp->wait, &wait); | |
985 | } | |
986 | spin_unlock_irqrestore(&pp->lock, flags); | |
987 | if (rc) | |
988 | return rc; | |
989 | if (pp->cmd.status != 0) | |
990 | pp->cmd.reply_len = 0; | |
991 | size = sizeof(hdr) + pp->cmd.reply_len; | |
992 | if (count < size) | |
993 | size = count; | |
994 | rc = size; | |
995 | hdr.status = pp->cmd.status; | |
996 | hdr.reply_len = pp->cmd.reply_len; | |
997 | if (copy_to_user(buf, &hdr, sizeof(hdr))) | |
998 | return -EFAULT; | |
999 | size -= sizeof(hdr); | |
1000 | if (size && copy_to_user(buf + sizeof(hdr), pp->buffer, size)) | |
1001 | return -EFAULT; | |
1002 | pp->busy = 0; | |
1003 | ||
1004 | return rc; | |
1005 | } | |
1006 | ||
1007 | ||
1008 | static ssize_t smu_read_events(struct file *file, struct smu_private *pp, | |
1009 | char __user *buf, size_t count) | |
1010 | { | |
1011 | /* Not implemented */ | |
1012 | msleep_interruptible(1000); | |
1013 | return 0; | |
1014 | } | |
1015 | ||
1016 | ||
1017 | static ssize_t smu_read(struct file *file, char __user *buf, | |
1018 | size_t count, loff_t *ppos) | |
1019 | { | |
1020 | struct smu_private *pp = file->private_data; | |
1021 | ||
1022 | if (pp->mode == smu_file_commands) | |
1023 | return smu_read_command(file, pp, buf, count); | |
1024 | if (pp->mode == smu_file_events) | |
1025 | return smu_read_events(file, pp, buf, count); | |
1026 | ||
1027 | return -EBADFD; | |
1028 | } | |
1029 | ||
1030 | static unsigned int smu_fpoll(struct file *file, poll_table *wait) | |
1031 | { | |
1032 | struct smu_private *pp = file->private_data; | |
1033 | unsigned int mask = 0; | |
1034 | unsigned long flags; | |
1035 | ||
1036 | if (pp == 0) | |
1037 | return 0; | |
1038 | ||
1039 | if (pp->mode == smu_file_commands) { | |
1040 | poll_wait(file, &pp->wait, wait); | |
1041 | ||
1042 | spin_lock_irqsave(&pp->lock, flags); | |
1043 | if (pp->busy && pp->cmd.status != 1) | |
1044 | mask |= POLLIN; | |
1045 | spin_unlock_irqrestore(&pp->lock, flags); | |
1046 | } if (pp->mode == smu_file_events) { | |
1047 | /* Not yet implemented */ | |
1048 | } | |
1049 | return mask; | |
1050 | } | |
1051 | ||
1052 | static int smu_release(struct inode *inode, struct file *file) | |
1053 | { | |
1054 | struct smu_private *pp = file->private_data; | |
1055 | unsigned long flags; | |
1056 | unsigned int busy; | |
1057 | ||
1058 | if (pp == 0) | |
1059 | return 0; | |
1060 | ||
1061 | file->private_data = NULL; | |
1062 | ||
1063 | /* Mark file as closing to avoid races with new request */ | |
1064 | spin_lock_irqsave(&pp->lock, flags); | |
1065 | pp->mode = smu_file_closing; | |
1066 | busy = pp->busy; | |
1067 | ||
1068 | /* Wait for any pending request to complete */ | |
1069 | if (busy && pp->cmd.status == 1) { | |
1070 | DECLARE_WAITQUEUE(wait, current); | |
1071 | ||
1072 | add_wait_queue(&pp->wait, &wait); | |
1073 | for (;;) { | |
1074 | set_current_state(TASK_UNINTERRUPTIBLE); | |
1075 | if (pp->cmd.status != 1) | |
1076 | break; | |
1077 | spin_lock_irqsave(&pp->lock, flags); | |
1078 | schedule(); | |
1079 | spin_unlock_irqrestore(&pp->lock, flags); | |
1080 | } | |
1081 | set_current_state(TASK_RUNNING); | |
1082 | remove_wait_queue(&pp->wait, &wait); | |
1083 | } | |
1084 | spin_unlock_irqrestore(&pp->lock, flags); | |
1085 | ||
1086 | spin_lock_irqsave(&smu_clist_lock, flags); | |
1087 | list_del(&pp->list); | |
1088 | spin_unlock_irqrestore(&smu_clist_lock, flags); | |
1089 | kfree(pp); | |
1090 | ||
1091 | return 0; | |
1092 | } | |
1093 | ||
1094 | ||
6b67f62c | 1095 | static struct file_operations smu_device_fops = { |
0365ba7f BH |
1096 | .llseek = no_llseek, |
1097 | .read = smu_read, | |
1098 | .write = smu_write, | |
1099 | .poll = smu_fpoll, | |
1100 | .open = smu_open, | |
1101 | .release = smu_release, | |
1102 | }; | |
1103 | ||
6b67f62c | 1104 | static struct miscdevice pmu_device = { |
0365ba7f BH |
1105 | MISC_DYNAMIC_MINOR, "smu", &smu_device_fops |
1106 | }; | |
1107 | ||
1108 | static int smu_device_init(void) | |
1109 | { | |
1110 | if (!smu) | |
1111 | return -ENODEV; | |
1112 | if (misc_register(&pmu_device) < 0) | |
1113 | printk(KERN_ERR "via-pmu: cannot register misc device.\n"); | |
1114 | return 0; | |
1115 | } | |
1116 | device_initcall(smu_device_init); |