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CommitLineData
1da177e4
LT
1/*
2 * PowerMac G5 SMU driver
3 *
4 * Copyright 2004 J. Mayer <l_indien@magic.fr>
5 * Copyright 2005 Benjamin Herrenschmidt, IBM Corp.
6 *
7 * Released under the term of the GNU GPL v2.
8 */
9
10/*
1da177e4 11 * TODO:
0365ba7f
BH
12 * - maybe add timeout to commands ?
13 * - blocking version of time functions
14 * - polling version of i2c commands (including timer that works with
f18816ba 15 * interrupts off)
0365ba7f
BH
16 * - maybe avoid some data copies with i2c by directly using the smu cmd
17 * buffer and a lower level internal interface
18 * - understand SMU -> CPU events and implement reception of them via
19 * the userland interface
1da177e4
LT
20 */
21
1da177e4
LT
22#include <linux/types.h>
23#include <linux/kernel.h>
24#include <linux/device.h>
25#include <linux/dmapool.h>
26#include <linux/bootmem.h>
27#include <linux/vmalloc.h>
28#include <linux/highmem.h>
29#include <linux/jiffies.h>
30#include <linux/interrupt.h>
31#include <linux/rtc.h>
0365ba7f
BH
32#include <linux/completion.h>
33#include <linux/miscdevice.h>
34#include <linux/delay.h>
0365ba7f 35#include <linux/poll.h>
14cc3e2b 36#include <linux/mutex.h>
ad9e05ae 37#include <linux/of_device.h>
5af50730 38#include <linux/of_irq.h>
ad9e05ae 39#include <linux/of_platform.h>
5a0e3ad6 40#include <linux/slab.h>
91b6fad5 41#include <linux/memblock.h>
174cd4b1 42#include <linux/sched/signal.h>
1da177e4
LT
43
44#include <asm/byteorder.h>
45#include <asm/io.h>
46#include <asm/prom.h>
47#include <asm/machdep.h>
48#include <asm/pmac_feature.h>
49#include <asm/smu.h>
50#include <asm/sections.h>
7c0f6ba6 51#include <linux/uaccess.h>
0365ba7f 52
183d0202 53#define VERSION "0.7"
0365ba7f 54#define AUTHOR "(c) 2005 Benjamin Herrenschmidt, IBM Corp."
1da177e4 55
0365ba7f 56#undef DEBUG_SMU
1da177e4
LT
57
58#ifdef DEBUG_SMU
1beb6a7d 59#define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0)
1da177e4
LT
60#else
61#define DPRINTK(fmt, args...) do { } while (0)
62#endif
63
64/*
65 * This is the command buffer passed to the SMU hardware
66 */
0365ba7f
BH
67#define SMU_MAX_DATA 254
68
1da177e4
LT
69struct smu_cmd_buf {
70 u8 cmd;
71 u8 length;
0365ba7f 72 u8 data[SMU_MAX_DATA];
1da177e4
LT
73};
74
75struct smu_device {
76 spinlock_t lock;
77 struct device_node *of_node;
2dc11581 78 struct platform_device *of_dev;
0365ba7f 79 int doorbell; /* doorbell gpio */
1da177e4 80 u32 __iomem *db_buf; /* doorbell buffer */
f620753b
BH
81 struct device_node *db_node;
82 unsigned int db_irq;
0365ba7f 83 int msg;
f620753b
BH
84 struct device_node *msg_node;
85 unsigned int msg_irq;
1da177e4
LT
86 struct smu_cmd_buf *cmd_buf; /* command buffer virtual */
87 u32 cmd_buf_abs; /* command buffer absolute */
0365ba7f
BH
88 struct list_head cmd_list;
89 struct smu_cmd *cmd_cur; /* pending command */
592a607b 90 int broken_nap;
0365ba7f
BH
91 struct list_head cmd_i2c_list;
92 struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */
93 struct timer_list i2c_timer;
1da177e4
LT
94};
95
96/*
97 * I don't think there will ever be more than one SMU, so
98 * for now, just hard code that
99 */
d851b6e0 100static DEFINE_MUTEX(smu_mutex);
1da177e4 101static struct smu_device *smu;
14cc3e2b 102static DEFINE_MUTEX(smu_part_access);
f620753b 103static int smu_irq_inited;
91b6fad5 104static unsigned long smu_cmdbuf_abs;
0365ba7f 105
730745a5
BH
106static void smu_i2c_retry(unsigned long data);
107
1da177e4 108/*
0365ba7f 109 * SMU driver low level stuff
1da177e4 110 */
1da177e4 111
0365ba7f 112static void smu_start_cmd(void)
1da177e4 113{
0365ba7f
BH
114 unsigned long faddr, fend;
115 struct smu_cmd *cmd;
1da177e4 116
0365ba7f
BH
117 if (list_empty(&smu->cmd_list))
118 return;
119
120 /* Fetch first command in queue */
121 cmd = list_entry(smu->cmd_list.next, struct smu_cmd, link);
122 smu->cmd_cur = cmd;
123 list_del(&cmd->link);
124
125 DPRINTK("SMU: starting cmd %x, %d bytes data\n", cmd->cmd,
126 cmd->data_len);
ebd004e4 127 DPRINTK("SMU: data buffer: %8ph\n", cmd->data_buf);
0365ba7f
BH
128
129 /* Fill the SMU command buffer */
130 smu->cmd_buf->cmd = cmd->cmd;
131 smu->cmd_buf->length = cmd->data_len;
132 memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len);
133
134 /* Flush command and data to RAM */
135 faddr = (unsigned long)smu->cmd_buf;
136 fend = faddr + smu->cmd_buf->length + 2;
137 flush_inval_dcache_range(faddr, fend);
138
592a607b
BH
139
140 /* We also disable NAP mode for the duration of the command
141 * on U3 based machines.
142 * This is slightly racy as it can be written back to 1 by a sysctl
143 * but that never happens in practice. There seem to be an issue with
144 * U3 based machines such as the iMac G5 where napping for the
145 * whole duration of the command prevents the SMU from fetching it
146 * from memory. This might be related to the strange i2c based
147 * mechanism the SMU uses to access memory.
148 */
149 if (smu->broken_nap)
150 powersave_nap = 0;
151
0365ba7f 152 /* This isn't exactly a DMA mapping here, I suspect
1da177e4
LT
153 * the SMU is actually communicating with us via i2c to the
154 * northbridge or the CPU to access RAM.
155 */
0365ba7f 156 writel(smu->cmd_buf_abs, smu->db_buf);
1da177e4
LT
157
158 /* Ring the SMU doorbell */
0365ba7f 159 pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, smu->doorbell, 4);
1da177e4
LT
160}
161
0365ba7f 162
7d12e780 163static irqreturn_t smu_db_intr(int irq, void *arg)
1da177e4 164{
0365ba7f
BH
165 unsigned long flags;
166 struct smu_cmd *cmd;
167 void (*done)(struct smu_cmd *cmd, void *misc) = NULL;
168 void *misc = NULL;
169 u8 gpio;
170 int rc = 0;
1da177e4 171
0365ba7f
BH
172 /* SMU completed the command, well, we hope, let's make sure
173 * of it
174 */
175 spin_lock_irqsave(&smu->lock, flags);
1da177e4 176
0365ba7f 177 gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
a44fe13e
BH
178 if ((gpio & 7) != 7) {
179 spin_unlock_irqrestore(&smu->lock, flags);
0365ba7f 180 return IRQ_HANDLED;
a44fe13e 181 }
0365ba7f
BH
182
183 cmd = smu->cmd_cur;
184 smu->cmd_cur = NULL;
185 if (cmd == NULL)
186 goto bail;
187
188 if (rc == 0) {
189 unsigned long faddr;
190 int reply_len;
191 u8 ack;
192
193 /* CPU might have brought back the cache line, so we need
194 * to flush again before peeking at the SMU response. We
195 * flush the entire buffer for now as we haven't read the
efad798b 196 * reply length (it's only 2 cache lines anyway)
0365ba7f
BH
197 */
198 faddr = (unsigned long)smu->cmd_buf;
199 flush_inval_dcache_range(faddr, faddr + 256);
200
201 /* Now check ack */
202 ack = (~cmd->cmd) & 0xff;
203 if (ack != smu->cmd_buf->cmd) {
204 DPRINTK("SMU: incorrect ack, want %x got %x\n",
205 ack, smu->cmd_buf->cmd);
206 rc = -EIO;
207 }
208 reply_len = rc == 0 ? smu->cmd_buf->length : 0;
209 DPRINTK("SMU: reply len: %d\n", reply_len);
210 if (reply_len > cmd->reply_len) {
211 printk(KERN_WARNING "SMU: reply buffer too small,"
212 "got %d bytes for a %d bytes buffer\n",
213 reply_len, cmd->reply_len);
214 reply_len = cmd->reply_len;
215 }
216 cmd->reply_len = reply_len;
217 if (cmd->reply_buf && reply_len)
218 memcpy(cmd->reply_buf, smu->cmd_buf->data, reply_len);
219 }
220
221 /* Now complete the command. Write status last in order as we lost
222 * ownership of the command structure as soon as it's no longer -1
223 */
224 done = cmd->done;
225 misc = cmd->misc;
226 mb();
227 cmd->status = rc;
592a607b
BH
228
229 /* Re-enable NAP mode */
230 if (smu->broken_nap)
231 powersave_nap = 1;
0365ba7f
BH
232 bail:
233 /* Start next command if any */
234 smu_start_cmd();
235 spin_unlock_irqrestore(&smu->lock, flags);
236
237 /* Call command completion handler if any */
238 if (done)
239 done(cmd, misc);
240
241 /* It's an edge interrupt, nothing to do */
242 return IRQ_HANDLED;
1da177e4
LT
243}
244
0365ba7f 245
7d12e780 246static irqreturn_t smu_msg_intr(int irq, void *arg)
1da177e4 247{
0365ba7f
BH
248 /* I don't quite know what to do with this one, we seem to never
249 * receive it, so I suspect we have to arm it someway in the SMU
250 * to start getting events that way.
251 */
252
253 printk(KERN_INFO "SMU: message interrupt !\n");
1da177e4 254
0365ba7f
BH
255 /* It's an edge interrupt, nothing to do */
256 return IRQ_HANDLED;
257}
1da177e4 258
1da177e4 259
0365ba7f
BH
260/*
261 * Queued command management.
262 *
263 */
1da177e4 264
0365ba7f
BH
265int smu_queue_cmd(struct smu_cmd *cmd)
266{
267 unsigned long flags;
1da177e4 268
0365ba7f
BH
269 if (smu == NULL)
270 return -ENODEV;
271 if (cmd->data_len > SMU_MAX_DATA ||
272 cmd->reply_len > SMU_MAX_DATA)
273 return -EINVAL;
274
275 cmd->status = 1;
276 spin_lock_irqsave(&smu->lock, flags);
277 list_add_tail(&cmd->link, &smu->cmd_list);
278 if (smu->cmd_cur == NULL)
279 smu_start_cmd();
280 spin_unlock_irqrestore(&smu->lock, flags);
281
f620753b 282 /* Workaround for early calls when irq isn't available */
ef24ba70 283 if (!smu_irq_inited || !smu->db_irq)
f620753b
BH
284 smu_spinwait_cmd(cmd);
285
0365ba7f 286 return 0;
1da177e4 287}
0365ba7f 288EXPORT_SYMBOL(smu_queue_cmd);
1da177e4 289
0365ba7f
BH
290
291int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command,
292 unsigned int data_len,
293 void (*done)(struct smu_cmd *cmd, void *misc),
294 void *misc, ...)
1da177e4 295{
0365ba7f
BH
296 struct smu_cmd *cmd = &scmd->cmd;
297 va_list list;
298 int i;
299
300 if (data_len > sizeof(scmd->buffer))
301 return -EINVAL;
302
303 memset(scmd, 0, sizeof(*scmd));
304 cmd->cmd = command;
305 cmd->data_len = data_len;
306 cmd->data_buf = scmd->buffer;
307 cmd->reply_len = sizeof(scmd->buffer);
308 cmd->reply_buf = scmd->buffer;
309 cmd->done = done;
310 cmd->misc = misc;
311
312 va_start(list, misc);
313 for (i = 0; i < data_len; ++i)
314 scmd->buffer[i] = (u8)va_arg(list, int);
315 va_end(list);
316
317 return smu_queue_cmd(cmd);
1da177e4 318}
0365ba7f 319EXPORT_SYMBOL(smu_queue_simple);
1da177e4 320
0365ba7f
BH
321
322void smu_poll(void)
1da177e4 323{
0365ba7f
BH
324 u8 gpio;
325
326 if (smu == NULL)
327 return;
328
329 gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
330 if ((gpio & 7) == 7)
7d12e780 331 smu_db_intr(smu->db_irq, smu);
1da177e4 332}
0365ba7f
BH
333EXPORT_SYMBOL(smu_poll);
334
1da177e4 335
0365ba7f 336void smu_done_complete(struct smu_cmd *cmd, void *misc)
1da177e4 337{
0365ba7f
BH
338 struct completion *comp = misc;
339
340 complete(comp);
1da177e4 341}
0365ba7f
BH
342EXPORT_SYMBOL(smu_done_complete);
343
1da177e4 344
0365ba7f 345void smu_spinwait_cmd(struct smu_cmd *cmd)
1da177e4 346{
0365ba7f
BH
347 while(cmd->status == 1)
348 smu_poll();
349}
350EXPORT_SYMBOL(smu_spinwait_cmd);
351
352
353/* RTC low level commands */
354static inline int bcd2hex (int n)
355{
356 return (((n & 0xf0) >> 4) * 10) + (n & 0xf);
1da177e4
LT
357}
358
0365ba7f
BH
359
360static inline int hex2bcd (int n)
1da177e4 361{
0365ba7f 362 return ((n / 10) << 4) + (n % 10);
1da177e4 363}
0365ba7f 364
1da177e4
LT
365
366static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf,
367 struct rtc_time *time)
368{
369 cmd_buf->cmd = 0x8e;
370 cmd_buf->length = 8;
371 cmd_buf->data[0] = 0x80;
372 cmd_buf->data[1] = hex2bcd(time->tm_sec);
373 cmd_buf->data[2] = hex2bcd(time->tm_min);
374 cmd_buf->data[3] = hex2bcd(time->tm_hour);
375 cmd_buf->data[4] = time->tm_wday;
376 cmd_buf->data[5] = hex2bcd(time->tm_mday);
377 cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1;
378 cmd_buf->data[7] = hex2bcd(time->tm_year - 100);
379}
380
1da177e4 381
0365ba7f 382int smu_get_rtc_time(struct rtc_time *time, int spinwait)
1da177e4 383{
0365ba7f 384 struct smu_simple_cmd cmd;
1da177e4
LT
385 int rc;
386
387 if (smu == NULL)
388 return -ENODEV;
389
390 memset(time, 0, sizeof(struct rtc_time));
0365ba7f
BH
391 rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 1, NULL, NULL,
392 SMU_CMD_RTC_GET_DATETIME);
393 if (rc)
394 return rc;
395 smu_spinwait_simple(&cmd);
1da177e4 396
0365ba7f
BH
397 time->tm_sec = bcd2hex(cmd.buffer[0]);
398 time->tm_min = bcd2hex(cmd.buffer[1]);
399 time->tm_hour = bcd2hex(cmd.buffer[2]);
400 time->tm_wday = bcd2hex(cmd.buffer[3]);
401 time->tm_mday = bcd2hex(cmd.buffer[4]);
402 time->tm_mon = bcd2hex(cmd.buffer[5]) - 1;
403 time->tm_year = bcd2hex(cmd.buffer[6]) + 100;
404
405 return 0;
1da177e4
LT
406}
407
0365ba7f
BH
408
409int smu_set_rtc_time(struct rtc_time *time, int spinwait)
1da177e4 410{
0365ba7f 411 struct smu_simple_cmd cmd;
1da177e4
LT
412 int rc;
413
414 if (smu == NULL)
415 return -ENODEV;
416
0365ba7f
BH
417 rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 8, NULL, NULL,
418 SMU_CMD_RTC_SET_DATETIME,
419 hex2bcd(time->tm_sec),
420 hex2bcd(time->tm_min),
421 hex2bcd(time->tm_hour),
422 time->tm_wday,
423 hex2bcd(time->tm_mday),
424 hex2bcd(time->tm_mon) + 1,
425 hex2bcd(time->tm_year - 100));
426 if (rc)
427 return rc;
428 smu_spinwait_simple(&cmd);
1da177e4 429
0365ba7f 430 return 0;
1da177e4
LT
431}
432
0365ba7f 433
1da177e4
LT
434void smu_shutdown(void)
435{
0365ba7f 436 struct smu_simple_cmd cmd;
1da177e4
LT
437
438 if (smu == NULL)
439 return;
440
0365ba7f
BH
441 if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 9, NULL, NULL,
442 'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0))
443 return;
444 smu_spinwait_simple(&cmd);
1da177e4
LT
445 for (;;)
446 ;
1da177e4
LT
447}
448
0365ba7f 449
1da177e4
LT
450void smu_restart(void)
451{
0365ba7f 452 struct smu_simple_cmd cmd;
1da177e4
LT
453
454 if (smu == NULL)
455 return;
456
0365ba7f
BH
457 if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, NULL, NULL,
458 'R', 'E', 'S', 'T', 'A', 'R', 'T', 0))
459 return;
460 smu_spinwait_simple(&cmd);
1da177e4
LT
461 for (;;)
462 ;
1da177e4
LT
463}
464
0365ba7f 465
1da177e4
LT
466int smu_present(void)
467{
468 return smu != NULL;
469}
0365ba7f 470EXPORT_SYMBOL(smu_present);
1da177e4
LT
471
472
183d0202 473int __init smu_init (void)
1da177e4
LT
474{
475 struct device_node *np;
018a3d1d 476 const u32 *data;
73f38fe1 477 int ret = 0;
1da177e4
LT
478
479 np = of_find_node_by_type(NULL, "smu");
480 if (np == NULL)
481 return -ENODEV;
482
592a607b 483 printk(KERN_INFO "SMU: Driver %s %s\n", VERSION, AUTHOR);
0365ba7f 484
91b6fad5
BH
485 /*
486 * SMU based G5s need some memory below 2Gb. Thankfully this is
487 * called at a time where memblock is still available.
488 */
489 smu_cmdbuf_abs = memblock_alloc_base(4096, 4096, 0x80000000UL);
1da177e4 490 if (smu_cmdbuf_abs == 0) {
91b6fad5 491 printk(KERN_ERR "SMU: Command buffer allocation failed !\n");
73f38fe1
JL
492 ret = -EINVAL;
493 goto fail_np;
1da177e4
LT
494 }
495
496 smu = alloc_bootmem(sizeof(struct smu_device));
1da177e4
LT
497
498 spin_lock_init(&smu->lock);
0365ba7f
BH
499 INIT_LIST_HEAD(&smu->cmd_list);
500 INIT_LIST_HEAD(&smu->cmd_i2c_list);
1da177e4 501 smu->of_node = np;
ef24ba70
ME
502 smu->db_irq = 0;
503 smu->msg_irq = 0;
0365ba7f 504
1da177e4
LT
505 /* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a
506 * 32 bits value safely
507 */
508 smu->cmd_buf_abs = (u32)smu_cmdbuf_abs;
48817c58 509 smu->cmd_buf = __va(smu_cmdbuf_abs);
1da177e4 510
f620753b
BH
511 smu->db_node = of_find_node_by_name(NULL, "smu-doorbell");
512 if (smu->db_node == NULL) {
1da177e4 513 printk(KERN_ERR "SMU: Can't find doorbell GPIO !\n");
73f38fe1
JL
514 ret = -ENXIO;
515 goto fail_bootmem;
1da177e4 516 }
01b2726d 517 data = of_get_property(smu->db_node, "reg", NULL);
1da177e4
LT
518 if (data == NULL) {
519 printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n");
73f38fe1
JL
520 ret = -ENXIO;
521 goto fail_db_node;
1da177e4
LT
522 }
523
524 /* Current setup has one doorbell GPIO that does both doorbell
525 * and ack. GPIOs are at 0x50, best would be to find that out
526 * in the device-tree though.
527 */
0365ba7f
BH
528 smu->doorbell = *data;
529 if (smu->doorbell < 0x50)
530 smu->doorbell += 0x50;
0365ba7f
BH
531
532 /* Now look for the smu-interrupt GPIO */
533 do {
f620753b
BH
534 smu->msg_node = of_find_node_by_name(NULL, "smu-interrupt");
535 if (smu->msg_node == NULL)
0365ba7f 536 break;
01b2726d 537 data = of_get_property(smu->msg_node, "reg", NULL);
0365ba7f 538 if (data == NULL) {
f620753b
BH
539 of_node_put(smu->msg_node);
540 smu->msg_node = NULL;
0365ba7f
BH
541 break;
542 }
543 smu->msg = *data;
544 if (smu->msg < 0x50)
545 smu->msg += 0x50;
0365ba7f 546 } while(0);
1da177e4
LT
547
548 /* Doorbell buffer is currently hard-coded, I didn't find a proper
549 * device-tree entry giving the address. Best would probably to use
550 * an offset for K2 base though, but let's do it that way for now.
551 */
552 smu->db_buf = ioremap(0x8000860c, 0x1000);
553 if (smu->db_buf == NULL) {
554 printk(KERN_ERR "SMU: Can't map doorbell buffer pointer !\n");
73f38fe1
JL
555 ret = -ENXIO;
556 goto fail_msg_node;
1da177e4
LT
557 }
558
592a607b
BH
559 /* U3 has an issue with NAP mode when issuing SMU commands */
560 smu->broken_nap = pmac_get_uninorth_variant() < 4;
561 if (smu->broken_nap)
562 printk(KERN_INFO "SMU: using NAP mode workaround\n");
563
1da177e4
LT
564 sys_ctrler = SYS_CTRLER_SMU;
565 return 0;
566
73f38fe1 567fail_msg_node:
4b7d8358 568 of_node_put(smu->msg_node);
73f38fe1
JL
569fail_db_node:
570 of_node_put(smu->db_node);
571fail_bootmem:
81df9bff 572 free_bootmem(__pa(smu), sizeof(struct smu_device));
1da177e4 573 smu = NULL;
73f38fe1
JL
574fail_np:
575 of_node_put(np);
576 return ret;
1da177e4 577}
0365ba7f
BH
578
579
580static int smu_late_init(void)
581{
582 if (!smu)
583 return 0;
584
730745a5
BH
585 init_timer(&smu->i2c_timer);
586 smu->i2c_timer.function = smu_i2c_retry;
587 smu->i2c_timer.data = (unsigned long)smu;
588
f620753b
BH
589 if (smu->db_node) {
590 smu->db_irq = irq_of_parse_and_map(smu->db_node, 0);
ef24ba70 591 if (!smu->db_irq)
f620753b
BH
592 printk(KERN_ERR "smu: failed to map irq for node %s\n",
593 smu->db_node->full_name);
594 }
595 if (smu->msg_node) {
596 smu->msg_irq = irq_of_parse_and_map(smu->msg_node, 0);
ef24ba70 597 if (!smu->msg_irq)
f620753b
BH
598 printk(KERN_ERR "smu: failed to map irq for node %s\n",
599 smu->msg_node->full_name);
600 }
601
0365ba7f
BH
602 /*
603 * Try to request the interrupts
604 */
605
ef24ba70 606 if (smu->db_irq) {
0365ba7f 607 if (request_irq(smu->db_irq, smu_db_intr,
dace1453 608 IRQF_SHARED, "SMU doorbell", smu) < 0) {
0365ba7f
BH
609 printk(KERN_WARNING "SMU: can't "
610 "request interrupt %d\n",
611 smu->db_irq);
ef24ba70 612 smu->db_irq = 0;
0365ba7f
BH
613 }
614 }
615
ef24ba70 616 if (smu->msg_irq) {
0365ba7f 617 if (request_irq(smu->msg_irq, smu_msg_intr,
dace1453 618 IRQF_SHARED, "SMU message", smu) < 0) {
0365ba7f
BH
619 printk(KERN_WARNING "SMU: can't "
620 "request interrupt %d\n",
621 smu->msg_irq);
ef24ba70 622 smu->msg_irq = 0;
0365ba7f
BH
623 }
624 }
625
f620753b 626 smu_irq_inited = 1;
0365ba7f
BH
627 return 0;
628}
730745a5
BH
629/* This has to be before arch_initcall as the low i2c stuff relies on the
630 * above having been done before we reach arch_initcalls
631 */
632core_initcall(smu_late_init);
0365ba7f
BH
633
634/*
635 * sysfs visibility
636 */
637
c4028958 638static void smu_expose_childs(struct work_struct *unused)
0365ba7f 639{
a28d3af2
BH
640 struct device_node *np;
641
642 for (np = NULL; (np = of_get_next_child(smu->of_node, np)) != NULL;)
55b61fec 643 if (of_device_is_compatible(np, "smu-sensors"))
730745a5
BH
644 of_platform_device_create(np, "smu-sensors",
645 &smu->of_dev->dev);
0365ba7f
BH
646}
647
c4028958 648static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs);
0365ba7f 649
00006124 650static int smu_platform_probe(struct platform_device* dev)
0365ba7f
BH
651{
652 if (!smu)
653 return -ENODEV;
654 smu->of_dev = dev;
655
656 /*
657 * Ok, we are matched, now expose all i2c busses. We have to defer
658 * that unfortunately or it would deadlock inside the device model
659 */
660 schedule_work(&smu_expose_childs_work);
661
662 return 0;
663}
664
46759a7c 665static const struct of_device_id smu_platform_match[] =
0365ba7f
BH
666{
667 {
668 .type = "smu",
669 },
670 {},
671};
672
00006124 673static struct platform_driver smu_of_platform_driver =
0365ba7f 674{
4018294b
GL
675 .driver = {
676 .name = "smu",
4018294b
GL
677 .of_match_table = smu_platform_match,
678 },
0365ba7f
BH
679 .probe = smu_platform_probe,
680};
681
682static int __init smu_init_sysfs(void)
683{
0365ba7f 684 /*
0365ba7f
BH
685 * For now, we don't power manage machines with an SMU chip,
686 * I'm a bit too far from figuring out how that works with those
687 * new chipsets, but that will come back and bite us
688 */
00006124 689 platform_driver_register(&smu_of_platform_driver);
0365ba7f
BH
690 return 0;
691}
692
693device_initcall(smu_init_sysfs);
694
2dc11581 695struct platform_device *smu_get_ofdev(void)
0365ba7f
BH
696{
697 if (!smu)
698 return NULL;
699 return smu->of_dev;
700}
701
702EXPORT_SYMBOL_GPL(smu_get_ofdev);
703
704/*
705 * i2c interface
706 */
707
708static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail)
709{
710 void (*done)(struct smu_i2c_cmd *cmd, void *misc) = cmd->done;
711 void *misc = cmd->misc;
712 unsigned long flags;
713
714 /* Check for read case */
715 if (!fail && cmd->read) {
716 if (cmd->pdata[0] < 1)
717 fail = 1;
718 else
719 memcpy(cmd->info.data, &cmd->pdata[1],
720 cmd->info.datalen);
721 }
722
723 DPRINTK("SMU: completing, success: %d\n", !fail);
724
725 /* Update status and mark no pending i2c command with lock
726 * held so nobody comes in while we dequeue an eventual
727 * pending next i2c command
728 */
729 spin_lock_irqsave(&smu->lock, flags);
730 smu->cmd_i2c_cur = NULL;
731 wmb();
732 cmd->status = fail ? -EIO : 0;
733
734 /* Is there another i2c command waiting ? */
735 if (!list_empty(&smu->cmd_i2c_list)) {
736 struct smu_i2c_cmd *newcmd;
737
738 /* Fetch it, new current, remove from list */
739 newcmd = list_entry(smu->cmd_i2c_list.next,
740 struct smu_i2c_cmd, link);
741 smu->cmd_i2c_cur = newcmd;
742 list_del(&cmd->link);
743
744 /* Queue with low level smu */
745 list_add_tail(&cmd->scmd.link, &smu->cmd_list);
746 if (smu->cmd_cur == NULL)
747 smu_start_cmd();
748 }
749 spin_unlock_irqrestore(&smu->lock, flags);
750
751 /* Call command completion handler if any */
752 if (done)
753 done(cmd, misc);
754
755}
756
757
758static void smu_i2c_retry(unsigned long data)
759{
730745a5 760 struct smu_i2c_cmd *cmd = smu->cmd_i2c_cur;
0365ba7f
BH
761
762 DPRINTK("SMU: i2c failure, requeuing...\n");
763
764 /* requeue command simply by resetting reply_len */
765 cmd->pdata[0] = 0xff;
730745a5 766 cmd->scmd.reply_len = sizeof(cmd->pdata);
0365ba7f
BH
767 smu_queue_cmd(&cmd->scmd);
768}
769
770
771static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc)
772{
773 struct smu_i2c_cmd *cmd = misc;
774 int fail = 0;
775
776 DPRINTK("SMU: i2c compl. stage=%d status=%x pdata[0]=%x rlen: %x\n",
777 cmd->stage, scmd->status, cmd->pdata[0], scmd->reply_len);
778
779 /* Check for possible status */
780 if (scmd->status < 0)
781 fail = 1;
782 else if (cmd->read) {
783 if (cmd->stage == 0)
784 fail = cmd->pdata[0] != 0;
785 else
786 fail = cmd->pdata[0] >= 0x80;
787 } else {
788 fail = cmd->pdata[0] != 0;
789 }
790
791 /* Handle failures by requeuing command, after 5ms interval
792 */
793 if (fail && --cmd->retries > 0) {
794 DPRINTK("SMU: i2c failure, starting timer...\n");
730745a5 795 BUG_ON(cmd != smu->cmd_i2c_cur);
f620753b
BH
796 if (!smu_irq_inited) {
797 mdelay(5);
798 smu_i2c_retry(0);
799 return;
800 }
730745a5 801 mod_timer(&smu->i2c_timer, jiffies + msecs_to_jiffies(5));
0365ba7f
BH
802 return;
803 }
804
805 /* If failure or stage 1, command is complete */
806 if (fail || cmd->stage != 0) {
807 smu_i2c_complete_command(cmd, fail);
808 return;
809 }
810
811 DPRINTK("SMU: going to stage 1\n");
812
813 /* Ok, initial command complete, now poll status */
814 scmd->reply_buf = cmd->pdata;
730745a5 815 scmd->reply_len = sizeof(cmd->pdata);
0365ba7f
BH
816 scmd->data_buf = cmd->pdata;
817 scmd->data_len = 1;
818 cmd->pdata[0] = 0;
819 cmd->stage = 1;
820 cmd->retries = 20;
821 smu_queue_cmd(scmd);
822}
823
824
825int smu_queue_i2c(struct smu_i2c_cmd *cmd)
826{
827 unsigned long flags;
828
829 if (smu == NULL)
830 return -ENODEV;
831
832 /* Fill most fields of scmd */
833 cmd->scmd.cmd = SMU_CMD_I2C_COMMAND;
834 cmd->scmd.done = smu_i2c_low_completion;
835 cmd->scmd.misc = cmd;
836 cmd->scmd.reply_buf = cmd->pdata;
730745a5 837 cmd->scmd.reply_len = sizeof(cmd->pdata);
0365ba7f
BH
838 cmd->scmd.data_buf = (u8 *)(char *)&cmd->info;
839 cmd->scmd.status = 1;
840 cmd->stage = 0;
841 cmd->pdata[0] = 0xff;
842 cmd->retries = 20;
843 cmd->status = 1;
844
845 /* Check transfer type, sanitize some "info" fields
846 * based on transfer type and do more checking
847 */
848 cmd->info.caddr = cmd->info.devaddr;
849 cmd->read = cmd->info.devaddr & 0x01;
850 switch(cmd->info.type) {
851 case SMU_I2C_TRANSFER_SIMPLE:
852 memset(&cmd->info.sublen, 0, 4);
853 break;
854 case SMU_I2C_TRANSFER_COMBINED:
855 cmd->info.devaddr &= 0xfe;
856 case SMU_I2C_TRANSFER_STDSUB:
857 if (cmd->info.sublen > 3)
858 return -EINVAL;
859 break;
860 default:
861 return -EINVAL;
862 }
863
864 /* Finish setting up command based on transfer direction
865 */
866 if (cmd->read) {
867 if (cmd->info.datalen > SMU_I2C_READ_MAX)
868 return -EINVAL;
869 memset(cmd->info.data, 0xff, cmd->info.datalen);
870 cmd->scmd.data_len = 9;
871 } else {
872 if (cmd->info.datalen > SMU_I2C_WRITE_MAX)
873 return -EINVAL;
874 cmd->scmd.data_len = 9 + cmd->info.datalen;
875 }
876
877 DPRINTK("SMU: i2c enqueuing command\n");
878 DPRINTK("SMU: %s, len=%d bus=%x addr=%x sub0=%x type=%x\n",
879 cmd->read ? "read" : "write", cmd->info.datalen,
880 cmd->info.bus, cmd->info.caddr,
881 cmd->info.subaddr[0], cmd->info.type);
882
883
884 /* Enqueue command in i2c list, and if empty, enqueue also in
885 * main command list
886 */
887 spin_lock_irqsave(&smu->lock, flags);
888 if (smu->cmd_i2c_cur == NULL) {
889 smu->cmd_i2c_cur = cmd;
890 list_add_tail(&cmd->scmd.link, &smu->cmd_list);
891 if (smu->cmd_cur == NULL)
892 smu_start_cmd();
893 } else
894 list_add_tail(&cmd->link, &smu->cmd_i2c_list);
895 spin_unlock_irqrestore(&smu->lock, flags);
896
897 return 0;
898}
899
183d0202
BH
900/*
901 * Handling of "partitions"
902 */
903
904static int smu_read_datablock(u8 *dest, unsigned int addr, unsigned int len)
905{
6e9a4738 906 DECLARE_COMPLETION_ONSTACK(comp);
183d0202
BH
907 unsigned int chunk;
908 struct smu_cmd cmd;
909 int rc;
910 u8 params[8];
911
912 /* We currently use a chunk size of 0xe. We could check the
913 * SMU firmware version and use bigger sizes though
914 */
915 chunk = 0xe;
916
917 while (len) {
918 unsigned int clen = min(len, chunk);
919
920 cmd.cmd = SMU_CMD_MISC_ee_COMMAND;
921 cmd.data_len = 7;
922 cmd.data_buf = params;
923 cmd.reply_len = chunk;
924 cmd.reply_buf = dest;
925 cmd.done = smu_done_complete;
926 cmd.misc = &comp;
927 params[0] = SMU_CMD_MISC_ee_GET_DATABLOCK_REC;
928 params[1] = 0x4;
929 *((u32 *)&params[2]) = addr;
930 params[6] = clen;
931
932 rc = smu_queue_cmd(&cmd);
933 if (rc)
934 return rc;
935 wait_for_completion(&comp);
936 if (cmd.status != 0)
937 return rc;
938 if (cmd.reply_len != clen) {
939 printk(KERN_DEBUG "SMU: short read in "
940 "smu_read_datablock, got: %d, want: %d\n",
941 cmd.reply_len, clen);
942 return -EIO;
943 }
944 len -= clen;
945 addr += clen;
946 dest += clen;
947 }
948 return 0;
949}
950
951static struct smu_sdbp_header *smu_create_sdb_partition(int id)
952{
6e9a4738 953 DECLARE_COMPLETION_ONSTACK(comp);
183d0202
BH
954 struct smu_simple_cmd cmd;
955 unsigned int addr, len, tlen;
956 struct smu_sdbp_header *hdr;
957 struct property *prop;
958
959 /* First query the partition info */
1beb6a7d 960 DPRINTK("SMU: Query partition infos ... (irq=%d)\n", smu->db_irq);
183d0202
BH
961 smu_queue_simple(&cmd, SMU_CMD_PARTITION_COMMAND, 2,
962 smu_done_complete, &comp,
963 SMU_CMD_PARTITION_LATEST, id);
964 wait_for_completion(&comp);
1beb6a7d
BH
965 DPRINTK("SMU: done, status: %d, reply_len: %d\n",
966 cmd.cmd.status, cmd.cmd.reply_len);
183d0202
BH
967
968 /* Partition doesn't exist (or other error) */
969 if (cmd.cmd.status != 0 || cmd.cmd.reply_len != 6)
970 return NULL;
971
972 /* Fetch address and length from reply */
973 addr = *((u16 *)cmd.buffer);
974 len = cmd.buffer[3] << 2;
975 /* Calucluate total length to allocate, including the 17 bytes
976 * for "sdb-partition-XX" that we append at the end of the buffer
977 */
978 tlen = sizeof(struct property) + len + 18;
979
cd861280 980 prop = kzalloc(tlen, GFP_KERNEL);
183d0202
BH
981 if (prop == NULL)
982 return NULL;
983 hdr = (struct smu_sdbp_header *)(prop + 1);
984 prop->name = ((char *)prop) + tlen - 18;
985 sprintf(prop->name, "sdb-partition-%02x", id);
986 prop->length = len;
1a38147e 987 prop->value = hdr;
183d0202
BH
988 prop->next = NULL;
989
990 /* Read the datablock */
991 if (smu_read_datablock((u8 *)hdr, addr, len)) {
992 printk(KERN_DEBUG "SMU: datablock read failed while reading "
993 "partition %02x !\n", id);
994 goto failure;
995 }
996
997 /* Got it, check a few things and create the property */
998 if (hdr->id != id) {
999 printk(KERN_DEBUG "SMU: Reading partition %02x and got "
1000 "%02x !\n", id, hdr->id);
1001 goto failure;
1002 }
79d1c712 1003 if (of_add_property(smu->of_node, prop)) {
183d0202
BH
1004 printk(KERN_DEBUG "SMU: Failed creating sdb-partition-%02x "
1005 "property !\n", id);
1006 goto failure;
1007 }
1008
1009 return hdr;
1010 failure:
1011 kfree(prop);
1012 return NULL;
1013}
1014
1015/* Note: Only allowed to return error code in pointers (using ERR_PTR)
1016 * when interruptible is 1
1017 */
018a3d1d
JK
1018const struct smu_sdbp_header *__smu_get_sdb_partition(int id,
1019 unsigned int *size, int interruptible)
4350147a
BH
1020{
1021 char pname[32];
018a3d1d 1022 const struct smu_sdbp_header *part;
4350147a
BH
1023
1024 if (!smu)
1025 return NULL;
1026
1027 sprintf(pname, "sdb-partition-%02x", id);
183d0202 1028
1beb6a7d
BH
1029 DPRINTK("smu_get_sdb_partition(%02x)\n", id);
1030
183d0202
BH
1031 if (interruptible) {
1032 int rc;
14cc3e2b 1033 rc = mutex_lock_interruptible(&smu_part_access);
183d0202
BH
1034 if (rc)
1035 return ERR_PTR(rc);
1036 } else
14cc3e2b 1037 mutex_lock(&smu_part_access);
183d0202 1038
01b2726d 1039 part = of_get_property(smu->of_node, pname, size);
183d0202 1040 if (part == NULL) {
1beb6a7d 1041 DPRINTK("trying to extract from SMU ...\n");
183d0202
BH
1042 part = smu_create_sdb_partition(id);
1043 if (part != NULL && size)
1044 *size = part->len << 2;
1045 }
14cc3e2b 1046 mutex_unlock(&smu_part_access);
183d0202
BH
1047 return part;
1048}
1049
018a3d1d 1050const struct smu_sdbp_header *smu_get_sdb_partition(int id, unsigned int *size)
183d0202
BH
1051{
1052 return __smu_get_sdb_partition(id, size, 0);
4350147a
BH
1053}
1054EXPORT_SYMBOL(smu_get_sdb_partition);
0365ba7f
BH
1055
1056
1057/*
1058 * Userland driver interface
1059 */
1060
1061
1062static LIST_HEAD(smu_clist);
1063static DEFINE_SPINLOCK(smu_clist_lock);
1064
1065enum smu_file_mode {
1066 smu_file_commands,
1067 smu_file_events,
1068 smu_file_closing
1069};
1070
1071struct smu_private
1072{
1073 struct list_head list;
1074 enum smu_file_mode mode;
1075 int busy;
1076 struct smu_cmd cmd;
1077 spinlock_t lock;
1078 wait_queue_head_t wait;
1079 u8 buffer[SMU_MAX_DATA];
1080};
1081
1082
1083static int smu_open(struct inode *inode, struct file *file)
1084{
1085 struct smu_private *pp;
1086 unsigned long flags;
1087
dd00cc48 1088 pp = kzalloc(sizeof(struct smu_private), GFP_KERNEL);
0365ba7f
BH
1089 if (pp == 0)
1090 return -ENOMEM;
0365ba7f
BH
1091 spin_lock_init(&pp->lock);
1092 pp->mode = smu_file_commands;
1093 init_waitqueue_head(&pp->wait);
1094
d851b6e0 1095 mutex_lock(&smu_mutex);
0365ba7f
BH
1096 spin_lock_irqsave(&smu_clist_lock, flags);
1097 list_add(&pp->list, &smu_clist);
1098 spin_unlock_irqrestore(&smu_clist_lock, flags);
1099 file->private_data = pp;
d851b6e0 1100 mutex_unlock(&smu_mutex);
0365ba7f
BH
1101
1102 return 0;
1103}
1104
1105
1106static void smu_user_cmd_done(struct smu_cmd *cmd, void *misc)
1107{
1108 struct smu_private *pp = misc;
1109
1110 wake_up_all(&pp->wait);
1111}
1112
1113
1114static ssize_t smu_write(struct file *file, const char __user *buf,
1115 size_t count, loff_t *ppos)
1116{
1117 struct smu_private *pp = file->private_data;
1118 unsigned long flags;
1119 struct smu_user_cmd_hdr hdr;
1120 int rc = 0;
1121
1122 if (pp->busy)
1123 return -EBUSY;
1124 else if (copy_from_user(&hdr, buf, sizeof(hdr)))
1125 return -EFAULT;
1126 else if (hdr.cmdtype == SMU_CMDTYPE_WANTS_EVENTS) {
1127 pp->mode = smu_file_events;
1128 return 0;
183d0202 1129 } else if (hdr.cmdtype == SMU_CMDTYPE_GET_PARTITION) {
018a3d1d 1130 const struct smu_sdbp_header *part;
183d0202
BH
1131 part = __smu_get_sdb_partition(hdr.cmd, NULL, 1);
1132 if (part == NULL)
1133 return -EINVAL;
1134 else if (IS_ERR(part))
1135 return PTR_ERR(part);
1136 return 0;
0365ba7f
BH
1137 } else if (hdr.cmdtype != SMU_CMDTYPE_SMU)
1138 return -EINVAL;
1139 else if (pp->mode != smu_file_commands)
1140 return -EBADFD;
1141 else if (hdr.data_len > SMU_MAX_DATA)
1142 return -EINVAL;
1143
1144 spin_lock_irqsave(&pp->lock, flags);
1145 if (pp->busy) {
1146 spin_unlock_irqrestore(&pp->lock, flags);
1147 return -EBUSY;
1148 }
1149 pp->busy = 1;
1150 pp->cmd.status = 1;
1151 spin_unlock_irqrestore(&pp->lock, flags);
1152
1153 if (copy_from_user(pp->buffer, buf + sizeof(hdr), hdr.data_len)) {
1154 pp->busy = 0;
1155 return -EFAULT;
1156 }
1157
1158 pp->cmd.cmd = hdr.cmd;
1159 pp->cmd.data_len = hdr.data_len;
1160 pp->cmd.reply_len = SMU_MAX_DATA;
1161 pp->cmd.data_buf = pp->buffer;
1162 pp->cmd.reply_buf = pp->buffer;
1163 pp->cmd.done = smu_user_cmd_done;
1164 pp->cmd.misc = pp;
1165 rc = smu_queue_cmd(&pp->cmd);
1166 if (rc < 0)
1167 return rc;
1168 return count;
1169}
1170
1171
1172static ssize_t smu_read_command(struct file *file, struct smu_private *pp,
1173 char __user *buf, size_t count)
1174{
1175 DECLARE_WAITQUEUE(wait, current);
1176 struct smu_user_reply_hdr hdr;
1177 unsigned long flags;
1178 int size, rc = 0;
1179
1180 if (!pp->busy)
1181 return 0;
1182 if (count < sizeof(struct smu_user_reply_hdr))
1183 return -EOVERFLOW;
1184 spin_lock_irqsave(&pp->lock, flags);
1185 if (pp->cmd.status == 1) {
86e4754a
JL
1186 if (file->f_flags & O_NONBLOCK) {
1187 spin_unlock_irqrestore(&pp->lock, flags);
0365ba7f 1188 return -EAGAIN;
86e4754a 1189 }
0365ba7f
BH
1190 add_wait_queue(&pp->wait, &wait);
1191 for (;;) {
1192 set_current_state(TASK_INTERRUPTIBLE);
1193 rc = 0;
1194 if (pp->cmd.status != 1)
1195 break;
1196 rc = -ERESTARTSYS;
1197 if (signal_pending(current))
1198 break;
1199 spin_unlock_irqrestore(&pp->lock, flags);
1200 schedule();
1201 spin_lock_irqsave(&pp->lock, flags);
1202 }
1203 set_current_state(TASK_RUNNING);
1204 remove_wait_queue(&pp->wait, &wait);
1205 }
1206 spin_unlock_irqrestore(&pp->lock, flags);
1207 if (rc)
1208 return rc;
1209 if (pp->cmd.status != 0)
1210 pp->cmd.reply_len = 0;
1211 size = sizeof(hdr) + pp->cmd.reply_len;
1212 if (count < size)
1213 size = count;
1214 rc = size;
1215 hdr.status = pp->cmd.status;
1216 hdr.reply_len = pp->cmd.reply_len;
1217 if (copy_to_user(buf, &hdr, sizeof(hdr)))
1218 return -EFAULT;
1219 size -= sizeof(hdr);
1220 if (size && copy_to_user(buf + sizeof(hdr), pp->buffer, size))
1221 return -EFAULT;
1222 pp->busy = 0;
1223
1224 return rc;
1225}
1226
1227
1228static ssize_t smu_read_events(struct file *file, struct smu_private *pp,
1229 char __user *buf, size_t count)
1230{
1231 /* Not implemented */
1232 msleep_interruptible(1000);
1233 return 0;
1234}
1235
1236
1237static ssize_t smu_read(struct file *file, char __user *buf,
1238 size_t count, loff_t *ppos)
1239{
1240 struct smu_private *pp = file->private_data;
1241
1242 if (pp->mode == smu_file_commands)
1243 return smu_read_command(file, pp, buf, count);
1244 if (pp->mode == smu_file_events)
1245 return smu_read_events(file, pp, buf, count);
1246
1247 return -EBADFD;
1248}
1249
1250static unsigned int smu_fpoll(struct file *file, poll_table *wait)
1251{
1252 struct smu_private *pp = file->private_data;
1253 unsigned int mask = 0;
1254 unsigned long flags;
1255
1256 if (pp == 0)
1257 return 0;
1258
1259 if (pp->mode == smu_file_commands) {
1260 poll_wait(file, &pp->wait, wait);
1261
1262 spin_lock_irqsave(&pp->lock, flags);
1263 if (pp->busy && pp->cmd.status != 1)
1264 mask |= POLLIN;
1265 spin_unlock_irqrestore(&pp->lock, flags);
2055fb41
RV
1266 }
1267 if (pp->mode == smu_file_events) {
0365ba7f
BH
1268 /* Not yet implemented */
1269 }
1270 return mask;
1271}
1272
1273static int smu_release(struct inode *inode, struct file *file)
1274{
1275 struct smu_private *pp = file->private_data;
1276 unsigned long flags;
1277 unsigned int busy;
1278
1279 if (pp == 0)
1280 return 0;
1281
1282 file->private_data = NULL;
1283
1284 /* Mark file as closing to avoid races with new request */
1285 spin_lock_irqsave(&pp->lock, flags);
1286 pp->mode = smu_file_closing;
1287 busy = pp->busy;
1288
1289 /* Wait for any pending request to complete */
1290 if (busy && pp->cmd.status == 1) {
1291 DECLARE_WAITQUEUE(wait, current);
1292
1293 add_wait_queue(&pp->wait, &wait);
1294 for (;;) {
1295 set_current_state(TASK_UNINTERRUPTIBLE);
1296 if (pp->cmd.status != 1)
1297 break;
0365ba7f 1298 spin_unlock_irqrestore(&pp->lock, flags);
94256dd6
AM
1299 schedule();
1300 spin_lock_irqsave(&pp->lock, flags);
0365ba7f
BH
1301 }
1302 set_current_state(TASK_RUNNING);
1303 remove_wait_queue(&pp->wait, &wait);
1304 }
1305 spin_unlock_irqrestore(&pp->lock, flags);
1306
1307 spin_lock_irqsave(&smu_clist_lock, flags);
1308 list_del(&pp->list);
1309 spin_unlock_irqrestore(&smu_clist_lock, flags);
1310 kfree(pp);
1311
1312 return 0;
1313}
1314
1315
fa027c2a 1316static const struct file_operations smu_device_fops = {
0365ba7f
BH
1317 .llseek = no_llseek,
1318 .read = smu_read,
1319 .write = smu_write,
1320 .poll = smu_fpoll,
1321 .open = smu_open,
1322 .release = smu_release,
1323};
1324
6b67f62c 1325static struct miscdevice pmu_device = {
0365ba7f
BH
1326 MISC_DYNAMIC_MINOR, "smu", &smu_device_fops
1327};
1328
1329static int smu_device_init(void)
1330{
1331 if (!smu)
1332 return -ENODEV;
1333 if (misc_register(&pmu_device) < 0)
1334 printk(KERN_ERR "via-pmu: cannot register misc device.\n");
1335 return 0;
1336}
1337device_initcall(smu_device_init);