]>
Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
d23eee88 FT |
2 | * Device driver for the Cuda and Egret system controllers found on PowerMacs |
3 | * and 68k Macs. | |
1da177e4 | 4 | * |
d23eee88 FT |
5 | * The Cuda or Egret is a 6805 microcontroller interfaced to the 6522 VIA. |
6 | * This MCU controls system power, Parameter RAM, Real Time Clock and the | |
7 | * Apple Desktop Bus (ADB) that connects to the keyboard and mouse. | |
1da177e4 LT |
8 | * |
9 | * Copyright (C) 1996 Paul Mackerras. | |
10 | */ | |
11 | #include <stdarg.h> | |
1da177e4 LT |
12 | #include <linux/types.h> |
13 | #include <linux/errno.h> | |
14 | #include <linux/kernel.h> | |
15 | #include <linux/delay.h> | |
1da177e4 LT |
16 | #include <linux/adb.h> |
17 | #include <linux/cuda.h> | |
18 | #include <linux/spinlock.h> | |
19 | #include <linux/interrupt.h> | |
20 | #ifdef CONFIG_PPC | |
21 | #include <asm/prom.h> | |
22 | #include <asm/machdep.h> | |
23 | #else | |
24 | #include <asm/macintosh.h> | |
25 | #include <asm/macints.h> | |
1da177e4 LT |
26 | #include <asm/mac_via.h> |
27 | #endif | |
28 | #include <asm/io.h> | |
1da177e4 LT |
29 | #include <linux/init.h> |
30 | ||
31 | static volatile unsigned char __iomem *via; | |
32 | static DEFINE_SPINLOCK(cuda_lock); | |
33 | ||
1da177e4 LT |
34 | /* VIA registers - spaced 0x200 bytes apart */ |
35 | #define RS 0x200 /* skip between registers */ | |
36 | #define B 0 /* B-side data */ | |
37 | #define A RS /* A-side data */ | |
38 | #define DIRB (2*RS) /* B-side direction (1=output) */ | |
39 | #define DIRA (3*RS) /* A-side direction (1=output) */ | |
40 | #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */ | |
41 | #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */ | |
42 | #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */ | |
43 | #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */ | |
44 | #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */ | |
45 | #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */ | |
46 | #define SR (10*RS) /* Shift register */ | |
47 | #define ACR (11*RS) /* Auxiliary control register */ | |
48 | #define PCR (12*RS) /* Peripheral control register */ | |
49 | #define IFR (13*RS) /* Interrupt flag register */ | |
50 | #define IER (14*RS) /* Interrupt enable register */ | |
51 | #define ANH (15*RS) /* A-side data, no handshake */ | |
52 | ||
d23eee88 FT |
53 | /* |
54 | * When the Cuda design replaced the Egret, some signal names and | |
55 | * logic sense changed. They all serve the same purposes, however. | |
56 | * | |
57 | * VIA pin | Egret pin | |
58 | * ----------------+------------------------------------------ | |
59 | * PB3 (input) | Transceiver session (active low) | |
60 | * PB4 (output) | VIA full (active high) | |
61 | * PB5 (output) | System session (active high) | |
62 | * | |
63 | * VIA pin | Cuda pin | |
64 | * ----------------+------------------------------------------ | |
65 | * PB3 (input) | Transfer request (active low) | |
66 | * PB4 (output) | Byte acknowledge (active low) | |
67 | * PB5 (output) | Transfer in progress (active low) | |
68 | */ | |
69 | ||
70 | /* Bits in Port B data register */ | |
71 | #define TREQ 0x08 /* Transfer request */ | |
72 | #define TACK 0x10 /* Transfer acknowledge */ | |
73 | #define TIP 0x20 /* Transfer in progress */ | |
1da177e4 LT |
74 | |
75 | /* Bits in ACR */ | |
76 | #define SR_CTRL 0x1c /* Shift register control bits */ | |
77 | #define SR_EXT 0x0c /* Shift on external clock */ | |
78 | #define SR_OUT 0x10 /* Shift out if 1 */ | |
79 | ||
80 | /* Bits in IFR and IER */ | |
81 | #define IER_SET 0x80 /* set bits in IER */ | |
82 | #define IER_CLR 0 /* clear bits in IER */ | |
83 | #define SR_INT 0x04 /* Shift register full/empty */ | |
84 | ||
d23eee88 FT |
85 | /* Duration of byte acknowledgement pulse (us) */ |
86 | #define EGRET_TACK_ASSERTED_DELAY 300 | |
87 | #define EGRET_TACK_NEGATED_DELAY 400 | |
88 | ||
89 | /* Interval from interrupt to start of session (us) */ | |
90 | #define EGRET_SESSION_DELAY 450 | |
91 | ||
92 | #ifdef CONFIG_PPC | |
93 | #define mcu_is_egret false | |
94 | #else | |
95 | static bool mcu_is_egret; | |
96 | #endif | |
97 | ||
fd7a65a2 FT |
98 | static inline bool TREQ_asserted(u8 portb) |
99 | { | |
100 | return !(portb & TREQ); | |
101 | } | |
102 | ||
103 | static inline void assert_TIP(void) | |
104 | { | |
d23eee88 FT |
105 | if (mcu_is_egret) { |
106 | udelay(EGRET_SESSION_DELAY); | |
107 | out_8(&via[B], in_8(&via[B]) | TIP); | |
108 | } else | |
109 | out_8(&via[B], in_8(&via[B]) & ~TIP); | |
110 | } | |
111 | ||
112 | static inline void assert_TIP_and_TACK(void) | |
113 | { | |
114 | if (mcu_is_egret) { | |
115 | udelay(EGRET_SESSION_DELAY); | |
116 | out_8(&via[B], in_8(&via[B]) | TIP | TACK); | |
117 | } else | |
118 | out_8(&via[B], in_8(&via[B]) & ~(TIP | TACK)); | |
fd7a65a2 FT |
119 | } |
120 | ||
121 | static inline void assert_TACK(void) | |
122 | { | |
d23eee88 FT |
123 | if (mcu_is_egret) { |
124 | udelay(EGRET_TACK_NEGATED_DELAY); | |
125 | out_8(&via[B], in_8(&via[B]) | TACK); | |
126 | } else | |
127 | out_8(&via[B], in_8(&via[B]) & ~TACK); | |
fd7a65a2 FT |
128 | } |
129 | ||
130 | static inline void toggle_TACK(void) | |
131 | { | |
132 | out_8(&via[B], in_8(&via[B]) ^ TACK); | |
133 | } | |
134 | ||
135 | static inline void negate_TACK(void) | |
136 | { | |
d23eee88 FT |
137 | if (mcu_is_egret) { |
138 | udelay(EGRET_TACK_ASSERTED_DELAY); | |
139 | out_8(&via[B], in_8(&via[B]) & ~TACK); | |
140 | } else | |
141 | out_8(&via[B], in_8(&via[B]) | TACK); | |
fd7a65a2 FT |
142 | } |
143 | ||
144 | static inline void negate_TIP_and_TACK(void) | |
145 | { | |
d23eee88 FT |
146 | if (mcu_is_egret) { |
147 | udelay(EGRET_TACK_ASSERTED_DELAY); | |
148 | out_8(&via[B], in_8(&via[B]) & ~(TIP | TACK)); | |
149 | } else | |
150 | out_8(&via[B], in_8(&via[B]) | TIP | TACK); | |
fd7a65a2 FT |
151 | } |
152 | ||
1da177e4 LT |
153 | static enum cuda_state { |
154 | idle, | |
155 | sent_first_byte, | |
156 | sending, | |
157 | reading, | |
158 | read_done, | |
159 | awaiting_reply | |
160 | } cuda_state; | |
161 | ||
162 | static struct adb_request *current_req; | |
163 | static struct adb_request *last_req; | |
164 | static unsigned char cuda_rbuf[16]; | |
165 | static unsigned char *reply_ptr; | |
166 | static int reading_reply; | |
167 | static int data_index; | |
0251c38c | 168 | static int cuda_irq; |
1da177e4 LT |
169 | #ifdef CONFIG_PPC |
170 | static struct device_node *vias; | |
171 | #endif | |
87275856 | 172 | static int cuda_fully_inited; |
1da177e4 LT |
173 | |
174 | #ifdef CONFIG_ADB | |
175 | static int cuda_probe(void); | |
1da177e4 LT |
176 | static int cuda_send_request(struct adb_request *req, int sync); |
177 | static int cuda_adb_autopoll(int devs); | |
178 | static int cuda_reset_adb_bus(void); | |
179 | #endif /* CONFIG_ADB */ | |
180 | ||
181 | static int cuda_init_via(void); | |
182 | static void cuda_start(void); | |
7d12e780 DH |
183 | static irqreturn_t cuda_interrupt(int irq, void *arg); |
184 | static void cuda_input(unsigned char *buf, int nb); | |
1da177e4 LT |
185 | void cuda_poll(void); |
186 | static int cuda_write(struct adb_request *req); | |
187 | ||
188 | int cuda_request(struct adb_request *req, | |
189 | void (*done)(struct adb_request *), int nbytes, ...); | |
190 | ||
191 | #ifdef CONFIG_ADB | |
192 | struct adb_driver via_cuda_driver = { | |
18814ee8 FT |
193 | .name = "CUDA", |
194 | .probe = cuda_probe, | |
195 | .send_request = cuda_send_request, | |
196 | .autopoll = cuda_adb_autopoll, | |
197 | .poll = cuda_poll, | |
198 | .reset_bus = cuda_reset_adb_bus, | |
1da177e4 LT |
199 | }; |
200 | #endif /* CONFIG_ADB */ | |
201 | ||
18814ee8 FT |
202 | #ifdef CONFIG_MAC |
203 | int __init find_via_cuda(void) | |
204 | { | |
205 | struct adb_request req; | |
206 | int err; | |
207 | ||
f74faec6 FT |
208 | if (macintosh_config->adb_type != MAC_ADB_CUDA && |
209 | macintosh_config->adb_type != MAC_ADB_EGRET) | |
18814ee8 FT |
210 | return 0; |
211 | ||
212 | via = via1; | |
213 | cuda_state = idle; | |
f74faec6 | 214 | mcu_is_egret = macintosh_config->adb_type == MAC_ADB_EGRET; |
18814ee8 FT |
215 | |
216 | err = cuda_init_via(); | |
217 | if (err) { | |
218 | printk(KERN_ERR "cuda_init_via() failed\n"); | |
219 | via = NULL; | |
220 | return 0; | |
221 | } | |
222 | ||
223 | /* enable autopoll */ | |
224 | cuda_request(&req, NULL, 3, CUDA_PACKET, CUDA_AUTOPOLL, 1); | |
225 | while (!req.complete) | |
226 | cuda_poll(); | |
227 | ||
228 | return 1; | |
229 | } | |
230 | #else | |
51d3082f | 231 | int __init find_via_cuda(void) |
1da177e4 | 232 | { |
1da177e4 | 233 | struct adb_request req; |
51d3082f | 234 | phys_addr_t taddr; |
018a3d1d | 235 | const u32 *reg; |
51d3082f | 236 | int err; |
1da177e4 LT |
237 | |
238 | if (vias != 0) | |
239 | return 1; | |
51d3082f | 240 | vias = of_find_node_by_name(NULL, "via-cuda"); |
1da177e4 LT |
241 | if (vias == 0) |
242 | return 0; | |
1da177e4 | 243 | |
01b2726d | 244 | reg = of_get_property(vias, "reg", NULL); |
51d3082f BH |
245 | if (reg == NULL) { |
246 | printk(KERN_ERR "via-cuda: No \"reg\" property !\n"); | |
247 | goto fail; | |
248 | } | |
249 | taddr = of_translate_address(vias, reg); | |
250 | if (taddr == 0) { | |
251 | printk(KERN_ERR "via-cuda: Can't translate address !\n"); | |
252 | goto fail; | |
253 | } | |
254 | via = ioremap(taddr, 0x2000); | |
255 | if (via == NULL) { | |
256 | printk(KERN_ERR "via-cuda: Can't map address !\n"); | |
257 | goto fail; | |
1da177e4 | 258 | } |
1da177e4 LT |
259 | |
260 | cuda_state = idle; | |
261 | sys_ctrler = SYS_CTRLER_CUDA; | |
262 | ||
263 | err = cuda_init_via(); | |
264 | if (err) { | |
265 | printk(KERN_ERR "cuda_init_via() failed\n"); | |
266 | via = NULL; | |
267 | return 0; | |
268 | } | |
269 | ||
270 | /* Clear and enable interrupts, but only on PPC. On 68K it's done */ | |
271 | /* for us by the main VIA driver in arch/m68k/mac/via.c */ | |
272 | ||
1da177e4 LT |
273 | out_8(&via[IFR], 0x7f); /* clear interrupts by writing 1s */ |
274 | out_8(&via[IER], IER_SET|SR_INT); /* enable interrupt from SR */ | |
1da177e4 LT |
275 | |
276 | /* enable autopoll */ | |
277 | cuda_request(&req, NULL, 3, CUDA_PACKET, CUDA_AUTOPOLL, 1); | |
278 | while (!req.complete) | |
279 | cuda_poll(); | |
280 | ||
281 | return 1; | |
51d3082f BH |
282 | |
283 | fail: | |
284 | of_node_put(vias); | |
285 | vias = NULL; | |
286 | return 0; | |
1da177e4 | 287 | } |
18814ee8 | 288 | #endif /* !defined CONFIG_MAC */ |
1da177e4 LT |
289 | |
290 | static int __init via_cuda_start(void) | |
291 | { | |
292 | if (via == NULL) | |
293 | return -ENODEV; | |
294 | ||
0ebfff14 | 295 | #ifdef CONFIG_MAC |
0251c38c | 296 | cuda_irq = IRQ_MAC_ADB; |
18814ee8 | 297 | #else |
0251c38c | 298 | cuda_irq = irq_of_parse_and_map(vias, 0); |
ef24ba70 | 299 | if (!cuda_irq) { |
0ebfff14 BH |
300 | printk(KERN_ERR "via-cuda: can't map interrupts for %s\n", |
301 | vias->full_name); | |
302 | return -ENODEV; | |
303 | } | |
18814ee8 | 304 | #endif |
0ebfff14 | 305 | |
0251c38c FT |
306 | if (request_irq(cuda_irq, cuda_interrupt, 0, "ADB", cuda_interrupt)) { |
307 | printk(KERN_ERR "via-cuda: can't request irq %d\n", cuda_irq); | |
1da177e4 LT |
308 | return -EAGAIN; |
309 | } | |
310 | ||
d23eee88 | 311 | pr_info("Macintosh Cuda and Egret driver.\n"); |
1da177e4 LT |
312 | |
313 | cuda_fully_inited = 1; | |
314 | return 0; | |
315 | } | |
316 | ||
317 | device_initcall(via_cuda_start); | |
318 | ||
319 | #ifdef CONFIG_ADB | |
320 | static int | |
321 | cuda_probe(void) | |
322 | { | |
323 | #ifdef CONFIG_PPC | |
324 | if (sys_ctrler != SYS_CTRLER_CUDA) | |
325 | return -ENODEV; | |
326 | #else | |
f74faec6 FT |
327 | if (macintosh_config->adb_type != MAC_ADB_CUDA && |
328 | macintosh_config->adb_type != MAC_ADB_EGRET) | |
1da177e4 | 329 | return -ENODEV; |
1da177e4 | 330 | #endif |
1da177e4 LT |
331 | if (via == NULL) |
332 | return -ENODEV; | |
333 | return 0; | |
1da177e4 LT |
334 | } |
335 | #endif /* CONFIG_ADB */ | |
336 | ||
d23eee88 FT |
337 | static int __init sync_egret(void) |
338 | { | |
339 | if (TREQ_asserted(in_8(&via[B]))) { | |
340 | /* Complete the inbound transfer */ | |
341 | assert_TIP_and_TACK(); | |
342 | while (1) { | |
343 | negate_TACK(); | |
344 | mdelay(1); | |
345 | (void)in_8(&via[SR]); | |
346 | assert_TACK(); | |
347 | if (!TREQ_asserted(in_8(&via[B]))) | |
348 | break; | |
349 | } | |
350 | negate_TIP_and_TACK(); | |
351 | } else if (in_8(&via[B]) & TIP) { | |
352 | /* Terminate the outbound transfer */ | |
353 | negate_TACK(); | |
354 | assert_TACK(); | |
355 | mdelay(1); | |
356 | negate_TIP_and_TACK(); | |
357 | } | |
358 | /* Clear shift register interrupt */ | |
359 | if (in_8(&via[IFR]) & SR_INT) | |
360 | (void)in_8(&via[SR]); | |
361 | return 0; | |
362 | } | |
363 | ||
1da177e4 LT |
364 | #define WAIT_FOR(cond, what) \ |
365 | do { \ | |
366 | int x; \ | |
367 | for (x = 1000; !(cond); --x) { \ | |
368 | if (x == 0) { \ | |
523717d1 | 369 | pr_err("Timeout waiting for " what "\n"); \ |
1da177e4 LT |
370 | return -ENXIO; \ |
371 | } \ | |
372 | udelay(100); \ | |
373 | } \ | |
374 | } while (0) | |
375 | ||
376 | static int | |
330dae19 | 377 | __init cuda_init_via(void) |
1da177e4 | 378 | { |
0251c38c | 379 | #ifdef CONFIG_PPC |
1da177e4 LT |
380 | out_8(&via[IER], 0x7f); /* disable interrupts from VIA */ |
381 | (void)in_8(&via[IER]); | |
0251c38c FT |
382 | #else |
383 | out_8(&via[IER], SR_INT); /* disable SR interrupt from VIA */ | |
1da177e4 LT |
384 | #endif |
385 | ||
d23eee88 FT |
386 | out_8(&via[DIRB], (in_8(&via[DIRB]) | TACK | TIP) & ~TREQ); /* TACK & TIP out */ |
387 | out_8(&via[ACR], (in_8(&via[ACR]) & ~SR_CTRL) | SR_EXT); /* SR data in */ | |
388 | (void)in_8(&via[SR]); /* clear any left-over data */ | |
389 | ||
390 | if (mcu_is_egret) | |
391 | return sync_egret(); | |
392 | ||
393 | negate_TIP_and_TACK(); | |
394 | ||
1da177e4 LT |
395 | /* delay 4ms and then clear any pending interrupt */ |
396 | mdelay(4); | |
397 | (void)in_8(&via[SR]); | |
0251c38c | 398 | out_8(&via[IFR], SR_INT); |
1da177e4 LT |
399 | |
400 | /* sync with the CUDA - assert TACK without TIP */ | |
fd7a65a2 | 401 | assert_TACK(); |
1da177e4 LT |
402 | |
403 | /* wait for the CUDA to assert TREQ in response */ | |
fd7a65a2 | 404 | WAIT_FOR(TREQ_asserted(in_8(&via[B])), "CUDA response to sync"); |
1da177e4 LT |
405 | |
406 | /* wait for the interrupt and then clear it */ | |
407 | WAIT_FOR(in_8(&via[IFR]) & SR_INT, "CUDA response to sync (2)"); | |
408 | (void)in_8(&via[SR]); | |
0251c38c | 409 | out_8(&via[IFR], SR_INT); |
1da177e4 LT |
410 | |
411 | /* finish the sync by negating TACK */ | |
fd7a65a2 | 412 | negate_TACK(); |
1da177e4 LT |
413 | |
414 | /* wait for the CUDA to negate TREQ and the corresponding interrupt */ | |
fd7a65a2 | 415 | WAIT_FOR(!TREQ_asserted(in_8(&via[B])), "CUDA response to sync (3)"); |
1da177e4 LT |
416 | WAIT_FOR(in_8(&via[IFR]) & SR_INT, "CUDA response to sync (4)"); |
417 | (void)in_8(&via[SR]); | |
0251c38c | 418 | out_8(&via[IFR], SR_INT); |
1da177e4 LT |
419 | |
420 | return 0; | |
421 | } | |
422 | ||
423 | #ifdef CONFIG_ADB | |
424 | /* Send an ADB command */ | |
425 | static int | |
426 | cuda_send_request(struct adb_request *req, int sync) | |
427 | { | |
428 | int i; | |
429 | ||
430 | if ((via == NULL) || !cuda_fully_inited) { | |
431 | req->complete = 1; | |
432 | return -ENXIO; | |
433 | } | |
434 | ||
435 | req->reply_expected = 1; | |
436 | ||
437 | i = cuda_write(req); | |
438 | if (i) | |
439 | return i; | |
440 | ||
441 | if (sync) { | |
442 | while (!req->complete) | |
443 | cuda_poll(); | |
444 | } | |
445 | return 0; | |
446 | } | |
447 | ||
448 | ||
449 | /* Enable/disable autopolling */ | |
450 | static int | |
451 | cuda_adb_autopoll(int devs) | |
452 | { | |
453 | struct adb_request req; | |
454 | ||
455 | if ((via == NULL) || !cuda_fully_inited) | |
456 | return -ENXIO; | |
457 | ||
458 | cuda_request(&req, NULL, 3, CUDA_PACKET, CUDA_AUTOPOLL, (devs? 1: 0)); | |
459 | while (!req.complete) | |
460 | cuda_poll(); | |
461 | return 0; | |
462 | } | |
463 | ||
464 | /* Reset adb bus - how do we do this?? */ | |
465 | static int | |
466 | cuda_reset_adb_bus(void) | |
467 | { | |
468 | struct adb_request req; | |
469 | ||
470 | if ((via == NULL) || !cuda_fully_inited) | |
471 | return -ENXIO; | |
472 | ||
473 | cuda_request(&req, NULL, 2, ADB_PACKET, 0); /* maybe? */ | |
474 | while (!req.complete) | |
475 | cuda_poll(); | |
476 | return 0; | |
477 | } | |
478 | #endif /* CONFIG_ADB */ | |
523717d1 | 479 | |
1da177e4 LT |
480 | /* Construct and send a cuda request */ |
481 | int | |
482 | cuda_request(struct adb_request *req, void (*done)(struct adb_request *), | |
483 | int nbytes, ...) | |
484 | { | |
485 | va_list list; | |
486 | int i; | |
487 | ||
488 | if (via == NULL) { | |
489 | req->complete = 1; | |
490 | return -ENXIO; | |
491 | } | |
492 | ||
493 | req->nbytes = nbytes; | |
494 | req->done = done; | |
495 | va_start(list, nbytes); | |
496 | for (i = 0; i < nbytes; ++i) | |
497 | req->data[i] = va_arg(list, int); | |
498 | va_end(list); | |
499 | req->reply_expected = 1; | |
500 | return cuda_write(req); | |
501 | } | |
4a1b08e8 | 502 | EXPORT_SYMBOL(cuda_request); |
1da177e4 LT |
503 | |
504 | static int | |
505 | cuda_write(struct adb_request *req) | |
506 | { | |
507 | unsigned long flags; | |
508 | ||
509 | if (req->nbytes < 2 || req->data[0] > CUDA_PACKET) { | |
510 | req->complete = 1; | |
511 | return -EINVAL; | |
512 | } | |
513 | req->next = NULL; | |
514 | req->sent = 0; | |
515 | req->complete = 0; | |
516 | req->reply_len = 0; | |
517 | ||
518 | spin_lock_irqsave(&cuda_lock, flags); | |
519 | if (current_req != 0) { | |
520 | last_req->next = req; | |
521 | last_req = req; | |
522 | } else { | |
523 | current_req = req; | |
524 | last_req = req; | |
525 | if (cuda_state == idle) | |
526 | cuda_start(); | |
527 | } | |
528 | spin_unlock_irqrestore(&cuda_lock, flags); | |
529 | ||
530 | return 0; | |
531 | } | |
532 | ||
533 | static void | |
534 | cuda_start(void) | |
535 | { | |
1da177e4 | 536 | /* assert cuda_state == idle */ |
06d7e994 | 537 | if (current_req == NULL) |
1da177e4 | 538 | return; |
97ced1aa | 539 | data_index = 0; |
fd7a65a2 | 540 | if (TREQ_asserted(in_8(&via[B]))) |
1da177e4 LT |
541 | return; /* a byte is coming in from the CUDA */ |
542 | ||
543 | /* set the shift register to shift out and send a byte */ | |
544 | out_8(&via[ACR], in_8(&via[ACR]) | SR_OUT); | |
97ced1aa | 545 | out_8(&via[SR], current_req->data[data_index++]); |
d23eee88 FT |
546 | if (mcu_is_egret) |
547 | assert_TIP_and_TACK(); | |
548 | else | |
549 | assert_TIP(); | |
1da177e4 LT |
550 | cuda_state = sent_first_byte; |
551 | } | |
552 | ||
553 | void | |
554 | cuda_poll(void) | |
555 | { | |
ac39452e | 556 | cuda_interrupt(0, NULL); |
1da177e4 | 557 | } |
4a1b08e8 | 558 | EXPORT_SYMBOL(cuda_poll); |
1da177e4 | 559 | |
fe73b582 FT |
560 | #define ARRAY_FULL(a, p) ((p) - (a) == ARRAY_SIZE(a)) |
561 | ||
1da177e4 | 562 | static irqreturn_t |
7d12e780 | 563 | cuda_interrupt(int irq, void *arg) |
1da177e4 | 564 | { |
ac39452e | 565 | unsigned long flags; |
fd7a65a2 | 566 | u8 status; |
1da177e4 LT |
567 | struct adb_request *req = NULL; |
568 | unsigned char ibuf[16]; | |
569 | int ibuf_len = 0; | |
570 | int complete = 0; | |
1da177e4 | 571 | |
ac39452e | 572 | spin_lock_irqsave(&cuda_lock, flags); |
1da177e4 | 573 | |
18814ee8 | 574 | /* On powermacs, this handler is registered for the VIA IRQ. But they use |
0251c38c FT |
575 | * just the shift register IRQ -- other VIA interrupt sources are disabled. |
576 | * On m68k macs, the VIA IRQ sources are dispatched individually. Unless | |
577 | * we are polling, the shift register IRQ flag has already been cleared. | |
578 | */ | |
579 | ||
580 | #ifdef CONFIG_MAC | |
581 | if (!arg) | |
582 | #endif | |
583 | { | |
584 | if ((in_8(&via[IFR]) & SR_INT) == 0) { | |
ac39452e | 585 | spin_unlock_irqrestore(&cuda_lock, flags); |
0251c38c FT |
586 | return IRQ_NONE; |
587 | } else { | |
588 | out_8(&via[IFR], SR_INT); | |
589 | } | |
1da177e4 | 590 | } |
fd7a65a2 FT |
591 | |
592 | status = in_8(&via[B]) & (TIP | TACK | TREQ); | |
593 | ||
1da177e4 LT |
594 | switch (cuda_state) { |
595 | case idle: | |
d23eee88 | 596 | /* System controller has unsolicited data for us */ |
1da177e4 | 597 | (void)in_8(&via[SR]); |
d23eee88 | 598 | idle_state: |
fd7a65a2 | 599 | assert_TIP(); |
1da177e4 LT |
600 | cuda_state = reading; |
601 | reply_ptr = cuda_rbuf; | |
602 | reading_reply = 0; | |
603 | break; | |
604 | ||
605 | case awaiting_reply: | |
d23eee88 | 606 | /* System controller has reply data for us */ |
1da177e4 | 607 | (void)in_8(&via[SR]); |
fd7a65a2 | 608 | assert_TIP(); |
1da177e4 LT |
609 | cuda_state = reading; |
610 | reply_ptr = current_req->reply; | |
611 | reading_reply = 1; | |
612 | break; | |
613 | ||
614 | case sent_first_byte: | |
fd7a65a2 | 615 | if (TREQ_asserted(status)) { |
1da177e4 LT |
616 | /* collision */ |
617 | out_8(&via[ACR], in_8(&via[ACR]) & ~SR_OUT); | |
618 | (void)in_8(&via[SR]); | |
fd7a65a2 | 619 | negate_TIP_and_TACK(); |
1da177e4 | 620 | cuda_state = idle; |
d23eee88 FT |
621 | /* Egret does not raise an "aborted" interrupt */ |
622 | if (mcu_is_egret) | |
623 | goto idle_state; | |
1da177e4 | 624 | } else { |
97ced1aa | 625 | out_8(&via[SR], current_req->data[data_index++]); |
fd7a65a2 | 626 | toggle_TACK(); |
d23eee88 FT |
627 | if (mcu_is_egret) |
628 | assert_TACK(); | |
1da177e4 LT |
629 | cuda_state = sending; |
630 | } | |
631 | break; | |
632 | ||
633 | case sending: | |
634 | req = current_req; | |
635 | if (data_index >= req->nbytes) { | |
636 | out_8(&via[ACR], in_8(&via[ACR]) & ~SR_OUT); | |
637 | (void)in_8(&via[SR]); | |
fd7a65a2 | 638 | negate_TIP_and_TACK(); |
1da177e4 LT |
639 | req->sent = 1; |
640 | if (req->reply_expected) { | |
641 | cuda_state = awaiting_reply; | |
642 | } else { | |
643 | current_req = req->next; | |
644 | complete = 1; | |
645 | /* not sure about this */ | |
646 | cuda_state = idle; | |
647 | cuda_start(); | |
648 | } | |
649 | } else { | |
650 | out_8(&via[SR], req->data[data_index++]); | |
fd7a65a2 | 651 | toggle_TACK(); |
d23eee88 FT |
652 | if (mcu_is_egret) |
653 | assert_TACK(); | |
1da177e4 LT |
654 | } |
655 | break; | |
656 | ||
657 | case reading: | |
fe73b582 FT |
658 | if (reading_reply ? ARRAY_FULL(current_req->reply, reply_ptr) |
659 | : ARRAY_FULL(cuda_rbuf, reply_ptr)) | |
660 | (void)in_8(&via[SR]); | |
661 | else | |
662 | *reply_ptr++ = in_8(&via[SR]); | |
fd7a65a2 | 663 | if (!TREQ_asserted(status)) { |
d23eee88 FT |
664 | if (mcu_is_egret) |
665 | assert_TACK(); | |
1da177e4 | 666 | /* that's all folks */ |
fd7a65a2 | 667 | negate_TIP_and_TACK(); |
1da177e4 | 668 | cuda_state = read_done; |
d23eee88 FT |
669 | /* Egret does not raise a "read done" interrupt */ |
670 | if (mcu_is_egret) | |
671 | goto read_done_state; | |
1da177e4 | 672 | } else { |
fd7a65a2 | 673 | toggle_TACK(); |
d23eee88 FT |
674 | if (mcu_is_egret) |
675 | negate_TACK(); | |
1da177e4 LT |
676 | } |
677 | break; | |
678 | ||
679 | case read_done: | |
680 | (void)in_8(&via[SR]); | |
d23eee88 | 681 | read_done_state: |
1da177e4 LT |
682 | if (reading_reply) { |
683 | req = current_req; | |
684 | req->reply_len = reply_ptr - req->reply; | |
685 | if (req->data[0] == ADB_PACKET) { | |
686 | /* Have to adjust the reply from ADB commands */ | |
687 | if (req->reply_len <= 2 || (req->reply[1] & 2) != 0) { | |
688 | /* the 0x2 bit indicates no response */ | |
689 | req->reply_len = 0; | |
690 | } else { | |
691 | /* leave just the command and result bytes in the reply */ | |
692 | req->reply_len -= 2; | |
693 | memmove(req->reply, req->reply + 2, req->reply_len); | |
694 | } | |
695 | } | |
696 | current_req = req->next; | |
697 | complete = 1; | |
cfbf9980 | 698 | reading_reply = 0; |
1da177e4 LT |
699 | } else { |
700 | /* This is tricky. We must break the spinlock to call | |
701 | * cuda_input. However, doing so means we might get | |
702 | * re-entered from another CPU getting an interrupt | |
703 | * or calling cuda_poll(). I ended up using the stack | |
704 | * (it's only for 16 bytes) and moving the actual | |
705 | * call to cuda_input to outside of the lock. | |
706 | */ | |
707 | ibuf_len = reply_ptr - cuda_rbuf; | |
708 | memcpy(ibuf, cuda_rbuf, ibuf_len); | |
709 | } | |
cfbf9980 | 710 | reply_ptr = cuda_rbuf; |
a6466243 FT |
711 | cuda_state = idle; |
712 | cuda_start(); | |
713 | if (cuda_state == idle && TREQ_asserted(in_8(&via[B]))) { | |
fd7a65a2 | 714 | assert_TIP(); |
1da177e4 | 715 | cuda_state = reading; |
1da177e4 LT |
716 | } |
717 | break; | |
718 | ||
719 | default: | |
523717d1 | 720 | pr_err("cuda_interrupt: unknown cuda_state %d?\n", cuda_state); |
1da177e4 | 721 | } |
ac39452e | 722 | spin_unlock_irqrestore(&cuda_lock, flags); |
1da177e4 LT |
723 | if (complete && req) { |
724 | void (*done)(struct adb_request *) = req->done; | |
725 | mb(); | |
726 | req->complete = 1; | |
727 | /* Here, we assume that if the request has a done member, the | |
728 | * struct request will survive to setting req->complete to 1 | |
729 | */ | |
730 | if (done) | |
731 | (*done)(req); | |
732 | } | |
733 | if (ibuf_len) | |
7d12e780 | 734 | cuda_input(ibuf, ibuf_len); |
1da177e4 LT |
735 | return IRQ_HANDLED; |
736 | } | |
737 | ||
738 | static void | |
7d12e780 | 739 | cuda_input(unsigned char *buf, int nb) |
1da177e4 | 740 | { |
1da177e4 LT |
741 | switch (buf[0]) { |
742 | case ADB_PACKET: | |
743 | #ifdef CONFIG_XMON | |
744 | if (nb == 5 && buf[2] == 0x2c) { | |
745 | extern int xmon_wants_key, xmon_adb_keycode; | |
746 | if (xmon_wants_key) { | |
747 | xmon_adb_keycode = buf[3]; | |
748 | return; | |
749 | } | |
750 | } | |
751 | #endif /* CONFIG_XMON */ | |
752 | #ifdef CONFIG_ADB | |
7d12e780 | 753 | adb_input(buf+2, nb-2, buf[1] & 0x40); |
1da177e4 LT |
754 | #endif /* CONFIG_ADB */ |
755 | break; | |
756 | ||
d23eee88 FT |
757 | case TIMER_PACKET: |
758 | /* Egret sends these periodically. Might be useful as a 'heartbeat' | |
759 | * to trigger a recovery for the VIA shift register errata. | |
760 | */ | |
761 | break; | |
762 | ||
1da177e4 | 763 | default: |
523717d1 FT |
764 | print_hex_dump(KERN_INFO, "cuda_input: ", DUMP_PREFIX_NONE, 32, 1, |
765 | buf, nb, false); | |
1da177e4 LT |
766 | } |
767 | } |