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Merge tag 'for-5.1-part2-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/kdave...
[mirror_ubuntu-eoan-kernel.git] / drivers / macintosh / via-pmu.c
CommitLineData
b2441318 1// SPDX-License-Identifier: GPL-2.0
1da177e4 2/*
c16a85a5 3 * Device driver for the PMU in Apple PowerBooks and PowerMacs.
1da177e4
LT		 4 *
5 * The VIA (versatile interface adapter) interfaces to the PMU,
6 * a 6805 microprocessor core whose primary function is to control
7 * battery charging and system power on the PowerBook 3400 and 2400.
8 * The PMU also controls the ADB (Apple Desktop Bus) which connects
9 * to the keyboard and mouse, as well as the non-volatile RAM
10 * and the RTC (real time clock) chip.
11 *
12 * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi.
13 * Copyright (C) 2001-2002 Benjamin Herrenschmidt
f91266ed 14 * Copyright (C) 2006-2007 Johannes Berg
1da177e4
LT		 15 *
16 * THIS DRIVER IS BECOMING A TOTAL MESS !
17 * - Cleanup atomically disabling reply to PMU events after
18 * a sleep or a freq. switch
1da177e4
LT		 19 *
20 */
21#include <stdarg.h>
d851b6e0 22#include <linux/mutex.h>
1da177e4
LT		 23#include <linux/types.h>
24#include <linux/errno.h>
25#include <linux/kernel.h>
26#include <linux/delay.h>
174cd4b1 27#include <linux/sched/signal.h>
1da177e4
LT		 28#include <linux/miscdevice.h>
29#include <linux/blkdev.h>
30#include <linux/pci.h>
31#include <linux/slab.h>
32#include <linux/poll.h>
33#include <linux/adb.h>
34#include <linux/pmu.h>
35#include <linux/cuda.h>
1da177e4
LT		 36#include <linux/module.h>
37#include <linux/spinlock.h>
38#include <linux/pm.h>
39#include <linux/proc_fs.h>
9d2f7342 40#include <linux/seq_file.h>
1da177e4
LT		 41#include <linux/init.h>
42#include <linux/interrupt.h>
43#include <linux/device.h>
e83b906c 44#include <linux/syscore_ops.h>
7dfb7103 45#include <linux/freezer.h>
1da177e4 46#include <linux/syscalls.h>
6002f544 47#include <linux/suspend.h>
1da177e4 48#include <linux/cpu.h>
4cc4587f 49#include <linux/compat.h>
5af50730
RH		 50#include <linux/of_address.h>
51#include <linux/of_irq.h>
c16a85a5 52#include <linux/uaccess.h>
1da177e4
LT		 53#include <asm/machdep.h>
54#include <asm/io.h>
55#include <asm/pgtable.h>
1da177e4
LT		 56#include <asm/sections.h>
57#include <asm/irq.h>
c16a85a5 58#ifdef CONFIG_PPC_PMAC
1da177e4 59#include <asm/pmac_feature.h>
5b9ca526
BH		 60#include <asm/pmac_pfunc.h>
61#include <asm/pmac_low_i2c.h>
c16a85a5 62#include <asm/prom.h>
1da177e4
LT		 63#include <asm/mmu_context.h>
64#include <asm/cputable.h>
65#include <asm/time.h>
1da177e4 66#include <asm/backlight.h>
c16a85a5
FT		 67#else
68#include <asm/macintosh.h>
69#include <asm/macints.h>
70#include <asm/mac_via.h>
71#endif
1da177e4 72
9e8e30a0
JB		 73#include "via-pmu-event.h"
74
1da177e4 75/* Some compile options */
f91266ed 76#undef DEBUG_SLEEP
1da177e4
LT		 77
78/* Misc minor number allocated for /dev/pmu */
79#define PMU_MINOR 154
80
81/* How many iterations between battery polls */
82#define BATTERY_POLLING_COUNT 2
83
d851b6e0 84static DEFINE_MUTEX(pmu_info_proc_mutex);
1da177e4
LT		 85
86/* VIA registers - spaced 0x200 bytes apart */
87#define RS 0x200 /* skip between registers */
88#define B 0 /* B-side data */
89#define A RS /* A-side data */
90#define DIRB (2*RS) /* B-side direction (1=output) */
91#define DIRA (3*RS) /* A-side direction (1=output) */
92#define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
93#define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
94#define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
95#define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
96#define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
97#define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
98#define SR (10*RS) /* Shift register */
99#define ACR (11*RS) /* Auxiliary control register */
100#define PCR (12*RS) /* Peripheral control register */
101#define IFR (13*RS) /* Interrupt flag register */
102#define IER (14*RS) /* Interrupt enable register */
103#define ANH (15*RS) /* A-side data, no handshake */
104
105/* Bits in B data register: both active low */
c16a85a5 106#ifdef CONFIG_PPC_PMAC
1da177e4
LT		 107#define TACK 0x08 /* Transfer acknowledge (input) */
108#define TREQ 0x10 /* Transfer request (output) */
c16a85a5
FT		 109#else
110#define TACK 0x02
111#define TREQ 0x04
112#endif
1da177e4
LT		 113
114/* Bits in ACR */
115#define SR_CTRL 0x1c /* Shift register control bits */
116#define SR_EXT 0x0c /* Shift on external clock */
117#define SR_OUT 0x10 /* Shift out if 1 */
118
119/* Bits in IFR and IER */
120#define IER_SET 0x80 /* set bits in IER */
121#define IER_CLR 0 /* clear bits in IER */
122#define SR_INT 0x04 /* Shift register full/empty */
123#define CB2_INT 0x08
124#define CB1_INT 0x10 /* transition on CB1 input */
125
126static volatile enum pmu_state {
c57902d5 127 uninitialized = 0,
1da177e4
LT		 128 idle,
129 sending,
130 intack,
131 reading,
132 reading_intr,
133 locked,
134} pmu_state;
135
136static volatile enum int_data_state {
137 int_data_empty,
138 int_data_fill,
139 int_data_ready,
140 int_data_flush
141} int_data_state[2] = { int_data_empty, int_data_empty };
142
143static struct adb_request *current_req;
144static struct adb_request *last_req;
145static struct adb_request *req_awaiting_reply;
146static unsigned char interrupt_data[2][32];
147static int interrupt_data_len[2];
148static int int_data_last;
149static unsigned char *reply_ptr;
150static int data_index;
151static int data_len;
152static volatile int adb_int_pending;
153static volatile int disable_poll;
1da177e4 154static int pmu_kind = PMU_UNKNOWN;
87275856 155static int pmu_fully_inited;
1da177e4 156static int pmu_has_adb;
c16a85a5 157#ifdef CONFIG_PPC_PMAC
c70c35da
FT		 158static volatile unsigned char __iomem *via1;
159static volatile unsigned char __iomem *via2;
c16a85a5 160static struct device_node *vias;
51d3082f 161static struct device_node *gpio_node;
c16a85a5 162#endif
87275856 163static unsigned char __iomem *gpio_reg;
ef24ba70 164static int gpio_irq = 0;
1da177e4 165static int gpio_irq_enabled = -1;
87275856 166static volatile int pmu_suspended;
1da177e4
LT		 167static spinlock_t pmu_lock;
168static u8 pmu_intr_mask;
169static int pmu_version;
170static int drop_interrupts;
f91266ed 171#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4 172static int option_lid_wakeup = 1;
f91266ed 173#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4 174static unsigned long async_req_locks;
6edc22fc
FT		 175
176#define NUM_IRQ_STATS 13
177static unsigned int pmu_irq_stats[NUM_IRQ_STATS];
1da177e4
LT		 178
179static struct proc_dir_entry *proc_pmu_root;
180static struct proc_dir_entry *proc_pmu_info;
181static struct proc_dir_entry *proc_pmu_irqstats;
182static struct proc_dir_entry *proc_pmu_options;
183static int option_server_mode;
184
1da177e4
LT		 185int pmu_battery_count;
186int pmu_cur_battery;
a334bdbd 187unsigned int pmu_power_flags = PMU_PWR_AC_PRESENT;
1da177e4
LT		 188struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES];
189static int query_batt_timer = BATTERY_POLLING_COUNT;
190static struct adb_request batt_req;
191static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES];
1da177e4 192
1da177e4
LT		 193int __fake_sleep;
194int asleep;
1da177e4
LT		 195
196#ifdef CONFIG_ADB
87275856 197static int adb_dev_map;
1da177e4
LT		 198static int pmu_adb_flags;
199
200static int pmu_probe(void);
201static int pmu_init(void);
202static int pmu_send_request(struct adb_request *req, int sync);
203static int pmu_adb_autopoll(int devs);
204static int pmu_adb_reset_bus(void);
205#endif /* CONFIG_ADB */
206
207static int init_pmu(void);
1da177e4 208static void pmu_start(void);
7d12e780
DH		 209static irqreturn_t via_pmu_interrupt(int irq, void *arg);
210static irqreturn_t gpio1_interrupt(int irq, void *arg);
3f3942ac
CH		 211static int pmu_info_proc_show(struct seq_file *m, void *v);
212static int pmu_irqstats_proc_show(struct seq_file *m, void *v);
213static int pmu_battery_proc_show(struct seq_file *m, void *v);
1da177e4 214static void pmu_pass_intr(unsigned char *data, int len);
9d2f7342 215static const struct file_operations pmu_options_proc_fops;
1da177e4
LT		 216
217#ifdef CONFIG_ADB
58935176 218const struct adb_driver via_pmu_driver = {
3a52f6f9
FT		 219 .name = "PMU",
220 .probe = pmu_probe,
221 .init = pmu_init,
222 .send_request = pmu_send_request,
223 .autopoll = pmu_adb_autopoll,
224 .poll = pmu_poll_adb,
225 .reset_bus = pmu_adb_reset_bus,
1da177e4
LT		 226};
227#endif /* CONFIG_ADB */
228
229extern void low_sleep_handler(void);
230extern void enable_kernel_altivec(void);
231extern void enable_kernel_fp(void);
232
233#ifdef DEBUG_SLEEP
234int pmu_polled_request(struct adb_request *req);
f91266ed 235void pmu_blink(int n);
1da177e4
LT		 236#endif
237
238/*
239 * This table indicates for each PMU opcode:
240 * - the number of data bytes to be sent with the command, or -1
241 * if a length byte should be sent,
242 * - the number of response bytes which the PMU will return, or
243 * -1 if it will send a length byte.
244 */
aacaf9bd 245static const s8 pmu_data_len[256][2] = {
1da177e4
LT		 246/* 0 1 2 3 4 5 6 7 */
247/*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
248/*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
249/*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
250/*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0},
251/*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},
252/*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1},
253/*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
254/*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0},
255/*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
256/*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1},
257/*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0},
258/*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},
259/*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
260/*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},
261/*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
262/*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1},
263/*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
264/*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
265/*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
266/*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
267/*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},
268/*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
269/*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
270/*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
271/*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
272/*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
273/*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
274/*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1},
275/*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0},
276/*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0},
277/*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
278/*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
279};
280
281static char *pbook_type[] = {
282 "Unknown PowerBook",
283 "PowerBook 2400/3400/3500(G3)",
284 "PowerBook G3 Series",
285 "1999 PowerBook G3",
286 "Core99"
287};
288
51d3082f 289int __init find_via_pmu(void)
1da177e4 290{
c16a85a5 291#ifdef CONFIG_PPC_PMAC
cc5d0189 292 u64 taddr;
018a3d1d 293 const u32 *reg;
51d3082f 294
c57902d5 295 if (pmu_state != uninitialized)
1da177e4 296 return 1;
51d3082f
BH		 297 vias = of_find_node_by_name(NULL, "via-pmu");
298 if (vias == NULL)
1da177e4 299 return 0;
1da177e4 300
01b2726d 301 reg = of_get_property(vias, "reg", NULL);
51d3082f
BH		 302 if (reg == NULL) {
303 printk(KERN_ERR "via-pmu: No \"reg\" property !\n");
304 goto fail;
305 }
306 taddr = of_translate_address(vias, reg);
bb6b9b28 307 if (taddr == OF_BAD_ADDR) {
51d3082f
BH		 308 printk(KERN_ERR "via-pmu: Can't translate address !\n");
309 goto fail;
1da177e4
LT		 310 }
311
312 spin_lock_init(&pmu_lock);
313
314 pmu_has_adb = 1;
315
316 pmu_intr_mask = PMU_INT_PCEJECT |
317 PMU_INT_SNDBRT |
318 PMU_INT_ADB |
319 PMU_INT_TICK;
320
f1e0addc
RH		 321 if (of_node_name_eq(vias->parent, "ohare") ||
322 of_device_is_compatible(vias->parent, "ohare"))
1da177e4 323 pmu_kind = PMU_OHARE_BASED;
55b61fec 324 else if (of_device_is_compatible(vias->parent, "paddington"))
1da177e4 325 pmu_kind = PMU_PADDINGTON_BASED;
55b61fec 326 else if (of_device_is_compatible(vias->parent, "heathrow"))
1da177e4 327 pmu_kind = PMU_HEATHROW_BASED;
55b61fec
SR		 328 else if (of_device_is_compatible(vias->parent, "Keylargo")
329 || of_device_is_compatible(vias->parent, "K2-Keylargo")) {
51d3082f 330 struct device_node *gpiop;
1658ab66 331 struct device_node *adbp;
cc5d0189 332 u64 gaddr = OF_BAD_ADDR;
1da177e4
LT		 333
334 pmu_kind = PMU_KEYLARGO_BASED;
1658ab66
SR		 335 adbp = of_find_node_by_type(NULL, "adb");
336 pmu_has_adb = (adbp != NULL);
337 of_node_put(adbp);
1da177e4
LT		 338 pmu_intr_mask = PMU_INT_PCEJECT |
339 PMU_INT_SNDBRT |
340 PMU_INT_ADB |
341 PMU_INT_TICK |
342 PMU_INT_ENVIRONMENT;
343
51d3082f
BH		 344 gpiop = of_find_node_by_name(NULL, "gpio");
345 if (gpiop) {
01b2726d 346 reg = of_get_property(gpiop, "reg", NULL);
51d3082f
BH		 347 if (reg)
348 gaddr = of_translate_address(gpiop, reg);
cc5d0189 349 if (gaddr != OF_BAD_ADDR)
51d3082f 350 gpio_reg = ioremap(gaddr, 0x10);
e702240e 351 of_node_put(gpiop);
1da177e4 352 }
61e37ca2 353 if (gpio_reg == NULL) {
51d3082f 354 printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n");
ffa3eb01 355 goto fail;
61e37ca2 356 }
1da177e4
LT		 357 } else
358 pmu_kind = PMU_UNKNOWN;
359
c70c35da
FT		 360 via1 = via2 = ioremap(taddr, 0x2000);
361 if (via1 == NULL) {
51d3082f 362 printk(KERN_ERR "via-pmu: Can't map address !\n");
ffa3eb01 363 goto fail_via_remap;
51d3082f 364 }
1da177e4 365
c70c35da
FT		 366 out_8(&via1[IER], IER_CLR | 0x7f); /* disable all intrs */
367 out_8(&via1[IFR], 0x7f); /* clear IFR */
1da177e4
LT		 368
369 pmu_state = idle;
370
ffa3eb01
PC		 371 if (!init_pmu())
372 goto fail_init;
1da177e4 373
1da177e4
LT		 374 sys_ctrler = SYS_CTRLER_PMU;
375
376 return 1;
ffa3eb01
PC		 377
378 fail_init:
c70c35da
FT		 379 iounmap(via1);
380 via1 = via2 = NULL;
ffa3eb01 381 fail_via_remap:
61e37ca2
OH		 382 iounmap(gpio_reg);
383 gpio_reg = NULL;
ffa3eb01
PC		 384 fail:
385 of_node_put(vias);
51d3082f 386 vias = NULL;
c57902d5 387 pmu_state = uninitialized;
51d3082f 388 return 0;
c16a85a5
FT		 389#else
390 if (macintosh_config->adb_type != MAC_ADB_PB2)
391 return 0;
392
393 pmu_kind = PMU_UNKNOWN;
394
395 spin_lock_init(&pmu_lock);
396
397 pmu_has_adb = 1;
398
399 pmu_intr_mask = PMU_INT_PCEJECT |
400 PMU_INT_SNDBRT |
401 PMU_INT_ADB |
402 PMU_INT_TICK;
403
404 pmu_state = idle;
405
406 if (!init_pmu()) {
407 pmu_state = uninitialized;
408 return 0;
409 }
410
411 return 1;
412#endif /* !CONFIG_PPC_PMAC */
1da177e4
LT		 413}
414
415#ifdef CONFIG_ADB
51d3082f 416static int pmu_probe(void)
1da177e4 417{
c57902d5 418 return pmu_state == uninitialized ? -ENODEV : 0;
1da177e4
LT		 419}
420
73f4447d 421static int pmu_init(void)
1da177e4 422{
c57902d5 423 return pmu_state == uninitialized ? -ENODEV : 0;
1da177e4
LT		 424}
425#endif /* CONFIG_ADB */
426
427/*
428 * We can't wait until pmu_init gets called, that happens too late.
429 * It happens after IDE and SCSI initialization, which can take a few
430 * seconds, and by that time the PMU could have given up on us and
431 * turned us off.
432 * Thus this is called with arch_initcall rather than device_initcall.
433 */
434static int __init via_pmu_start(void)
435{
c16a85a5 436 unsigned int __maybe_unused irq;
0ebfff14 437
c57902d5 438 if (pmu_state == uninitialized)
1da177e4
LT		 439 return -ENODEV;
440
1da177e4 441 batt_req.complete = 1;
1da177e4 442
c16a85a5 443#ifdef CONFIG_PPC_PMAC
0ebfff14 444 irq = irq_of_parse_and_map(vias, 0);
ef24ba70 445 if (!irq) {
7b52b440 446 printk(KERN_ERR "via-pmu: can't map interrupt\n");
0ebfff14
BH		 447 return -ENODEV;
448 }
ba461f09
IC		 449 /* We set IRQF_NO_SUSPEND because we don't want the interrupt
450 * to be disabled between the 2 passes of driver suspend, we
451 * control our own disabling for that one
11a50873 452 */
ba461f09
IC		 453 if (request_irq(irq, via_pmu_interrupt, IRQF_NO_SUSPEND,
454 "VIA-PMU", (void *)0)) {
0ebfff14
BH		 455 printk(KERN_ERR "via-pmu: can't request irq %d\n", irq);
456 return -ENODEV;
1da177e4
LT		 457 }
458
51d3082f
BH		 459 if (pmu_kind == PMU_KEYLARGO_BASED) {
460 gpio_node = of_find_node_by_name(NULL, "extint-gpio1");
461 if (gpio_node == NULL)
462 gpio_node = of_find_node_by_name(NULL,
463 "pmu-interrupt");
0ebfff14
BH		 464 if (gpio_node)
465 gpio_irq = irq_of_parse_and_map(gpio_node, 0);
51d3082f 466
ef24ba70 467 if (gpio_irq) {
6c308215
JO		 468 if (request_irq(gpio_irq, gpio1_interrupt,
469 IRQF_NO_SUSPEND, "GPIO1 ADB",
470 (void *)0))
51d3082f
BH		 471 printk(KERN_ERR "pmu: can't get irq %d"
472 " (GPIO1)\n", gpio_irq);
473 else
474 gpio_irq_enabled = 1;
475 }
1da177e4
LT		 476 }
477
478 /* Enable interrupts */
c70c35da 479 out_8(&via1[IER], IER_SET | SR_INT | CB1_INT);
c16a85a5
FT		 480#else
481 if (request_irq(IRQ_MAC_ADB_SR, via_pmu_interrupt, IRQF_NO_SUSPEND,
482 "VIA-PMU-SR", NULL)) {
483 pr_err("%s: couldn't get SR irq\n", __func__);
484 return -ENODEV;
485 }
486 if (request_irq(IRQ_MAC_ADB_CL, via_pmu_interrupt, IRQF_NO_SUSPEND,
487 "VIA-PMU-CL", NULL)) {
488 pr_err("%s: couldn't get CL irq\n", __func__);
489 free_irq(IRQ_MAC_ADB_SR, NULL);
490 return -ENODEV;
491 }
492#endif /* !CONFIG_PPC_PMAC */
1da177e4
LT		 493
494 pmu_fully_inited = 1;
495
496 /* Make sure PMU settle down before continuing. This is _very_ important
497 * since the IDE probe may shut interrupts down for quite a bit of time. If
498 * a PMU communication is pending while this happens, the PMU may timeout
499 * Not that on Core99 machines, the PMU keeps sending us environement
500 * messages, we should find a way to either fix IDE or make it call
501 * pmu_suspend() before masking interrupts. This can also happens while
502 * scolling with some fbdevs.
503 */
504 do {
505 pmu_poll();
506 } while (pmu_state != idle);
507
508 return 0;
509}
510
511arch_initcall(via_pmu_start);
512
513/*
514 * This has to be done after pci_init, which is a subsys_initcall.
515 */
516static int __init via_pmu_dev_init(void)
517{
c57902d5 518 if (pmu_state == uninitialized)
1da177e4
LT		 519 return -ENODEV;
520
1da177e4 521#ifdef CONFIG_PMAC_BACKLIGHT
5474c120 522 /* Initialize backlight */
4b755999 523 pmu_backlight_init();
5474c120 524#endif
1da177e4 525
8c870933 526#ifdef CONFIG_PPC32
71a157e8
GL		 527 if (of_machine_is_compatible("AAPL,3400/2400") ||
528 of_machine_is_compatible("AAPL,3500")) {
1da177e4
LT		 529 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
530 NULL, PMAC_MB_INFO_MODEL, 0);
531 pmu_battery_count = 1;
532 if (mb == PMAC_TYPE_COMET)
533 pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET;
534 else
535 pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER;
71a157e8
GL		 536 } else if (of_machine_is_compatible("AAPL,PowerBook1998") ||
537 of_machine_is_compatible("PowerBook1,1")) {
1da177e4
LT		 538 pmu_battery_count = 2;
539 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
540 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
541 } else {
30686ba6
SR		 542 struct device_node* prim =
543 of_find_node_by_name(NULL, "power-mgt");
018a3d1d 544 const u32 *prim_info = NULL;
1da177e4 545 if (prim)
01b2726d 546 prim_info = of_get_property(prim, "prim-info", NULL);
1da177e4
LT		 547 if (prim_info) {
548 /* Other stuffs here yet unknown */
549 pmu_battery_count = (prim_info[6] >> 16) & 0xff;
550 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
551 if (pmu_battery_count > 1)
552 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
553 }
30686ba6 554 of_node_put(prim);
1da177e4 555 }
8c870933
BH		 556#endif /* CONFIG_PPC32 */
557
1da177e4
LT		 558 /* Create /proc/pmu */
559 proc_pmu_root = proc_mkdir("pmu", NULL);
560 if (proc_pmu_root) {
8c870933 561 long i;
1da177e4
LT		 562
563 for (i=0; i<pmu_battery_count; i++) {
564 char title[16];
8c870933 565 sprintf(title, "battery_%ld", i);
3f3942ac
CH		 566 proc_pmu_batt[i] = proc_create_single_data(title, 0,
567 proc_pmu_root, pmu_battery_proc_show,
568 (void *)i);
1da177e4 569 }
1da177e4 570
3f3942ac
CH		 571 proc_pmu_info = proc_create_single("info", 0, proc_pmu_root,
572 pmu_info_proc_show);
573 proc_pmu_irqstats = proc_create_single("interrupts", 0,
574 proc_pmu_root, pmu_irqstats_proc_show);
9d2f7342
AD		 575 proc_pmu_options = proc_create("options", 0600, proc_pmu_root,
576 &pmu_options_proc_fops);
1da177e4
LT		 577 }
578 return 0;
579}
580
581device_initcall(via_pmu_dev_init);
582
aacaf9bd 583static int
1da177e4
LT		 584init_pmu(void)
585{
586 int timeout;
587 struct adb_request req;
588
576d5290 589 /* Negate TREQ. Set TACK to input and TREQ to output. */
c70c35da
FT		 590 out_8(&via2[B], in_8(&via2[B]) | TREQ);
591 out_8(&via2[DIRB], (in_8(&via2[DIRB]) | TREQ) & ~TACK);
1da177e4
LT		 592
593 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
594 timeout = 100000;
595 while (!req.complete) {
596 if (--timeout < 0) {
597 printk(KERN_ERR "init_pmu: no response from PMU\n");
598 return 0;
599 }
600 udelay(10);
601 pmu_poll();
602 }
603
604 /* ack all pending interrupts */
605 timeout = 100000;
606 interrupt_data[0][0] = 1;
607 while (interrupt_data[0][0] || pmu_state != idle) {
608 if (--timeout < 0) {
609 printk(KERN_ERR "init_pmu: timed out acking intrs\n");
610 return 0;
611 }
612 if (pmu_state == idle)
613 adb_int_pending = 1;
7d12e780 614 via_pmu_interrupt(0, NULL);
1da177e4
LT		 615 udelay(10);
616 }
617
618 /* Tell PMU we are ready. */
619 if (pmu_kind == PMU_KEYLARGO_BASED) {
620 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
621 while (!req.complete)
622 pmu_poll();
623 }
624
625 /* Read PMU version */
626 pmu_request(&req, NULL, 1, PMU_GET_VERSION);
627 pmu_wait_complete(&req);
628 if (req.reply_len > 0)
629 pmu_version = req.reply[0];
630
631 /* Read server mode setting */
632 if (pmu_kind == PMU_KEYLARGO_BASED) {
633 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS,
634 PMU_PWR_GET_POWERUP_EVENTS);
635 pmu_wait_complete(&req);
636 if (req.reply_len == 2) {
637 if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT)
638 option_server_mode = 1;
639 printk(KERN_INFO "via-pmu: Server Mode is %s\n",
640 option_server_mode ? "enabled" : "disabled");
641 }
642 }
c16a85a5
FT		 643
644 printk(KERN_INFO "PMU driver v%d initialized for %s, firmware: %02x\n",
645 PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version);
646
1da177e4
LT		 647 return 1;
648}
649
650int
651pmu_get_model(void)
652{
653 return pmu_kind;
654}
655
1da177e4
LT		 656static void pmu_set_server_mode(int server_mode)
657{
658 struct adb_request req;
659
660 if (pmu_kind != PMU_KEYLARGO_BASED)
661 return;
662
663 option_server_mode = server_mode;
664 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS);
665 pmu_wait_complete(&req);
666 if (req.reply_len < 2)
667 return;
668 if (server_mode)
669 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
670 PMU_PWR_SET_POWERUP_EVENTS,
671 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
672 else
673 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
674 PMU_PWR_CLR_POWERUP_EVENTS,
675 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
676 pmu_wait_complete(&req);
677}
678
1da177e4
LT		 679/* This new version of the code for 2400/3400/3500 powerbooks
680 * is inspired from the implementation in gkrellm-pmu
681 */
aacaf9bd 682static void
1da177e4
LT		 683done_battery_state_ohare(struct adb_request* req)
684{
c16a85a5 685#ifdef CONFIG_PPC_PMAC
1da177e4
LT		 686 /* format:
687 * [0] : flags
688 * 0x01 : AC indicator
689 * 0x02 : charging
690 * 0x04 : battery exist
691 * 0x08 :
692 * 0x10 :
693 * 0x20 : full charged
694 * 0x40 : pcharge reset
695 * 0x80 : battery exist
696 *
697 * [1][2] : battery voltage
698 * [3] : CPU temperature
699 * [4] : battery temperature
700 * [5] : current
701 * [6][7] : pcharge
702 * --tkoba
703 */
704 unsigned int bat_flags = PMU_BATT_TYPE_HOOPER;
705 long pcharge, charge, vb, vmax, lmax;
706 long vmax_charging, vmax_charged;
707 long amperage, voltage, time, max;
708 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
709 NULL, PMAC_MB_INFO_MODEL, 0);
710
711 if (req->reply[0] & 0x01)
712 pmu_power_flags |= PMU_PWR_AC_PRESENT;
713 else
714 pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
715
716 if (mb == PMAC_TYPE_COMET) {
717 vmax_charged = 189;
718 vmax_charging = 213;
719 lmax = 6500;
720 } else {
721 vmax_charged = 330;
722 vmax_charging = 330;
723 lmax = 6500;
724 }
725 vmax = vmax_charged;
726
727 /* If battery installed */
728 if (req->reply[0] & 0x04) {
729 bat_flags |= PMU_BATT_PRESENT;
730 if (req->reply[0] & 0x02)
731 bat_flags |= PMU_BATT_CHARGING;
732 vb = (req->reply[1] << 8) | req->reply[2];
733 voltage = (vb * 265 + 72665) / 10;
734 amperage = req->reply[5];
735 if ((req->reply[0] & 0x01) == 0) {
736 if (amperage > 200)
737 vb += ((amperage - 200) * 15)/100;
738 } else if (req->reply[0] & 0x02) {
739 vb = (vb * 97) / 100;
740 vmax = vmax_charging;
741 }
742 charge = (100 * vb) / vmax;
743 if (req->reply[0] & 0x40) {
744 pcharge = (req->reply[6] << 8) + req->reply[7];
745 if (pcharge > lmax)
746 pcharge = lmax;
747 pcharge *= 100;
748 pcharge = 100 - pcharge / lmax;
749 if (pcharge < charge)
750 charge = pcharge;
751 }
752 if (amperage > 0)
753 time = (charge * 16440) / amperage;
754 else
755 time = 0;
756 max = 100;
757 amperage = -amperage;
758 } else
759 charge = max = amperage = voltage = time = 0;
760
761 pmu_batteries[pmu_cur_battery].flags = bat_flags;
762 pmu_batteries[pmu_cur_battery].charge = charge;
763 pmu_batteries[pmu_cur_battery].max_charge = max;
764 pmu_batteries[pmu_cur_battery].amperage = amperage;
765 pmu_batteries[pmu_cur_battery].voltage = voltage;
766 pmu_batteries[pmu_cur_battery].time_remaining = time;
c16a85a5 767#endif /* CONFIG_PPC_PMAC */
1da177e4
LT		 768
769 clear_bit(0, &async_req_locks);
770}
771
aacaf9bd 772static void
1da177e4
LT		 773done_battery_state_smart(struct adb_request* req)
774{
775 /* format:
776 * [0] : format of this structure (known: 3,4,5)
777 * [1] : flags
778 *
779 * format 3 & 4:
780 *
781 * [2] : charge
782 * [3] : max charge
783 * [4] : current
784 * [5] : voltage
785 *
786 * format 5:
787 *
788 * [2][3] : charge
789 * [4][5] : max charge
790 * [6][7] : current
791 * [8][9] : voltage
792 */
793
794 unsigned int bat_flags = PMU_BATT_TYPE_SMART;
795 int amperage;
796 unsigned int capa, max, voltage;
797
798 if (req->reply[1] & 0x01)
799 pmu_power_flags |= PMU_PWR_AC_PRESENT;
800 else
801 pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
802
803
804 capa = max = amperage = voltage = 0;
805
806 if (req->reply[1] & 0x04) {
807 bat_flags |= PMU_BATT_PRESENT;
808 switch(req->reply[0]) {
809 case 3:
810 case 4: capa = req->reply[2];
811 max = req->reply[3];
812 amperage = *((signed char *)&req->reply[4]);
813 voltage = req->reply[5];
814 break;
815 case 5: capa = (req->reply[2] << 8) | req->reply[3];
816 max = (req->reply[4] << 8) | req->reply[5];
817 amperage = *((signed short *)&req->reply[6]);
818 voltage = (req->reply[8] << 8) | req->reply[9];
819 break;
820 default:
ebd004e4
AS		 821 pr_warn("pmu.c: unrecognized battery info, "
822 "len: %d, %4ph\n", req->reply_len,
823 req->reply);
1da177e4
LT		 824 break;
825 }
826 }
827
828 if ((req->reply[1] & 0x01) && (amperage > 0))
829 bat_flags |= PMU_BATT_CHARGING;
830
831 pmu_batteries[pmu_cur_battery].flags = bat_flags;
832 pmu_batteries[pmu_cur_battery].charge = capa;
833 pmu_batteries[pmu_cur_battery].max_charge = max;
834 pmu_batteries[pmu_cur_battery].amperage = amperage;
835 pmu_batteries[pmu_cur_battery].voltage = voltage;
836 if (amperage) {
837 if ((req->reply[1] & 0x01) && (amperage > 0))
838 pmu_batteries[pmu_cur_battery].time_remaining
839 = ((max-capa) * 3600) / amperage;
840 else
841 pmu_batteries[pmu_cur_battery].time_remaining
842 = (capa * 3600) / (-amperage);
843 } else
844 pmu_batteries[pmu_cur_battery].time_remaining = 0;
845
846 pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count;
847
848 clear_bit(0, &async_req_locks);
849}
850
aacaf9bd 851static void
1da177e4
LT		 852query_battery_state(void)
853{
854 if (test_and_set_bit(0, &async_req_locks))
855 return;
856 if (pmu_kind == PMU_OHARE_BASED)
857 pmu_request(&batt_req, done_battery_state_ohare,
858 1, PMU_BATTERY_STATE);
859 else
860 pmu_request(&batt_req, done_battery_state_smart,
861 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1);
862}
863
9d2f7342 864static int pmu_info_proc_show(struct seq_file *m, void *v)
1da177e4 865{
9d2f7342
AD		 866 seq_printf(m, "PMU driver version : %d\n", PMU_DRIVER_VERSION);
867 seq_printf(m, "PMU firmware version : %02x\n", pmu_version);
868 seq_printf(m, "AC Power : %d\n",
63e1fd41 869 ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0) || pmu_battery_count == 0);
9d2f7342
AD		 870 seq_printf(m, "Battery count : %d\n", pmu_battery_count);
871
872 return 0;
873}
1da177e4 874
9d2f7342 875static int pmu_irqstats_proc_show(struct seq_file *m, void *v)
1da177e4
LT		 876{
877 int i;
6edc22fc
FT		 878 static const char *irq_names[NUM_IRQ_STATS] = {
879 "Unknown interrupt (type 0)",
880 "Unknown interrupt (type 1)",
1da177e4
LT		 881 "PC-Card eject button",
882 "Sound/Brightness button",
883 "ADB message",
884 "Battery state change",
885 "Environment interrupt",
886 "Tick timer",
887 "Ghost interrupt (zero len)",
888 "Empty interrupt (empty mask)",
6edc22fc
FT		 889 "Max irqs in a row",
890 "Total CB1 triggered events",
891 "Total GPIO1 triggered events",
1da177e4
LT		 892 };
893
6edc22fc 894 for (i = 0; i < NUM_IRQ_STATS; i++) {
9d2f7342 895 seq_printf(m, " %2u: %10u (%s)\n",
1da177e4
LT		 896 i, pmu_irq_stats[i], irq_names[i]);
897 }
9d2f7342 898 return 0;
1da177e4
LT		 899}
900
9d2f7342
AD		 901static int pmu_battery_proc_show(struct seq_file *m, void *v)
902{
903 long batnum = (long)m->private;
1da177e4 904
9d2f7342
AD		 905 seq_putc(m, '\n');
906 seq_printf(m, "flags : %08x\n", pmu_batteries[batnum].flags);
907 seq_printf(m, "charge : %d\n", pmu_batteries[batnum].charge);
908 seq_printf(m, "max_charge : %d\n", pmu_batteries[batnum].max_charge);
909 seq_printf(m, "current : %d\n", pmu_batteries[batnum].amperage);
910 seq_printf(m, "voltage : %d\n", pmu_batteries[batnum].voltage);
911 seq_printf(m, "time rem. : %d\n", pmu_batteries[batnum].time_remaining);
912 return 0;
1da177e4 913}
1da177e4 914
9d2f7342
AD		 915static int pmu_options_proc_show(struct seq_file *m, void *v)
916{
f91266ed 917#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT		 918 if (pmu_kind == PMU_KEYLARGO_BASED &&
919 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
9d2f7342 920 seq_printf(m, "lid_wakeup=%d\n", option_lid_wakeup);
8c870933 921#endif
1da177e4 922 if (pmu_kind == PMU_KEYLARGO_BASED)
9d2f7342 923 seq_printf(m, "server_mode=%d\n", option_server_mode);
1da177e4 924
9d2f7342 925 return 0;
1da177e4 926}
9d2f7342
AD		 927
928static int pmu_options_proc_open(struct inode *inode, struct file *file)
929{
930 return single_open(file, pmu_options_proc_show, NULL);
931}
932
933static ssize_t pmu_options_proc_write(struct file *file,
934 const char __user *buffer, size_t count, loff_t *pos)
1da177e4
LT		 935{
936 char tmp[33];
937 char *label, *val;
9d2f7342 938 size_t fcount = count;
1da177e4
LT		 939
940 if (!count)
941 return -EINVAL;
942 if (count > 32)
943 count = 32;
944 if (copy_from_user(tmp, buffer, count))
945 return -EFAULT;
946 tmp[count] = 0;
947
948 label = tmp;
949 while(*label == ' ')
950 label++;
951 val = label;
952 while(*val && (*val != '=')) {
953 if (*val == ' ')
954 *val = 0;
955 val++;
956 }
957 if ((*val) == 0)
958 return -EINVAL;
959 *(val++) = 0;
960 while(*val == ' ')
961 val++;
f91266ed 962#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT		 963 if (pmu_kind == PMU_KEYLARGO_BASED &&
964 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
965 if (!strcmp(label, "lid_wakeup"))
966 option_lid_wakeup = ((*val) == '1');
8c870933 967#endif
1da177e4
LT		 968 if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) {
969 int new_value;
970 new_value = ((*val) == '1');
971 if (new_value != option_server_mode)
972 pmu_set_server_mode(new_value);
973 }
974 return fcount;
975}
976
9d2f7342
AD		 977static const struct file_operations pmu_options_proc_fops = {
978 .owner = THIS_MODULE,
979 .open = pmu_options_proc_open,
980 .read = seq_read,
981 .llseek = seq_lseek,
982 .release = single_release,
983 .write = pmu_options_proc_write,
984};
985
1da177e4
LT		 986#ifdef CONFIG_ADB
987/* Send an ADB command */
11a50873 988static int pmu_send_request(struct adb_request *req, int sync)
1da177e4
LT		 989{
990 int i, ret;
991
c57902d5 992 if (pmu_state == uninitialized || !pmu_fully_inited) {
1da177e4
LT		 993 req->complete = 1;
994 return -ENXIO;
995 }
996
997 ret = -EINVAL;
998
999 switch (req->data[0]) {
1000 case PMU_PACKET:
1001 for (i = 0; i < req->nbytes - 1; ++i)
1002 req->data[i] = req->data[i+1];
1003 --req->nbytes;
1004 if (pmu_data_len[req->data[0]][1] != 0) {
1005 req->reply[0] = ADB_RET_OK;
1006 req->reply_len = 1;
1007 } else
1008 req->reply_len = 0;
1009 ret = pmu_queue_request(req);
1010 break;
1011 case CUDA_PACKET:
1012 switch (req->data[1]) {
1013 case CUDA_GET_TIME:
1014 if (req->nbytes != 2)
1015 break;
1016 req->data[0] = PMU_READ_RTC;
1017 req->nbytes = 1;
1018 req->reply_len = 3;
1019 req->reply[0] = CUDA_PACKET;
1020 req->reply[1] = 0;
1021 req->reply[2] = CUDA_GET_TIME;
1022 ret = pmu_queue_request(req);
1023 break;
1024 case CUDA_SET_TIME:
1025 if (req->nbytes != 6)
1026 break;
1027 req->data[0] = PMU_SET_RTC;
1028 req->nbytes = 5;
1029 for (i = 1; i <= 4; ++i)
1030 req->data[i] = req->data[i+1];
1031 req->reply_len = 3;
1032 req->reply[0] = CUDA_PACKET;
1033 req->reply[1] = 0;
1034 req->reply[2] = CUDA_SET_TIME;
1035 ret = pmu_queue_request(req);
1036 break;
1037 }
1038 break;
1039 case ADB_PACKET:
1040 if (!pmu_has_adb)
1041 return -ENXIO;
1042 for (i = req->nbytes - 1; i > 1; --i)
1043 req->data[i+2] = req->data[i];
1044 req->data[3] = req->nbytes - 2;
1045 req->data[2] = pmu_adb_flags;
1046 /*req->data[1] = req->data[1];*/
1047 req->data[0] = PMU_ADB_CMD;
1048 req->nbytes += 2;
1049 req->reply_expected = 1;
1050 req->reply_len = 0;
1051 ret = pmu_queue_request(req);
1052 break;
1053 }
1054 if (ret) {
1055 req->complete = 1;
1056 return ret;
1057 }
1058
1059 if (sync)
1060 while (!req->complete)
1061 pmu_poll();
1062
1063 return 0;
1064}
1065
1066/* Enable/disable autopolling */
11a50873 1067static int __pmu_adb_autopoll(int devs)
1da177e4
LT		 1068{
1069 struct adb_request req;
1070
1da177e4 1071 if (devs) {
1da177e4
LT		 1072 pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86,
1073 adb_dev_map >> 8, adb_dev_map);
1074 pmu_adb_flags = 2;
1075 } else {
1076 pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF);
1077 pmu_adb_flags = 0;
1078 }
1079 while (!req.complete)
1080 pmu_poll();
1081 return 0;
1082}
1083
11a50873
BH		 1084static int pmu_adb_autopoll(int devs)
1085{
c57902d5 1086 if (pmu_state == uninitialized || !pmu_fully_inited || !pmu_has_adb)
11a50873
BH		 1087 return -ENXIO;
1088
1089 adb_dev_map = devs;
1090 return __pmu_adb_autopoll(devs);
1091}
1092
1da177e4 1093/* Reset the ADB bus */
11a50873 1094static int pmu_adb_reset_bus(void)
1da177e4
LT		 1095{
1096 struct adb_request req;
1097 int save_autopoll = adb_dev_map;
1098
c57902d5 1099 if (pmu_state == uninitialized || !pmu_fully_inited || !pmu_has_adb)
1da177e4
LT		 1100 return -ENXIO;
1101
1102 /* anyone got a better idea?? */
11a50873 1103 __pmu_adb_autopoll(0);
1da177e4 1104
11a50873 1105 req.nbytes = 4;
1da177e4
LT		 1106 req.done = NULL;
1107 req.data[0] = PMU_ADB_CMD;
11a50873
BH		 1108 req.data[1] = ADB_BUSRESET;
1109 req.data[2] = 0;
1da177e4
LT		 1110 req.data[3] = 0;
1111 req.data[4] = 0;
1112 req.reply_len = 0;
1113 req.reply_expected = 1;
1114 if (pmu_queue_request(&req) != 0) {
1115 printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n");
1116 return -EIO;
1117 }
1118 pmu_wait_complete(&req);
1119
1120 if (save_autopoll != 0)
11a50873 1121 __pmu_adb_autopoll(save_autopoll);
1da177e4
LT		 1122
1123 return 0;
1124}
1125#endif /* CONFIG_ADB */
1126
1127/* Construct and send a pmu request */
aacaf9bd 1128int
1da177e4
LT		 1129pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
1130 int nbytes, ...)
1131{
1132 va_list list;
1133 int i;
1134
c57902d5 1135 if (pmu_state == uninitialized)
1da177e4
LT		 1136 return -ENXIO;
1137
1138 if (nbytes < 0 || nbytes > 32) {
1139 printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes);
1140 req->complete = 1;
1141 return -EINVAL;
1142 }
1143 req->nbytes = nbytes;
1144 req->done = done;
1145 va_start(list, nbytes);
1146 for (i = 0; i < nbytes; ++i)
1147 req->data[i] = va_arg(list, int);
1148 va_end(list);
1149 req->reply_len = 0;
1150 req->reply_expected = 0;
1151 return pmu_queue_request(req);
1152}
1153
aacaf9bd 1154int
1da177e4
LT		 1155pmu_queue_request(struct adb_request *req)
1156{
1157 unsigned long flags;
1158 int nsend;
1159
c57902d5 1160 if (pmu_state == uninitialized) {
1da177e4
LT		 1161 req->complete = 1;
1162 return -ENXIO;
1163 }
1164 if (req->nbytes <= 0) {
1165 req->complete = 1;
1166 return 0;
1167 }
1168 nsend = pmu_data_len[req->data[0]][0];
1169 if (nsend >= 0 && req->nbytes != nsend + 1) {
1170 req->complete = 1;
1171 return -EINVAL;
1172 }
1173
1174 req->next = NULL;
1175 req->sent = 0;
1176 req->complete = 0;
1177
1178 spin_lock_irqsave(&pmu_lock, flags);
d8731527 1179 if (current_req) {
1da177e4
LT		 1180 last_req->next = req;
1181 last_req = req;
1182 } else {
1183 current_req = req;
1184 last_req = req;
1185 if (pmu_state == idle)
1186 pmu_start();
1187 }
1188 spin_unlock_irqrestore(&pmu_lock, flags);
1189
1190 return 0;
1191}
1192
1193static inline void
1194wait_for_ack(void)
1195{
1196 /* Sightly increased the delay, I had one occurrence of the message
1197 * reported
1198 */
1199 int timeout = 4000;
c70c35da 1200 while ((in_8(&via2[B]) & TACK) == 0) {
1da177e4
LT		 1201 if (--timeout < 0) {
1202 printk(KERN_ERR "PMU not responding (!ack)\n");
1203 return;
1204 }
1205 udelay(10);
1206 }
1207}
1208
1209/* New PMU seems to be very sensitive to those timings, so we make sure
1210 * PCI is flushed immediately */
1211static inline void
1212send_byte(int x)
1213{
c70c35da
FT		 1214 out_8(&via1[ACR], in_8(&via1[ACR]) | SR_OUT | SR_EXT);
1215 out_8(&via1[SR], x);
1216 out_8(&via2[B], in_8(&via2[B]) & ~TREQ); /* assert TREQ */
1217 (void)in_8(&via2[B]);
1da177e4
LT		 1218}
1219
1220static inline void
1221recv_byte(void)
1222{
c70c35da
FT		 1223 out_8(&via1[ACR], (in_8(&via1[ACR]) & ~SR_OUT) | SR_EXT);
1224 in_8(&via1[SR]); /* resets SR */
1225 out_8(&via2[B], in_8(&via2[B]) & ~TREQ);
1226 (void)in_8(&via2[B]);
1da177e4
LT		 1227}
1228
1229static inline void
1230pmu_done(struct adb_request *req)
1231{
1232 void (*done)(struct adb_request *) = req->done;
1233 mb();
1234 req->complete = 1;
1235 /* Here, we assume that if the request has a done member, the
1236 * struct request will survive to setting req->complete to 1
1237 */
1238 if (done)
1239 (*done)(req);
1240}
1241
aacaf9bd 1242static void
1da177e4
LT		 1243pmu_start(void)
1244{
1245 struct adb_request *req;
1246
1247 /* assert pmu_state == idle */
1248 /* get the packet to send */
1249 req = current_req;
d8731527 1250 if (!req || pmu_state != idle
1da177e4
LT		 1251 || (/*req->reply_expected && */req_awaiting_reply))
1252 return;
1253
1254 pmu_state = sending;
1255 data_index = 1;
1256 data_len = pmu_data_len[req->data[0]][0];
1257
1258 /* Sounds safer to make sure ACK is high before writing. This helped
1259 * kill a problem with ADB and some iBooks
1260 */
1261 wait_for_ack();
1262 /* set the shift register to shift out and send a byte */
1263 send_byte(req->data[0]);
1264}
1265
aacaf9bd 1266void
1da177e4
LT		 1267pmu_poll(void)
1268{
c57902d5 1269 if (pmu_state == uninitialized)
1da177e4
LT		 1270 return;
1271 if (disable_poll)
1272 return;
7d12e780 1273 via_pmu_interrupt(0, NULL);
1da177e4
LT		 1274}
1275
aacaf9bd 1276void
1da177e4
LT		 1277pmu_poll_adb(void)
1278{
c57902d5 1279 if (pmu_state == uninitialized)
1da177e4
LT		 1280 return;
1281 if (disable_poll)
1282 return;
1283 /* Kicks ADB read when PMU is suspended */
1284 adb_int_pending = 1;
1285 do {
7d12e780 1286 via_pmu_interrupt(0, NULL);
1da177e4
LT		 1287 } while (pmu_suspended && (adb_int_pending || pmu_state != idle
1288 || req_awaiting_reply));
1289}
1290
aacaf9bd 1291void
1da177e4
LT		 1292pmu_wait_complete(struct adb_request *req)
1293{
c57902d5 1294 if (pmu_state == uninitialized)
1da177e4
LT		 1295 return;
1296 while((pmu_state != idle && pmu_state != locked) || !req->complete)
7d12e780 1297 via_pmu_interrupt(0, NULL);
1da177e4
LT		 1298}
1299
1300/* This function loops until the PMU is idle and prevents it from
1301 * anwsering to ADB interrupts. pmu_request can still be called.
1302 * This is done to avoid spurrious shutdowns when we know we'll have
1303 * interrupts switched off for a long time
1304 */
aacaf9bd 1305void
1da177e4
LT		 1306pmu_suspend(void)
1307{
1308 unsigned long flags;
1b0e9d44 1309
c57902d5 1310 if (pmu_state == uninitialized)
1da177e4
LT		 1311 return;
1312
1313 spin_lock_irqsave(&pmu_lock, flags);
1314 pmu_suspended++;
1315 if (pmu_suspended > 1) {
1316 spin_unlock_irqrestore(&pmu_lock, flags);
1317 return;
1318 }
1319
1320 do {
1321 spin_unlock_irqrestore(&pmu_lock, flags);
1322 if (req_awaiting_reply)
1323 adb_int_pending = 1;
7d12e780 1324 via_pmu_interrupt(0, NULL);
1da177e4
LT		 1325 spin_lock_irqsave(&pmu_lock, flags);
1326 if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) {
1da177e4
LT		 1327 if (gpio_irq >= 0)
1328 disable_irq_nosync(gpio_irq);
c70c35da 1329 out_8(&via1[IER], CB1_INT | IER_CLR);
1da177e4 1330 spin_unlock_irqrestore(&pmu_lock, flags);
1da177e4
LT		 1331 break;
1332 }
1333 } while (1);
1334}
1335
aacaf9bd 1336void
1da177e4
LT		 1337pmu_resume(void)
1338{
1339 unsigned long flags;
1340
c57902d5 1341 if (pmu_state == uninitialized || pmu_suspended < 1)
1da177e4
LT		 1342 return;
1343
1344 spin_lock_irqsave(&pmu_lock, flags);
1345 pmu_suspended--;
1346 if (pmu_suspended > 0) {
1347 spin_unlock_irqrestore(&pmu_lock, flags);
1348 return;
1349 }
1350 adb_int_pending = 1;
1da177e4
LT		 1351 if (gpio_irq >= 0)
1352 enable_irq(gpio_irq);
c70c35da 1353 out_8(&via1[IER], CB1_INT | IER_SET);
1da177e4
LT		 1354 spin_unlock_irqrestore(&pmu_lock, flags);
1355 pmu_poll();
1da177e4
LT		 1356}
1357
1358/* Interrupt data could be the result data from an ADB cmd */
aacaf9bd 1359static void
7d12e780 1360pmu_handle_data(unsigned char *data, int len)
1da177e4 1361{
b5c7ccca
FT		 1362 unsigned char ints;
1363 int idx;
1da177e4
LT		 1364 int i = 0;
1365
1366 asleep = 0;
1367 if (drop_interrupts || len < 1) {
1368 adb_int_pending = 0;
1369 pmu_irq_stats[8]++;
1370 return;
1371 }
1372
1373 /* Get PMU interrupt mask */
1374 ints = data[0];
1375
1376 /* Record zero interrupts for stats */
1377 if (ints == 0)
1378 pmu_irq_stats[9]++;
1379
1380 /* Hack to deal with ADB autopoll flag */
1381 if (ints & PMU_INT_ADB)
1382 ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL);
1383
1384next:
1da177e4
LT		 1385 if (ints == 0) {
1386 if (i > pmu_irq_stats[10])
1387 pmu_irq_stats[10] = i;
1388 return;
1389 }
1da177e4 1390 i++;
b5c7ccca
FT		 1391
1392 idx = ffs(ints) - 1;
1393 ints &= ~BIT(idx);
1394
1395 pmu_irq_stats[idx]++;
1da177e4
LT		 1396
1397 /* Note: for some reason, we get an interrupt with len=1,
1398 * data[0]==0 after each normal ADB interrupt, at least
1399 * on the Pismo. Still investigating... --BenH
1400 */
b5c7ccca
FT		 1401 switch (BIT(idx)) {
1402 case PMU_INT_ADB:
1da177e4
LT		 1403 if ((data[0] & PMU_INT_ADB_AUTO) == 0) {
1404 struct adb_request *req = req_awaiting_reply;
d8731527 1405 if (!req) {
1da177e4
LT		 1406 printk(KERN_ERR "PMU: extra ADB reply\n");
1407 return;
1408 }
1409 req_awaiting_reply = NULL;
1410 if (len <= 2)
1411 req->reply_len = 0;
1412 else {
1413 memcpy(req->reply, data + 1, len - 1);
1414 req->reply_len = len - 1;
1415 }
1416 pmu_done(req);
1417 } else {
c16a85a5 1418#ifdef CONFIG_XMON
1da177e4
LT		 1419 if (len == 4 && data[1] == 0x2c) {
1420 extern int xmon_wants_key, xmon_adb_keycode;
1421 if (xmon_wants_key) {
1422 xmon_adb_keycode = data[2];
1423 return;
1424 }
1425 }
c16a85a5 1426#endif /* CONFIG_XMON */
1da177e4
LT		 1427#ifdef CONFIG_ADB
1428 /*
1429 * XXX On the [23]400 the PMU gives us an up
1430 * event for keycodes 0x74 or 0x75 when the PC
1431 * card eject buttons are released, so we
1432 * ignore those events.
1433 */
1434 if (!(pmu_kind == PMU_OHARE_BASED && len == 4
1435 && data[1] == 0x2c && data[3] == 0xff
1436 && (data[2] & ~1) == 0xf4))
7d12e780 1437 adb_input(data+1, len-1, 1);
1da177e4
LT		 1438#endif /* CONFIG_ADB */
1439 }
b5c7ccca
FT		 1440 break;
1441
1da177e4 1442 /* Sound/brightness button pressed */
b5c7ccca 1443 case PMU_INT_SNDBRT:
1da177e4
LT		 1444#ifdef CONFIG_PMAC_BACKLIGHT
1445 if (len == 3)
4b755999
MH		 1446 pmac_backlight_set_legacy_brightness_pmu(data[1] >> 4);
1447#endif
b5c7ccca
FT		 1448 break;
1449
1da177e4 1450 /* Tick interrupt */
b5c7ccca
FT		 1451 case PMU_INT_TICK:
1452 /* Environment or tick interrupt, query batteries */
1da177e4
LT		 1453 if (pmu_battery_count) {
1454 if ((--query_batt_timer) == 0) {
1455 query_battery_state();
1456 query_batt_timer = BATTERY_POLLING_COUNT;
1457 }
1458 }
b5c7ccca
FT		 1459 break;
1460
1461 case PMU_INT_ENVIRONMENT:
1da177e4
LT		 1462 if (pmu_battery_count)
1463 query_battery_state();
1464 pmu_pass_intr(data, len);
9e8e30a0
JB		 1465 /* len == 6 is probably a bad check. But how do I
1466 * know what PMU versions send what events here? */
1467 if (len == 6) {
1468 via_pmu_event(PMU_EVT_POWER, !!(data[1]&8));
1469 via_pmu_event(PMU_EVT_LID, data[1]&1);
1470 }
b5c7ccca
FT		 1471 break;
1472
1473 default:
1da177e4 1474 pmu_pass_intr(data, len);
1da177e4
LT		 1475 }
1476 goto next;
1477}
1478
aacaf9bd 1479static struct adb_request*
7d12e780 1480pmu_sr_intr(void)
1da177e4
LT		 1481{
1482 struct adb_request *req;
1483 int bite = 0;
1484
c70c35da
FT		 1485 if (in_8(&via2[B]) & TREQ) {
1486 printk(KERN_ERR "PMU: spurious SR intr (%x)\n", in_8(&via2[B]));
1da177e4
LT		 1487 return NULL;
1488 }
1489 /* The ack may not yet be low when we get the interrupt */
c70c35da 1490 while ((in_8(&via2[B]) & TACK) != 0)
1da177e4
LT		 1491 ;
1492
1493 /* if reading grab the byte, and reset the interrupt */
1494 if (pmu_state == reading || pmu_state == reading_intr)
c70c35da 1495 bite = in_8(&via1[SR]);
1da177e4
LT		 1496
1497 /* reset TREQ and wait for TACK to go high */
c70c35da 1498 out_8(&via2[B], in_8(&via2[B]) | TREQ);
1da177e4
LT		 1499 wait_for_ack();
1500
1501 switch (pmu_state) {
1502 case sending:
1503 req = current_req;
1504 if (data_len < 0) {
1505 data_len = req->nbytes - 1;
1506 send_byte(data_len);
1507 break;
1508 }
1509 if (data_index <= data_len) {
1510 send_byte(req->data[data_index++]);
1511 break;
1512 }
1513 req->sent = 1;
1514 data_len = pmu_data_len[req->data[0]][1];
1515 if (data_len == 0) {
1516 pmu_state = idle;
1517 current_req = req->next;
1518 if (req->reply_expected)
1519 req_awaiting_reply = req;
1520 else
1521 return req;
1522 } else {
1523 pmu_state = reading;
1524 data_index = 0;
1525 reply_ptr = req->reply + req->reply_len;
1526 recv_byte();
1527 }
1528 break;
1529
1530 case intack:
1531 data_index = 0;
1532 data_len = -1;
1533 pmu_state = reading_intr;
1534 reply_ptr = interrupt_data[int_data_last];
1535 recv_byte();
1536 if (gpio_irq >= 0 && !gpio_irq_enabled) {
1537 enable_irq(gpio_irq);
1538 gpio_irq_enabled = 1;
1539 }
1540 break;
1541
1542 case reading:
1543 case reading_intr:
1544 if (data_len == -1) {
1545 data_len = bite;
1546 if (bite > 32)
1547 printk(KERN_ERR "PMU: bad reply len %d\n", bite);
1548 } else if (data_index < 32) {
1549 reply_ptr[data_index++] = bite;
1550 }
1551 if (data_index < data_len) {
1552 recv_byte();
1553 break;
1554 }
1555
1556 if (pmu_state == reading_intr) {
1557 pmu_state = idle;
1558 int_data_state[int_data_last] = int_data_ready;
1559 interrupt_data_len[int_data_last] = data_len;
1560 } else {
1561 req = current_req;
1562 /*
1563 * For PMU sleep and freq change requests, we lock the
c03983ac 1564 * PMU until it's explicitly unlocked. This avoids any
1da177e4
LT		 1565 * spurrious event polling getting in
1566 */
1567 current_req = req->next;
1568 req->reply_len += data_index;
1569 if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED)
1570 pmu_state = locked;
1571 else
1572 pmu_state = idle;
1573 return req;
1574 }
1575 break;
1576
1577 default:
1578 printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n",
1579 pmu_state);
1580 }
1581 return NULL;
1582}
1583
aacaf9bd 1584static irqreturn_t
7d12e780 1585via_pmu_interrupt(int irq, void *arg)
1da177e4
LT		 1586{
1587 unsigned long flags;
1588 int intr;
1589 int nloop = 0;
1590 int int_data = -1;
1591 struct adb_request *req = NULL;
1592 int handled = 0;
1593
1594 /* This is a bit brutal, we can probably do better */
1595 spin_lock_irqsave(&pmu_lock, flags);
1596 ++disable_poll;
1597
1598 for (;;) {
c16a85a5
FT		 1599 /* On 68k Macs, VIA interrupts are dispatched individually.
1600 * Unless we are polling, the relevant IRQ flag has already
1601 * been cleared.
1602 */
1603 intr = 0;
1604 if (IS_ENABLED(CONFIG_PPC_PMAC) || !irq) {
1605 intr = in_8(&via1[IFR]) & (SR_INT | CB1_INT);
1606 out_8(&via1[IFR], intr);
1607 }
1608#ifndef CONFIG_PPC_PMAC
1609 switch (irq) {
1610 case IRQ_MAC_ADB_CL:
1611 intr = CB1_INT;
1612 break;
1613 case IRQ_MAC_ADB_SR:
1614 intr = SR_INT;
1615 break;
1616 }
1617#endif
1da177e4
LT		 1618 if (intr == 0)
1619 break;
1620 handled = 1;
1621 if (++nloop > 1000) {
1622 printk(KERN_DEBUG "PMU: stuck in intr loop, "
1623 "intr=%x, ier=%x pmu_state=%d\n",
c70c35da 1624 intr, in_8(&via1[IER]), pmu_state);
1da177e4
LT		 1625 break;
1626 }
1da177e4
LT		 1627 if (intr & CB1_INT) {
1628 adb_int_pending = 1;
6edc22fc 1629 pmu_irq_stats[11]++;
1da177e4
LT		 1630 }
1631 if (intr & SR_INT) {
7d12e780 1632 req = pmu_sr_intr();
1da177e4
LT		 1633 if (req)
1634 break;
1635 }
c16a85a5
FT		 1636#ifndef CONFIG_PPC_PMAC
1637 break;
1638#endif
1da177e4
LT		 1639 }
1640
1641recheck:
1642 if (pmu_state == idle) {
1643 if (adb_int_pending) {
1644 if (int_data_state[0] == int_data_empty)
1645 int_data_last = 0;
1646 else if (int_data_state[1] == int_data_empty)
1647 int_data_last = 1;
1648 else
1649 goto no_free_slot;
1650 pmu_state = intack;
1651 int_data_state[int_data_last] = int_data_fill;
1652 /* Sounds safer to make sure ACK is high before writing.
1653 * This helped kill a problem with ADB and some iBooks
1654 */
1655 wait_for_ack();
1656 send_byte(PMU_INT_ACK);
1657 adb_int_pending = 0;
1658 } else if (current_req)
1659 pmu_start();
1660 }
1661no_free_slot:
1662 /* Mark the oldest buffer for flushing */
1663 if (int_data_state[!int_data_last] == int_data_ready) {
1664 int_data_state[!int_data_last] = int_data_flush;
1665 int_data = !int_data_last;
1666 } else if (int_data_state[int_data_last] == int_data_ready) {
1667 int_data_state[int_data_last] = int_data_flush;
1668 int_data = int_data_last;
1669 }
1670 --disable_poll;
1671 spin_unlock_irqrestore(&pmu_lock, flags);
1672
1673 /* Deal with completed PMU requests outside of the lock */
1674 if (req) {
1675 pmu_done(req);
1676 req = NULL;
1677 }
1678
1679 /* Deal with interrupt datas outside of the lock */
1680 if (int_data >= 0) {
7d12e780 1681 pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data]);
1da177e4
LT		 1682 spin_lock_irqsave(&pmu_lock, flags);
1683 ++disable_poll;
1684 int_data_state[int_data] = int_data_empty;
1685 int_data = -1;
1686 goto recheck;
1687 }
1688
1689 return IRQ_RETVAL(handled);
1690}
1691
aacaf9bd 1692void
1da177e4
LT		 1693pmu_unlock(void)
1694{
1695 unsigned long flags;
1696
1697 spin_lock_irqsave(&pmu_lock, flags);
1698 if (pmu_state == locked)
1699 pmu_state = idle;
1700 adb_int_pending = 1;
1701 spin_unlock_irqrestore(&pmu_lock, flags);
1702}
1703
1704
c16a85a5 1705static __maybe_unused irqreturn_t
7d12e780 1706gpio1_interrupt(int irq, void *arg)
1da177e4
LT		 1707{
1708 unsigned long flags;
1709
1710 if ((in_8(gpio_reg + 0x9) & 0x02) == 0) {
1711 spin_lock_irqsave(&pmu_lock, flags);
1712 if (gpio_irq_enabled > 0) {
1713 disable_irq_nosync(gpio_irq);
1714 gpio_irq_enabled = 0;
1715 }
6edc22fc 1716 pmu_irq_stats[12]++;
1da177e4
LT		 1717 adb_int_pending = 1;
1718 spin_unlock_irqrestore(&pmu_lock, flags);
7d12e780 1719 via_pmu_interrupt(0, NULL);
1da177e4
LT		 1720 return IRQ_HANDLED;
1721 }
1722 return IRQ_NONE;
1723}
1724
aacaf9bd 1725void
1da177e4
LT		 1726pmu_enable_irled(int on)
1727{
1728 struct adb_request req;
1729
c57902d5 1730 if (pmu_state == uninitialized)
1da177e4
LT		 1731 return ;
1732 if (pmu_kind == PMU_KEYLARGO_BASED)
1733 return ;
1734
1735 pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED |
1736 (on ? PMU_POW_ON : PMU_POW_OFF));
1737 pmu_wait_complete(&req);
1738}
1739
0792a2c8
FT		 1740/* Offset between Unix time (1970-based) and Mac time (1904-based) */
1741#define RTC_OFFSET 2082844800
1742
1743time64_t pmu_get_time(void)
1744{
1745 struct adb_request req;
1746 u32 now;
1747
1748 if (pmu_request(&req, NULL, 1, PMU_READ_RTC) < 0)
1749 return 0;
1750 pmu_wait_complete(&req);
1751 if (req.reply_len != 4)
1752 pr_err("%s: got %d byte reply\n", __func__, req.reply_len);
1753 now = (req.reply[0] << 24) + (req.reply[1] << 16) +
1754 (req.reply[2] << 8) + req.reply[3];
1755 return (time64_t)now - RTC_OFFSET;
1756}
1757
1758int pmu_set_rtc_time(struct rtc_time *tm)
1759{
1760 u32 now;
1761 struct adb_request req;
1762
1763 now = lower_32_bits(rtc_tm_to_time64(tm) + RTC_OFFSET);
1764 if (pmu_request(&req, NULL, 5, PMU_SET_RTC,
1765 now >> 24, now >> 16, now >> 8, now) < 0)
1766 return -ENXIO;
1767 pmu_wait_complete(&req);
1768 if (req.reply_len != 0)
1769 pr_err("%s: got %d byte reply\n", __func__, req.reply_len);
1770 return 0;
1771}
1772
aacaf9bd 1773void
1da177e4
LT		 1774pmu_restart(void)
1775{
1776 struct adb_request req;
1777
c57902d5 1778 if (pmu_state == uninitialized)
1da177e4
LT		 1779 return;
1780
1781 local_irq_disable();
1782
1783 drop_interrupts = 1;
1784
1785 if (pmu_kind != PMU_KEYLARGO_BASED) {
1786 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1787 PMU_INT_TICK );
1788 while(!req.complete)
1789 pmu_poll();
1790 }
1791
1792 pmu_request(&req, NULL, 1, PMU_RESET);
1793 pmu_wait_complete(&req);
1794 for (;;)
1795 ;
1796}
1797
aacaf9bd 1798void
1da177e4
LT		 1799pmu_shutdown(void)
1800{
1801 struct adb_request req;
1802
c57902d5 1803 if (pmu_state == uninitialized)
1da177e4
LT		 1804 return;
1805
1806 local_irq_disable();
1807
1808 drop_interrupts = 1;
1809
1810 if (pmu_kind != PMU_KEYLARGO_BASED) {
1811 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1812 PMU_INT_TICK );
1813 pmu_wait_complete(&req);
1814 } else {
1815 /* Disable server mode on shutdown or we'll just
1816 * wake up again
1817 */
1818 pmu_set_server_mode(0);
1819 }
1820
1821 pmu_request(&req, NULL, 5, PMU_SHUTDOWN,
1822 'M', 'A', 'T', 'T');
1823 pmu_wait_complete(&req);
1824 for (;;)
1825 ;
1826}
1827
1828int
1829pmu_present(void)
1830{
c57902d5 1831 return pmu_state != uninitialized;
1da177e4
LT		 1832}
1833
f91266ed 1834#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT		 1835/*
1836 * Put the powerbook to sleep.
1837 */
1838
aacaf9bd 1839static u32 save_via[8];
1da177e4 1840
aacaf9bd 1841static void
1da177e4
LT		 1842save_via_state(void)
1843{
c70c35da
FT		 1844 save_via[0] = in_8(&via1[ANH]);
1845 save_via[1] = in_8(&via1[DIRA]);
1846 save_via[2] = in_8(&via1[B]);
1847 save_via[3] = in_8(&via1[DIRB]);
1848 save_via[4] = in_8(&via1[PCR]);
1849 save_via[5] = in_8(&via1[ACR]);
1850 save_via[6] = in_8(&via1[T1CL]);
1851 save_via[7] = in_8(&via1[T1CH]);
1da177e4 1852}
aacaf9bd 1853static void
1da177e4
LT		 1854restore_via_state(void)
1855{
c70c35da
FT		 1856 out_8(&via1[ANH], save_via[0]);
1857 out_8(&via1[DIRA], save_via[1]);
1858 out_8(&via1[B], save_via[2]);
1859 out_8(&via1[DIRB], save_via[3]);
1860 out_8(&via1[PCR], save_via[4]);
1861 out_8(&via1[ACR], save_via[5]);
1862 out_8(&via1[T1CL], save_via[6]);
1863 out_8(&via1[T1CH], save_via[7]);
1864 out_8(&via1[IER], IER_CLR | 0x7f); /* disable all intrs */
1865 out_8(&via1[IFR], 0x7f); /* clear IFR */
1866 out_8(&via1[IER], IER_SET | SR_INT | CB1_INT);
1da177e4
LT		 1867}
1868
1da177e4
LT		 1869#define GRACKLE_PM (1<<7)
1870#define GRACKLE_DOZE (1<<5)
1871#define GRACKLE_NAP (1<<4)
1872#define GRACKLE_SLEEP (1<<3)
1873
3bea6313 1874static int powerbook_sleep_grackle(void)
1da177e4
LT		 1875{
1876 unsigned long save_l2cr;
1877 unsigned short pmcr1;
1878 struct adb_request req;
1da177e4
LT		 1879 struct pci_dev *grackle;
1880
67c8d326 1881 grackle = pci_get_domain_bus_and_slot(0, 0, 0);
1da177e4
LT		 1882 if (!grackle)
1883 return -ENODEV;
1884
1da177e4
LT		 1885 /* Turn off various things. Darwin does some retry tests here... */
1886 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE);
1887 pmu_wait_complete(&req);
1888 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
1889 PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY);
1890 pmu_wait_complete(&req);
1891
1892 /* For 750, save backside cache setting and disable it */
1893 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
1894
1895 if (!__fake_sleep) {
1896 /* Ask the PMU to put us to sleep */
1897 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
1898 pmu_wait_complete(&req);
1899 }
1900
1901 /* The VIA is supposed not to be restored correctly*/
1902 save_via_state();
1903 /* We shut down some HW */
1904 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
1905
1906 pci_read_config_word(grackle, 0x70, &pmcr1);
1907 /* Apparently, MacOS uses NAP mode for Grackle ??? */
1908 pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP);
1909 pmcr1 |= GRACKLE_PM|GRACKLE_NAP;
1910 pci_write_config_word(grackle, 0x70, pmcr1);
1911
1912 /* Call low-level ASM sleep handler */
1913 if (__fake_sleep)
1914 mdelay(5000);
1915 else
1916 low_sleep_handler();
1917
1918 /* We're awake again, stop grackle PM */
1919 pci_read_config_word(grackle, 0x70, &pmcr1);
1920 pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP);
1921 pci_write_config_word(grackle, 0x70, pmcr1);
1922
c78f8305
AC		 1923 pci_dev_put(grackle);
1924
1da177e4
LT		 1925 /* Make sure the PMU is idle */
1926 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
1927 restore_via_state();
1928
1929 /* Restore L2 cache */
1930 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
1931 _set_L2CR(save_l2cr);
1932
1933 /* Restore userland MMU context */
d2adba3f 1934 switch_mmu_context(NULL, current->active_mm, NULL);
1da177e4
LT		 1935
1936 /* Power things up */
1937 pmu_unlock();
1938 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
1939 pmu_wait_complete(&req);
1940 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0,
1941 PMU_POW0_ON|PMU_POW0_HARD_DRIVE);
1942 pmu_wait_complete(&req);
1943 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
1944 PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY);
1945 pmu_wait_complete(&req);
1946
1da177e4
LT		 1947 return 0;
1948}
1949
aacaf9bd 1950static int
1da177e4
LT		 1951powerbook_sleep_Core99(void)
1952{
1953 unsigned long save_l2cr;
1954 unsigned long save_l3cr;
1955 struct adb_request req;
1da177e4
LT		 1956
1957 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) {
1958 printk(KERN_ERR "Sleep mode not supported on this machine\n");
1959 return -ENOSYS;
1960 }
1961
1962 if (num_online_cpus() > 1 || cpu_is_offline(0))
1963 return -EAGAIN;
1964
b16eeb47
BH		 1965 /* Stop environment and ADB interrupts */
1966 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
1967 pmu_wait_complete(&req);
1da177e4
LT		 1968
1969 /* Tell PMU what events will wake us up */
1970 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS,
1971 0xff, 0xff);
1972 pmu_wait_complete(&req);
1973 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS,
1974 0, PMU_PWR_WAKEUP_KEY |
1975 (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0));
1976 pmu_wait_complete(&req);
1977
1978 /* Save the state of the L2 and L3 caches */
1979 save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
1980 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
1981
1982 if (!__fake_sleep) {
1983 /* Ask the PMU to put us to sleep */
1984 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
1985 pmu_wait_complete(&req);
1986 }
1987
1988 /* The VIA is supposed not to be restored correctly*/
1989 save_via_state();
1990
1991 /* Shut down various ASICs. There's a chance that we can no longer
1992 * talk to the PMU after this, so I moved it to _after_ sending the
1993 * sleep command to it. Still need to be checked.
1994 */
1995 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
1996
1997 /* Call low-level ASM sleep handler */
1998 if (__fake_sleep)
1999 mdelay(5000);
2000 else
2001 low_sleep_handler();
2002
2003 /* Restore Apple core ASICs state */
2004 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
2005
2006 /* Restore VIA */
2007 restore_via_state();
2008
0086b5ec
BH		 2009 /* tweak LPJ before cpufreq is there */
2010 loops_per_jiffy *= 2;
2011
1da177e4
LT		 2012 /* Restore video */
2013 pmac_call_early_video_resume();
2014
2015 /* Restore L2 cache */
2016 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
2017 _set_L2CR(save_l2cr);
2018 /* Restore L3 cache */
2019 if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
2020 _set_L3CR(save_l3cr);
2021
2022 /* Restore userland MMU context */
d2adba3f 2023 switch_mmu_context(NULL, current->active_mm, NULL);
1da177e4
LT		 2024
2025 /* Tell PMU we are ready */
2026 pmu_unlock();
2027 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
2028 pmu_wait_complete(&req);
2029 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
2030 pmu_wait_complete(&req);
2031
0086b5ec
BH		 2032 /* Restore LPJ, cpufreq will adjust the cpu frequency */
2033 loops_per_jiffy /= 2;
2034
1da177e4
LT		 2035 return 0;
2036}
2037
2038#define PB3400_MEM_CTRL 0xf8000000
2039#define PB3400_MEM_CTRL_SLEEP 0x70
2040
887ef35a
PM		 2041static void __iomem *pb3400_mem_ctrl;
2042
2043static void powerbook_sleep_init_3400(void)
2044{
2045 /* map in the memory controller registers */
2046 pb3400_mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100);
2047 if (pb3400_mem_ctrl == NULL)
2048 printk(KERN_WARNING "ioremap failed: sleep won't be possible");
2049}
2050
2051static int powerbook_sleep_3400(void)
1da177e4 2052{
f91266ed 2053 int i, x;
1da177e4 2054 unsigned int hid0;
887ef35a 2055 unsigned long msr;
1da177e4 2056 struct adb_request sleep_req;
1da177e4
LT		 2057 unsigned int __iomem *mem_ctrl_sleep;
2058
887ef35a 2059 if (pb3400_mem_ctrl == NULL)
1da177e4 2060 return -ENOMEM;
887ef35a 2061 mem_ctrl_sleep = pb3400_mem_ctrl + PB3400_MEM_CTRL_SLEEP;
1da177e4 2062
1da177e4
LT		 2063 /* Set the memory controller to keep the memory refreshed
2064 while we're asleep */
2065 for (i = 0x403f; i >= 0x4000; --i) {
2066 out_be32(mem_ctrl_sleep, i);
2067 do {
2068 x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff;
2069 } while (x == 0);
2070 if (x >= 0x100)
2071 break;
2072 }
2073
2074 /* Ask the PMU to put us to sleep */
2075 pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
887ef35a
PM		 2076 pmu_wait_complete(&sleep_req);
2077 pmu_unlock();
1da177e4 2078
887ef35a 2079 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
1da177e4 2080
1da177e4
LT		 2081 asleep = 1;
2082
2083 /* Put the CPU into sleep mode */
21fe3301 2084 hid0 = mfspr(SPRN_HID0);
1da177e4 2085 hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP;
21fe3301 2086 mtspr(SPRN_HID0, hid0);
887ef35a
PM		 2087 local_irq_enable();
2088 msr = mfmsr() | MSR_POW;
2089 while (asleep) {
2090 mb();
2091 mtmsr(msr);
2092 isync();
2093 }
2094 local_irq_disable();
1da177e4
LT		 2095
2096 /* OK, we're awake again, start restoring things */
2097 out_be32(mem_ctrl_sleep, 0x3f);
887ef35a 2098 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
1da177e4 2099
1da177e4
LT		 2100 return 0;
2101}
2102
f91266ed 2103#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
8c870933 2104
1da177e4
LT		 2105/*
2106 * Support for /dev/pmu device
2107 */
2108#define RB_SIZE 0x10
2109struct pmu_private {
2110 struct list_head list;
2111 int rb_get;
2112 int rb_put;
2113 struct rb_entry {
2114 unsigned short len;
2115 unsigned char data[16];
2116 } rb_buf[RB_SIZE];
2117 wait_queue_head_t wait;
2118 spinlock_t lock;
2119#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2120 int backlight_locker;
4b755999 2121#endif
1da177e4
LT		 2122};
2123
2124static LIST_HEAD(all_pmu_pvt);
aacaf9bd 2125static DEFINE_SPINLOCK(all_pvt_lock);
1da177e4 2126
aacaf9bd 2127static void
1da177e4
LT		 2128pmu_pass_intr(unsigned char *data, int len)
2129{
2130 struct pmu_private *pp;
2131 struct list_head *list;
2132 int i;
2133 unsigned long flags;
2134
2135 if (len > sizeof(pp->rb_buf[0].data))
2136 len = sizeof(pp->rb_buf[0].data);
2137 spin_lock_irqsave(&all_pvt_lock, flags);
2138 for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) {
2139 pp = list_entry(list, struct pmu_private, list);
2140 spin_lock(&pp->lock);
2141 i = pp->rb_put + 1;
2142 if (i >= RB_SIZE)
2143 i = 0;
2144 if (i != pp->rb_get) {
2145 struct rb_entry *rp = &pp->rb_buf[pp->rb_put];
2146 rp->len = len;
2147 memcpy(rp->data, data, len);
2148 pp->rb_put = i;
2149 wake_up_interruptible(&pp->wait);
2150 }
2151 spin_unlock(&pp->lock);
2152 }
2153 spin_unlock_irqrestore(&all_pvt_lock, flags);
2154}
2155
aacaf9bd 2156static int
1da177e4
LT		 2157pmu_open(struct inode *inode, struct file *file)
2158{
2159 struct pmu_private *pp;
2160 unsigned long flags;
2161
2162 pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL);
d8731527 2163 if (!pp)
1da177e4
LT		 2164 return -ENOMEM;
2165 pp->rb_get = pp->rb_put = 0;
2166 spin_lock_init(&pp->lock);
2167 init_waitqueue_head(&pp->wait);
d851b6e0 2168 mutex_lock(&pmu_info_proc_mutex);
1da177e4
LT		 2169 spin_lock_irqsave(&all_pvt_lock, flags);
2170#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2171 pp->backlight_locker = 0;
4b755999 2172#endif
1da177e4
LT		 2173 list_add(&pp->list, &all_pmu_pvt);
2174 spin_unlock_irqrestore(&all_pvt_lock, flags);
2175 file->private_data = pp;
d851b6e0 2176 mutex_unlock(&pmu_info_proc_mutex);
1da177e4
LT		 2177 return 0;
2178}
2179
aacaf9bd 2180static ssize_t
1da177e4
LT		 2181pmu_read(struct file *file, char __user *buf,
2182 size_t count, loff_t *ppos)
2183{
2184 struct pmu_private *pp = file->private_data;
2185 DECLARE_WAITQUEUE(wait, current);
2186 unsigned long flags;
2187 int ret = 0;
2188
d8731527 2189 if (count < 1 || !pp)
1da177e4 2190 return -EINVAL;
96d4f267 2191 if (!access_ok(buf, count))
1da177e4
LT		 2192 return -EFAULT;
2193
2194 spin_lock_irqsave(&pp->lock, flags);
2195 add_wait_queue(&pp->wait, &wait);
111fbc68 2196 set_current_state(TASK_INTERRUPTIBLE);
1da177e4
LT		 2197
2198 for (;;) {
2199 ret = -EAGAIN;
2200 if (pp->rb_get != pp->rb_put) {
2201 int i = pp->rb_get;
2202 struct rb_entry *rp = &pp->rb_buf[i];
2203 ret = rp->len;
2204 spin_unlock_irqrestore(&pp->lock, flags);
2205 if (ret > count)
2206 ret = count;
2207 if (ret > 0 && copy_to_user(buf, rp->data, ret))
2208 ret = -EFAULT;
2209 if (++i >= RB_SIZE)
2210 i = 0;
2211 spin_lock_irqsave(&pp->lock, flags);
2212 pp->rb_get = i;
2213 }
2214 if (ret >= 0)
2215 break;
2216 if (file->f_flags & O_NONBLOCK)
2217 break;
2218 ret = -ERESTARTSYS;
2219 if (signal_pending(current))
2220 break;
2221 spin_unlock_irqrestore(&pp->lock, flags);
2222 schedule();
2223 spin_lock_irqsave(&pp->lock, flags);
2224 }
111fbc68 2225 __set_current_state(TASK_RUNNING);
1da177e4
LT		 2226 remove_wait_queue(&pp->wait, &wait);
2227 spin_unlock_irqrestore(&pp->lock, flags);
2228
2229 return ret;
2230}
2231
aacaf9bd 2232static ssize_t
1da177e4
LT		 2233pmu_write(struct file *file, const char __user *buf,
2234 size_t count, loff_t *ppos)
2235{
2236 return 0;
2237}
2238
afc9a42b 2239static __poll_t
1da177e4
LT		 2240pmu_fpoll(struct file *filp, poll_table *wait)
2241{
2242 struct pmu_private *pp = filp->private_data;
afc9a42b 2243 __poll_t mask = 0;
1da177e4
LT		 2244 unsigned long flags;
2245
d8731527 2246 if (!pp)
1da177e4
LT		 2247 return 0;
2248 poll_wait(filp, &pp->wait, wait);
2249 spin_lock_irqsave(&pp->lock, flags);
2250 if (pp->rb_get != pp->rb_put)
a9a08845 2251 mask |= EPOLLIN;
1da177e4
LT		 2252 spin_unlock_irqrestore(&pp->lock, flags);
2253 return mask;
2254}
2255
aacaf9bd 2256static int
1da177e4
LT		 2257pmu_release(struct inode *inode, struct file *file)
2258{
2259 struct pmu_private *pp = file->private_data;
2260 unsigned long flags;
2261
d8731527 2262 if (pp) {
1da177e4
LT		 2263 file->private_data = NULL;
2264 spin_lock_irqsave(&all_pvt_lock, flags);
2265 list_del(&pp->list);
2266 spin_unlock_irqrestore(&all_pvt_lock, flags);
4b755999 2267
1da177e4 2268#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
4b755999
MH		 2269 if (pp->backlight_locker)
2270 pmac_backlight_enable();
2271#endif
2272
1da177e4
LT		 2273 kfree(pp);
2274 }
1da177e4
LT		 2275 return 0;
2276}
2277
f91266ed 2278#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
7ac5dde9 2279static void pmac_suspend_disable_irqs(void)
f91266ed 2280{
f91266ed
JB		 2281 /* Call platform functions marked "on sleep" */
2282 pmac_pfunc_i2c_suspend();
2283 pmac_pfunc_base_suspend();
f91266ed
JB		 2284}
2285
2286static int powerbook_sleep(suspend_state_t state)
2287{
2288 int error = 0;
2289
2290 /* Wait for completion of async requests */
2291 while (!batt_req.complete)
2292 pmu_poll();
2293
2294 /* Giveup the lazy FPU & vec so we don't have to back them
2295 * up from the low level code
2296 */
2297 enable_kernel_fp();
2298
2299#ifdef CONFIG_ALTIVEC
2300 if (cpu_has_feature(CPU_FTR_ALTIVEC))
2301 enable_kernel_altivec();
2302#endif /* CONFIG_ALTIVEC */
2303
2304 switch (pmu_kind) {
2305 case PMU_OHARE_BASED:
2306 error = powerbook_sleep_3400();
2307 break;
2308 case PMU_HEATHROW_BASED:
2309 case PMU_PADDINGTON_BASED:
2310 error = powerbook_sleep_grackle();
2311 break;
2312 case PMU_KEYLARGO_BASED:
2313 error = powerbook_sleep_Core99();
2314 break;
2315 default:
2316 return -ENOSYS;
2317 }
2318
2319 if (error)
2320 return error;
2321
2322 mdelay(100);
2323
f91266ed
JB		 2324 return 0;
2325}
2326
7ac5dde9 2327static void pmac_suspend_enable_irqs(void)
f91266ed
JB		 2328{
2329 /* Force a poll of ADB interrupts */
2330 adb_int_pending = 1;
2331 via_pmu_interrupt(0, NULL);
2332
f91266ed 2333 mdelay(10);
f91266ed
JB		 2334
2335 /* Call platform functions marked "on wake" */
2336 pmac_pfunc_base_resume();
2337 pmac_pfunc_i2c_resume();
2338}
2339
2340static int pmu_sleep_valid(suspend_state_t state)
2341{
2342 return state == PM_SUSPEND_MEM
2343 && (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) >= 0);
2344}
2345
2f55ac07 2346static const struct platform_suspend_ops pmu_pm_ops = {
f91266ed
JB		 2347 .enter = powerbook_sleep,
2348 .valid = pmu_sleep_valid,
2349};
2350
2351static int register_pmu_pm_ops(void)
2352{
7ac5dde9
SW		 2353 if (pmu_kind == PMU_OHARE_BASED)
2354 powerbook_sleep_init_3400();
2355 ppc_md.suspend_disable_irqs = pmac_suspend_disable_irqs;
2356 ppc_md.suspend_enable_irqs = pmac_suspend_enable_irqs;
f91266ed
JB		 2357 suspend_set_ops(&pmu_pm_ops);
2358
2359 return 0;
2360}
2361
2362device_initcall(register_pmu_pm_ops);
2363#endif
2364
55929332 2365static int pmu_ioctl(struct file *filp,
1da177e4
LT		 2366 u_int cmd, u_long arg)
2367{
1da177e4 2368 __u32 __user *argp = (__u32 __user *)arg;
8c870933 2369 int error = -EINVAL;
1da177e4
LT		 2370
2371 switch (cmd) {
c16a85a5 2372#ifdef CONFIG_PPC_PMAC
1da177e4
LT		 2373 case PMU_IOC_SLEEP:
2374 if (!capable(CAP_SYS_ADMIN))
2375 return -EACCES;
f91266ed 2376 return pm_suspend(PM_SUSPEND_MEM);
1da177e4 2377 case PMU_IOC_CAN_SLEEP:
f91266ed 2378 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) < 0)
1da177e4
LT		 2379 return put_user(0, argp);
2380 else
2381 return put_user(1, argp);
c16a85a5 2382#endif
1da177e4 2383
5474c120
MH		 2384#ifdef CONFIG_PMAC_BACKLIGHT_LEGACY
2385 /* Compatibility ioctl's for backlight */
1da177e4 2386 case PMU_IOC_GET_BACKLIGHT:
5474c120
MH		 2387 {
2388 int brightness;
2389
5474c120
MH		 2390 brightness = pmac_backlight_get_legacy_brightness();
2391 if (brightness < 0)
2392 return brightness;
2393 else
2394 return put_user(brightness, argp);
2395
2396 }
1da177e4
LT		 2397 case PMU_IOC_SET_BACKLIGHT:
2398 {
5474c120
MH		 2399 int brightness;
2400
5474c120
MH		 2401 error = get_user(brightness, argp);
2402 if (error)
2403 return error;
2404
2405 return pmac_backlight_set_legacy_brightness(brightness);
1da177e4
LT		 2406 }
2407#ifdef CONFIG_INPUT_ADBHID
2408 case PMU_IOC_GRAB_BACKLIGHT: {
8c870933 2409 struct pmu_private *pp = filp->private_data;
8c870933 2410
1da177e4
LT		 2411 if (pp->backlight_locker)
2412 return 0;
4b755999 2413
1da177e4 2414 pp->backlight_locker = 1;
4b755999
MH		 2415 pmac_backlight_disable();
2416
1da177e4
LT		 2417 return 0;
2418 }
2419#endif /* CONFIG_INPUT_ADBHID */
5474c120 2420#endif /* CONFIG_PMAC_BACKLIGHT_LEGACY */
4b755999 2421
1da177e4
LT		 2422 case PMU_IOC_GET_MODEL:
2423 return put_user(pmu_kind, argp);
2424 case PMU_IOC_HAS_ADB:
2425 return put_user(pmu_has_adb, argp);
2426 }
8c870933 2427 return error;
1da177e4
LT		 2428}
2429
55929332
AB		 2430static long pmu_unlocked_ioctl(struct file *filp,
2431 u_int cmd, u_long arg)
2432{
2433 int ret;
2434
d851b6e0 2435 mutex_lock(&pmu_info_proc_mutex);
55929332 2436 ret = pmu_ioctl(filp, cmd, arg);
d851b6e0 2437 mutex_unlock(&pmu_info_proc_mutex);
55929332
AB		 2438
2439 return ret;
2440}
2441
4cc4587f
AS		 2442#ifdef CONFIG_COMPAT
2443#define PMU_IOC_GET_BACKLIGHT32 _IOR('B', 1, compat_size_t)
2444#define PMU_IOC_SET_BACKLIGHT32 _IOW('B', 2, compat_size_t)
2445#define PMU_IOC_GET_MODEL32 _IOR('B', 3, compat_size_t)
2446#define PMU_IOC_HAS_ADB32 _IOR('B', 4, compat_size_t)
2447#define PMU_IOC_CAN_SLEEP32 _IOR('B', 5, compat_size_t)
2448#define PMU_IOC_GRAB_BACKLIGHT32 _IOR('B', 6, compat_size_t)
2449
2450static long compat_pmu_ioctl (struct file *filp, u_int cmd, u_long arg)
2451{
2452 switch (cmd) {
2453 case PMU_IOC_SLEEP:
2454 break;
2455 case PMU_IOC_GET_BACKLIGHT32:
2456 cmd = PMU_IOC_GET_BACKLIGHT;
2457 break;
2458 case PMU_IOC_SET_BACKLIGHT32:
2459 cmd = PMU_IOC_SET_BACKLIGHT;
2460 break;
2461 case PMU_IOC_GET_MODEL32:
2462 cmd = PMU_IOC_GET_MODEL;
2463 break;
2464 case PMU_IOC_HAS_ADB32:
2465 cmd = PMU_IOC_HAS_ADB;
2466 break;
2467 case PMU_IOC_CAN_SLEEP32:
2468 cmd = PMU_IOC_CAN_SLEEP;
2469 break;
2470 case PMU_IOC_GRAB_BACKLIGHT32:
2471 cmd = PMU_IOC_GRAB_BACKLIGHT;
2472 break;
2473 default:
2474 return -ENOIOCTLCMD;
2475 }
2476 return pmu_unlocked_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
2477}
2478#endif
2479
fa027c2a 2480static const struct file_operations pmu_device_fops = {
1da177e4
LT		 2481 .read = pmu_read,
2482 .write = pmu_write,
2483 .poll = pmu_fpoll,
55929332 2484 .unlocked_ioctl = pmu_unlocked_ioctl,
4cc4587f
AS		 2485#ifdef CONFIG_COMPAT
2486 .compat_ioctl = compat_pmu_ioctl,
2487#endif
1da177e4
LT		 2488 .open = pmu_open,
2489 .release = pmu_release,
6038f373 2490 .llseek = noop_llseek,
1da177e4
LT		 2491};
2492
aacaf9bd 2493static struct miscdevice pmu_device = {
1da177e4
LT		 2494 PMU_MINOR, "pmu", &pmu_device_fops
2495};
2496
8c870933 2497static int pmu_device_init(void)
1da177e4 2498{
c57902d5 2499 if (pmu_state == uninitialized)
8c870933 2500 return 0;
1da177e4
LT		 2501 if (misc_register(&pmu_device) < 0)
2502 printk(KERN_ERR "via-pmu: cannot register misc device.\n");
8c870933 2503 return 0;
1da177e4 2504}
8c870933
BH		 2505device_initcall(pmu_device_init);
2506
1da177e4
LT		 2507
2508#ifdef DEBUG_SLEEP
aacaf9bd 2509static inline void
c70c35da 2510polled_handshake(void)
1da177e4 2511{
c70c35da
FT		 2512 via2[B] &= ~TREQ; eieio();
2513 while ((via2[B] & TACK) != 0)
1da177e4 2514 ;
c70c35da
FT		 2515 via2[B] |= TREQ; eieio();
2516 while ((via2[B] & TACK) == 0)
1da177e4
LT		 2517 ;
2518}
2519
aacaf9bd 2520static inline void
c70c35da 2521polled_send_byte(int x)
1da177e4 2522{
c70c35da
FT		 2523 via1[ACR] |= SR_OUT | SR_EXT; eieio();
2524 via1[SR] = x; eieio();
2525 polled_handshake();
1da177e4
LT		 2526}
2527
aacaf9bd 2528static inline int
c70c35da 2529polled_recv_byte(void)
1da177e4
LT		 2530{
2531 int x;
2532
c70c35da
FT		 2533 via1[ACR] = (via1[ACR] & ~SR_OUT) | SR_EXT; eieio();
2534 x = via1[SR]; eieio();
2535 polled_handshake();
2536 x = via1[SR]; eieio();
1da177e4
LT		 2537 return x;
2538}
2539
aacaf9bd 2540int
1da177e4
LT		 2541pmu_polled_request(struct adb_request *req)
2542{
2543 unsigned long flags;
2544 int i, l, c;
1da177e4
LT		 2545
2546 req->complete = 1;
2547 c = req->data[0];
2548 l = pmu_data_len[c][0];
2549 if (l >= 0 && req->nbytes != l + 1)
2550 return -EINVAL;
2551
2552 local_irq_save(flags);
2553 while (pmu_state != idle)
2554 pmu_poll();
2555
c70c35da 2556 while ((via2[B] & TACK) == 0)
1da177e4 2557 ;
c70c35da 2558 polled_send_byte(c);
1da177e4
LT		 2559 if (l < 0) {
2560 l = req->nbytes - 1;
c70c35da 2561 polled_send_byte(l);
1da177e4
LT		 2562 }
2563 for (i = 1; i <= l; ++i)
c70c35da 2564 polled_send_byte(req->data[i]);
1da177e4
LT		 2565
2566 l = pmu_data_len[c][1];
2567 if (l < 0)
c70c35da 2568 l = polled_recv_byte();
1da177e4 2569 for (i = 0; i < l; ++i)
c70c35da 2570 req->reply[i + req->reply_len] = polled_recv_byte();
1da177e4
LT		 2571
2572 if (req->done)
2573 (*req->done)(req);
2574
2575 local_irq_restore(flags);
2576 return 0;
2577}
1da177e4 2578
f91266ed
JB		 2579/* N.B. This doesn't work on the 3400 */
2580void pmu_blink(int n)
2581{
2582 struct adb_request req;
1da177e4 2583
f91266ed 2584 memset(&req, 0, sizeof(req));
1da177e4 2585
f91266ed
JB		 2586 for (; n > 0; --n) {
2587 req.nbytes = 4;
2588 req.done = NULL;
2589 req.data[0] = 0xee;
2590 req.data[1] = 4;
2591 req.data[2] = 0;
2592 req.data[3] = 1;
2593 req.reply[0] = ADB_RET_OK;
2594 req.reply_len = 1;
2595 req.reply_expected = 0;
2596 pmu_polled_request(&req);
2597 mdelay(50);
2598 req.nbytes = 4;
2599 req.done = NULL;
2600 req.data[0] = 0xee;
2601 req.data[1] = 4;
2602 req.data[2] = 0;
2603 req.data[3] = 0;
2604 req.reply[0] = ADB_RET_OK;
2605 req.reply_len = 1;
2606 req.reply_expected = 0;
2607 pmu_polled_request(&req);
2608 mdelay(50);
2609 }
2610 mdelay(50);
2611}
2612#endif /* DEBUG_SLEEP */
1da177e4 2613
f91266ed 2614#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
f596575e 2615int pmu_sys_suspended;
1da177e4 2616
e83b906c 2617static int pmu_syscore_suspend(void)
1da177e4 2618{
e83b906c 2619 /* Suspend PMU event interrupts */
1da177e4 2620 pmu_suspend();
1da177e4 2621 pmu_sys_suspended = 1;
0094f2cd
BH		 2622
2623#ifdef CONFIG_PMAC_BACKLIGHT
2624 /* Tell backlight code not to muck around with the chip anymore */
2625 pmu_backlight_set_sleep(1);
2626#endif
2627
1da177e4
LT		 2628 return 0;
2629}
2630
e83b906c 2631static void pmu_syscore_resume(void)
1da177e4
LT		 2632{
2633 struct adb_request req;
2634
2635 if (!pmu_sys_suspended)
e83b906c 2636 return;
1da177e4
LT		 2637
2638 /* Tell PMU we are ready */
2639 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
2640 pmu_wait_complete(&req);
2641
0094f2cd
BH		 2642#ifdef CONFIG_PMAC_BACKLIGHT
2643 /* Tell backlight code it can use the chip again */
2644 pmu_backlight_set_sleep(0);
2645#endif
1da177e4
LT		 2646 /* Resume PMU event interrupts */
2647 pmu_resume();
1da177e4 2648 pmu_sys_suspended = 0;
1da177e4
LT		 2649}
2650
e83b906c
BH		 2651static struct syscore_ops pmu_syscore_ops = {
2652 .suspend = pmu_syscore_suspend,
2653 .resume = pmu_syscore_resume,
1da177e4
LT		 2654};
2655
e83b906c 2656static int pmu_syscore_register(void)
1da177e4 2657{
e83b906c 2658 register_syscore_ops(&pmu_syscore_ops);
1da177e4 2659
1da177e4
LT		 2660 return 0;
2661}
e83b906c
BH		 2662subsys_initcall(pmu_syscore_register);
2663#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4
LT		 2664
2665EXPORT_SYMBOL(pmu_request);
730745a5 2666EXPORT_SYMBOL(pmu_queue_request);
1da177e4
LT		 2667EXPORT_SYMBOL(pmu_poll);
2668EXPORT_SYMBOL(pmu_poll_adb);
2669EXPORT_SYMBOL(pmu_wait_complete);
2670EXPORT_SYMBOL(pmu_suspend);
2671EXPORT_SYMBOL(pmu_resume);
2672EXPORT_SYMBOL(pmu_unlock);
620a2459 2673#if defined(CONFIG_PPC32)
1da177e4
LT		 2674EXPORT_SYMBOL(pmu_enable_irled);
2675EXPORT_SYMBOL(pmu_battery_count);
2676EXPORT_SYMBOL(pmu_batteries);
2677EXPORT_SYMBOL(pmu_power_flags);
f91266ed 2678#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4 2679
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