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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Device driver for the via-pmu on Apple Powermacs. | |
3 | * | |
4 | * The VIA (versatile interface adapter) interfaces to the PMU, | |
5 | * a 6805 microprocessor core whose primary function is to control | |
6 | * battery charging and system power on the PowerBook 3400 and 2400. | |
7 | * The PMU also controls the ADB (Apple Desktop Bus) which connects | |
8 | * to the keyboard and mouse, as well as the non-volatile RAM | |
9 | * and the RTC (real time clock) chip. | |
10 | * | |
11 | * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi. | |
12 | * Copyright (C) 2001-2002 Benjamin Herrenschmidt | |
13 | * | |
14 | * THIS DRIVER IS BECOMING A TOTAL MESS ! | |
15 | * - Cleanup atomically disabling reply to PMU events after | |
16 | * a sleep or a freq. switch | |
17 | * - Move sleep code out of here to pmac_pm, merge into new | |
18 | * common PM infrastructure | |
1da177e4 LT |
19 | * - Save/Restore PCI space properly |
20 | * | |
21 | */ | |
22 | #include <stdarg.h> | |
1da177e4 LT |
23 | #include <linux/types.h> |
24 | #include <linux/errno.h> | |
25 | #include <linux/kernel.h> | |
26 | #include <linux/delay.h> | |
27 | #include <linux/sched.h> | |
28 | #include <linux/miscdevice.h> | |
29 | #include <linux/blkdev.h> | |
30 | #include <linux/pci.h> | |
31 | #include <linux/slab.h> | |
32 | #include <linux/poll.h> | |
33 | #include <linux/adb.h> | |
34 | #include <linux/pmu.h> | |
35 | #include <linux/cuda.h> | |
1da177e4 LT |
36 | #include <linux/module.h> |
37 | #include <linux/spinlock.h> | |
38 | #include <linux/pm.h> | |
39 | #include <linux/proc_fs.h> | |
40 | #include <linux/init.h> | |
41 | #include <linux/interrupt.h> | |
42 | #include <linux/device.h> | |
43 | #include <linux/sysdev.h> | |
7dfb7103 | 44 | #include <linux/freezer.h> |
1da177e4 | 45 | #include <linux/syscalls.h> |
6002f544 | 46 | #include <linux/suspend.h> |
1da177e4 LT |
47 | #include <linux/cpu.h> |
48 | #include <asm/prom.h> | |
49 | #include <asm/machdep.h> | |
50 | #include <asm/io.h> | |
51 | #include <asm/pgtable.h> | |
52 | #include <asm/system.h> | |
53 | #include <asm/sections.h> | |
54 | #include <asm/irq.h> | |
55 | #include <asm/pmac_feature.h> | |
5b9ca526 BH |
56 | #include <asm/pmac_pfunc.h> |
57 | #include <asm/pmac_low_i2c.h> | |
1da177e4 LT |
58 | #include <asm/uaccess.h> |
59 | #include <asm/mmu_context.h> | |
60 | #include <asm/cputable.h> | |
61 | #include <asm/time.h> | |
1da177e4 | 62 | #include <asm/backlight.h> |
1da177e4 | 63 | |
9e8e30a0 JB |
64 | #include "via-pmu-event.h" |
65 | ||
1da177e4 | 66 | /* Some compile options */ |
1da177e4 | 67 | #define DEBUG_SLEEP |
1da177e4 LT |
68 | |
69 | /* Misc minor number allocated for /dev/pmu */ | |
70 | #define PMU_MINOR 154 | |
71 | ||
72 | /* How many iterations between battery polls */ | |
73 | #define BATTERY_POLLING_COUNT 2 | |
74 | ||
75 | static volatile unsigned char __iomem *via; | |
76 | ||
77 | /* VIA registers - spaced 0x200 bytes apart */ | |
78 | #define RS 0x200 /* skip between registers */ | |
79 | #define B 0 /* B-side data */ | |
80 | #define A RS /* A-side data */ | |
81 | #define DIRB (2*RS) /* B-side direction (1=output) */ | |
82 | #define DIRA (3*RS) /* A-side direction (1=output) */ | |
83 | #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */ | |
84 | #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */ | |
85 | #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */ | |
86 | #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */ | |
87 | #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */ | |
88 | #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */ | |
89 | #define SR (10*RS) /* Shift register */ | |
90 | #define ACR (11*RS) /* Auxiliary control register */ | |
91 | #define PCR (12*RS) /* Peripheral control register */ | |
92 | #define IFR (13*RS) /* Interrupt flag register */ | |
93 | #define IER (14*RS) /* Interrupt enable register */ | |
94 | #define ANH (15*RS) /* A-side data, no handshake */ | |
95 | ||
96 | /* Bits in B data register: both active low */ | |
97 | #define TACK 0x08 /* Transfer acknowledge (input) */ | |
98 | #define TREQ 0x10 /* Transfer request (output) */ | |
99 | ||
100 | /* Bits in ACR */ | |
101 | #define SR_CTRL 0x1c /* Shift register control bits */ | |
102 | #define SR_EXT 0x0c /* Shift on external clock */ | |
103 | #define SR_OUT 0x10 /* Shift out if 1 */ | |
104 | ||
105 | /* Bits in IFR and IER */ | |
106 | #define IER_SET 0x80 /* set bits in IER */ | |
107 | #define IER_CLR 0 /* clear bits in IER */ | |
108 | #define SR_INT 0x04 /* Shift register full/empty */ | |
109 | #define CB2_INT 0x08 | |
110 | #define CB1_INT 0x10 /* transition on CB1 input */ | |
111 | ||
112 | static volatile enum pmu_state { | |
113 | idle, | |
114 | sending, | |
115 | intack, | |
116 | reading, | |
117 | reading_intr, | |
118 | locked, | |
119 | } pmu_state; | |
120 | ||
121 | static volatile enum int_data_state { | |
122 | int_data_empty, | |
123 | int_data_fill, | |
124 | int_data_ready, | |
125 | int_data_flush | |
126 | } int_data_state[2] = { int_data_empty, int_data_empty }; | |
127 | ||
128 | static struct adb_request *current_req; | |
129 | static struct adb_request *last_req; | |
130 | static struct adb_request *req_awaiting_reply; | |
131 | static unsigned char interrupt_data[2][32]; | |
132 | static int interrupt_data_len[2]; | |
133 | static int int_data_last; | |
134 | static unsigned char *reply_ptr; | |
135 | static int data_index; | |
136 | static int data_len; | |
137 | static volatile int adb_int_pending; | |
138 | static volatile int disable_poll; | |
1da177e4 LT |
139 | static struct device_node *vias; |
140 | static int pmu_kind = PMU_UNKNOWN; | |
87275856 | 141 | static int pmu_fully_inited; |
1da177e4 | 142 | static int pmu_has_adb; |
51d3082f | 143 | static struct device_node *gpio_node; |
87275856 | 144 | static unsigned char __iomem *gpio_reg; |
0ebfff14 | 145 | static int gpio_irq = NO_IRQ; |
1da177e4 | 146 | static int gpio_irq_enabled = -1; |
87275856 | 147 | static volatile int pmu_suspended; |
1da177e4 LT |
148 | static spinlock_t pmu_lock; |
149 | static u8 pmu_intr_mask; | |
150 | static int pmu_version; | |
151 | static int drop_interrupts; | |
e120e8d0 | 152 | #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_PPC32) |
1da177e4 | 153 | static int option_lid_wakeup = 1; |
e120e8d0 OH |
154 | #endif /* CONFIG_PM_SLEEP && CONFIG_PPC32 */ |
155 | #if (defined(CONFIG_PM_SLEEP)&&defined(CONFIG_PPC32))||defined(CONFIG_PMAC_BACKLIGHT_LEGACY) | |
a04c8780 | 156 | static int sleep_in_progress; |
57ae595f | 157 | #endif |
1da177e4 LT |
158 | static unsigned long async_req_locks; |
159 | static unsigned int pmu_irq_stats[11]; | |
160 | ||
161 | static struct proc_dir_entry *proc_pmu_root; | |
162 | static struct proc_dir_entry *proc_pmu_info; | |
163 | static struct proc_dir_entry *proc_pmu_irqstats; | |
164 | static struct proc_dir_entry *proc_pmu_options; | |
165 | static int option_server_mode; | |
166 | ||
1da177e4 LT |
167 | int pmu_battery_count; |
168 | int pmu_cur_battery; | |
a334bdbd | 169 | unsigned int pmu_power_flags = PMU_PWR_AC_PRESENT; |
1da177e4 LT |
170 | struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES]; |
171 | static int query_batt_timer = BATTERY_POLLING_COUNT; | |
172 | static struct adb_request batt_req; | |
173 | static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES]; | |
1da177e4 | 174 | |
1da177e4 LT |
175 | int __fake_sleep; |
176 | int asleep; | |
1da177e4 LT |
177 | |
178 | #ifdef CONFIG_ADB | |
87275856 | 179 | static int adb_dev_map; |
1da177e4 LT |
180 | static int pmu_adb_flags; |
181 | ||
182 | static int pmu_probe(void); | |
183 | static int pmu_init(void); | |
184 | static int pmu_send_request(struct adb_request *req, int sync); | |
185 | static int pmu_adb_autopoll(int devs); | |
186 | static int pmu_adb_reset_bus(void); | |
187 | #endif /* CONFIG_ADB */ | |
188 | ||
189 | static int init_pmu(void); | |
1da177e4 | 190 | static void pmu_start(void); |
7d12e780 DH |
191 | static irqreturn_t via_pmu_interrupt(int irq, void *arg); |
192 | static irqreturn_t gpio1_interrupt(int irq, void *arg); | |
1da177e4 LT |
193 | static int proc_get_info(char *page, char **start, off_t off, |
194 | int count, int *eof, void *data); | |
195 | static int proc_get_irqstats(char *page, char **start, off_t off, | |
196 | int count, int *eof, void *data); | |
1da177e4 LT |
197 | static void pmu_pass_intr(unsigned char *data, int len); |
198 | static int proc_get_batt(char *page, char **start, off_t off, | |
199 | int count, int *eof, void *data); | |
1da177e4 LT |
200 | static int proc_read_options(char *page, char **start, off_t off, |
201 | int count, int *eof, void *data); | |
202 | static int proc_write_options(struct file *file, const char __user *buffer, | |
203 | unsigned long count, void *data); | |
204 | ||
887ef35a PM |
205 | #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_PPC32) |
206 | static void powerbook_sleep_init_3400(void); | |
207 | #else | |
208 | #define powerbook_sleep_init_3400() do { } while (0) | |
209 | #endif | |
210 | ||
1da177e4 LT |
211 | #ifdef CONFIG_ADB |
212 | struct adb_driver via_pmu_driver = { | |
213 | "PMU", | |
214 | pmu_probe, | |
215 | pmu_init, | |
216 | pmu_send_request, | |
217 | pmu_adb_autopoll, | |
218 | pmu_poll_adb, | |
219 | pmu_adb_reset_bus | |
220 | }; | |
221 | #endif /* CONFIG_ADB */ | |
222 | ||
223 | extern void low_sleep_handler(void); | |
224 | extern void enable_kernel_altivec(void); | |
225 | extern void enable_kernel_fp(void); | |
226 | ||
227 | #ifdef DEBUG_SLEEP | |
228 | int pmu_polled_request(struct adb_request *req); | |
229 | int pmu_wink(struct adb_request *req); | |
230 | #endif | |
231 | ||
232 | /* | |
233 | * This table indicates for each PMU opcode: | |
234 | * - the number of data bytes to be sent with the command, or -1 | |
235 | * if a length byte should be sent, | |
236 | * - the number of response bytes which the PMU will return, or | |
237 | * -1 if it will send a length byte. | |
238 | */ | |
aacaf9bd | 239 | static const s8 pmu_data_len[256][2] = { |
1da177e4 LT |
240 | /* 0 1 2 3 4 5 6 7 */ |
241 | /*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
242 | /*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | |
243 | /*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
244 | /*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0}, | |
245 | /*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
246 | /*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1}, | |
247 | /*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
248 | /*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0}, | |
249 | /*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
250 | /*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1}, | |
251 | /*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0}, | |
252 | /*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1}, | |
253 | /*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
254 | /*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1}, | |
255 | /*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
256 | /*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1}, | |
257 | /*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
258 | /*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | |
259 | /*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
260 | /*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | |
261 | /*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0}, | |
262 | /*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | |
263 | /*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
264 | /*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | |
265 | /*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
266 | /*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | |
267 | /*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
268 | /*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1}, | |
269 | /*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0}, | |
270 | /*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0}, | |
271 | /*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
272 | /*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | |
273 | }; | |
274 | ||
275 | static char *pbook_type[] = { | |
276 | "Unknown PowerBook", | |
277 | "PowerBook 2400/3400/3500(G3)", | |
278 | "PowerBook G3 Series", | |
279 | "1999 PowerBook G3", | |
280 | "Core99" | |
281 | }; | |
282 | ||
51d3082f | 283 | int __init find_via_pmu(void) |
1da177e4 | 284 | { |
cc5d0189 | 285 | u64 taddr; |
018a3d1d | 286 | const u32 *reg; |
51d3082f | 287 | |
1da177e4 LT |
288 | if (via != 0) |
289 | return 1; | |
51d3082f BH |
290 | vias = of_find_node_by_name(NULL, "via-pmu"); |
291 | if (vias == NULL) | |
1da177e4 | 292 | return 0; |
1da177e4 | 293 | |
01b2726d | 294 | reg = of_get_property(vias, "reg", NULL); |
51d3082f BH |
295 | if (reg == NULL) { |
296 | printk(KERN_ERR "via-pmu: No \"reg\" property !\n"); | |
297 | goto fail; | |
298 | } | |
299 | taddr = of_translate_address(vias, reg); | |
bb6b9b28 | 300 | if (taddr == OF_BAD_ADDR) { |
51d3082f BH |
301 | printk(KERN_ERR "via-pmu: Can't translate address !\n"); |
302 | goto fail; | |
1da177e4 LT |
303 | } |
304 | ||
305 | spin_lock_init(&pmu_lock); | |
306 | ||
307 | pmu_has_adb = 1; | |
308 | ||
309 | pmu_intr_mask = PMU_INT_PCEJECT | | |
310 | PMU_INT_SNDBRT | | |
311 | PMU_INT_ADB | | |
312 | PMU_INT_TICK; | |
313 | ||
314 | if (vias->parent->name && ((strcmp(vias->parent->name, "ohare") == 0) | |
55b61fec | 315 | || of_device_is_compatible(vias->parent, "ohare"))) |
1da177e4 | 316 | pmu_kind = PMU_OHARE_BASED; |
55b61fec | 317 | else if (of_device_is_compatible(vias->parent, "paddington")) |
1da177e4 | 318 | pmu_kind = PMU_PADDINGTON_BASED; |
55b61fec | 319 | else if (of_device_is_compatible(vias->parent, "heathrow")) |
1da177e4 | 320 | pmu_kind = PMU_HEATHROW_BASED; |
55b61fec SR |
321 | else if (of_device_is_compatible(vias->parent, "Keylargo") |
322 | || of_device_is_compatible(vias->parent, "K2-Keylargo")) { | |
51d3082f | 323 | struct device_node *gpiop; |
1658ab66 | 324 | struct device_node *adbp; |
cc5d0189 | 325 | u64 gaddr = OF_BAD_ADDR; |
1da177e4 LT |
326 | |
327 | pmu_kind = PMU_KEYLARGO_BASED; | |
1658ab66 SR |
328 | adbp = of_find_node_by_type(NULL, "adb"); |
329 | pmu_has_adb = (adbp != NULL); | |
330 | of_node_put(adbp); | |
1da177e4 LT |
331 | pmu_intr_mask = PMU_INT_PCEJECT | |
332 | PMU_INT_SNDBRT | | |
333 | PMU_INT_ADB | | |
334 | PMU_INT_TICK | | |
335 | PMU_INT_ENVIRONMENT; | |
336 | ||
51d3082f BH |
337 | gpiop = of_find_node_by_name(NULL, "gpio"); |
338 | if (gpiop) { | |
01b2726d | 339 | reg = of_get_property(gpiop, "reg", NULL); |
51d3082f BH |
340 | if (reg) |
341 | gaddr = of_translate_address(gpiop, reg); | |
cc5d0189 | 342 | if (gaddr != OF_BAD_ADDR) |
51d3082f | 343 | gpio_reg = ioremap(gaddr, 0x10); |
1da177e4 | 344 | } |
61e37ca2 | 345 | if (gpio_reg == NULL) { |
51d3082f | 346 | printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n"); |
61e37ca2 OH |
347 | goto fail_gpio; |
348 | } | |
1da177e4 LT |
349 | } else |
350 | pmu_kind = PMU_UNKNOWN; | |
351 | ||
51d3082f BH |
352 | via = ioremap(taddr, 0x2000); |
353 | if (via == NULL) { | |
354 | printk(KERN_ERR "via-pmu: Can't map address !\n"); | |
355 | goto fail; | |
356 | } | |
1da177e4 LT |
357 | |
358 | out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */ | |
359 | out_8(&via[IFR], 0x7f); /* clear IFR */ | |
360 | ||
361 | pmu_state = idle; | |
362 | ||
363 | if (!init_pmu()) { | |
364 | via = NULL; | |
365 | return 0; | |
366 | } | |
367 | ||
bb6b9b28 | 368 | printk(KERN_INFO "PMU driver v%d initialized for %s, firmware: %02x\n", |
1da177e4 LT |
369 | PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version); |
370 | ||
371 | sys_ctrler = SYS_CTRLER_PMU; | |
372 | ||
373 | return 1; | |
51d3082f BH |
374 | fail: |
375 | of_node_put(vias); | |
61e37ca2 OH |
376 | iounmap(gpio_reg); |
377 | gpio_reg = NULL; | |
378 | fail_gpio: | |
51d3082f BH |
379 | vias = NULL; |
380 | return 0; | |
1da177e4 LT |
381 | } |
382 | ||
383 | #ifdef CONFIG_ADB | |
51d3082f | 384 | static int pmu_probe(void) |
1da177e4 LT |
385 | { |
386 | return vias == NULL? -ENODEV: 0; | |
387 | } | |
388 | ||
51d3082f | 389 | static int __init pmu_init(void) |
1da177e4 LT |
390 | { |
391 | if (vias == NULL) | |
392 | return -ENODEV; | |
393 | return 0; | |
394 | } | |
395 | #endif /* CONFIG_ADB */ | |
396 | ||
397 | /* | |
398 | * We can't wait until pmu_init gets called, that happens too late. | |
399 | * It happens after IDE and SCSI initialization, which can take a few | |
400 | * seconds, and by that time the PMU could have given up on us and | |
401 | * turned us off. | |
402 | * Thus this is called with arch_initcall rather than device_initcall. | |
403 | */ | |
404 | static int __init via_pmu_start(void) | |
405 | { | |
0ebfff14 BH |
406 | unsigned int irq; |
407 | ||
1da177e4 LT |
408 | if (vias == NULL) |
409 | return -ENODEV; | |
410 | ||
1da177e4 | 411 | batt_req.complete = 1; |
1da177e4 | 412 | |
0ebfff14 BH |
413 | irq = irq_of_parse_and_map(vias, 0); |
414 | if (irq == NO_IRQ) { | |
7b52b440 | 415 | printk(KERN_ERR "via-pmu: can't map interrupt\n"); |
0ebfff14 BH |
416 | return -ENODEV; |
417 | } | |
418 | if (request_irq(irq, via_pmu_interrupt, 0, "VIA-PMU", (void *)0)) { | |
419 | printk(KERN_ERR "via-pmu: can't request irq %d\n", irq); | |
420 | return -ENODEV; | |
1da177e4 LT |
421 | } |
422 | ||
51d3082f BH |
423 | if (pmu_kind == PMU_KEYLARGO_BASED) { |
424 | gpio_node = of_find_node_by_name(NULL, "extint-gpio1"); | |
425 | if (gpio_node == NULL) | |
426 | gpio_node = of_find_node_by_name(NULL, | |
427 | "pmu-interrupt"); | |
0ebfff14 BH |
428 | if (gpio_node) |
429 | gpio_irq = irq_of_parse_and_map(gpio_node, 0); | |
51d3082f | 430 | |
0ebfff14 | 431 | if (gpio_irq != NO_IRQ) { |
51d3082f BH |
432 | if (request_irq(gpio_irq, gpio1_interrupt, 0, |
433 | "GPIO1 ADB", (void *)0)) | |
434 | printk(KERN_ERR "pmu: can't get irq %d" | |
435 | " (GPIO1)\n", gpio_irq); | |
436 | else | |
437 | gpio_irq_enabled = 1; | |
438 | } | |
1da177e4 LT |
439 | } |
440 | ||
441 | /* Enable interrupts */ | |
442 | out_8(&via[IER], IER_SET | SR_INT | CB1_INT); | |
443 | ||
444 | pmu_fully_inited = 1; | |
445 | ||
446 | /* Make sure PMU settle down before continuing. This is _very_ important | |
447 | * since the IDE probe may shut interrupts down for quite a bit of time. If | |
448 | * a PMU communication is pending while this happens, the PMU may timeout | |
449 | * Not that on Core99 machines, the PMU keeps sending us environement | |
450 | * messages, we should find a way to either fix IDE or make it call | |
451 | * pmu_suspend() before masking interrupts. This can also happens while | |
452 | * scolling with some fbdevs. | |
453 | */ | |
454 | do { | |
455 | pmu_poll(); | |
456 | } while (pmu_state != idle); | |
457 | ||
887ef35a PM |
458 | /* Do allocations and ioremaps that will be needed for sleep */ |
459 | if (pmu_kind == PMU_OHARE_BASED) | |
460 | powerbook_sleep_init_3400(); | |
461 | ||
1da177e4 LT |
462 | return 0; |
463 | } | |
464 | ||
465 | arch_initcall(via_pmu_start); | |
466 | ||
467 | /* | |
468 | * This has to be done after pci_init, which is a subsys_initcall. | |
469 | */ | |
470 | static int __init via_pmu_dev_init(void) | |
471 | { | |
472 | if (vias == NULL) | |
473 | return -ENODEV; | |
474 | ||
1da177e4 | 475 | #ifdef CONFIG_PMAC_BACKLIGHT |
5474c120 | 476 | /* Initialize backlight */ |
4b755999 | 477 | pmu_backlight_init(); |
5474c120 | 478 | #endif |
1da177e4 | 479 | |
8c870933 | 480 | #ifdef CONFIG_PPC32 |
1da177e4 LT |
481 | if (machine_is_compatible("AAPL,3400/2400") || |
482 | machine_is_compatible("AAPL,3500")) { | |
483 | int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO, | |
484 | NULL, PMAC_MB_INFO_MODEL, 0); | |
485 | pmu_battery_count = 1; | |
486 | if (mb == PMAC_TYPE_COMET) | |
487 | pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET; | |
488 | else | |
489 | pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER; | |
490 | } else if (machine_is_compatible("AAPL,PowerBook1998") || | |
491 | machine_is_compatible("PowerBook1,1")) { | |
492 | pmu_battery_count = 2; | |
493 | pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART; | |
494 | pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART; | |
495 | } else { | |
30686ba6 SR |
496 | struct device_node* prim = |
497 | of_find_node_by_name(NULL, "power-mgt"); | |
018a3d1d | 498 | const u32 *prim_info = NULL; |
1da177e4 | 499 | if (prim) |
01b2726d | 500 | prim_info = of_get_property(prim, "prim-info", NULL); |
1da177e4 LT |
501 | if (prim_info) { |
502 | /* Other stuffs here yet unknown */ | |
503 | pmu_battery_count = (prim_info[6] >> 16) & 0xff; | |
504 | pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART; | |
505 | if (pmu_battery_count > 1) | |
506 | pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART; | |
507 | } | |
30686ba6 | 508 | of_node_put(prim); |
1da177e4 | 509 | } |
8c870933 BH |
510 | #endif /* CONFIG_PPC32 */ |
511 | ||
1da177e4 LT |
512 | /* Create /proc/pmu */ |
513 | proc_pmu_root = proc_mkdir("pmu", NULL); | |
514 | if (proc_pmu_root) { | |
8c870933 | 515 | long i; |
1da177e4 LT |
516 | |
517 | for (i=0; i<pmu_battery_count; i++) { | |
518 | char title[16]; | |
8c870933 | 519 | sprintf(title, "battery_%ld", i); |
1da177e4 LT |
520 | proc_pmu_batt[i] = create_proc_read_entry(title, 0, proc_pmu_root, |
521 | proc_get_batt, (void *)i); | |
522 | } | |
1da177e4 LT |
523 | |
524 | proc_pmu_info = create_proc_read_entry("info", 0, proc_pmu_root, | |
525 | proc_get_info, NULL); | |
526 | proc_pmu_irqstats = create_proc_read_entry("interrupts", 0, proc_pmu_root, | |
527 | proc_get_irqstats, NULL); | |
528 | proc_pmu_options = create_proc_entry("options", 0600, proc_pmu_root); | |
529 | if (proc_pmu_options) { | |
1da177e4 LT |
530 | proc_pmu_options->read_proc = proc_read_options; |
531 | proc_pmu_options->write_proc = proc_write_options; | |
532 | } | |
533 | } | |
534 | return 0; | |
535 | } | |
536 | ||
537 | device_initcall(via_pmu_dev_init); | |
538 | ||
aacaf9bd | 539 | static int |
1da177e4 LT |
540 | init_pmu(void) |
541 | { | |
542 | int timeout; | |
543 | struct adb_request req; | |
544 | ||
545 | out_8(&via[B], via[B] | TREQ); /* negate TREQ */ | |
546 | out_8(&via[DIRB], (via[DIRB] | TREQ) & ~TACK); /* TACK in, TREQ out */ | |
547 | ||
548 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask); | |
549 | timeout = 100000; | |
550 | while (!req.complete) { | |
551 | if (--timeout < 0) { | |
552 | printk(KERN_ERR "init_pmu: no response from PMU\n"); | |
553 | return 0; | |
554 | } | |
555 | udelay(10); | |
556 | pmu_poll(); | |
557 | } | |
558 | ||
559 | /* ack all pending interrupts */ | |
560 | timeout = 100000; | |
561 | interrupt_data[0][0] = 1; | |
562 | while (interrupt_data[0][0] || pmu_state != idle) { | |
563 | if (--timeout < 0) { | |
564 | printk(KERN_ERR "init_pmu: timed out acking intrs\n"); | |
565 | return 0; | |
566 | } | |
567 | if (pmu_state == idle) | |
568 | adb_int_pending = 1; | |
7d12e780 | 569 | via_pmu_interrupt(0, NULL); |
1da177e4 LT |
570 | udelay(10); |
571 | } | |
572 | ||
573 | /* Tell PMU we are ready. */ | |
574 | if (pmu_kind == PMU_KEYLARGO_BASED) { | |
575 | pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2); | |
576 | while (!req.complete) | |
577 | pmu_poll(); | |
578 | } | |
579 | ||
580 | /* Read PMU version */ | |
581 | pmu_request(&req, NULL, 1, PMU_GET_VERSION); | |
582 | pmu_wait_complete(&req); | |
583 | if (req.reply_len > 0) | |
584 | pmu_version = req.reply[0]; | |
585 | ||
586 | /* Read server mode setting */ | |
587 | if (pmu_kind == PMU_KEYLARGO_BASED) { | |
588 | pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, | |
589 | PMU_PWR_GET_POWERUP_EVENTS); | |
590 | pmu_wait_complete(&req); | |
591 | if (req.reply_len == 2) { | |
592 | if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT) | |
593 | option_server_mode = 1; | |
594 | printk(KERN_INFO "via-pmu: Server Mode is %s\n", | |
595 | option_server_mode ? "enabled" : "disabled"); | |
596 | } | |
597 | } | |
598 | return 1; | |
599 | } | |
600 | ||
601 | int | |
602 | pmu_get_model(void) | |
603 | { | |
604 | return pmu_kind; | |
605 | } | |
606 | ||
1da177e4 LT |
607 | static void pmu_set_server_mode(int server_mode) |
608 | { | |
609 | struct adb_request req; | |
610 | ||
611 | if (pmu_kind != PMU_KEYLARGO_BASED) | |
612 | return; | |
613 | ||
614 | option_server_mode = server_mode; | |
615 | pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS); | |
616 | pmu_wait_complete(&req); | |
617 | if (req.reply_len < 2) | |
618 | return; | |
619 | if (server_mode) | |
620 | pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, | |
621 | PMU_PWR_SET_POWERUP_EVENTS, | |
622 | req.reply[0], PMU_PWR_WAKEUP_AC_INSERT); | |
623 | else | |
624 | pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, | |
625 | PMU_PWR_CLR_POWERUP_EVENTS, | |
626 | req.reply[0], PMU_PWR_WAKEUP_AC_INSERT); | |
627 | pmu_wait_complete(&req); | |
628 | } | |
629 | ||
1da177e4 LT |
630 | /* This new version of the code for 2400/3400/3500 powerbooks |
631 | * is inspired from the implementation in gkrellm-pmu | |
632 | */ | |
aacaf9bd | 633 | static void |
1da177e4 LT |
634 | done_battery_state_ohare(struct adb_request* req) |
635 | { | |
636 | /* format: | |
637 | * [0] : flags | |
638 | * 0x01 : AC indicator | |
639 | * 0x02 : charging | |
640 | * 0x04 : battery exist | |
641 | * 0x08 : | |
642 | * 0x10 : | |
643 | * 0x20 : full charged | |
644 | * 0x40 : pcharge reset | |
645 | * 0x80 : battery exist | |
646 | * | |
647 | * [1][2] : battery voltage | |
648 | * [3] : CPU temperature | |
649 | * [4] : battery temperature | |
650 | * [5] : current | |
651 | * [6][7] : pcharge | |
652 | * --tkoba | |
653 | */ | |
654 | unsigned int bat_flags = PMU_BATT_TYPE_HOOPER; | |
655 | long pcharge, charge, vb, vmax, lmax; | |
656 | long vmax_charging, vmax_charged; | |
657 | long amperage, voltage, time, max; | |
658 | int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO, | |
659 | NULL, PMAC_MB_INFO_MODEL, 0); | |
660 | ||
661 | if (req->reply[0] & 0x01) | |
662 | pmu_power_flags |= PMU_PWR_AC_PRESENT; | |
663 | else | |
664 | pmu_power_flags &= ~PMU_PWR_AC_PRESENT; | |
665 | ||
666 | if (mb == PMAC_TYPE_COMET) { | |
667 | vmax_charged = 189; | |
668 | vmax_charging = 213; | |
669 | lmax = 6500; | |
670 | } else { | |
671 | vmax_charged = 330; | |
672 | vmax_charging = 330; | |
673 | lmax = 6500; | |
674 | } | |
675 | vmax = vmax_charged; | |
676 | ||
677 | /* If battery installed */ | |
678 | if (req->reply[0] & 0x04) { | |
679 | bat_flags |= PMU_BATT_PRESENT; | |
680 | if (req->reply[0] & 0x02) | |
681 | bat_flags |= PMU_BATT_CHARGING; | |
682 | vb = (req->reply[1] << 8) | req->reply[2]; | |
683 | voltage = (vb * 265 + 72665) / 10; | |
684 | amperage = req->reply[5]; | |
685 | if ((req->reply[0] & 0x01) == 0) { | |
686 | if (amperage > 200) | |
687 | vb += ((amperage - 200) * 15)/100; | |
688 | } else if (req->reply[0] & 0x02) { | |
689 | vb = (vb * 97) / 100; | |
690 | vmax = vmax_charging; | |
691 | } | |
692 | charge = (100 * vb) / vmax; | |
693 | if (req->reply[0] & 0x40) { | |
694 | pcharge = (req->reply[6] << 8) + req->reply[7]; | |
695 | if (pcharge > lmax) | |
696 | pcharge = lmax; | |
697 | pcharge *= 100; | |
698 | pcharge = 100 - pcharge / lmax; | |
699 | if (pcharge < charge) | |
700 | charge = pcharge; | |
701 | } | |
702 | if (amperage > 0) | |
703 | time = (charge * 16440) / amperage; | |
704 | else | |
705 | time = 0; | |
706 | max = 100; | |
707 | amperage = -amperage; | |
708 | } else | |
709 | charge = max = amperage = voltage = time = 0; | |
710 | ||
711 | pmu_batteries[pmu_cur_battery].flags = bat_flags; | |
712 | pmu_batteries[pmu_cur_battery].charge = charge; | |
713 | pmu_batteries[pmu_cur_battery].max_charge = max; | |
714 | pmu_batteries[pmu_cur_battery].amperage = amperage; | |
715 | pmu_batteries[pmu_cur_battery].voltage = voltage; | |
716 | pmu_batteries[pmu_cur_battery].time_remaining = time; | |
717 | ||
718 | clear_bit(0, &async_req_locks); | |
719 | } | |
720 | ||
aacaf9bd | 721 | static void |
1da177e4 LT |
722 | done_battery_state_smart(struct adb_request* req) |
723 | { | |
724 | /* format: | |
725 | * [0] : format of this structure (known: 3,4,5) | |
726 | * [1] : flags | |
727 | * | |
728 | * format 3 & 4: | |
729 | * | |
730 | * [2] : charge | |
731 | * [3] : max charge | |
732 | * [4] : current | |
733 | * [5] : voltage | |
734 | * | |
735 | * format 5: | |
736 | * | |
737 | * [2][3] : charge | |
738 | * [4][5] : max charge | |
739 | * [6][7] : current | |
740 | * [8][9] : voltage | |
741 | */ | |
742 | ||
743 | unsigned int bat_flags = PMU_BATT_TYPE_SMART; | |
744 | int amperage; | |
745 | unsigned int capa, max, voltage; | |
746 | ||
747 | if (req->reply[1] & 0x01) | |
748 | pmu_power_flags |= PMU_PWR_AC_PRESENT; | |
749 | else | |
750 | pmu_power_flags &= ~PMU_PWR_AC_PRESENT; | |
751 | ||
752 | ||
753 | capa = max = amperage = voltage = 0; | |
754 | ||
755 | if (req->reply[1] & 0x04) { | |
756 | bat_flags |= PMU_BATT_PRESENT; | |
757 | switch(req->reply[0]) { | |
758 | case 3: | |
759 | case 4: capa = req->reply[2]; | |
760 | max = req->reply[3]; | |
761 | amperage = *((signed char *)&req->reply[4]); | |
762 | voltage = req->reply[5]; | |
763 | break; | |
764 | case 5: capa = (req->reply[2] << 8) | req->reply[3]; | |
765 | max = (req->reply[4] << 8) | req->reply[5]; | |
766 | amperage = *((signed short *)&req->reply[6]); | |
767 | voltage = (req->reply[8] << 8) | req->reply[9]; | |
768 | break; | |
769 | default: | |
770 | printk(KERN_WARNING "pmu.c : unrecognized battery info, len: %d, %02x %02x %02x %02x\n", | |
771 | req->reply_len, req->reply[0], req->reply[1], req->reply[2], req->reply[3]); | |
772 | break; | |
773 | } | |
774 | } | |
775 | ||
776 | if ((req->reply[1] & 0x01) && (amperage > 0)) | |
777 | bat_flags |= PMU_BATT_CHARGING; | |
778 | ||
779 | pmu_batteries[pmu_cur_battery].flags = bat_flags; | |
780 | pmu_batteries[pmu_cur_battery].charge = capa; | |
781 | pmu_batteries[pmu_cur_battery].max_charge = max; | |
782 | pmu_batteries[pmu_cur_battery].amperage = amperage; | |
783 | pmu_batteries[pmu_cur_battery].voltage = voltage; | |
784 | if (amperage) { | |
785 | if ((req->reply[1] & 0x01) && (amperage > 0)) | |
786 | pmu_batteries[pmu_cur_battery].time_remaining | |
787 | = ((max-capa) * 3600) / amperage; | |
788 | else | |
789 | pmu_batteries[pmu_cur_battery].time_remaining | |
790 | = (capa * 3600) / (-amperage); | |
791 | } else | |
792 | pmu_batteries[pmu_cur_battery].time_remaining = 0; | |
793 | ||
794 | pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count; | |
795 | ||
796 | clear_bit(0, &async_req_locks); | |
797 | } | |
798 | ||
aacaf9bd | 799 | static void |
1da177e4 LT |
800 | query_battery_state(void) |
801 | { | |
802 | if (test_and_set_bit(0, &async_req_locks)) | |
803 | return; | |
804 | if (pmu_kind == PMU_OHARE_BASED) | |
805 | pmu_request(&batt_req, done_battery_state_ohare, | |
806 | 1, PMU_BATTERY_STATE); | |
807 | else | |
808 | pmu_request(&batt_req, done_battery_state_smart, | |
809 | 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1); | |
810 | } | |
811 | ||
aacaf9bd | 812 | static int |
1da177e4 LT |
813 | proc_get_info(char *page, char **start, off_t off, |
814 | int count, int *eof, void *data) | |
815 | { | |
816 | char* p = page; | |
817 | ||
818 | p += sprintf(p, "PMU driver version : %d\n", PMU_DRIVER_VERSION); | |
819 | p += sprintf(p, "PMU firmware version : %02x\n", pmu_version); | |
1da177e4 | 820 | p += sprintf(p, "AC Power : %d\n", |
63e1fd41 | 821 | ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0) || pmu_battery_count == 0); |
1da177e4 | 822 | p += sprintf(p, "Battery count : %d\n", pmu_battery_count); |
1da177e4 LT |
823 | |
824 | return p - page; | |
825 | } | |
826 | ||
aacaf9bd | 827 | static int |
1da177e4 LT |
828 | proc_get_irqstats(char *page, char **start, off_t off, |
829 | int count, int *eof, void *data) | |
830 | { | |
831 | int i; | |
832 | char* p = page; | |
833 | static const char *irq_names[] = { | |
834 | "Total CB1 triggered events", | |
835 | "Total GPIO1 triggered events", | |
836 | "PC-Card eject button", | |
837 | "Sound/Brightness button", | |
838 | "ADB message", | |
839 | "Battery state change", | |
840 | "Environment interrupt", | |
841 | "Tick timer", | |
842 | "Ghost interrupt (zero len)", | |
843 | "Empty interrupt (empty mask)", | |
844 | "Max irqs in a row" | |
845 | }; | |
846 | ||
847 | for (i=0; i<11; i++) { | |
848 | p += sprintf(p, " %2u: %10u (%s)\n", | |
849 | i, pmu_irq_stats[i], irq_names[i]); | |
850 | } | |
851 | return p - page; | |
852 | } | |
853 | ||
aacaf9bd | 854 | static int |
1da177e4 LT |
855 | proc_get_batt(char *page, char **start, off_t off, |
856 | int count, int *eof, void *data) | |
857 | { | |
8c870933 | 858 | long batnum = (long)data; |
1da177e4 LT |
859 | char *p = page; |
860 | ||
861 | p += sprintf(p, "\n"); | |
862 | p += sprintf(p, "flags : %08x\n", | |
863 | pmu_batteries[batnum].flags); | |
864 | p += sprintf(p, "charge : %d\n", | |
865 | pmu_batteries[batnum].charge); | |
866 | p += sprintf(p, "max_charge : %d\n", | |
867 | pmu_batteries[batnum].max_charge); | |
868 | p += sprintf(p, "current : %d\n", | |
869 | pmu_batteries[batnum].amperage); | |
870 | p += sprintf(p, "voltage : %d\n", | |
871 | pmu_batteries[batnum].voltage); | |
872 | p += sprintf(p, "time rem. : %d\n", | |
873 | pmu_batteries[batnum].time_remaining); | |
874 | ||
875 | return p - page; | |
876 | } | |
1da177e4 | 877 | |
aacaf9bd | 878 | static int |
1da177e4 LT |
879 | proc_read_options(char *page, char **start, off_t off, |
880 | int count, int *eof, void *data) | |
881 | { | |
882 | char *p = page; | |
883 | ||
e120e8d0 | 884 | #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_PPC32) |
1da177e4 LT |
885 | if (pmu_kind == PMU_KEYLARGO_BASED && |
886 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0) | |
887 | p += sprintf(p, "lid_wakeup=%d\n", option_lid_wakeup); | |
8c870933 | 888 | #endif |
1da177e4 LT |
889 | if (pmu_kind == PMU_KEYLARGO_BASED) |
890 | p += sprintf(p, "server_mode=%d\n", option_server_mode); | |
891 | ||
892 | return p - page; | |
893 | } | |
894 | ||
aacaf9bd | 895 | static int |
1da177e4 LT |
896 | proc_write_options(struct file *file, const char __user *buffer, |
897 | unsigned long count, void *data) | |
898 | { | |
899 | char tmp[33]; | |
900 | char *label, *val; | |
901 | unsigned long fcount = count; | |
902 | ||
903 | if (!count) | |
904 | return -EINVAL; | |
905 | if (count > 32) | |
906 | count = 32; | |
907 | if (copy_from_user(tmp, buffer, count)) | |
908 | return -EFAULT; | |
909 | tmp[count] = 0; | |
910 | ||
911 | label = tmp; | |
912 | while(*label == ' ') | |
913 | label++; | |
914 | val = label; | |
915 | while(*val && (*val != '=')) { | |
916 | if (*val == ' ') | |
917 | *val = 0; | |
918 | val++; | |
919 | } | |
920 | if ((*val) == 0) | |
921 | return -EINVAL; | |
922 | *(val++) = 0; | |
923 | while(*val == ' ') | |
924 | val++; | |
e120e8d0 | 925 | #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_PPC32) |
1da177e4 LT |
926 | if (pmu_kind == PMU_KEYLARGO_BASED && |
927 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0) | |
928 | if (!strcmp(label, "lid_wakeup")) | |
929 | option_lid_wakeup = ((*val) == '1'); | |
8c870933 | 930 | #endif |
1da177e4 LT |
931 | if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) { |
932 | int new_value; | |
933 | new_value = ((*val) == '1'); | |
934 | if (new_value != option_server_mode) | |
935 | pmu_set_server_mode(new_value); | |
936 | } | |
937 | return fcount; | |
938 | } | |
939 | ||
940 | #ifdef CONFIG_ADB | |
941 | /* Send an ADB command */ | |
aacaf9bd | 942 | static int |
1da177e4 LT |
943 | pmu_send_request(struct adb_request *req, int sync) |
944 | { | |
945 | int i, ret; | |
946 | ||
947 | if ((vias == NULL) || (!pmu_fully_inited)) { | |
948 | req->complete = 1; | |
949 | return -ENXIO; | |
950 | } | |
951 | ||
952 | ret = -EINVAL; | |
953 | ||
954 | switch (req->data[0]) { | |
955 | case PMU_PACKET: | |
956 | for (i = 0; i < req->nbytes - 1; ++i) | |
957 | req->data[i] = req->data[i+1]; | |
958 | --req->nbytes; | |
959 | if (pmu_data_len[req->data[0]][1] != 0) { | |
960 | req->reply[0] = ADB_RET_OK; | |
961 | req->reply_len = 1; | |
962 | } else | |
963 | req->reply_len = 0; | |
964 | ret = pmu_queue_request(req); | |
965 | break; | |
966 | case CUDA_PACKET: | |
967 | switch (req->data[1]) { | |
968 | case CUDA_GET_TIME: | |
969 | if (req->nbytes != 2) | |
970 | break; | |
971 | req->data[0] = PMU_READ_RTC; | |
972 | req->nbytes = 1; | |
973 | req->reply_len = 3; | |
974 | req->reply[0] = CUDA_PACKET; | |
975 | req->reply[1] = 0; | |
976 | req->reply[2] = CUDA_GET_TIME; | |
977 | ret = pmu_queue_request(req); | |
978 | break; | |
979 | case CUDA_SET_TIME: | |
980 | if (req->nbytes != 6) | |
981 | break; | |
982 | req->data[0] = PMU_SET_RTC; | |
983 | req->nbytes = 5; | |
984 | for (i = 1; i <= 4; ++i) | |
985 | req->data[i] = req->data[i+1]; | |
986 | req->reply_len = 3; | |
987 | req->reply[0] = CUDA_PACKET; | |
988 | req->reply[1] = 0; | |
989 | req->reply[2] = CUDA_SET_TIME; | |
990 | ret = pmu_queue_request(req); | |
991 | break; | |
992 | } | |
993 | break; | |
994 | case ADB_PACKET: | |
995 | if (!pmu_has_adb) | |
996 | return -ENXIO; | |
997 | for (i = req->nbytes - 1; i > 1; --i) | |
998 | req->data[i+2] = req->data[i]; | |
999 | req->data[3] = req->nbytes - 2; | |
1000 | req->data[2] = pmu_adb_flags; | |
1001 | /*req->data[1] = req->data[1];*/ | |
1002 | req->data[0] = PMU_ADB_CMD; | |
1003 | req->nbytes += 2; | |
1004 | req->reply_expected = 1; | |
1005 | req->reply_len = 0; | |
1006 | ret = pmu_queue_request(req); | |
1007 | break; | |
1008 | } | |
1009 | if (ret) { | |
1010 | req->complete = 1; | |
1011 | return ret; | |
1012 | } | |
1013 | ||
1014 | if (sync) | |
1015 | while (!req->complete) | |
1016 | pmu_poll(); | |
1017 | ||
1018 | return 0; | |
1019 | } | |
1020 | ||
1021 | /* Enable/disable autopolling */ | |
aacaf9bd | 1022 | static int |
1da177e4 LT |
1023 | pmu_adb_autopoll(int devs) |
1024 | { | |
1025 | struct adb_request req; | |
1026 | ||
1027 | if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb) | |
1028 | return -ENXIO; | |
1029 | ||
1030 | if (devs) { | |
1031 | adb_dev_map = devs; | |
1032 | pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86, | |
1033 | adb_dev_map >> 8, adb_dev_map); | |
1034 | pmu_adb_flags = 2; | |
1035 | } else { | |
1036 | pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF); | |
1037 | pmu_adb_flags = 0; | |
1038 | } | |
1039 | while (!req.complete) | |
1040 | pmu_poll(); | |
1041 | return 0; | |
1042 | } | |
1043 | ||
1044 | /* Reset the ADB bus */ | |
aacaf9bd | 1045 | static int |
1da177e4 LT |
1046 | pmu_adb_reset_bus(void) |
1047 | { | |
1048 | struct adb_request req; | |
1049 | int save_autopoll = adb_dev_map; | |
1050 | ||
1051 | if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb) | |
1052 | return -ENXIO; | |
1053 | ||
1054 | /* anyone got a better idea?? */ | |
1055 | pmu_adb_autopoll(0); | |
1056 | ||
1057 | req.nbytes = 5; | |
1058 | req.done = NULL; | |
1059 | req.data[0] = PMU_ADB_CMD; | |
1060 | req.data[1] = 0; | |
1061 | req.data[2] = ADB_BUSRESET; | |
1062 | req.data[3] = 0; | |
1063 | req.data[4] = 0; | |
1064 | req.reply_len = 0; | |
1065 | req.reply_expected = 1; | |
1066 | if (pmu_queue_request(&req) != 0) { | |
1067 | printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n"); | |
1068 | return -EIO; | |
1069 | } | |
1070 | pmu_wait_complete(&req); | |
1071 | ||
1072 | if (save_autopoll != 0) | |
1073 | pmu_adb_autopoll(save_autopoll); | |
1074 | ||
1075 | return 0; | |
1076 | } | |
1077 | #endif /* CONFIG_ADB */ | |
1078 | ||
1079 | /* Construct and send a pmu request */ | |
aacaf9bd | 1080 | int |
1da177e4 LT |
1081 | pmu_request(struct adb_request *req, void (*done)(struct adb_request *), |
1082 | int nbytes, ...) | |
1083 | { | |
1084 | va_list list; | |
1085 | int i; | |
1086 | ||
1087 | if (vias == NULL) | |
1088 | return -ENXIO; | |
1089 | ||
1090 | if (nbytes < 0 || nbytes > 32) { | |
1091 | printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes); | |
1092 | req->complete = 1; | |
1093 | return -EINVAL; | |
1094 | } | |
1095 | req->nbytes = nbytes; | |
1096 | req->done = done; | |
1097 | va_start(list, nbytes); | |
1098 | for (i = 0; i < nbytes; ++i) | |
1099 | req->data[i] = va_arg(list, int); | |
1100 | va_end(list); | |
1101 | req->reply_len = 0; | |
1102 | req->reply_expected = 0; | |
1103 | return pmu_queue_request(req); | |
1104 | } | |
1105 | ||
aacaf9bd | 1106 | int |
1da177e4 LT |
1107 | pmu_queue_request(struct adb_request *req) |
1108 | { | |
1109 | unsigned long flags; | |
1110 | int nsend; | |
1111 | ||
1112 | if (via == NULL) { | |
1113 | req->complete = 1; | |
1114 | return -ENXIO; | |
1115 | } | |
1116 | if (req->nbytes <= 0) { | |
1117 | req->complete = 1; | |
1118 | return 0; | |
1119 | } | |
1120 | nsend = pmu_data_len[req->data[0]][0]; | |
1121 | if (nsend >= 0 && req->nbytes != nsend + 1) { | |
1122 | req->complete = 1; | |
1123 | return -EINVAL; | |
1124 | } | |
1125 | ||
1126 | req->next = NULL; | |
1127 | req->sent = 0; | |
1128 | req->complete = 0; | |
1129 | ||
1130 | spin_lock_irqsave(&pmu_lock, flags); | |
1131 | if (current_req != 0) { | |
1132 | last_req->next = req; | |
1133 | last_req = req; | |
1134 | } else { | |
1135 | current_req = req; | |
1136 | last_req = req; | |
1137 | if (pmu_state == idle) | |
1138 | pmu_start(); | |
1139 | } | |
1140 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1141 | ||
1142 | return 0; | |
1143 | } | |
1144 | ||
1145 | static inline void | |
1146 | wait_for_ack(void) | |
1147 | { | |
1148 | /* Sightly increased the delay, I had one occurrence of the message | |
1149 | * reported | |
1150 | */ | |
1151 | int timeout = 4000; | |
1152 | while ((in_8(&via[B]) & TACK) == 0) { | |
1153 | if (--timeout < 0) { | |
1154 | printk(KERN_ERR "PMU not responding (!ack)\n"); | |
1155 | return; | |
1156 | } | |
1157 | udelay(10); | |
1158 | } | |
1159 | } | |
1160 | ||
1161 | /* New PMU seems to be very sensitive to those timings, so we make sure | |
1162 | * PCI is flushed immediately */ | |
1163 | static inline void | |
1164 | send_byte(int x) | |
1165 | { | |
1166 | volatile unsigned char __iomem *v = via; | |
1167 | ||
1168 | out_8(&v[ACR], in_8(&v[ACR]) | SR_OUT | SR_EXT); | |
1169 | out_8(&v[SR], x); | |
1170 | out_8(&v[B], in_8(&v[B]) & ~TREQ); /* assert TREQ */ | |
1171 | (void)in_8(&v[B]); | |
1172 | } | |
1173 | ||
1174 | static inline void | |
1175 | recv_byte(void) | |
1176 | { | |
1177 | volatile unsigned char __iomem *v = via; | |
1178 | ||
1179 | out_8(&v[ACR], (in_8(&v[ACR]) & ~SR_OUT) | SR_EXT); | |
1180 | in_8(&v[SR]); /* resets SR */ | |
1181 | out_8(&v[B], in_8(&v[B]) & ~TREQ); | |
1182 | (void)in_8(&v[B]); | |
1183 | } | |
1184 | ||
1185 | static inline void | |
1186 | pmu_done(struct adb_request *req) | |
1187 | { | |
1188 | void (*done)(struct adb_request *) = req->done; | |
1189 | mb(); | |
1190 | req->complete = 1; | |
1191 | /* Here, we assume that if the request has a done member, the | |
1192 | * struct request will survive to setting req->complete to 1 | |
1193 | */ | |
1194 | if (done) | |
1195 | (*done)(req); | |
1196 | } | |
1197 | ||
aacaf9bd | 1198 | static void |
1da177e4 LT |
1199 | pmu_start(void) |
1200 | { | |
1201 | struct adb_request *req; | |
1202 | ||
1203 | /* assert pmu_state == idle */ | |
1204 | /* get the packet to send */ | |
1205 | req = current_req; | |
1206 | if (req == 0 || pmu_state != idle | |
1207 | || (/*req->reply_expected && */req_awaiting_reply)) | |
1208 | return; | |
1209 | ||
1210 | pmu_state = sending; | |
1211 | data_index = 1; | |
1212 | data_len = pmu_data_len[req->data[0]][0]; | |
1213 | ||
1214 | /* Sounds safer to make sure ACK is high before writing. This helped | |
1215 | * kill a problem with ADB and some iBooks | |
1216 | */ | |
1217 | wait_for_ack(); | |
1218 | /* set the shift register to shift out and send a byte */ | |
1219 | send_byte(req->data[0]); | |
1220 | } | |
1221 | ||
aacaf9bd | 1222 | void |
1da177e4 LT |
1223 | pmu_poll(void) |
1224 | { | |
1225 | if (!via) | |
1226 | return; | |
1227 | if (disable_poll) | |
1228 | return; | |
7d12e780 | 1229 | via_pmu_interrupt(0, NULL); |
1da177e4 LT |
1230 | } |
1231 | ||
aacaf9bd | 1232 | void |
1da177e4 LT |
1233 | pmu_poll_adb(void) |
1234 | { | |
1235 | if (!via) | |
1236 | return; | |
1237 | if (disable_poll) | |
1238 | return; | |
1239 | /* Kicks ADB read when PMU is suspended */ | |
1240 | adb_int_pending = 1; | |
1241 | do { | |
7d12e780 | 1242 | via_pmu_interrupt(0, NULL); |
1da177e4 LT |
1243 | } while (pmu_suspended && (adb_int_pending || pmu_state != idle |
1244 | || req_awaiting_reply)); | |
1245 | } | |
1246 | ||
aacaf9bd | 1247 | void |
1da177e4 LT |
1248 | pmu_wait_complete(struct adb_request *req) |
1249 | { | |
1250 | if (!via) | |
1251 | return; | |
1252 | while((pmu_state != idle && pmu_state != locked) || !req->complete) | |
7d12e780 | 1253 | via_pmu_interrupt(0, NULL); |
1da177e4 LT |
1254 | } |
1255 | ||
1256 | /* This function loops until the PMU is idle and prevents it from | |
1257 | * anwsering to ADB interrupts. pmu_request can still be called. | |
1258 | * This is done to avoid spurrious shutdowns when we know we'll have | |
1259 | * interrupts switched off for a long time | |
1260 | */ | |
aacaf9bd | 1261 | void |
1da177e4 LT |
1262 | pmu_suspend(void) |
1263 | { | |
1264 | unsigned long flags; | |
1b0e9d44 | 1265 | |
1da177e4 LT |
1266 | if (!via) |
1267 | return; | |
1268 | ||
1269 | spin_lock_irqsave(&pmu_lock, flags); | |
1270 | pmu_suspended++; | |
1271 | if (pmu_suspended > 1) { | |
1272 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1273 | return; | |
1274 | } | |
1275 | ||
1276 | do { | |
1277 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1278 | if (req_awaiting_reply) | |
1279 | adb_int_pending = 1; | |
7d12e780 | 1280 | via_pmu_interrupt(0, NULL); |
1da177e4 LT |
1281 | spin_lock_irqsave(&pmu_lock, flags); |
1282 | if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) { | |
1da177e4 LT |
1283 | if (gpio_irq >= 0) |
1284 | disable_irq_nosync(gpio_irq); | |
1285 | out_8(&via[IER], CB1_INT | IER_CLR); | |
1286 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1da177e4 LT |
1287 | break; |
1288 | } | |
1289 | } while (1); | |
1290 | } | |
1291 | ||
aacaf9bd | 1292 | void |
1da177e4 LT |
1293 | pmu_resume(void) |
1294 | { | |
1295 | unsigned long flags; | |
1296 | ||
1297 | if (!via || (pmu_suspended < 1)) | |
1298 | return; | |
1299 | ||
1300 | spin_lock_irqsave(&pmu_lock, flags); | |
1301 | pmu_suspended--; | |
1302 | if (pmu_suspended > 0) { | |
1303 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1304 | return; | |
1305 | } | |
1306 | adb_int_pending = 1; | |
1da177e4 LT |
1307 | if (gpio_irq >= 0) |
1308 | enable_irq(gpio_irq); | |
1309 | out_8(&via[IER], CB1_INT | IER_SET); | |
1310 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1311 | pmu_poll(); | |
1da177e4 LT |
1312 | } |
1313 | ||
1314 | /* Interrupt data could be the result data from an ADB cmd */ | |
aacaf9bd | 1315 | static void |
7d12e780 | 1316 | pmu_handle_data(unsigned char *data, int len) |
1da177e4 LT |
1317 | { |
1318 | unsigned char ints, pirq; | |
1319 | int i = 0; | |
1320 | ||
1321 | asleep = 0; | |
1322 | if (drop_interrupts || len < 1) { | |
1323 | adb_int_pending = 0; | |
1324 | pmu_irq_stats[8]++; | |
1325 | return; | |
1326 | } | |
1327 | ||
1328 | /* Get PMU interrupt mask */ | |
1329 | ints = data[0]; | |
1330 | ||
1331 | /* Record zero interrupts for stats */ | |
1332 | if (ints == 0) | |
1333 | pmu_irq_stats[9]++; | |
1334 | ||
1335 | /* Hack to deal with ADB autopoll flag */ | |
1336 | if (ints & PMU_INT_ADB) | |
1337 | ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL); | |
1338 | ||
1339 | next: | |
1340 | ||
1341 | if (ints == 0) { | |
1342 | if (i > pmu_irq_stats[10]) | |
1343 | pmu_irq_stats[10] = i; | |
1344 | return; | |
1345 | } | |
1346 | ||
1347 | for (pirq = 0; pirq < 8; pirq++) | |
1348 | if (ints & (1 << pirq)) | |
1349 | break; | |
1350 | pmu_irq_stats[pirq]++; | |
1351 | i++; | |
1352 | ints &= ~(1 << pirq); | |
1353 | ||
1354 | /* Note: for some reason, we get an interrupt with len=1, | |
1355 | * data[0]==0 after each normal ADB interrupt, at least | |
1356 | * on the Pismo. Still investigating... --BenH | |
1357 | */ | |
1358 | if ((1 << pirq) & PMU_INT_ADB) { | |
1359 | if ((data[0] & PMU_INT_ADB_AUTO) == 0) { | |
1360 | struct adb_request *req = req_awaiting_reply; | |
1361 | if (req == 0) { | |
1362 | printk(KERN_ERR "PMU: extra ADB reply\n"); | |
1363 | return; | |
1364 | } | |
1365 | req_awaiting_reply = NULL; | |
1366 | if (len <= 2) | |
1367 | req->reply_len = 0; | |
1368 | else { | |
1369 | memcpy(req->reply, data + 1, len - 1); | |
1370 | req->reply_len = len - 1; | |
1371 | } | |
1372 | pmu_done(req); | |
1373 | } else { | |
1da177e4 LT |
1374 | if (len == 4 && data[1] == 0x2c) { |
1375 | extern int xmon_wants_key, xmon_adb_keycode; | |
1376 | if (xmon_wants_key) { | |
1377 | xmon_adb_keycode = data[2]; | |
1378 | return; | |
1379 | } | |
1380 | } | |
1da177e4 LT |
1381 | #ifdef CONFIG_ADB |
1382 | /* | |
1383 | * XXX On the [23]400 the PMU gives us an up | |
1384 | * event for keycodes 0x74 or 0x75 when the PC | |
1385 | * card eject buttons are released, so we | |
1386 | * ignore those events. | |
1387 | */ | |
1388 | if (!(pmu_kind == PMU_OHARE_BASED && len == 4 | |
1389 | && data[1] == 0x2c && data[3] == 0xff | |
1390 | && (data[2] & ~1) == 0xf4)) | |
7d12e780 | 1391 | adb_input(data+1, len-1, 1); |
1da177e4 LT |
1392 | #endif /* CONFIG_ADB */ |
1393 | } | |
1394 | } | |
1395 | /* Sound/brightness button pressed */ | |
1396 | else if ((1 << pirq) & PMU_INT_SNDBRT) { | |
1397 | #ifdef CONFIG_PMAC_BACKLIGHT | |
1398 | if (len == 3) | |
4b755999 MH |
1399 | pmac_backlight_set_legacy_brightness_pmu(data[1] >> 4); |
1400 | #endif | |
1da177e4 LT |
1401 | } |
1402 | /* Tick interrupt */ | |
1403 | else if ((1 << pirq) & PMU_INT_TICK) { | |
1da177e4 LT |
1404 | /* Environement or tick interrupt, query batteries */ |
1405 | if (pmu_battery_count) { | |
1406 | if ((--query_batt_timer) == 0) { | |
1407 | query_battery_state(); | |
1408 | query_batt_timer = BATTERY_POLLING_COUNT; | |
1409 | } | |
1410 | } | |
1411 | } | |
1412 | else if ((1 << pirq) & PMU_INT_ENVIRONMENT) { | |
1413 | if (pmu_battery_count) | |
1414 | query_battery_state(); | |
1415 | pmu_pass_intr(data, len); | |
9e8e30a0 JB |
1416 | /* len == 6 is probably a bad check. But how do I |
1417 | * know what PMU versions send what events here? */ | |
1418 | if (len == 6) { | |
1419 | via_pmu_event(PMU_EVT_POWER, !!(data[1]&8)); | |
1420 | via_pmu_event(PMU_EVT_LID, data[1]&1); | |
1421 | } | |
1da177e4 LT |
1422 | } else { |
1423 | pmu_pass_intr(data, len); | |
1da177e4 LT |
1424 | } |
1425 | goto next; | |
1426 | } | |
1427 | ||
aacaf9bd | 1428 | static struct adb_request* |
7d12e780 | 1429 | pmu_sr_intr(void) |
1da177e4 LT |
1430 | { |
1431 | struct adb_request *req; | |
1432 | int bite = 0; | |
1433 | ||
1434 | if (via[B] & TREQ) { | |
1435 | printk(KERN_ERR "PMU: spurious SR intr (%x)\n", via[B]); | |
1436 | out_8(&via[IFR], SR_INT); | |
1437 | return NULL; | |
1438 | } | |
1439 | /* The ack may not yet be low when we get the interrupt */ | |
1440 | while ((in_8(&via[B]) & TACK) != 0) | |
1441 | ; | |
1442 | ||
1443 | /* if reading grab the byte, and reset the interrupt */ | |
1444 | if (pmu_state == reading || pmu_state == reading_intr) | |
1445 | bite = in_8(&via[SR]); | |
1446 | ||
1447 | /* reset TREQ and wait for TACK to go high */ | |
1448 | out_8(&via[B], in_8(&via[B]) | TREQ); | |
1449 | wait_for_ack(); | |
1450 | ||
1451 | switch (pmu_state) { | |
1452 | case sending: | |
1453 | req = current_req; | |
1454 | if (data_len < 0) { | |
1455 | data_len = req->nbytes - 1; | |
1456 | send_byte(data_len); | |
1457 | break; | |
1458 | } | |
1459 | if (data_index <= data_len) { | |
1460 | send_byte(req->data[data_index++]); | |
1461 | break; | |
1462 | } | |
1463 | req->sent = 1; | |
1464 | data_len = pmu_data_len[req->data[0]][1]; | |
1465 | if (data_len == 0) { | |
1466 | pmu_state = idle; | |
1467 | current_req = req->next; | |
1468 | if (req->reply_expected) | |
1469 | req_awaiting_reply = req; | |
1470 | else | |
1471 | return req; | |
1472 | } else { | |
1473 | pmu_state = reading; | |
1474 | data_index = 0; | |
1475 | reply_ptr = req->reply + req->reply_len; | |
1476 | recv_byte(); | |
1477 | } | |
1478 | break; | |
1479 | ||
1480 | case intack: | |
1481 | data_index = 0; | |
1482 | data_len = -1; | |
1483 | pmu_state = reading_intr; | |
1484 | reply_ptr = interrupt_data[int_data_last]; | |
1485 | recv_byte(); | |
1486 | if (gpio_irq >= 0 && !gpio_irq_enabled) { | |
1487 | enable_irq(gpio_irq); | |
1488 | gpio_irq_enabled = 1; | |
1489 | } | |
1490 | break; | |
1491 | ||
1492 | case reading: | |
1493 | case reading_intr: | |
1494 | if (data_len == -1) { | |
1495 | data_len = bite; | |
1496 | if (bite > 32) | |
1497 | printk(KERN_ERR "PMU: bad reply len %d\n", bite); | |
1498 | } else if (data_index < 32) { | |
1499 | reply_ptr[data_index++] = bite; | |
1500 | } | |
1501 | if (data_index < data_len) { | |
1502 | recv_byte(); | |
1503 | break; | |
1504 | } | |
1505 | ||
1506 | if (pmu_state == reading_intr) { | |
1507 | pmu_state = idle; | |
1508 | int_data_state[int_data_last] = int_data_ready; | |
1509 | interrupt_data_len[int_data_last] = data_len; | |
1510 | } else { | |
1511 | req = current_req; | |
1512 | /* | |
1513 | * For PMU sleep and freq change requests, we lock the | |
c03983ac | 1514 | * PMU until it's explicitly unlocked. This avoids any |
1da177e4 LT |
1515 | * spurrious event polling getting in |
1516 | */ | |
1517 | current_req = req->next; | |
1518 | req->reply_len += data_index; | |
1519 | if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED) | |
1520 | pmu_state = locked; | |
1521 | else | |
1522 | pmu_state = idle; | |
1523 | return req; | |
1524 | } | |
1525 | break; | |
1526 | ||
1527 | default: | |
1528 | printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n", | |
1529 | pmu_state); | |
1530 | } | |
1531 | return NULL; | |
1532 | } | |
1533 | ||
aacaf9bd | 1534 | static irqreturn_t |
7d12e780 | 1535 | via_pmu_interrupt(int irq, void *arg) |
1da177e4 LT |
1536 | { |
1537 | unsigned long flags; | |
1538 | int intr; | |
1539 | int nloop = 0; | |
1540 | int int_data = -1; | |
1541 | struct adb_request *req = NULL; | |
1542 | int handled = 0; | |
1543 | ||
1544 | /* This is a bit brutal, we can probably do better */ | |
1545 | spin_lock_irqsave(&pmu_lock, flags); | |
1546 | ++disable_poll; | |
1547 | ||
1548 | for (;;) { | |
1549 | intr = in_8(&via[IFR]) & (SR_INT | CB1_INT); | |
1550 | if (intr == 0) | |
1551 | break; | |
1552 | handled = 1; | |
1553 | if (++nloop > 1000) { | |
1554 | printk(KERN_DEBUG "PMU: stuck in intr loop, " | |
1555 | "intr=%x, ier=%x pmu_state=%d\n", | |
1556 | intr, in_8(&via[IER]), pmu_state); | |
1557 | break; | |
1558 | } | |
1559 | out_8(&via[IFR], intr); | |
1560 | if (intr & CB1_INT) { | |
1561 | adb_int_pending = 1; | |
1562 | pmu_irq_stats[0]++; | |
1563 | } | |
1564 | if (intr & SR_INT) { | |
7d12e780 | 1565 | req = pmu_sr_intr(); |
1da177e4 LT |
1566 | if (req) |
1567 | break; | |
1568 | } | |
1569 | } | |
1570 | ||
1571 | recheck: | |
1572 | if (pmu_state == idle) { | |
1573 | if (adb_int_pending) { | |
1574 | if (int_data_state[0] == int_data_empty) | |
1575 | int_data_last = 0; | |
1576 | else if (int_data_state[1] == int_data_empty) | |
1577 | int_data_last = 1; | |
1578 | else | |
1579 | goto no_free_slot; | |
1580 | pmu_state = intack; | |
1581 | int_data_state[int_data_last] = int_data_fill; | |
1582 | /* Sounds safer to make sure ACK is high before writing. | |
1583 | * This helped kill a problem with ADB and some iBooks | |
1584 | */ | |
1585 | wait_for_ack(); | |
1586 | send_byte(PMU_INT_ACK); | |
1587 | adb_int_pending = 0; | |
1588 | } else if (current_req) | |
1589 | pmu_start(); | |
1590 | } | |
1591 | no_free_slot: | |
1592 | /* Mark the oldest buffer for flushing */ | |
1593 | if (int_data_state[!int_data_last] == int_data_ready) { | |
1594 | int_data_state[!int_data_last] = int_data_flush; | |
1595 | int_data = !int_data_last; | |
1596 | } else if (int_data_state[int_data_last] == int_data_ready) { | |
1597 | int_data_state[int_data_last] = int_data_flush; | |
1598 | int_data = int_data_last; | |
1599 | } | |
1600 | --disable_poll; | |
1601 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1602 | ||
1603 | /* Deal with completed PMU requests outside of the lock */ | |
1604 | if (req) { | |
1605 | pmu_done(req); | |
1606 | req = NULL; | |
1607 | } | |
1608 | ||
1609 | /* Deal with interrupt datas outside of the lock */ | |
1610 | if (int_data >= 0) { | |
7d12e780 | 1611 | pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data]); |
1da177e4 LT |
1612 | spin_lock_irqsave(&pmu_lock, flags); |
1613 | ++disable_poll; | |
1614 | int_data_state[int_data] = int_data_empty; | |
1615 | int_data = -1; | |
1616 | goto recheck; | |
1617 | } | |
1618 | ||
1619 | return IRQ_RETVAL(handled); | |
1620 | } | |
1621 | ||
aacaf9bd | 1622 | void |
1da177e4 LT |
1623 | pmu_unlock(void) |
1624 | { | |
1625 | unsigned long flags; | |
1626 | ||
1627 | spin_lock_irqsave(&pmu_lock, flags); | |
1628 | if (pmu_state == locked) | |
1629 | pmu_state = idle; | |
1630 | adb_int_pending = 1; | |
1631 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1632 | } | |
1633 | ||
1634 | ||
aacaf9bd | 1635 | static irqreturn_t |
7d12e780 | 1636 | gpio1_interrupt(int irq, void *arg) |
1da177e4 LT |
1637 | { |
1638 | unsigned long flags; | |
1639 | ||
1640 | if ((in_8(gpio_reg + 0x9) & 0x02) == 0) { | |
1641 | spin_lock_irqsave(&pmu_lock, flags); | |
1642 | if (gpio_irq_enabled > 0) { | |
1643 | disable_irq_nosync(gpio_irq); | |
1644 | gpio_irq_enabled = 0; | |
1645 | } | |
1646 | pmu_irq_stats[1]++; | |
1647 | adb_int_pending = 1; | |
1648 | spin_unlock_irqrestore(&pmu_lock, flags); | |
7d12e780 | 1649 | via_pmu_interrupt(0, NULL); |
1da177e4 LT |
1650 | return IRQ_HANDLED; |
1651 | } | |
1652 | return IRQ_NONE; | |
1653 | } | |
1654 | ||
aacaf9bd | 1655 | void |
1da177e4 LT |
1656 | pmu_enable_irled(int on) |
1657 | { | |
1658 | struct adb_request req; | |
1659 | ||
1660 | if (vias == NULL) | |
1661 | return ; | |
1662 | if (pmu_kind == PMU_KEYLARGO_BASED) | |
1663 | return ; | |
1664 | ||
1665 | pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED | | |
1666 | (on ? PMU_POW_ON : PMU_POW_OFF)); | |
1667 | pmu_wait_complete(&req); | |
1668 | } | |
1669 | ||
aacaf9bd | 1670 | void |
1da177e4 LT |
1671 | pmu_restart(void) |
1672 | { | |
1673 | struct adb_request req; | |
1674 | ||
1675 | if (via == NULL) | |
1676 | return; | |
1677 | ||
1678 | local_irq_disable(); | |
1679 | ||
1680 | drop_interrupts = 1; | |
1681 | ||
1682 | if (pmu_kind != PMU_KEYLARGO_BASED) { | |
1683 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB | | |
1684 | PMU_INT_TICK ); | |
1685 | while(!req.complete) | |
1686 | pmu_poll(); | |
1687 | } | |
1688 | ||
1689 | pmu_request(&req, NULL, 1, PMU_RESET); | |
1690 | pmu_wait_complete(&req); | |
1691 | for (;;) | |
1692 | ; | |
1693 | } | |
1694 | ||
aacaf9bd | 1695 | void |
1da177e4 LT |
1696 | pmu_shutdown(void) |
1697 | { | |
1698 | struct adb_request req; | |
1699 | ||
1700 | if (via == NULL) | |
1701 | return; | |
1702 | ||
1703 | local_irq_disable(); | |
1704 | ||
1705 | drop_interrupts = 1; | |
1706 | ||
1707 | if (pmu_kind != PMU_KEYLARGO_BASED) { | |
1708 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB | | |
1709 | PMU_INT_TICK ); | |
1710 | pmu_wait_complete(&req); | |
1711 | } else { | |
1712 | /* Disable server mode on shutdown or we'll just | |
1713 | * wake up again | |
1714 | */ | |
1715 | pmu_set_server_mode(0); | |
1716 | } | |
1717 | ||
1718 | pmu_request(&req, NULL, 5, PMU_SHUTDOWN, | |
1719 | 'M', 'A', 'T', 'T'); | |
1720 | pmu_wait_complete(&req); | |
1721 | for (;;) | |
1722 | ; | |
1723 | } | |
1724 | ||
1725 | int | |
1726 | pmu_present(void) | |
1727 | { | |
1728 | return via != 0; | |
1729 | } | |
1730 | ||
e120e8d0 | 1731 | #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_PPC32) |
1da177e4 LT |
1732 | #ifdef DEBUG_SLEEP |
1733 | /* N.B. This doesn't work on the 3400 */ | |
aacaf9bd | 1734 | void |
1da177e4 LT |
1735 | pmu_blink(int n) |
1736 | { | |
1737 | struct adb_request req; | |
1738 | ||
1739 | memset(&req, 0, sizeof(req)); | |
1740 | ||
1741 | for (; n > 0; --n) { | |
1742 | req.nbytes = 4; | |
1743 | req.done = NULL; | |
1744 | req.data[0] = 0xee; | |
1745 | req.data[1] = 4; | |
1746 | req.data[2] = 0; | |
1747 | req.data[3] = 1; | |
1748 | req.reply[0] = ADB_RET_OK; | |
1749 | req.reply_len = 1; | |
1750 | req.reply_expected = 0; | |
1751 | pmu_polled_request(&req); | |
1752 | mdelay(50); | |
1753 | req.nbytes = 4; | |
1754 | req.done = NULL; | |
1755 | req.data[0] = 0xee; | |
1756 | req.data[1] = 4; | |
1757 | req.data[2] = 0; | |
1758 | req.data[3] = 0; | |
1759 | req.reply[0] = ADB_RET_OK; | |
1760 | req.reply_len = 1; | |
1761 | req.reply_expected = 0; | |
1762 | pmu_polled_request(&req); | |
1763 | mdelay(50); | |
1764 | } | |
1765 | mdelay(50); | |
1766 | } | |
1767 | #endif | |
1768 | ||
1769 | /* | |
1770 | * Put the powerbook to sleep. | |
1771 | */ | |
1772 | ||
aacaf9bd | 1773 | static u32 save_via[8]; |
1da177e4 | 1774 | |
aacaf9bd | 1775 | static void |
1da177e4 LT |
1776 | save_via_state(void) |
1777 | { | |
1778 | save_via[0] = in_8(&via[ANH]); | |
1779 | save_via[1] = in_8(&via[DIRA]); | |
1780 | save_via[2] = in_8(&via[B]); | |
1781 | save_via[3] = in_8(&via[DIRB]); | |
1782 | save_via[4] = in_8(&via[PCR]); | |
1783 | save_via[5] = in_8(&via[ACR]); | |
1784 | save_via[6] = in_8(&via[T1CL]); | |
1785 | save_via[7] = in_8(&via[T1CH]); | |
1786 | } | |
aacaf9bd | 1787 | static void |
1da177e4 LT |
1788 | restore_via_state(void) |
1789 | { | |
1790 | out_8(&via[ANH], save_via[0]); | |
1791 | out_8(&via[DIRA], save_via[1]); | |
1792 | out_8(&via[B], save_via[2]); | |
1793 | out_8(&via[DIRB], save_via[3]); | |
1794 | out_8(&via[PCR], save_via[4]); | |
1795 | out_8(&via[ACR], save_via[5]); | |
1796 | out_8(&via[T1CL], save_via[6]); | |
1797 | out_8(&via[T1CH], save_via[7]); | |
1798 | out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */ | |
1799 | out_8(&via[IFR], 0x7f); /* clear IFR */ | |
1800 | out_8(&via[IER], IER_SET | SR_INT | CB1_INT); | |
1801 | } | |
1802 | ||
d565dd3b BH |
1803 | extern void pmu_backlight_set_sleep(int sleep); |
1804 | ||
aacaf9bd | 1805 | static int |
1da177e4 LT |
1806 | pmac_suspend_devices(void) |
1807 | { | |
1808 | int ret; | |
1809 | ||
1810 | pm_prepare_console(); | |
1811 | ||
1da177e4 LT |
1812 | /* Sync the disks. */ |
1813 | /* XXX It would be nice to have some way to ensure that | |
1814 | * nobody is dirtying any new buffers while we wait. That | |
1815 | * could be achieved using the refrigerator for processes | |
1816 | * that swsusp uses | |
1817 | */ | |
1818 | sys_sync(); | |
1819 | ||
1da177e4 LT |
1820 | /* Send suspend call to devices, hold the device core's dpm_sem */ |
1821 | ret = device_suspend(PMSG_SUSPEND); | |
1822 | if (ret) { | |
1da177e4 LT |
1823 | printk(KERN_ERR "Driver sleep failed\n"); |
1824 | return -EBUSY; | |
1825 | } | |
1826 | ||
d565dd3b BH |
1827 | #ifdef CONFIG_PMAC_BACKLIGHT |
1828 | /* Tell backlight code not to muck around with the chip anymore */ | |
1829 | pmu_backlight_set_sleep(1); | |
1830 | #endif | |
1831 | ||
5b9ca526 BH |
1832 | /* Call platform functions marked "on sleep" */ |
1833 | pmac_pfunc_i2c_suspend(); | |
1834 | pmac_pfunc_base_suspend(); | |
1835 | ||
e521dca6 | 1836 | /* Stop preemption */ |
1da177e4 LT |
1837 | preempt_disable(); |
1838 | ||
1839 | /* Make sure the decrementer won't interrupt us */ | |
1840 | asm volatile("mtdec %0" : : "r" (0x7fffffff)); | |
1841 | /* Make sure any pending DEC interrupt occurring while we did | |
1842 | * the above didn't re-enable the DEC */ | |
1843 | mb(); | |
1844 | asm volatile("mtdec %0" : : "r" (0x7fffffff)); | |
1845 | ||
1846 | /* We can now disable MSR_EE. This code of course works properly only | |
1847 | * on UP machines... For SMP, if we ever implement sleep, we'll have to | |
1848 | * stop the "other" CPUs way before we do all that stuff. | |
1849 | */ | |
1850 | local_irq_disable(); | |
1851 | ||
1852 | /* Broadcast power down irq | |
1853 | * This isn't that useful in most cases (only directly wired devices can | |
1854 | * use this but still... This will take care of sysdev's as well, so | |
1855 | * we exit from here with local irqs disabled and PIC off. | |
1856 | */ | |
bf2049f9 | 1857 | ret = device_power_down(PMSG_SUSPEND); |
1da177e4 LT |
1858 | if (ret) { |
1859 | wakeup_decrementer(); | |
1860 | local_irq_enable(); | |
1861 | preempt_enable(); | |
1862 | device_resume(); | |
1da177e4 LT |
1863 | printk(KERN_ERR "Driver powerdown failed\n"); |
1864 | return -EBUSY; | |
1865 | } | |
1866 | ||
5474c120 MH |
1867 | /* Wait for completion of async requests */ |
1868 | while (!batt_req.complete) | |
1da177e4 LT |
1869 | pmu_poll(); |
1870 | ||
1871 | /* Giveup the lazy FPU & vec so we don't have to back them | |
1872 | * up from the low level code | |
1873 | */ | |
1874 | enable_kernel_fp(); | |
1875 | ||
1876 | #ifdef CONFIG_ALTIVEC | |
1877 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) | |
1878 | enable_kernel_altivec(); | |
1879 | #endif /* CONFIG_ALTIVEC */ | |
1880 | ||
1881 | return 0; | |
1882 | } | |
1883 | ||
aacaf9bd | 1884 | static int |
1da177e4 LT |
1885 | pmac_wakeup_devices(void) |
1886 | { | |
1887 | mdelay(100); | |
1888 | ||
d565dd3b BH |
1889 | #ifdef CONFIG_PMAC_BACKLIGHT |
1890 | /* Tell backlight code it can use the chip again */ | |
1891 | pmu_backlight_set_sleep(0); | |
1892 | #endif | |
1893 | ||
1da177e4 LT |
1894 | /* Power back up system devices (including the PIC) */ |
1895 | device_power_up(); | |
1896 | ||
1897 | /* Force a poll of ADB interrupts */ | |
1898 | adb_int_pending = 1; | |
7d12e780 | 1899 | via_pmu_interrupt(0, NULL); |
1da177e4 LT |
1900 | |
1901 | /* Restart jiffies & scheduling */ | |
1902 | wakeup_decrementer(); | |
1903 | ||
1904 | /* Re-enable local CPU interrupts */ | |
1905 | local_irq_enable(); | |
b16eeb47 | 1906 | mdelay(10); |
1da177e4 LT |
1907 | preempt_enable(); |
1908 | ||
5b9ca526 BH |
1909 | /* Call platform functions marked "on wake" */ |
1910 | pmac_pfunc_base_resume(); | |
1911 | pmac_pfunc_i2c_resume(); | |
1912 | ||
1da177e4 LT |
1913 | /* Resume devices */ |
1914 | device_resume(); | |
1915 | ||
1da177e4 LT |
1916 | pm_restore_console(); |
1917 | ||
1918 | return 0; | |
1919 | } | |
1920 | ||
1921 | #define GRACKLE_PM (1<<7) | |
1922 | #define GRACKLE_DOZE (1<<5) | |
1923 | #define GRACKLE_NAP (1<<4) | |
1924 | #define GRACKLE_SLEEP (1<<3) | |
1925 | ||
3bea6313 | 1926 | static int powerbook_sleep_grackle(void) |
1da177e4 LT |
1927 | { |
1928 | unsigned long save_l2cr; | |
1929 | unsigned short pmcr1; | |
1930 | struct adb_request req; | |
1931 | int ret; | |
1932 | struct pci_dev *grackle; | |
1933 | ||
c78f8305 | 1934 | grackle = pci_get_bus_and_slot(0, 0); |
1da177e4 LT |
1935 | if (!grackle) |
1936 | return -ENODEV; | |
1937 | ||
1938 | ret = pmac_suspend_devices(); | |
1939 | if (ret) { | |
1940 | printk(KERN_ERR "Sleep rejected by devices\n"); | |
1941 | return ret; | |
1942 | } | |
1943 | ||
1944 | /* Turn off various things. Darwin does some retry tests here... */ | |
1945 | pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE); | |
1946 | pmu_wait_complete(&req); | |
1947 | pmu_request(&req, NULL, 2, PMU_POWER_CTRL, | |
1948 | PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY); | |
1949 | pmu_wait_complete(&req); | |
1950 | ||
1951 | /* For 750, save backside cache setting and disable it */ | |
1952 | save_l2cr = _get_L2CR(); /* (returns -1 if not available) */ | |
1953 | ||
1954 | if (!__fake_sleep) { | |
1955 | /* Ask the PMU to put us to sleep */ | |
1956 | pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T'); | |
1957 | pmu_wait_complete(&req); | |
1958 | } | |
1959 | ||
1960 | /* The VIA is supposed not to be restored correctly*/ | |
1961 | save_via_state(); | |
1962 | /* We shut down some HW */ | |
1963 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1); | |
1964 | ||
1965 | pci_read_config_word(grackle, 0x70, &pmcr1); | |
1966 | /* Apparently, MacOS uses NAP mode for Grackle ??? */ | |
1967 | pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP); | |
1968 | pmcr1 |= GRACKLE_PM|GRACKLE_NAP; | |
1969 | pci_write_config_word(grackle, 0x70, pmcr1); | |
1970 | ||
1971 | /* Call low-level ASM sleep handler */ | |
1972 | if (__fake_sleep) | |
1973 | mdelay(5000); | |
1974 | else | |
1975 | low_sleep_handler(); | |
1976 | ||
1977 | /* We're awake again, stop grackle PM */ | |
1978 | pci_read_config_word(grackle, 0x70, &pmcr1); | |
1979 | pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP); | |
1980 | pci_write_config_word(grackle, 0x70, pmcr1); | |
1981 | ||
c78f8305 AC |
1982 | pci_dev_put(grackle); |
1983 | ||
1da177e4 LT |
1984 | /* Make sure the PMU is idle */ |
1985 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0); | |
1986 | restore_via_state(); | |
1987 | ||
1988 | /* Restore L2 cache */ | |
1989 | if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0) | |
1990 | _set_L2CR(save_l2cr); | |
1991 | ||
1992 | /* Restore userland MMU context */ | |
6218a761 | 1993 | set_context(current->active_mm->context.id, current->active_mm->pgd); |
1da177e4 LT |
1994 | |
1995 | /* Power things up */ | |
1996 | pmu_unlock(); | |
1997 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask); | |
1998 | pmu_wait_complete(&req); | |
1999 | pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, | |
2000 | PMU_POW0_ON|PMU_POW0_HARD_DRIVE); | |
2001 | pmu_wait_complete(&req); | |
2002 | pmu_request(&req, NULL, 2, PMU_POWER_CTRL, | |
2003 | PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY); | |
2004 | pmu_wait_complete(&req); | |
2005 | ||
2006 | pmac_wakeup_devices(); | |
2007 | ||
2008 | return 0; | |
2009 | } | |
2010 | ||
aacaf9bd | 2011 | static int |
1da177e4 LT |
2012 | powerbook_sleep_Core99(void) |
2013 | { | |
2014 | unsigned long save_l2cr; | |
2015 | unsigned long save_l3cr; | |
2016 | struct adb_request req; | |
2017 | int ret; | |
2018 | ||
2019 | if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) { | |
2020 | printk(KERN_ERR "Sleep mode not supported on this machine\n"); | |
2021 | return -ENOSYS; | |
2022 | } | |
2023 | ||
2024 | if (num_online_cpus() > 1 || cpu_is_offline(0)) | |
2025 | return -EAGAIN; | |
2026 | ||
2027 | ret = pmac_suspend_devices(); | |
2028 | if (ret) { | |
2029 | printk(KERN_ERR "Sleep rejected by devices\n"); | |
2030 | return ret; | |
2031 | } | |
2032 | ||
b16eeb47 BH |
2033 | /* Stop environment and ADB interrupts */ |
2034 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0); | |
2035 | pmu_wait_complete(&req); | |
1da177e4 LT |
2036 | |
2037 | /* Tell PMU what events will wake us up */ | |
2038 | pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS, | |
2039 | 0xff, 0xff); | |
2040 | pmu_wait_complete(&req); | |
2041 | pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS, | |
2042 | 0, PMU_PWR_WAKEUP_KEY | | |
2043 | (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0)); | |
2044 | pmu_wait_complete(&req); | |
2045 | ||
2046 | /* Save the state of the L2 and L3 caches */ | |
2047 | save_l3cr = _get_L3CR(); /* (returns -1 if not available) */ | |
2048 | save_l2cr = _get_L2CR(); /* (returns -1 if not available) */ | |
2049 | ||
2050 | if (!__fake_sleep) { | |
2051 | /* Ask the PMU to put us to sleep */ | |
2052 | pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T'); | |
2053 | pmu_wait_complete(&req); | |
2054 | } | |
2055 | ||
2056 | /* The VIA is supposed not to be restored correctly*/ | |
2057 | save_via_state(); | |
2058 | ||
2059 | /* Shut down various ASICs. There's a chance that we can no longer | |
2060 | * talk to the PMU after this, so I moved it to _after_ sending the | |
2061 | * sleep command to it. Still need to be checked. | |
2062 | */ | |
2063 | pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1); | |
2064 | ||
2065 | /* Call low-level ASM sleep handler */ | |
2066 | if (__fake_sleep) | |
2067 | mdelay(5000); | |
2068 | else | |
2069 | low_sleep_handler(); | |
2070 | ||
2071 | /* Restore Apple core ASICs state */ | |
2072 | pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0); | |
2073 | ||
2074 | /* Restore VIA */ | |
2075 | restore_via_state(); | |
2076 | ||
0086b5ec BH |
2077 | /* tweak LPJ before cpufreq is there */ |
2078 | loops_per_jiffy *= 2; | |
2079 | ||
1da177e4 LT |
2080 | /* Restore video */ |
2081 | pmac_call_early_video_resume(); | |
2082 | ||
2083 | /* Restore L2 cache */ | |
2084 | if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0) | |
2085 | _set_L2CR(save_l2cr); | |
2086 | /* Restore L3 cache */ | |
2087 | if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0) | |
2088 | _set_L3CR(save_l3cr); | |
2089 | ||
2090 | /* Restore userland MMU context */ | |
6218a761 | 2091 | set_context(current->active_mm->context.id, current->active_mm->pgd); |
1da177e4 LT |
2092 | |
2093 | /* Tell PMU we are ready */ | |
2094 | pmu_unlock(); | |
2095 | pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2); | |
2096 | pmu_wait_complete(&req); | |
2097 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask); | |
2098 | pmu_wait_complete(&req); | |
2099 | ||
0086b5ec BH |
2100 | /* Restore LPJ, cpufreq will adjust the cpu frequency */ |
2101 | loops_per_jiffy /= 2; | |
2102 | ||
1da177e4 LT |
2103 | pmac_wakeup_devices(); |
2104 | ||
2105 | return 0; | |
2106 | } | |
2107 | ||
2108 | #define PB3400_MEM_CTRL 0xf8000000 | |
2109 | #define PB3400_MEM_CTRL_SLEEP 0x70 | |
2110 | ||
887ef35a PM |
2111 | static void __iomem *pb3400_mem_ctrl; |
2112 | ||
2113 | static void powerbook_sleep_init_3400(void) | |
2114 | { | |
2115 | /* map in the memory controller registers */ | |
2116 | pb3400_mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100); | |
2117 | if (pb3400_mem_ctrl == NULL) | |
2118 | printk(KERN_WARNING "ioremap failed: sleep won't be possible"); | |
2119 | } | |
2120 | ||
2121 | static int powerbook_sleep_3400(void) | |
1da177e4 LT |
2122 | { |
2123 | int ret, i, x; | |
2124 | unsigned int hid0; | |
887ef35a | 2125 | unsigned long msr; |
1da177e4 | 2126 | struct adb_request sleep_req; |
1da177e4 LT |
2127 | unsigned int __iomem *mem_ctrl_sleep; |
2128 | ||
887ef35a | 2129 | if (pb3400_mem_ctrl == NULL) |
1da177e4 | 2130 | return -ENOMEM; |
887ef35a | 2131 | mem_ctrl_sleep = pb3400_mem_ctrl + PB3400_MEM_CTRL_SLEEP; |
1da177e4 LT |
2132 | |
2133 | ret = pmac_suspend_devices(); | |
2134 | if (ret) { | |
1da177e4 LT |
2135 | printk(KERN_ERR "Sleep rejected by devices\n"); |
2136 | return ret; | |
2137 | } | |
2138 | ||
1da177e4 LT |
2139 | /* Set the memory controller to keep the memory refreshed |
2140 | while we're asleep */ | |
2141 | for (i = 0x403f; i >= 0x4000; --i) { | |
2142 | out_be32(mem_ctrl_sleep, i); | |
2143 | do { | |
2144 | x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff; | |
2145 | } while (x == 0); | |
2146 | if (x >= 0x100) | |
2147 | break; | |
2148 | } | |
2149 | ||
2150 | /* Ask the PMU to put us to sleep */ | |
2151 | pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T'); | |
887ef35a PM |
2152 | pmu_wait_complete(&sleep_req); |
2153 | pmu_unlock(); | |
1da177e4 | 2154 | |
887ef35a | 2155 | pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1); |
1da177e4 | 2156 | |
1da177e4 LT |
2157 | asleep = 1; |
2158 | ||
2159 | /* Put the CPU into sleep mode */ | |
21fe3301 | 2160 | hid0 = mfspr(SPRN_HID0); |
1da177e4 | 2161 | hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP; |
21fe3301 | 2162 | mtspr(SPRN_HID0, hid0); |
887ef35a PM |
2163 | local_irq_enable(); |
2164 | msr = mfmsr() | MSR_POW; | |
2165 | while (asleep) { | |
2166 | mb(); | |
2167 | mtmsr(msr); | |
2168 | isync(); | |
2169 | } | |
2170 | local_irq_disable(); | |
1da177e4 LT |
2171 | |
2172 | /* OK, we're awake again, start restoring things */ | |
2173 | out_be32(mem_ctrl_sleep, 0x3f); | |
887ef35a | 2174 | pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0); |
1da177e4 LT |
2175 | |
2176 | pmac_wakeup_devices(); | |
1da177e4 LT |
2177 | |
2178 | return 0; | |
2179 | } | |
2180 | ||
e120e8d0 | 2181 | #endif /* CONFIG_PM_SLEEP && CONFIG_PPC32 */ |
8c870933 | 2182 | |
1da177e4 LT |
2183 | /* |
2184 | * Support for /dev/pmu device | |
2185 | */ | |
2186 | #define RB_SIZE 0x10 | |
2187 | struct pmu_private { | |
2188 | struct list_head list; | |
2189 | int rb_get; | |
2190 | int rb_put; | |
2191 | struct rb_entry { | |
2192 | unsigned short len; | |
2193 | unsigned char data[16]; | |
2194 | } rb_buf[RB_SIZE]; | |
2195 | wait_queue_head_t wait; | |
2196 | spinlock_t lock; | |
2197 | #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) | |
2198 | int backlight_locker; | |
4b755999 | 2199 | #endif |
1da177e4 LT |
2200 | }; |
2201 | ||
2202 | static LIST_HEAD(all_pmu_pvt); | |
aacaf9bd | 2203 | static DEFINE_SPINLOCK(all_pvt_lock); |
1da177e4 | 2204 | |
aacaf9bd | 2205 | static void |
1da177e4 LT |
2206 | pmu_pass_intr(unsigned char *data, int len) |
2207 | { | |
2208 | struct pmu_private *pp; | |
2209 | struct list_head *list; | |
2210 | int i; | |
2211 | unsigned long flags; | |
2212 | ||
2213 | if (len > sizeof(pp->rb_buf[0].data)) | |
2214 | len = sizeof(pp->rb_buf[0].data); | |
2215 | spin_lock_irqsave(&all_pvt_lock, flags); | |
2216 | for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) { | |
2217 | pp = list_entry(list, struct pmu_private, list); | |
2218 | spin_lock(&pp->lock); | |
2219 | i = pp->rb_put + 1; | |
2220 | if (i >= RB_SIZE) | |
2221 | i = 0; | |
2222 | if (i != pp->rb_get) { | |
2223 | struct rb_entry *rp = &pp->rb_buf[pp->rb_put]; | |
2224 | rp->len = len; | |
2225 | memcpy(rp->data, data, len); | |
2226 | pp->rb_put = i; | |
2227 | wake_up_interruptible(&pp->wait); | |
2228 | } | |
2229 | spin_unlock(&pp->lock); | |
2230 | } | |
2231 | spin_unlock_irqrestore(&all_pvt_lock, flags); | |
2232 | } | |
2233 | ||
aacaf9bd | 2234 | static int |
1da177e4 LT |
2235 | pmu_open(struct inode *inode, struct file *file) |
2236 | { | |
2237 | struct pmu_private *pp; | |
2238 | unsigned long flags; | |
2239 | ||
2240 | pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL); | |
2241 | if (pp == 0) | |
2242 | return -ENOMEM; | |
2243 | pp->rb_get = pp->rb_put = 0; | |
2244 | spin_lock_init(&pp->lock); | |
2245 | init_waitqueue_head(&pp->wait); | |
2246 | spin_lock_irqsave(&all_pvt_lock, flags); | |
2247 | #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) | |
2248 | pp->backlight_locker = 0; | |
4b755999 | 2249 | #endif |
1da177e4 LT |
2250 | list_add(&pp->list, &all_pmu_pvt); |
2251 | spin_unlock_irqrestore(&all_pvt_lock, flags); | |
2252 | file->private_data = pp; | |
2253 | return 0; | |
2254 | } | |
2255 | ||
aacaf9bd | 2256 | static ssize_t |
1da177e4 LT |
2257 | pmu_read(struct file *file, char __user *buf, |
2258 | size_t count, loff_t *ppos) | |
2259 | { | |
2260 | struct pmu_private *pp = file->private_data; | |
2261 | DECLARE_WAITQUEUE(wait, current); | |
2262 | unsigned long flags; | |
2263 | int ret = 0; | |
2264 | ||
2265 | if (count < 1 || pp == 0) | |
2266 | return -EINVAL; | |
2267 | if (!access_ok(VERIFY_WRITE, buf, count)) | |
2268 | return -EFAULT; | |
2269 | ||
2270 | spin_lock_irqsave(&pp->lock, flags); | |
2271 | add_wait_queue(&pp->wait, &wait); | |
2272 | current->state = TASK_INTERRUPTIBLE; | |
2273 | ||
2274 | for (;;) { | |
2275 | ret = -EAGAIN; | |
2276 | if (pp->rb_get != pp->rb_put) { | |
2277 | int i = pp->rb_get; | |
2278 | struct rb_entry *rp = &pp->rb_buf[i]; | |
2279 | ret = rp->len; | |
2280 | spin_unlock_irqrestore(&pp->lock, flags); | |
2281 | if (ret > count) | |
2282 | ret = count; | |
2283 | if (ret > 0 && copy_to_user(buf, rp->data, ret)) | |
2284 | ret = -EFAULT; | |
2285 | if (++i >= RB_SIZE) | |
2286 | i = 0; | |
2287 | spin_lock_irqsave(&pp->lock, flags); | |
2288 | pp->rb_get = i; | |
2289 | } | |
2290 | if (ret >= 0) | |
2291 | break; | |
2292 | if (file->f_flags & O_NONBLOCK) | |
2293 | break; | |
2294 | ret = -ERESTARTSYS; | |
2295 | if (signal_pending(current)) | |
2296 | break; | |
2297 | spin_unlock_irqrestore(&pp->lock, flags); | |
2298 | schedule(); | |
2299 | spin_lock_irqsave(&pp->lock, flags); | |
2300 | } | |
2301 | current->state = TASK_RUNNING; | |
2302 | remove_wait_queue(&pp->wait, &wait); | |
2303 | spin_unlock_irqrestore(&pp->lock, flags); | |
2304 | ||
2305 | return ret; | |
2306 | } | |
2307 | ||
aacaf9bd | 2308 | static ssize_t |
1da177e4 LT |
2309 | pmu_write(struct file *file, const char __user *buf, |
2310 | size_t count, loff_t *ppos) | |
2311 | { | |
2312 | return 0; | |
2313 | } | |
2314 | ||
aacaf9bd | 2315 | static unsigned int |
1da177e4 LT |
2316 | pmu_fpoll(struct file *filp, poll_table *wait) |
2317 | { | |
2318 | struct pmu_private *pp = filp->private_data; | |
2319 | unsigned int mask = 0; | |
2320 | unsigned long flags; | |
2321 | ||
2322 | if (pp == 0) | |
2323 | return 0; | |
2324 | poll_wait(filp, &pp->wait, wait); | |
2325 | spin_lock_irqsave(&pp->lock, flags); | |
2326 | if (pp->rb_get != pp->rb_put) | |
2327 | mask |= POLLIN; | |
2328 | spin_unlock_irqrestore(&pp->lock, flags); | |
2329 | return mask; | |
2330 | } | |
2331 | ||
aacaf9bd | 2332 | static int |
1da177e4 LT |
2333 | pmu_release(struct inode *inode, struct file *file) |
2334 | { | |
2335 | struct pmu_private *pp = file->private_data; | |
2336 | unsigned long flags; | |
2337 | ||
1da177e4 LT |
2338 | if (pp != 0) { |
2339 | file->private_data = NULL; | |
2340 | spin_lock_irqsave(&all_pvt_lock, flags); | |
2341 | list_del(&pp->list); | |
2342 | spin_unlock_irqrestore(&all_pvt_lock, flags); | |
4b755999 | 2343 | |
1da177e4 | 2344 | #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) |
4b755999 MH |
2345 | if (pp->backlight_locker) |
2346 | pmac_backlight_enable(); | |
2347 | #endif | |
2348 | ||
1da177e4 LT |
2349 | kfree(pp); |
2350 | } | |
1da177e4 LT |
2351 | return 0; |
2352 | } | |
2353 | ||
aacaf9bd | 2354 | static int |
1da177e4 LT |
2355 | pmu_ioctl(struct inode * inode, struct file *filp, |
2356 | u_int cmd, u_long arg) | |
2357 | { | |
1da177e4 | 2358 | __u32 __user *argp = (__u32 __user *)arg; |
8c870933 | 2359 | int error = -EINVAL; |
1da177e4 LT |
2360 | |
2361 | switch (cmd) { | |
e120e8d0 | 2362 | #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_PPC32) |
1da177e4 LT |
2363 | case PMU_IOC_SLEEP: |
2364 | if (!capable(CAP_SYS_ADMIN)) | |
2365 | return -EACCES; | |
2366 | if (sleep_in_progress) | |
2367 | return -EBUSY; | |
2368 | sleep_in_progress = 1; | |
2369 | switch (pmu_kind) { | |
2370 | case PMU_OHARE_BASED: | |
2371 | error = powerbook_sleep_3400(); | |
2372 | break; | |
2373 | case PMU_HEATHROW_BASED: | |
2374 | case PMU_PADDINGTON_BASED: | |
2375 | error = powerbook_sleep_grackle(); | |
2376 | break; | |
2377 | case PMU_KEYLARGO_BASED: | |
2378 | error = powerbook_sleep_Core99(); | |
2379 | break; | |
2380 | default: | |
2381 | error = -ENOSYS; | |
2382 | } | |
2383 | sleep_in_progress = 0; | |
8c870933 | 2384 | break; |
1da177e4 LT |
2385 | case PMU_IOC_CAN_SLEEP: |
2386 | if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) | |
2387 | return put_user(0, argp); | |
2388 | else | |
2389 | return put_user(1, argp); | |
e120e8d0 | 2390 | #endif /* CONFIG_PM_SLEEP && CONFIG_PPC32 */ |
1da177e4 | 2391 | |
5474c120 MH |
2392 | #ifdef CONFIG_PMAC_BACKLIGHT_LEGACY |
2393 | /* Compatibility ioctl's for backlight */ | |
1da177e4 | 2394 | case PMU_IOC_GET_BACKLIGHT: |
5474c120 MH |
2395 | { |
2396 | int brightness; | |
2397 | ||
1da177e4 LT |
2398 | if (sleep_in_progress) |
2399 | return -EBUSY; | |
5474c120 MH |
2400 | |
2401 | brightness = pmac_backlight_get_legacy_brightness(); | |
2402 | if (brightness < 0) | |
2403 | return brightness; | |
2404 | else | |
2405 | return put_user(brightness, argp); | |
2406 | ||
2407 | } | |
1da177e4 LT |
2408 | case PMU_IOC_SET_BACKLIGHT: |
2409 | { | |
5474c120 MH |
2410 | int brightness; |
2411 | ||
1da177e4 LT |
2412 | if (sleep_in_progress) |
2413 | return -EBUSY; | |
5474c120 MH |
2414 | |
2415 | error = get_user(brightness, argp); | |
2416 | if (error) | |
2417 | return error; | |
2418 | ||
2419 | return pmac_backlight_set_legacy_brightness(brightness); | |
1da177e4 LT |
2420 | } |
2421 | #ifdef CONFIG_INPUT_ADBHID | |
2422 | case PMU_IOC_GRAB_BACKLIGHT: { | |
8c870933 | 2423 | struct pmu_private *pp = filp->private_data; |
8c870933 | 2424 | |
1da177e4 LT |
2425 | if (pp->backlight_locker) |
2426 | return 0; | |
4b755999 | 2427 | |
1da177e4 | 2428 | pp->backlight_locker = 1; |
4b755999 MH |
2429 | pmac_backlight_disable(); |
2430 | ||
1da177e4 LT |
2431 | return 0; |
2432 | } | |
2433 | #endif /* CONFIG_INPUT_ADBHID */ | |
5474c120 | 2434 | #endif /* CONFIG_PMAC_BACKLIGHT_LEGACY */ |
4b755999 | 2435 | |
1da177e4 LT |
2436 | case PMU_IOC_GET_MODEL: |
2437 | return put_user(pmu_kind, argp); | |
2438 | case PMU_IOC_HAS_ADB: | |
2439 | return put_user(pmu_has_adb, argp); | |
2440 | } | |
8c870933 | 2441 | return error; |
1da177e4 LT |
2442 | } |
2443 | ||
fa027c2a | 2444 | static const struct file_operations pmu_device_fops = { |
1da177e4 LT |
2445 | .read = pmu_read, |
2446 | .write = pmu_write, | |
2447 | .poll = pmu_fpoll, | |
2448 | .ioctl = pmu_ioctl, | |
2449 | .open = pmu_open, | |
2450 | .release = pmu_release, | |
2451 | }; | |
2452 | ||
aacaf9bd | 2453 | static struct miscdevice pmu_device = { |
1da177e4 LT |
2454 | PMU_MINOR, "pmu", &pmu_device_fops |
2455 | }; | |
2456 | ||
8c870933 | 2457 | static int pmu_device_init(void) |
1da177e4 LT |
2458 | { |
2459 | if (!via) | |
8c870933 | 2460 | return 0; |
1da177e4 LT |
2461 | if (misc_register(&pmu_device) < 0) |
2462 | printk(KERN_ERR "via-pmu: cannot register misc device.\n"); | |
8c870933 | 2463 | return 0; |
1da177e4 | 2464 | } |
8c870933 BH |
2465 | device_initcall(pmu_device_init); |
2466 | ||
1da177e4 LT |
2467 | |
2468 | #ifdef DEBUG_SLEEP | |
aacaf9bd | 2469 | static inline void |
1da177e4 LT |
2470 | polled_handshake(volatile unsigned char __iomem *via) |
2471 | { | |
2472 | via[B] &= ~TREQ; eieio(); | |
2473 | while ((via[B] & TACK) != 0) | |
2474 | ; | |
2475 | via[B] |= TREQ; eieio(); | |
2476 | while ((via[B] & TACK) == 0) | |
2477 | ; | |
2478 | } | |
2479 | ||
aacaf9bd | 2480 | static inline void |
1da177e4 LT |
2481 | polled_send_byte(volatile unsigned char __iomem *via, int x) |
2482 | { | |
2483 | via[ACR] |= SR_OUT | SR_EXT; eieio(); | |
2484 | via[SR] = x; eieio(); | |
2485 | polled_handshake(via); | |
2486 | } | |
2487 | ||
aacaf9bd | 2488 | static inline int |
1da177e4 LT |
2489 | polled_recv_byte(volatile unsigned char __iomem *via) |
2490 | { | |
2491 | int x; | |
2492 | ||
2493 | via[ACR] = (via[ACR] & ~SR_OUT) | SR_EXT; eieio(); | |
2494 | x = via[SR]; eieio(); | |
2495 | polled_handshake(via); | |
2496 | x = via[SR]; eieio(); | |
2497 | return x; | |
2498 | } | |
2499 | ||
aacaf9bd | 2500 | int |
1da177e4 LT |
2501 | pmu_polled_request(struct adb_request *req) |
2502 | { | |
2503 | unsigned long flags; | |
2504 | int i, l, c; | |
2505 | volatile unsigned char __iomem *v = via; | |
2506 | ||
2507 | req->complete = 1; | |
2508 | c = req->data[0]; | |
2509 | l = pmu_data_len[c][0]; | |
2510 | if (l >= 0 && req->nbytes != l + 1) | |
2511 | return -EINVAL; | |
2512 | ||
2513 | local_irq_save(flags); | |
2514 | while (pmu_state != idle) | |
2515 | pmu_poll(); | |
2516 | ||
2517 | while ((via[B] & TACK) == 0) | |
2518 | ; | |
2519 | polled_send_byte(v, c); | |
2520 | if (l < 0) { | |
2521 | l = req->nbytes - 1; | |
2522 | polled_send_byte(v, l); | |
2523 | } | |
2524 | for (i = 1; i <= l; ++i) | |
2525 | polled_send_byte(v, req->data[i]); | |
2526 | ||
2527 | l = pmu_data_len[c][1]; | |
2528 | if (l < 0) | |
2529 | l = polled_recv_byte(v); | |
2530 | for (i = 0; i < l; ++i) | |
2531 | req->reply[i + req->reply_len] = polled_recv_byte(v); | |
2532 | ||
2533 | if (req->done) | |
2534 | (*req->done)(req); | |
2535 | ||
2536 | local_irq_restore(flags); | |
2537 | return 0; | |
2538 | } | |
2539 | #endif /* DEBUG_SLEEP */ | |
2540 | ||
2541 | ||
2542 | /* FIXME: This is a temporary set of callbacks to enable us | |
2543 | * to do suspend-to-disk. | |
2544 | */ | |
2545 | ||
e120e8d0 | 2546 | #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_PPC32) |
1da177e4 | 2547 | |
f596575e | 2548 | int pmu_sys_suspended; |
1da177e4 | 2549 | |
3bfffd97 | 2550 | static int pmu_sys_suspend(struct sys_device *sysdev, pm_message_t state) |
1da177e4 | 2551 | { |
ca078bae | 2552 | if (state.event != PM_EVENT_SUSPEND || pmu_sys_suspended) |
1da177e4 LT |
2553 | return 0; |
2554 | ||
2555 | /* Suspend PMU event interrupts */ | |
2556 | pmu_suspend(); | |
2557 | ||
2558 | pmu_sys_suspended = 1; | |
2559 | return 0; | |
2560 | } | |
2561 | ||
2562 | static int pmu_sys_resume(struct sys_device *sysdev) | |
2563 | { | |
2564 | struct adb_request req; | |
2565 | ||
2566 | if (!pmu_sys_suspended) | |
2567 | return 0; | |
2568 | ||
2569 | /* Tell PMU we are ready */ | |
2570 | pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2); | |
2571 | pmu_wait_complete(&req); | |
2572 | ||
2573 | /* Resume PMU event interrupts */ | |
2574 | pmu_resume(); | |
2575 | ||
2576 | pmu_sys_suspended = 0; | |
2577 | ||
2578 | return 0; | |
2579 | } | |
2580 | ||
e120e8d0 | 2581 | #endif /* CONFIG_PM_SLEEP && CONFIG_PPC32 */ |
1da177e4 LT |
2582 | |
2583 | static struct sysdev_class pmu_sysclass = { | |
2584 | set_kset_name("pmu"), | |
2585 | }; | |
2586 | ||
2587 | static struct sys_device device_pmu = { | |
1da177e4 LT |
2588 | .cls = &pmu_sysclass, |
2589 | }; | |
2590 | ||
2591 | static struct sysdev_driver driver_pmu = { | |
e120e8d0 | 2592 | #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_PPC32) |
1da177e4 LT |
2593 | .suspend = &pmu_sys_suspend, |
2594 | .resume = &pmu_sys_resume, | |
e120e8d0 | 2595 | #endif /* CONFIG_PM_SLEEP && CONFIG_PPC32 */ |
1da177e4 LT |
2596 | }; |
2597 | ||
2598 | static int __init init_pmu_sysfs(void) | |
2599 | { | |
2600 | int rc; | |
2601 | ||
2602 | rc = sysdev_class_register(&pmu_sysclass); | |
2603 | if (rc) { | |
2604 | printk(KERN_ERR "Failed registering PMU sys class\n"); | |
2605 | return -ENODEV; | |
2606 | } | |
2607 | rc = sysdev_register(&device_pmu); | |
2608 | if (rc) { | |
2609 | printk(KERN_ERR "Failed registering PMU sys device\n"); | |
2610 | return -ENODEV; | |
2611 | } | |
2612 | rc = sysdev_driver_register(&pmu_sysclass, &driver_pmu); | |
2613 | if (rc) { | |
2614 | printk(KERN_ERR "Failed registering PMU sys driver\n"); | |
2615 | return -ENODEV; | |
2616 | } | |
2617 | return 0; | |
2618 | } | |
2619 | ||
2620 | subsys_initcall(init_pmu_sysfs); | |
2621 | ||
2622 | EXPORT_SYMBOL(pmu_request); | |
730745a5 | 2623 | EXPORT_SYMBOL(pmu_queue_request); |
1da177e4 LT |
2624 | EXPORT_SYMBOL(pmu_poll); |
2625 | EXPORT_SYMBOL(pmu_poll_adb); | |
2626 | EXPORT_SYMBOL(pmu_wait_complete); | |
2627 | EXPORT_SYMBOL(pmu_suspend); | |
2628 | EXPORT_SYMBOL(pmu_resume); | |
2629 | EXPORT_SYMBOL(pmu_unlock); | |
e120e8d0 | 2630 | #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_PPC32) |
1da177e4 LT |
2631 | EXPORT_SYMBOL(pmu_enable_irled); |
2632 | EXPORT_SYMBOL(pmu_battery_count); | |
2633 | EXPORT_SYMBOL(pmu_batteries); | |
2634 | EXPORT_SYMBOL(pmu_power_flags); | |
e120e8d0 | 2635 | #endif /* CONFIG_PM_SLEEP && CONFIG_PPC32 */ |
1da177e4 | 2636 |