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1da177e4 LT |
1 | /* |
2 | * Device driver for the via-pmu on Apple Powermacs. | |
3 | * | |
4 | * The VIA (versatile interface adapter) interfaces to the PMU, | |
5 | * a 6805 microprocessor core whose primary function is to control | |
6 | * battery charging and system power on the PowerBook 3400 and 2400. | |
7 | * The PMU also controls the ADB (Apple Desktop Bus) which connects | |
8 | * to the keyboard and mouse, as well as the non-volatile RAM | |
9 | * and the RTC (real time clock) chip. | |
10 | * | |
11 | * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi. | |
12 | * Copyright (C) 2001-2002 Benjamin Herrenschmidt | |
13 | * | |
14 | * THIS DRIVER IS BECOMING A TOTAL MESS ! | |
15 | * - Cleanup atomically disabling reply to PMU events after | |
16 | * a sleep or a freq. switch | |
17 | * - Move sleep code out of here to pmac_pm, merge into new | |
18 | * common PM infrastructure | |
1da177e4 LT |
19 | * - Save/Restore PCI space properly |
20 | * | |
21 | */ | |
22 | #include <stdarg.h> | |
1da177e4 LT |
23 | #include <linux/types.h> |
24 | #include <linux/errno.h> | |
25 | #include <linux/kernel.h> | |
26 | #include <linux/delay.h> | |
27 | #include <linux/sched.h> | |
28 | #include <linux/miscdevice.h> | |
29 | #include <linux/blkdev.h> | |
30 | #include <linux/pci.h> | |
31 | #include <linux/slab.h> | |
32 | #include <linux/poll.h> | |
33 | #include <linux/adb.h> | |
34 | #include <linux/pmu.h> | |
35 | #include <linux/cuda.h> | |
1da177e4 LT |
36 | #include <linux/module.h> |
37 | #include <linux/spinlock.h> | |
38 | #include <linux/pm.h> | |
39 | #include <linux/proc_fs.h> | |
40 | #include <linux/init.h> | |
41 | #include <linux/interrupt.h> | |
42 | #include <linux/device.h> | |
43 | #include <linux/sysdev.h> | |
7dfb7103 | 44 | #include <linux/freezer.h> |
1da177e4 | 45 | #include <linux/syscalls.h> |
6002f544 | 46 | #include <linux/suspend.h> |
1da177e4 LT |
47 | #include <linux/cpu.h> |
48 | #include <asm/prom.h> | |
49 | #include <asm/machdep.h> | |
50 | #include <asm/io.h> | |
51 | #include <asm/pgtable.h> | |
52 | #include <asm/system.h> | |
53 | #include <asm/sections.h> | |
54 | #include <asm/irq.h> | |
55 | #include <asm/pmac_feature.h> | |
5b9ca526 BH |
56 | #include <asm/pmac_pfunc.h> |
57 | #include <asm/pmac_low_i2c.h> | |
1da177e4 LT |
58 | #include <asm/uaccess.h> |
59 | #include <asm/mmu_context.h> | |
60 | #include <asm/cputable.h> | |
61 | #include <asm/time.h> | |
1da177e4 | 62 | #include <asm/backlight.h> |
1da177e4 | 63 | |
9e8e30a0 JB |
64 | #include "via-pmu-event.h" |
65 | ||
1da177e4 | 66 | /* Some compile options */ |
1da177e4 | 67 | #define DEBUG_SLEEP |
1da177e4 LT |
68 | |
69 | /* Misc minor number allocated for /dev/pmu */ | |
70 | #define PMU_MINOR 154 | |
71 | ||
72 | /* How many iterations between battery polls */ | |
73 | #define BATTERY_POLLING_COUNT 2 | |
74 | ||
75 | static volatile unsigned char __iomem *via; | |
76 | ||
77 | /* VIA registers - spaced 0x200 bytes apart */ | |
78 | #define RS 0x200 /* skip between registers */ | |
79 | #define B 0 /* B-side data */ | |
80 | #define A RS /* A-side data */ | |
81 | #define DIRB (2*RS) /* B-side direction (1=output) */ | |
82 | #define DIRA (3*RS) /* A-side direction (1=output) */ | |
83 | #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */ | |
84 | #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */ | |
85 | #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */ | |
86 | #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */ | |
87 | #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */ | |
88 | #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */ | |
89 | #define SR (10*RS) /* Shift register */ | |
90 | #define ACR (11*RS) /* Auxiliary control register */ | |
91 | #define PCR (12*RS) /* Peripheral control register */ | |
92 | #define IFR (13*RS) /* Interrupt flag register */ | |
93 | #define IER (14*RS) /* Interrupt enable register */ | |
94 | #define ANH (15*RS) /* A-side data, no handshake */ | |
95 | ||
96 | /* Bits in B data register: both active low */ | |
97 | #define TACK 0x08 /* Transfer acknowledge (input) */ | |
98 | #define TREQ 0x10 /* Transfer request (output) */ | |
99 | ||
100 | /* Bits in ACR */ | |
101 | #define SR_CTRL 0x1c /* Shift register control bits */ | |
102 | #define SR_EXT 0x0c /* Shift on external clock */ | |
103 | #define SR_OUT 0x10 /* Shift out if 1 */ | |
104 | ||
105 | /* Bits in IFR and IER */ | |
106 | #define IER_SET 0x80 /* set bits in IER */ | |
107 | #define IER_CLR 0 /* clear bits in IER */ | |
108 | #define SR_INT 0x04 /* Shift register full/empty */ | |
109 | #define CB2_INT 0x08 | |
110 | #define CB1_INT 0x10 /* transition on CB1 input */ | |
111 | ||
112 | static volatile enum pmu_state { | |
113 | idle, | |
114 | sending, | |
115 | intack, | |
116 | reading, | |
117 | reading_intr, | |
118 | locked, | |
119 | } pmu_state; | |
120 | ||
121 | static volatile enum int_data_state { | |
122 | int_data_empty, | |
123 | int_data_fill, | |
124 | int_data_ready, | |
125 | int_data_flush | |
126 | } int_data_state[2] = { int_data_empty, int_data_empty }; | |
127 | ||
128 | static struct adb_request *current_req; | |
129 | static struct adb_request *last_req; | |
130 | static struct adb_request *req_awaiting_reply; | |
131 | static unsigned char interrupt_data[2][32]; | |
132 | static int interrupt_data_len[2]; | |
133 | static int int_data_last; | |
134 | static unsigned char *reply_ptr; | |
135 | static int data_index; | |
136 | static int data_len; | |
137 | static volatile int adb_int_pending; | |
138 | static volatile int disable_poll; | |
1da177e4 LT |
139 | static struct device_node *vias; |
140 | static int pmu_kind = PMU_UNKNOWN; | |
87275856 | 141 | static int pmu_fully_inited; |
1da177e4 | 142 | static int pmu_has_adb; |
51d3082f | 143 | static struct device_node *gpio_node; |
87275856 | 144 | static unsigned char __iomem *gpio_reg; |
0ebfff14 | 145 | static int gpio_irq = NO_IRQ; |
1da177e4 | 146 | static int gpio_irq_enabled = -1; |
87275856 | 147 | static volatile int pmu_suspended; |
1da177e4 LT |
148 | static spinlock_t pmu_lock; |
149 | static u8 pmu_intr_mask; | |
150 | static int pmu_version; | |
151 | static int drop_interrupts; | |
e120e8d0 | 152 | #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_PPC32) |
1da177e4 | 153 | static int option_lid_wakeup = 1; |
e120e8d0 OH |
154 | #endif /* CONFIG_PM_SLEEP && CONFIG_PPC32 */ |
155 | #if (defined(CONFIG_PM_SLEEP)&&defined(CONFIG_PPC32))||defined(CONFIG_PMAC_BACKLIGHT_LEGACY) | |
a04c8780 | 156 | static int sleep_in_progress; |
57ae595f | 157 | #endif |
1da177e4 LT |
158 | static unsigned long async_req_locks; |
159 | static unsigned int pmu_irq_stats[11]; | |
160 | ||
161 | static struct proc_dir_entry *proc_pmu_root; | |
162 | static struct proc_dir_entry *proc_pmu_info; | |
163 | static struct proc_dir_entry *proc_pmu_irqstats; | |
164 | static struct proc_dir_entry *proc_pmu_options; | |
165 | static int option_server_mode; | |
166 | ||
1da177e4 LT |
167 | int pmu_battery_count; |
168 | int pmu_cur_battery; | |
a334bdbd | 169 | unsigned int pmu_power_flags = PMU_PWR_AC_PRESENT; |
1da177e4 LT |
170 | struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES]; |
171 | static int query_batt_timer = BATTERY_POLLING_COUNT; | |
172 | static struct adb_request batt_req; | |
173 | static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES]; | |
1da177e4 | 174 | |
1da177e4 LT |
175 | int __fake_sleep; |
176 | int asleep; | |
1da177e4 LT |
177 | |
178 | #ifdef CONFIG_ADB | |
87275856 | 179 | static int adb_dev_map; |
1da177e4 LT |
180 | static int pmu_adb_flags; |
181 | ||
182 | static int pmu_probe(void); | |
183 | static int pmu_init(void); | |
184 | static int pmu_send_request(struct adb_request *req, int sync); | |
185 | static int pmu_adb_autopoll(int devs); | |
186 | static int pmu_adb_reset_bus(void); | |
187 | #endif /* CONFIG_ADB */ | |
188 | ||
189 | static int init_pmu(void); | |
1da177e4 | 190 | static void pmu_start(void); |
7d12e780 DH |
191 | static irqreturn_t via_pmu_interrupt(int irq, void *arg); |
192 | static irqreturn_t gpio1_interrupt(int irq, void *arg); | |
1da177e4 LT |
193 | static int proc_get_info(char *page, char **start, off_t off, |
194 | int count, int *eof, void *data); | |
195 | static int proc_get_irqstats(char *page, char **start, off_t off, | |
196 | int count, int *eof, void *data); | |
1da177e4 LT |
197 | static void pmu_pass_intr(unsigned char *data, int len); |
198 | static int proc_get_batt(char *page, char **start, off_t off, | |
199 | int count, int *eof, void *data); | |
1da177e4 LT |
200 | static int proc_read_options(char *page, char **start, off_t off, |
201 | int count, int *eof, void *data); | |
202 | static int proc_write_options(struct file *file, const char __user *buffer, | |
203 | unsigned long count, void *data); | |
204 | ||
205 | #ifdef CONFIG_ADB | |
206 | struct adb_driver via_pmu_driver = { | |
207 | "PMU", | |
208 | pmu_probe, | |
209 | pmu_init, | |
210 | pmu_send_request, | |
211 | pmu_adb_autopoll, | |
212 | pmu_poll_adb, | |
213 | pmu_adb_reset_bus | |
214 | }; | |
215 | #endif /* CONFIG_ADB */ | |
216 | ||
217 | extern void low_sleep_handler(void); | |
218 | extern void enable_kernel_altivec(void); | |
219 | extern void enable_kernel_fp(void); | |
220 | ||
221 | #ifdef DEBUG_SLEEP | |
222 | int pmu_polled_request(struct adb_request *req); | |
223 | int pmu_wink(struct adb_request *req); | |
224 | #endif | |
225 | ||
226 | /* | |
227 | * This table indicates for each PMU opcode: | |
228 | * - the number of data bytes to be sent with the command, or -1 | |
229 | * if a length byte should be sent, | |
230 | * - the number of response bytes which the PMU will return, or | |
231 | * -1 if it will send a length byte. | |
232 | */ | |
aacaf9bd | 233 | static const s8 pmu_data_len[256][2] = { |
1da177e4 LT |
234 | /* 0 1 2 3 4 5 6 7 */ |
235 | /*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
236 | /*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | |
237 | /*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
238 | /*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0}, | |
239 | /*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
240 | /*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1}, | |
241 | /*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
242 | /*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0}, | |
243 | /*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
244 | /*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1}, | |
245 | /*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0}, | |
246 | /*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1}, | |
247 | /*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
248 | /*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1}, | |
249 | /*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
250 | /*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1}, | |
251 | /*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
252 | /*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | |
253 | /*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
254 | /*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | |
255 | /*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0}, | |
256 | /*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | |
257 | /*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
258 | /*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | |
259 | /*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
260 | /*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | |
261 | /*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
262 | /*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1}, | |
263 | /*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0}, | |
264 | /*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0}, | |
265 | /*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
266 | /*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | |
267 | }; | |
268 | ||
269 | static char *pbook_type[] = { | |
270 | "Unknown PowerBook", | |
271 | "PowerBook 2400/3400/3500(G3)", | |
272 | "PowerBook G3 Series", | |
273 | "1999 PowerBook G3", | |
274 | "Core99" | |
275 | }; | |
276 | ||
51d3082f | 277 | int __init find_via_pmu(void) |
1da177e4 | 278 | { |
cc5d0189 | 279 | u64 taddr; |
018a3d1d | 280 | const u32 *reg; |
51d3082f | 281 | |
1da177e4 LT |
282 | if (via != 0) |
283 | return 1; | |
51d3082f BH |
284 | vias = of_find_node_by_name(NULL, "via-pmu"); |
285 | if (vias == NULL) | |
1da177e4 | 286 | return 0; |
1da177e4 | 287 | |
01b2726d | 288 | reg = of_get_property(vias, "reg", NULL); |
51d3082f BH |
289 | if (reg == NULL) { |
290 | printk(KERN_ERR "via-pmu: No \"reg\" property !\n"); | |
291 | goto fail; | |
292 | } | |
293 | taddr = of_translate_address(vias, reg); | |
bb6b9b28 | 294 | if (taddr == OF_BAD_ADDR) { |
51d3082f BH |
295 | printk(KERN_ERR "via-pmu: Can't translate address !\n"); |
296 | goto fail; | |
1da177e4 LT |
297 | } |
298 | ||
299 | spin_lock_init(&pmu_lock); | |
300 | ||
301 | pmu_has_adb = 1; | |
302 | ||
303 | pmu_intr_mask = PMU_INT_PCEJECT | | |
304 | PMU_INT_SNDBRT | | |
305 | PMU_INT_ADB | | |
306 | PMU_INT_TICK; | |
307 | ||
308 | if (vias->parent->name && ((strcmp(vias->parent->name, "ohare") == 0) | |
55b61fec | 309 | || of_device_is_compatible(vias->parent, "ohare"))) |
1da177e4 | 310 | pmu_kind = PMU_OHARE_BASED; |
55b61fec | 311 | else if (of_device_is_compatible(vias->parent, "paddington")) |
1da177e4 | 312 | pmu_kind = PMU_PADDINGTON_BASED; |
55b61fec | 313 | else if (of_device_is_compatible(vias->parent, "heathrow")) |
1da177e4 | 314 | pmu_kind = PMU_HEATHROW_BASED; |
55b61fec SR |
315 | else if (of_device_is_compatible(vias->parent, "Keylargo") |
316 | || of_device_is_compatible(vias->parent, "K2-Keylargo")) { | |
51d3082f | 317 | struct device_node *gpiop; |
1658ab66 | 318 | struct device_node *adbp; |
cc5d0189 | 319 | u64 gaddr = OF_BAD_ADDR; |
1da177e4 LT |
320 | |
321 | pmu_kind = PMU_KEYLARGO_BASED; | |
1658ab66 SR |
322 | adbp = of_find_node_by_type(NULL, "adb"); |
323 | pmu_has_adb = (adbp != NULL); | |
324 | of_node_put(adbp); | |
1da177e4 LT |
325 | pmu_intr_mask = PMU_INT_PCEJECT | |
326 | PMU_INT_SNDBRT | | |
327 | PMU_INT_ADB | | |
328 | PMU_INT_TICK | | |
329 | PMU_INT_ENVIRONMENT; | |
330 | ||
51d3082f BH |
331 | gpiop = of_find_node_by_name(NULL, "gpio"); |
332 | if (gpiop) { | |
01b2726d | 333 | reg = of_get_property(gpiop, "reg", NULL); |
51d3082f BH |
334 | if (reg) |
335 | gaddr = of_translate_address(gpiop, reg); | |
cc5d0189 | 336 | if (gaddr != OF_BAD_ADDR) |
51d3082f | 337 | gpio_reg = ioremap(gaddr, 0x10); |
1da177e4 | 338 | } |
61e37ca2 | 339 | if (gpio_reg == NULL) { |
51d3082f | 340 | printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n"); |
61e37ca2 OH |
341 | goto fail_gpio; |
342 | } | |
1da177e4 LT |
343 | } else |
344 | pmu_kind = PMU_UNKNOWN; | |
345 | ||
51d3082f BH |
346 | via = ioremap(taddr, 0x2000); |
347 | if (via == NULL) { | |
348 | printk(KERN_ERR "via-pmu: Can't map address !\n"); | |
349 | goto fail; | |
350 | } | |
1da177e4 LT |
351 | |
352 | out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */ | |
353 | out_8(&via[IFR], 0x7f); /* clear IFR */ | |
354 | ||
355 | pmu_state = idle; | |
356 | ||
357 | if (!init_pmu()) { | |
358 | via = NULL; | |
359 | return 0; | |
360 | } | |
361 | ||
bb6b9b28 | 362 | printk(KERN_INFO "PMU driver v%d initialized for %s, firmware: %02x\n", |
1da177e4 LT |
363 | PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version); |
364 | ||
365 | sys_ctrler = SYS_CTRLER_PMU; | |
366 | ||
367 | return 1; | |
51d3082f BH |
368 | fail: |
369 | of_node_put(vias); | |
61e37ca2 OH |
370 | iounmap(gpio_reg); |
371 | gpio_reg = NULL; | |
372 | fail_gpio: | |
51d3082f BH |
373 | vias = NULL; |
374 | return 0; | |
1da177e4 LT |
375 | } |
376 | ||
377 | #ifdef CONFIG_ADB | |
51d3082f | 378 | static int pmu_probe(void) |
1da177e4 LT |
379 | { |
380 | return vias == NULL? -ENODEV: 0; | |
381 | } | |
382 | ||
51d3082f | 383 | static int __init pmu_init(void) |
1da177e4 LT |
384 | { |
385 | if (vias == NULL) | |
386 | return -ENODEV; | |
387 | return 0; | |
388 | } | |
389 | #endif /* CONFIG_ADB */ | |
390 | ||
391 | /* | |
392 | * We can't wait until pmu_init gets called, that happens too late. | |
393 | * It happens after IDE and SCSI initialization, which can take a few | |
394 | * seconds, and by that time the PMU could have given up on us and | |
395 | * turned us off. | |
396 | * Thus this is called with arch_initcall rather than device_initcall. | |
397 | */ | |
398 | static int __init via_pmu_start(void) | |
399 | { | |
0ebfff14 BH |
400 | unsigned int irq; |
401 | ||
1da177e4 LT |
402 | if (vias == NULL) |
403 | return -ENODEV; | |
404 | ||
1da177e4 | 405 | batt_req.complete = 1; |
1da177e4 | 406 | |
0ebfff14 BH |
407 | irq = irq_of_parse_and_map(vias, 0); |
408 | if (irq == NO_IRQ) { | |
7b52b440 | 409 | printk(KERN_ERR "via-pmu: can't map interrupt\n"); |
0ebfff14 BH |
410 | return -ENODEV; |
411 | } | |
412 | if (request_irq(irq, via_pmu_interrupt, 0, "VIA-PMU", (void *)0)) { | |
413 | printk(KERN_ERR "via-pmu: can't request irq %d\n", irq); | |
414 | return -ENODEV; | |
1da177e4 LT |
415 | } |
416 | ||
51d3082f BH |
417 | if (pmu_kind == PMU_KEYLARGO_BASED) { |
418 | gpio_node = of_find_node_by_name(NULL, "extint-gpio1"); | |
419 | if (gpio_node == NULL) | |
420 | gpio_node = of_find_node_by_name(NULL, | |
421 | "pmu-interrupt"); | |
0ebfff14 BH |
422 | if (gpio_node) |
423 | gpio_irq = irq_of_parse_and_map(gpio_node, 0); | |
51d3082f | 424 | |
0ebfff14 | 425 | if (gpio_irq != NO_IRQ) { |
51d3082f BH |
426 | if (request_irq(gpio_irq, gpio1_interrupt, 0, |
427 | "GPIO1 ADB", (void *)0)) | |
428 | printk(KERN_ERR "pmu: can't get irq %d" | |
429 | " (GPIO1)\n", gpio_irq); | |
430 | else | |
431 | gpio_irq_enabled = 1; | |
432 | } | |
1da177e4 LT |
433 | } |
434 | ||
435 | /* Enable interrupts */ | |
436 | out_8(&via[IER], IER_SET | SR_INT | CB1_INT); | |
437 | ||
438 | pmu_fully_inited = 1; | |
439 | ||
440 | /* Make sure PMU settle down before continuing. This is _very_ important | |
441 | * since the IDE probe may shut interrupts down for quite a bit of time. If | |
442 | * a PMU communication is pending while this happens, the PMU may timeout | |
443 | * Not that on Core99 machines, the PMU keeps sending us environement | |
444 | * messages, we should find a way to either fix IDE or make it call | |
445 | * pmu_suspend() before masking interrupts. This can also happens while | |
446 | * scolling with some fbdevs. | |
447 | */ | |
448 | do { | |
449 | pmu_poll(); | |
450 | } while (pmu_state != idle); | |
451 | ||
452 | return 0; | |
453 | } | |
454 | ||
455 | arch_initcall(via_pmu_start); | |
456 | ||
457 | /* | |
458 | * This has to be done after pci_init, which is a subsys_initcall. | |
459 | */ | |
460 | static int __init via_pmu_dev_init(void) | |
461 | { | |
462 | if (vias == NULL) | |
463 | return -ENODEV; | |
464 | ||
1da177e4 | 465 | #ifdef CONFIG_PMAC_BACKLIGHT |
5474c120 | 466 | /* Initialize backlight */ |
4b755999 | 467 | pmu_backlight_init(); |
5474c120 | 468 | #endif |
1da177e4 | 469 | |
8c870933 | 470 | #ifdef CONFIG_PPC32 |
1da177e4 LT |
471 | if (machine_is_compatible("AAPL,3400/2400") || |
472 | machine_is_compatible("AAPL,3500")) { | |
473 | int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO, | |
474 | NULL, PMAC_MB_INFO_MODEL, 0); | |
475 | pmu_battery_count = 1; | |
476 | if (mb == PMAC_TYPE_COMET) | |
477 | pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET; | |
478 | else | |
479 | pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER; | |
480 | } else if (machine_is_compatible("AAPL,PowerBook1998") || | |
481 | machine_is_compatible("PowerBook1,1")) { | |
482 | pmu_battery_count = 2; | |
483 | pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART; | |
484 | pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART; | |
485 | } else { | |
30686ba6 SR |
486 | struct device_node* prim = |
487 | of_find_node_by_name(NULL, "power-mgt"); | |
018a3d1d | 488 | const u32 *prim_info = NULL; |
1da177e4 | 489 | if (prim) |
01b2726d | 490 | prim_info = of_get_property(prim, "prim-info", NULL); |
1da177e4 LT |
491 | if (prim_info) { |
492 | /* Other stuffs here yet unknown */ | |
493 | pmu_battery_count = (prim_info[6] >> 16) & 0xff; | |
494 | pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART; | |
495 | if (pmu_battery_count > 1) | |
496 | pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART; | |
497 | } | |
30686ba6 | 498 | of_node_put(prim); |
1da177e4 | 499 | } |
8c870933 BH |
500 | #endif /* CONFIG_PPC32 */ |
501 | ||
1da177e4 LT |
502 | /* Create /proc/pmu */ |
503 | proc_pmu_root = proc_mkdir("pmu", NULL); | |
504 | if (proc_pmu_root) { | |
8c870933 | 505 | long i; |
1da177e4 LT |
506 | |
507 | for (i=0; i<pmu_battery_count; i++) { | |
508 | char title[16]; | |
8c870933 | 509 | sprintf(title, "battery_%ld", i); |
1da177e4 LT |
510 | proc_pmu_batt[i] = create_proc_read_entry(title, 0, proc_pmu_root, |
511 | proc_get_batt, (void *)i); | |
512 | } | |
1da177e4 LT |
513 | |
514 | proc_pmu_info = create_proc_read_entry("info", 0, proc_pmu_root, | |
515 | proc_get_info, NULL); | |
516 | proc_pmu_irqstats = create_proc_read_entry("interrupts", 0, proc_pmu_root, | |
517 | proc_get_irqstats, NULL); | |
518 | proc_pmu_options = create_proc_entry("options", 0600, proc_pmu_root); | |
519 | if (proc_pmu_options) { | |
1da177e4 LT |
520 | proc_pmu_options->read_proc = proc_read_options; |
521 | proc_pmu_options->write_proc = proc_write_options; | |
522 | } | |
523 | } | |
524 | return 0; | |
525 | } | |
526 | ||
527 | device_initcall(via_pmu_dev_init); | |
528 | ||
aacaf9bd | 529 | static int |
1da177e4 LT |
530 | init_pmu(void) |
531 | { | |
532 | int timeout; | |
533 | struct adb_request req; | |
534 | ||
535 | out_8(&via[B], via[B] | TREQ); /* negate TREQ */ | |
536 | out_8(&via[DIRB], (via[DIRB] | TREQ) & ~TACK); /* TACK in, TREQ out */ | |
537 | ||
538 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask); | |
539 | timeout = 100000; | |
540 | while (!req.complete) { | |
541 | if (--timeout < 0) { | |
542 | printk(KERN_ERR "init_pmu: no response from PMU\n"); | |
543 | return 0; | |
544 | } | |
545 | udelay(10); | |
546 | pmu_poll(); | |
547 | } | |
548 | ||
549 | /* ack all pending interrupts */ | |
550 | timeout = 100000; | |
551 | interrupt_data[0][0] = 1; | |
552 | while (interrupt_data[0][0] || pmu_state != idle) { | |
553 | if (--timeout < 0) { | |
554 | printk(KERN_ERR "init_pmu: timed out acking intrs\n"); | |
555 | return 0; | |
556 | } | |
557 | if (pmu_state == idle) | |
558 | adb_int_pending = 1; | |
7d12e780 | 559 | via_pmu_interrupt(0, NULL); |
1da177e4 LT |
560 | udelay(10); |
561 | } | |
562 | ||
563 | /* Tell PMU we are ready. */ | |
564 | if (pmu_kind == PMU_KEYLARGO_BASED) { | |
565 | pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2); | |
566 | while (!req.complete) | |
567 | pmu_poll(); | |
568 | } | |
569 | ||
570 | /* Read PMU version */ | |
571 | pmu_request(&req, NULL, 1, PMU_GET_VERSION); | |
572 | pmu_wait_complete(&req); | |
573 | if (req.reply_len > 0) | |
574 | pmu_version = req.reply[0]; | |
575 | ||
576 | /* Read server mode setting */ | |
577 | if (pmu_kind == PMU_KEYLARGO_BASED) { | |
578 | pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, | |
579 | PMU_PWR_GET_POWERUP_EVENTS); | |
580 | pmu_wait_complete(&req); | |
581 | if (req.reply_len == 2) { | |
582 | if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT) | |
583 | option_server_mode = 1; | |
584 | printk(KERN_INFO "via-pmu: Server Mode is %s\n", | |
585 | option_server_mode ? "enabled" : "disabled"); | |
586 | } | |
587 | } | |
588 | return 1; | |
589 | } | |
590 | ||
591 | int | |
592 | pmu_get_model(void) | |
593 | { | |
594 | return pmu_kind; | |
595 | } | |
596 | ||
1da177e4 LT |
597 | static void pmu_set_server_mode(int server_mode) |
598 | { | |
599 | struct adb_request req; | |
600 | ||
601 | if (pmu_kind != PMU_KEYLARGO_BASED) | |
602 | return; | |
603 | ||
604 | option_server_mode = server_mode; | |
605 | pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS); | |
606 | pmu_wait_complete(&req); | |
607 | if (req.reply_len < 2) | |
608 | return; | |
609 | if (server_mode) | |
610 | pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, | |
611 | PMU_PWR_SET_POWERUP_EVENTS, | |
612 | req.reply[0], PMU_PWR_WAKEUP_AC_INSERT); | |
613 | else | |
614 | pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, | |
615 | PMU_PWR_CLR_POWERUP_EVENTS, | |
616 | req.reply[0], PMU_PWR_WAKEUP_AC_INSERT); | |
617 | pmu_wait_complete(&req); | |
618 | } | |
619 | ||
1da177e4 LT |
620 | /* This new version of the code for 2400/3400/3500 powerbooks |
621 | * is inspired from the implementation in gkrellm-pmu | |
622 | */ | |
aacaf9bd | 623 | static void |
1da177e4 LT |
624 | done_battery_state_ohare(struct adb_request* req) |
625 | { | |
626 | /* format: | |
627 | * [0] : flags | |
628 | * 0x01 : AC indicator | |
629 | * 0x02 : charging | |
630 | * 0x04 : battery exist | |
631 | * 0x08 : | |
632 | * 0x10 : | |
633 | * 0x20 : full charged | |
634 | * 0x40 : pcharge reset | |
635 | * 0x80 : battery exist | |
636 | * | |
637 | * [1][2] : battery voltage | |
638 | * [3] : CPU temperature | |
639 | * [4] : battery temperature | |
640 | * [5] : current | |
641 | * [6][7] : pcharge | |
642 | * --tkoba | |
643 | */ | |
644 | unsigned int bat_flags = PMU_BATT_TYPE_HOOPER; | |
645 | long pcharge, charge, vb, vmax, lmax; | |
646 | long vmax_charging, vmax_charged; | |
647 | long amperage, voltage, time, max; | |
648 | int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO, | |
649 | NULL, PMAC_MB_INFO_MODEL, 0); | |
650 | ||
651 | if (req->reply[0] & 0x01) | |
652 | pmu_power_flags |= PMU_PWR_AC_PRESENT; | |
653 | else | |
654 | pmu_power_flags &= ~PMU_PWR_AC_PRESENT; | |
655 | ||
656 | if (mb == PMAC_TYPE_COMET) { | |
657 | vmax_charged = 189; | |
658 | vmax_charging = 213; | |
659 | lmax = 6500; | |
660 | } else { | |
661 | vmax_charged = 330; | |
662 | vmax_charging = 330; | |
663 | lmax = 6500; | |
664 | } | |
665 | vmax = vmax_charged; | |
666 | ||
667 | /* If battery installed */ | |
668 | if (req->reply[0] & 0x04) { | |
669 | bat_flags |= PMU_BATT_PRESENT; | |
670 | if (req->reply[0] & 0x02) | |
671 | bat_flags |= PMU_BATT_CHARGING; | |
672 | vb = (req->reply[1] << 8) | req->reply[2]; | |
673 | voltage = (vb * 265 + 72665) / 10; | |
674 | amperage = req->reply[5]; | |
675 | if ((req->reply[0] & 0x01) == 0) { | |
676 | if (amperage > 200) | |
677 | vb += ((amperage - 200) * 15)/100; | |
678 | } else if (req->reply[0] & 0x02) { | |
679 | vb = (vb * 97) / 100; | |
680 | vmax = vmax_charging; | |
681 | } | |
682 | charge = (100 * vb) / vmax; | |
683 | if (req->reply[0] & 0x40) { | |
684 | pcharge = (req->reply[6] << 8) + req->reply[7]; | |
685 | if (pcharge > lmax) | |
686 | pcharge = lmax; | |
687 | pcharge *= 100; | |
688 | pcharge = 100 - pcharge / lmax; | |
689 | if (pcharge < charge) | |
690 | charge = pcharge; | |
691 | } | |
692 | if (amperage > 0) | |
693 | time = (charge * 16440) / amperage; | |
694 | else | |
695 | time = 0; | |
696 | max = 100; | |
697 | amperage = -amperage; | |
698 | } else | |
699 | charge = max = amperage = voltage = time = 0; | |
700 | ||
701 | pmu_batteries[pmu_cur_battery].flags = bat_flags; | |
702 | pmu_batteries[pmu_cur_battery].charge = charge; | |
703 | pmu_batteries[pmu_cur_battery].max_charge = max; | |
704 | pmu_batteries[pmu_cur_battery].amperage = amperage; | |
705 | pmu_batteries[pmu_cur_battery].voltage = voltage; | |
706 | pmu_batteries[pmu_cur_battery].time_remaining = time; | |
707 | ||
708 | clear_bit(0, &async_req_locks); | |
709 | } | |
710 | ||
aacaf9bd | 711 | static void |
1da177e4 LT |
712 | done_battery_state_smart(struct adb_request* req) |
713 | { | |
714 | /* format: | |
715 | * [0] : format of this structure (known: 3,4,5) | |
716 | * [1] : flags | |
717 | * | |
718 | * format 3 & 4: | |
719 | * | |
720 | * [2] : charge | |
721 | * [3] : max charge | |
722 | * [4] : current | |
723 | * [5] : voltage | |
724 | * | |
725 | * format 5: | |
726 | * | |
727 | * [2][3] : charge | |
728 | * [4][5] : max charge | |
729 | * [6][7] : current | |
730 | * [8][9] : voltage | |
731 | */ | |
732 | ||
733 | unsigned int bat_flags = PMU_BATT_TYPE_SMART; | |
734 | int amperage; | |
735 | unsigned int capa, max, voltage; | |
736 | ||
737 | if (req->reply[1] & 0x01) | |
738 | pmu_power_flags |= PMU_PWR_AC_PRESENT; | |
739 | else | |
740 | pmu_power_flags &= ~PMU_PWR_AC_PRESENT; | |
741 | ||
742 | ||
743 | capa = max = amperage = voltage = 0; | |
744 | ||
745 | if (req->reply[1] & 0x04) { | |
746 | bat_flags |= PMU_BATT_PRESENT; | |
747 | switch(req->reply[0]) { | |
748 | case 3: | |
749 | case 4: capa = req->reply[2]; | |
750 | max = req->reply[3]; | |
751 | amperage = *((signed char *)&req->reply[4]); | |
752 | voltage = req->reply[5]; | |
753 | break; | |
754 | case 5: capa = (req->reply[2] << 8) | req->reply[3]; | |
755 | max = (req->reply[4] << 8) | req->reply[5]; | |
756 | amperage = *((signed short *)&req->reply[6]); | |
757 | voltage = (req->reply[8] << 8) | req->reply[9]; | |
758 | break; | |
759 | default: | |
760 | printk(KERN_WARNING "pmu.c : unrecognized battery info, len: %d, %02x %02x %02x %02x\n", | |
761 | req->reply_len, req->reply[0], req->reply[1], req->reply[2], req->reply[3]); | |
762 | break; | |
763 | } | |
764 | } | |
765 | ||
766 | if ((req->reply[1] & 0x01) && (amperage > 0)) | |
767 | bat_flags |= PMU_BATT_CHARGING; | |
768 | ||
769 | pmu_batteries[pmu_cur_battery].flags = bat_flags; | |
770 | pmu_batteries[pmu_cur_battery].charge = capa; | |
771 | pmu_batteries[pmu_cur_battery].max_charge = max; | |
772 | pmu_batteries[pmu_cur_battery].amperage = amperage; | |
773 | pmu_batteries[pmu_cur_battery].voltage = voltage; | |
774 | if (amperage) { | |
775 | if ((req->reply[1] & 0x01) && (amperage > 0)) | |
776 | pmu_batteries[pmu_cur_battery].time_remaining | |
777 | = ((max-capa) * 3600) / amperage; | |
778 | else | |
779 | pmu_batteries[pmu_cur_battery].time_remaining | |
780 | = (capa * 3600) / (-amperage); | |
781 | } else | |
782 | pmu_batteries[pmu_cur_battery].time_remaining = 0; | |
783 | ||
784 | pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count; | |
785 | ||
786 | clear_bit(0, &async_req_locks); | |
787 | } | |
788 | ||
aacaf9bd | 789 | static void |
1da177e4 LT |
790 | query_battery_state(void) |
791 | { | |
792 | if (test_and_set_bit(0, &async_req_locks)) | |
793 | return; | |
794 | if (pmu_kind == PMU_OHARE_BASED) | |
795 | pmu_request(&batt_req, done_battery_state_ohare, | |
796 | 1, PMU_BATTERY_STATE); | |
797 | else | |
798 | pmu_request(&batt_req, done_battery_state_smart, | |
799 | 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1); | |
800 | } | |
801 | ||
aacaf9bd | 802 | static int |
1da177e4 LT |
803 | proc_get_info(char *page, char **start, off_t off, |
804 | int count, int *eof, void *data) | |
805 | { | |
806 | char* p = page; | |
807 | ||
808 | p += sprintf(p, "PMU driver version : %d\n", PMU_DRIVER_VERSION); | |
809 | p += sprintf(p, "PMU firmware version : %02x\n", pmu_version); | |
1da177e4 | 810 | p += sprintf(p, "AC Power : %d\n", |
63e1fd41 | 811 | ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0) || pmu_battery_count == 0); |
1da177e4 | 812 | p += sprintf(p, "Battery count : %d\n", pmu_battery_count); |
1da177e4 LT |
813 | |
814 | return p - page; | |
815 | } | |
816 | ||
aacaf9bd | 817 | static int |
1da177e4 LT |
818 | proc_get_irqstats(char *page, char **start, off_t off, |
819 | int count, int *eof, void *data) | |
820 | { | |
821 | int i; | |
822 | char* p = page; | |
823 | static const char *irq_names[] = { | |
824 | "Total CB1 triggered events", | |
825 | "Total GPIO1 triggered events", | |
826 | "PC-Card eject button", | |
827 | "Sound/Brightness button", | |
828 | "ADB message", | |
829 | "Battery state change", | |
830 | "Environment interrupt", | |
831 | "Tick timer", | |
832 | "Ghost interrupt (zero len)", | |
833 | "Empty interrupt (empty mask)", | |
834 | "Max irqs in a row" | |
835 | }; | |
836 | ||
837 | for (i=0; i<11; i++) { | |
838 | p += sprintf(p, " %2u: %10u (%s)\n", | |
839 | i, pmu_irq_stats[i], irq_names[i]); | |
840 | } | |
841 | return p - page; | |
842 | } | |
843 | ||
aacaf9bd | 844 | static int |
1da177e4 LT |
845 | proc_get_batt(char *page, char **start, off_t off, |
846 | int count, int *eof, void *data) | |
847 | { | |
8c870933 | 848 | long batnum = (long)data; |
1da177e4 LT |
849 | char *p = page; |
850 | ||
851 | p += sprintf(p, "\n"); | |
852 | p += sprintf(p, "flags : %08x\n", | |
853 | pmu_batteries[batnum].flags); | |
854 | p += sprintf(p, "charge : %d\n", | |
855 | pmu_batteries[batnum].charge); | |
856 | p += sprintf(p, "max_charge : %d\n", | |
857 | pmu_batteries[batnum].max_charge); | |
858 | p += sprintf(p, "current : %d\n", | |
859 | pmu_batteries[batnum].amperage); | |
860 | p += sprintf(p, "voltage : %d\n", | |
861 | pmu_batteries[batnum].voltage); | |
862 | p += sprintf(p, "time rem. : %d\n", | |
863 | pmu_batteries[batnum].time_remaining); | |
864 | ||
865 | return p - page; | |
866 | } | |
1da177e4 | 867 | |
aacaf9bd | 868 | static int |
1da177e4 LT |
869 | proc_read_options(char *page, char **start, off_t off, |
870 | int count, int *eof, void *data) | |
871 | { | |
872 | char *p = page; | |
873 | ||
e120e8d0 | 874 | #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_PPC32) |
1da177e4 LT |
875 | if (pmu_kind == PMU_KEYLARGO_BASED && |
876 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0) | |
877 | p += sprintf(p, "lid_wakeup=%d\n", option_lid_wakeup); | |
8c870933 | 878 | #endif |
1da177e4 LT |
879 | if (pmu_kind == PMU_KEYLARGO_BASED) |
880 | p += sprintf(p, "server_mode=%d\n", option_server_mode); | |
881 | ||
882 | return p - page; | |
883 | } | |
884 | ||
aacaf9bd | 885 | static int |
1da177e4 LT |
886 | proc_write_options(struct file *file, const char __user *buffer, |
887 | unsigned long count, void *data) | |
888 | { | |
889 | char tmp[33]; | |
890 | char *label, *val; | |
891 | unsigned long fcount = count; | |
892 | ||
893 | if (!count) | |
894 | return -EINVAL; | |
895 | if (count > 32) | |
896 | count = 32; | |
897 | if (copy_from_user(tmp, buffer, count)) | |
898 | return -EFAULT; | |
899 | tmp[count] = 0; | |
900 | ||
901 | label = tmp; | |
902 | while(*label == ' ') | |
903 | label++; | |
904 | val = label; | |
905 | while(*val && (*val != '=')) { | |
906 | if (*val == ' ') | |
907 | *val = 0; | |
908 | val++; | |
909 | } | |
910 | if ((*val) == 0) | |
911 | return -EINVAL; | |
912 | *(val++) = 0; | |
913 | while(*val == ' ') | |
914 | val++; | |
e120e8d0 | 915 | #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_PPC32) |
1da177e4 LT |
916 | if (pmu_kind == PMU_KEYLARGO_BASED && |
917 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0) | |
918 | if (!strcmp(label, "lid_wakeup")) | |
919 | option_lid_wakeup = ((*val) == '1'); | |
8c870933 | 920 | #endif |
1da177e4 LT |
921 | if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) { |
922 | int new_value; | |
923 | new_value = ((*val) == '1'); | |
924 | if (new_value != option_server_mode) | |
925 | pmu_set_server_mode(new_value); | |
926 | } | |
927 | return fcount; | |
928 | } | |
929 | ||
930 | #ifdef CONFIG_ADB | |
931 | /* Send an ADB command */ | |
aacaf9bd | 932 | static int |
1da177e4 LT |
933 | pmu_send_request(struct adb_request *req, int sync) |
934 | { | |
935 | int i, ret; | |
936 | ||
937 | if ((vias == NULL) || (!pmu_fully_inited)) { | |
938 | req->complete = 1; | |
939 | return -ENXIO; | |
940 | } | |
941 | ||
942 | ret = -EINVAL; | |
943 | ||
944 | switch (req->data[0]) { | |
945 | case PMU_PACKET: | |
946 | for (i = 0; i < req->nbytes - 1; ++i) | |
947 | req->data[i] = req->data[i+1]; | |
948 | --req->nbytes; | |
949 | if (pmu_data_len[req->data[0]][1] != 0) { | |
950 | req->reply[0] = ADB_RET_OK; | |
951 | req->reply_len = 1; | |
952 | } else | |
953 | req->reply_len = 0; | |
954 | ret = pmu_queue_request(req); | |
955 | break; | |
956 | case CUDA_PACKET: | |
957 | switch (req->data[1]) { | |
958 | case CUDA_GET_TIME: | |
959 | if (req->nbytes != 2) | |
960 | break; | |
961 | req->data[0] = PMU_READ_RTC; | |
962 | req->nbytes = 1; | |
963 | req->reply_len = 3; | |
964 | req->reply[0] = CUDA_PACKET; | |
965 | req->reply[1] = 0; | |
966 | req->reply[2] = CUDA_GET_TIME; | |
967 | ret = pmu_queue_request(req); | |
968 | break; | |
969 | case CUDA_SET_TIME: | |
970 | if (req->nbytes != 6) | |
971 | break; | |
972 | req->data[0] = PMU_SET_RTC; | |
973 | req->nbytes = 5; | |
974 | for (i = 1; i <= 4; ++i) | |
975 | req->data[i] = req->data[i+1]; | |
976 | req->reply_len = 3; | |
977 | req->reply[0] = CUDA_PACKET; | |
978 | req->reply[1] = 0; | |
979 | req->reply[2] = CUDA_SET_TIME; | |
980 | ret = pmu_queue_request(req); | |
981 | break; | |
982 | } | |
983 | break; | |
984 | case ADB_PACKET: | |
985 | if (!pmu_has_adb) | |
986 | return -ENXIO; | |
987 | for (i = req->nbytes - 1; i > 1; --i) | |
988 | req->data[i+2] = req->data[i]; | |
989 | req->data[3] = req->nbytes - 2; | |
990 | req->data[2] = pmu_adb_flags; | |
991 | /*req->data[1] = req->data[1];*/ | |
992 | req->data[0] = PMU_ADB_CMD; | |
993 | req->nbytes += 2; | |
994 | req->reply_expected = 1; | |
995 | req->reply_len = 0; | |
996 | ret = pmu_queue_request(req); | |
997 | break; | |
998 | } | |
999 | if (ret) { | |
1000 | req->complete = 1; | |
1001 | return ret; | |
1002 | } | |
1003 | ||
1004 | if (sync) | |
1005 | while (!req->complete) | |
1006 | pmu_poll(); | |
1007 | ||
1008 | return 0; | |
1009 | } | |
1010 | ||
1011 | /* Enable/disable autopolling */ | |
aacaf9bd | 1012 | static int |
1da177e4 LT |
1013 | pmu_adb_autopoll(int devs) |
1014 | { | |
1015 | struct adb_request req; | |
1016 | ||
1017 | if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb) | |
1018 | return -ENXIO; | |
1019 | ||
1020 | if (devs) { | |
1021 | adb_dev_map = devs; | |
1022 | pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86, | |
1023 | adb_dev_map >> 8, adb_dev_map); | |
1024 | pmu_adb_flags = 2; | |
1025 | } else { | |
1026 | pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF); | |
1027 | pmu_adb_flags = 0; | |
1028 | } | |
1029 | while (!req.complete) | |
1030 | pmu_poll(); | |
1031 | return 0; | |
1032 | } | |
1033 | ||
1034 | /* Reset the ADB bus */ | |
aacaf9bd | 1035 | static int |
1da177e4 LT |
1036 | pmu_adb_reset_bus(void) |
1037 | { | |
1038 | struct adb_request req; | |
1039 | int save_autopoll = adb_dev_map; | |
1040 | ||
1041 | if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb) | |
1042 | return -ENXIO; | |
1043 | ||
1044 | /* anyone got a better idea?? */ | |
1045 | pmu_adb_autopoll(0); | |
1046 | ||
1047 | req.nbytes = 5; | |
1048 | req.done = NULL; | |
1049 | req.data[0] = PMU_ADB_CMD; | |
1050 | req.data[1] = 0; | |
1051 | req.data[2] = ADB_BUSRESET; | |
1052 | req.data[3] = 0; | |
1053 | req.data[4] = 0; | |
1054 | req.reply_len = 0; | |
1055 | req.reply_expected = 1; | |
1056 | if (pmu_queue_request(&req) != 0) { | |
1057 | printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n"); | |
1058 | return -EIO; | |
1059 | } | |
1060 | pmu_wait_complete(&req); | |
1061 | ||
1062 | if (save_autopoll != 0) | |
1063 | pmu_adb_autopoll(save_autopoll); | |
1064 | ||
1065 | return 0; | |
1066 | } | |
1067 | #endif /* CONFIG_ADB */ | |
1068 | ||
1069 | /* Construct and send a pmu request */ | |
aacaf9bd | 1070 | int |
1da177e4 LT |
1071 | pmu_request(struct adb_request *req, void (*done)(struct adb_request *), |
1072 | int nbytes, ...) | |
1073 | { | |
1074 | va_list list; | |
1075 | int i; | |
1076 | ||
1077 | if (vias == NULL) | |
1078 | return -ENXIO; | |
1079 | ||
1080 | if (nbytes < 0 || nbytes > 32) { | |
1081 | printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes); | |
1082 | req->complete = 1; | |
1083 | return -EINVAL; | |
1084 | } | |
1085 | req->nbytes = nbytes; | |
1086 | req->done = done; | |
1087 | va_start(list, nbytes); | |
1088 | for (i = 0; i < nbytes; ++i) | |
1089 | req->data[i] = va_arg(list, int); | |
1090 | va_end(list); | |
1091 | req->reply_len = 0; | |
1092 | req->reply_expected = 0; | |
1093 | return pmu_queue_request(req); | |
1094 | } | |
1095 | ||
aacaf9bd | 1096 | int |
1da177e4 LT |
1097 | pmu_queue_request(struct adb_request *req) |
1098 | { | |
1099 | unsigned long flags; | |
1100 | int nsend; | |
1101 | ||
1102 | if (via == NULL) { | |
1103 | req->complete = 1; | |
1104 | return -ENXIO; | |
1105 | } | |
1106 | if (req->nbytes <= 0) { | |
1107 | req->complete = 1; | |
1108 | return 0; | |
1109 | } | |
1110 | nsend = pmu_data_len[req->data[0]][0]; | |
1111 | if (nsend >= 0 && req->nbytes != nsend + 1) { | |
1112 | req->complete = 1; | |
1113 | return -EINVAL; | |
1114 | } | |
1115 | ||
1116 | req->next = NULL; | |
1117 | req->sent = 0; | |
1118 | req->complete = 0; | |
1119 | ||
1120 | spin_lock_irqsave(&pmu_lock, flags); | |
1121 | if (current_req != 0) { | |
1122 | last_req->next = req; | |
1123 | last_req = req; | |
1124 | } else { | |
1125 | current_req = req; | |
1126 | last_req = req; | |
1127 | if (pmu_state == idle) | |
1128 | pmu_start(); | |
1129 | } | |
1130 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1131 | ||
1132 | return 0; | |
1133 | } | |
1134 | ||
1135 | static inline void | |
1136 | wait_for_ack(void) | |
1137 | { | |
1138 | /* Sightly increased the delay, I had one occurrence of the message | |
1139 | * reported | |
1140 | */ | |
1141 | int timeout = 4000; | |
1142 | while ((in_8(&via[B]) & TACK) == 0) { | |
1143 | if (--timeout < 0) { | |
1144 | printk(KERN_ERR "PMU not responding (!ack)\n"); | |
1145 | return; | |
1146 | } | |
1147 | udelay(10); | |
1148 | } | |
1149 | } | |
1150 | ||
1151 | /* New PMU seems to be very sensitive to those timings, so we make sure | |
1152 | * PCI is flushed immediately */ | |
1153 | static inline void | |
1154 | send_byte(int x) | |
1155 | { | |
1156 | volatile unsigned char __iomem *v = via; | |
1157 | ||
1158 | out_8(&v[ACR], in_8(&v[ACR]) | SR_OUT | SR_EXT); | |
1159 | out_8(&v[SR], x); | |
1160 | out_8(&v[B], in_8(&v[B]) & ~TREQ); /* assert TREQ */ | |
1161 | (void)in_8(&v[B]); | |
1162 | } | |
1163 | ||
1164 | static inline void | |
1165 | recv_byte(void) | |
1166 | { | |
1167 | volatile unsigned char __iomem *v = via; | |
1168 | ||
1169 | out_8(&v[ACR], (in_8(&v[ACR]) & ~SR_OUT) | SR_EXT); | |
1170 | in_8(&v[SR]); /* resets SR */ | |
1171 | out_8(&v[B], in_8(&v[B]) & ~TREQ); | |
1172 | (void)in_8(&v[B]); | |
1173 | } | |
1174 | ||
1175 | static inline void | |
1176 | pmu_done(struct adb_request *req) | |
1177 | { | |
1178 | void (*done)(struct adb_request *) = req->done; | |
1179 | mb(); | |
1180 | req->complete = 1; | |
1181 | /* Here, we assume that if the request has a done member, the | |
1182 | * struct request will survive to setting req->complete to 1 | |
1183 | */ | |
1184 | if (done) | |
1185 | (*done)(req); | |
1186 | } | |
1187 | ||
aacaf9bd | 1188 | static void |
1da177e4 LT |
1189 | pmu_start(void) |
1190 | { | |
1191 | struct adb_request *req; | |
1192 | ||
1193 | /* assert pmu_state == idle */ | |
1194 | /* get the packet to send */ | |
1195 | req = current_req; | |
1196 | if (req == 0 || pmu_state != idle | |
1197 | || (/*req->reply_expected && */req_awaiting_reply)) | |
1198 | return; | |
1199 | ||
1200 | pmu_state = sending; | |
1201 | data_index = 1; | |
1202 | data_len = pmu_data_len[req->data[0]][0]; | |
1203 | ||
1204 | /* Sounds safer to make sure ACK is high before writing. This helped | |
1205 | * kill a problem with ADB and some iBooks | |
1206 | */ | |
1207 | wait_for_ack(); | |
1208 | /* set the shift register to shift out and send a byte */ | |
1209 | send_byte(req->data[0]); | |
1210 | } | |
1211 | ||
aacaf9bd | 1212 | void |
1da177e4 LT |
1213 | pmu_poll(void) |
1214 | { | |
1215 | if (!via) | |
1216 | return; | |
1217 | if (disable_poll) | |
1218 | return; | |
7d12e780 | 1219 | via_pmu_interrupt(0, NULL); |
1da177e4 LT |
1220 | } |
1221 | ||
aacaf9bd | 1222 | void |
1da177e4 LT |
1223 | pmu_poll_adb(void) |
1224 | { | |
1225 | if (!via) | |
1226 | return; | |
1227 | if (disable_poll) | |
1228 | return; | |
1229 | /* Kicks ADB read when PMU is suspended */ | |
1230 | adb_int_pending = 1; | |
1231 | do { | |
7d12e780 | 1232 | via_pmu_interrupt(0, NULL); |
1da177e4 LT |
1233 | } while (pmu_suspended && (adb_int_pending || pmu_state != idle |
1234 | || req_awaiting_reply)); | |
1235 | } | |
1236 | ||
aacaf9bd | 1237 | void |
1da177e4 LT |
1238 | pmu_wait_complete(struct adb_request *req) |
1239 | { | |
1240 | if (!via) | |
1241 | return; | |
1242 | while((pmu_state != idle && pmu_state != locked) || !req->complete) | |
7d12e780 | 1243 | via_pmu_interrupt(0, NULL); |
1da177e4 LT |
1244 | } |
1245 | ||
1246 | /* This function loops until the PMU is idle and prevents it from | |
1247 | * anwsering to ADB interrupts. pmu_request can still be called. | |
1248 | * This is done to avoid spurrious shutdowns when we know we'll have | |
1249 | * interrupts switched off for a long time | |
1250 | */ | |
aacaf9bd | 1251 | void |
1da177e4 LT |
1252 | pmu_suspend(void) |
1253 | { | |
1254 | unsigned long flags; | |
1b0e9d44 | 1255 | |
1da177e4 LT |
1256 | if (!via) |
1257 | return; | |
1258 | ||
1259 | spin_lock_irqsave(&pmu_lock, flags); | |
1260 | pmu_suspended++; | |
1261 | if (pmu_suspended > 1) { | |
1262 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1263 | return; | |
1264 | } | |
1265 | ||
1266 | do { | |
1267 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1268 | if (req_awaiting_reply) | |
1269 | adb_int_pending = 1; | |
7d12e780 | 1270 | via_pmu_interrupt(0, NULL); |
1da177e4 LT |
1271 | spin_lock_irqsave(&pmu_lock, flags); |
1272 | if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) { | |
1da177e4 LT |
1273 | if (gpio_irq >= 0) |
1274 | disable_irq_nosync(gpio_irq); | |
1275 | out_8(&via[IER], CB1_INT | IER_CLR); | |
1276 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1da177e4 LT |
1277 | break; |
1278 | } | |
1279 | } while (1); | |
1280 | } | |
1281 | ||
aacaf9bd | 1282 | void |
1da177e4 LT |
1283 | pmu_resume(void) |
1284 | { | |
1285 | unsigned long flags; | |
1286 | ||
1287 | if (!via || (pmu_suspended < 1)) | |
1288 | return; | |
1289 | ||
1290 | spin_lock_irqsave(&pmu_lock, flags); | |
1291 | pmu_suspended--; | |
1292 | if (pmu_suspended > 0) { | |
1293 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1294 | return; | |
1295 | } | |
1296 | adb_int_pending = 1; | |
1da177e4 LT |
1297 | if (gpio_irq >= 0) |
1298 | enable_irq(gpio_irq); | |
1299 | out_8(&via[IER], CB1_INT | IER_SET); | |
1300 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1301 | pmu_poll(); | |
1da177e4 LT |
1302 | } |
1303 | ||
1304 | /* Interrupt data could be the result data from an ADB cmd */ | |
aacaf9bd | 1305 | static void |
7d12e780 | 1306 | pmu_handle_data(unsigned char *data, int len) |
1da177e4 LT |
1307 | { |
1308 | unsigned char ints, pirq; | |
1309 | int i = 0; | |
1310 | ||
1311 | asleep = 0; | |
1312 | if (drop_interrupts || len < 1) { | |
1313 | adb_int_pending = 0; | |
1314 | pmu_irq_stats[8]++; | |
1315 | return; | |
1316 | } | |
1317 | ||
1318 | /* Get PMU interrupt mask */ | |
1319 | ints = data[0]; | |
1320 | ||
1321 | /* Record zero interrupts for stats */ | |
1322 | if (ints == 0) | |
1323 | pmu_irq_stats[9]++; | |
1324 | ||
1325 | /* Hack to deal with ADB autopoll flag */ | |
1326 | if (ints & PMU_INT_ADB) | |
1327 | ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL); | |
1328 | ||
1329 | next: | |
1330 | ||
1331 | if (ints == 0) { | |
1332 | if (i > pmu_irq_stats[10]) | |
1333 | pmu_irq_stats[10] = i; | |
1334 | return; | |
1335 | } | |
1336 | ||
1337 | for (pirq = 0; pirq < 8; pirq++) | |
1338 | if (ints & (1 << pirq)) | |
1339 | break; | |
1340 | pmu_irq_stats[pirq]++; | |
1341 | i++; | |
1342 | ints &= ~(1 << pirq); | |
1343 | ||
1344 | /* Note: for some reason, we get an interrupt with len=1, | |
1345 | * data[0]==0 after each normal ADB interrupt, at least | |
1346 | * on the Pismo. Still investigating... --BenH | |
1347 | */ | |
1348 | if ((1 << pirq) & PMU_INT_ADB) { | |
1349 | if ((data[0] & PMU_INT_ADB_AUTO) == 0) { | |
1350 | struct adb_request *req = req_awaiting_reply; | |
1351 | if (req == 0) { | |
1352 | printk(KERN_ERR "PMU: extra ADB reply\n"); | |
1353 | return; | |
1354 | } | |
1355 | req_awaiting_reply = NULL; | |
1356 | if (len <= 2) | |
1357 | req->reply_len = 0; | |
1358 | else { | |
1359 | memcpy(req->reply, data + 1, len - 1); | |
1360 | req->reply_len = len - 1; | |
1361 | } | |
1362 | pmu_done(req); | |
1363 | } else { | |
1da177e4 LT |
1364 | if (len == 4 && data[1] == 0x2c) { |
1365 | extern int xmon_wants_key, xmon_adb_keycode; | |
1366 | if (xmon_wants_key) { | |
1367 | xmon_adb_keycode = data[2]; | |
1368 | return; | |
1369 | } | |
1370 | } | |
1da177e4 LT |
1371 | #ifdef CONFIG_ADB |
1372 | /* | |
1373 | * XXX On the [23]400 the PMU gives us an up | |
1374 | * event for keycodes 0x74 or 0x75 when the PC | |
1375 | * card eject buttons are released, so we | |
1376 | * ignore those events. | |
1377 | */ | |
1378 | if (!(pmu_kind == PMU_OHARE_BASED && len == 4 | |
1379 | && data[1] == 0x2c && data[3] == 0xff | |
1380 | && (data[2] & ~1) == 0xf4)) | |
7d12e780 | 1381 | adb_input(data+1, len-1, 1); |
1da177e4 LT |
1382 | #endif /* CONFIG_ADB */ |
1383 | } | |
1384 | } | |
1385 | /* Sound/brightness button pressed */ | |
1386 | else if ((1 << pirq) & PMU_INT_SNDBRT) { | |
1387 | #ifdef CONFIG_PMAC_BACKLIGHT | |
1388 | if (len == 3) | |
4b755999 MH |
1389 | pmac_backlight_set_legacy_brightness_pmu(data[1] >> 4); |
1390 | #endif | |
1da177e4 LT |
1391 | } |
1392 | /* Tick interrupt */ | |
1393 | else if ((1 << pirq) & PMU_INT_TICK) { | |
1da177e4 LT |
1394 | /* Environement or tick interrupt, query batteries */ |
1395 | if (pmu_battery_count) { | |
1396 | if ((--query_batt_timer) == 0) { | |
1397 | query_battery_state(); | |
1398 | query_batt_timer = BATTERY_POLLING_COUNT; | |
1399 | } | |
1400 | } | |
1401 | } | |
1402 | else if ((1 << pirq) & PMU_INT_ENVIRONMENT) { | |
1403 | if (pmu_battery_count) | |
1404 | query_battery_state(); | |
1405 | pmu_pass_intr(data, len); | |
9e8e30a0 JB |
1406 | /* len == 6 is probably a bad check. But how do I |
1407 | * know what PMU versions send what events here? */ | |
1408 | if (len == 6) { | |
1409 | via_pmu_event(PMU_EVT_POWER, !!(data[1]&8)); | |
1410 | via_pmu_event(PMU_EVT_LID, data[1]&1); | |
1411 | } | |
1da177e4 LT |
1412 | } else { |
1413 | pmu_pass_intr(data, len); | |
1da177e4 LT |
1414 | } |
1415 | goto next; | |
1416 | } | |
1417 | ||
aacaf9bd | 1418 | static struct adb_request* |
7d12e780 | 1419 | pmu_sr_intr(void) |
1da177e4 LT |
1420 | { |
1421 | struct adb_request *req; | |
1422 | int bite = 0; | |
1423 | ||
1424 | if (via[B] & TREQ) { | |
1425 | printk(KERN_ERR "PMU: spurious SR intr (%x)\n", via[B]); | |
1426 | out_8(&via[IFR], SR_INT); | |
1427 | return NULL; | |
1428 | } | |
1429 | /* The ack may not yet be low when we get the interrupt */ | |
1430 | while ((in_8(&via[B]) & TACK) != 0) | |
1431 | ; | |
1432 | ||
1433 | /* if reading grab the byte, and reset the interrupt */ | |
1434 | if (pmu_state == reading || pmu_state == reading_intr) | |
1435 | bite = in_8(&via[SR]); | |
1436 | ||
1437 | /* reset TREQ and wait for TACK to go high */ | |
1438 | out_8(&via[B], in_8(&via[B]) | TREQ); | |
1439 | wait_for_ack(); | |
1440 | ||
1441 | switch (pmu_state) { | |
1442 | case sending: | |
1443 | req = current_req; | |
1444 | if (data_len < 0) { | |
1445 | data_len = req->nbytes - 1; | |
1446 | send_byte(data_len); | |
1447 | break; | |
1448 | } | |
1449 | if (data_index <= data_len) { | |
1450 | send_byte(req->data[data_index++]); | |
1451 | break; | |
1452 | } | |
1453 | req->sent = 1; | |
1454 | data_len = pmu_data_len[req->data[0]][1]; | |
1455 | if (data_len == 0) { | |
1456 | pmu_state = idle; | |
1457 | current_req = req->next; | |
1458 | if (req->reply_expected) | |
1459 | req_awaiting_reply = req; | |
1460 | else | |
1461 | return req; | |
1462 | } else { | |
1463 | pmu_state = reading; | |
1464 | data_index = 0; | |
1465 | reply_ptr = req->reply + req->reply_len; | |
1466 | recv_byte(); | |
1467 | } | |
1468 | break; | |
1469 | ||
1470 | case intack: | |
1471 | data_index = 0; | |
1472 | data_len = -1; | |
1473 | pmu_state = reading_intr; | |
1474 | reply_ptr = interrupt_data[int_data_last]; | |
1475 | recv_byte(); | |
1476 | if (gpio_irq >= 0 && !gpio_irq_enabled) { | |
1477 | enable_irq(gpio_irq); | |
1478 | gpio_irq_enabled = 1; | |
1479 | } | |
1480 | break; | |
1481 | ||
1482 | case reading: | |
1483 | case reading_intr: | |
1484 | if (data_len == -1) { | |
1485 | data_len = bite; | |
1486 | if (bite > 32) | |
1487 | printk(KERN_ERR "PMU: bad reply len %d\n", bite); | |
1488 | } else if (data_index < 32) { | |
1489 | reply_ptr[data_index++] = bite; | |
1490 | } | |
1491 | if (data_index < data_len) { | |
1492 | recv_byte(); | |
1493 | break; | |
1494 | } | |
1495 | ||
1496 | if (pmu_state == reading_intr) { | |
1497 | pmu_state = idle; | |
1498 | int_data_state[int_data_last] = int_data_ready; | |
1499 | interrupt_data_len[int_data_last] = data_len; | |
1500 | } else { | |
1501 | req = current_req; | |
1502 | /* | |
1503 | * For PMU sleep and freq change requests, we lock the | |
c03983ac | 1504 | * PMU until it's explicitly unlocked. This avoids any |
1da177e4 LT |
1505 | * spurrious event polling getting in |
1506 | */ | |
1507 | current_req = req->next; | |
1508 | req->reply_len += data_index; | |
1509 | if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED) | |
1510 | pmu_state = locked; | |
1511 | else | |
1512 | pmu_state = idle; | |
1513 | return req; | |
1514 | } | |
1515 | break; | |
1516 | ||
1517 | default: | |
1518 | printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n", | |
1519 | pmu_state); | |
1520 | } | |
1521 | return NULL; | |
1522 | } | |
1523 | ||
aacaf9bd | 1524 | static irqreturn_t |
7d12e780 | 1525 | via_pmu_interrupt(int irq, void *arg) |
1da177e4 LT |
1526 | { |
1527 | unsigned long flags; | |
1528 | int intr; | |
1529 | int nloop = 0; | |
1530 | int int_data = -1; | |
1531 | struct adb_request *req = NULL; | |
1532 | int handled = 0; | |
1533 | ||
1534 | /* This is a bit brutal, we can probably do better */ | |
1535 | spin_lock_irqsave(&pmu_lock, flags); | |
1536 | ++disable_poll; | |
1537 | ||
1538 | for (;;) { | |
1539 | intr = in_8(&via[IFR]) & (SR_INT | CB1_INT); | |
1540 | if (intr == 0) | |
1541 | break; | |
1542 | handled = 1; | |
1543 | if (++nloop > 1000) { | |
1544 | printk(KERN_DEBUG "PMU: stuck in intr loop, " | |
1545 | "intr=%x, ier=%x pmu_state=%d\n", | |
1546 | intr, in_8(&via[IER]), pmu_state); | |
1547 | break; | |
1548 | } | |
1549 | out_8(&via[IFR], intr); | |
1550 | if (intr & CB1_INT) { | |
1551 | adb_int_pending = 1; | |
1552 | pmu_irq_stats[0]++; | |
1553 | } | |
1554 | if (intr & SR_INT) { | |
7d12e780 | 1555 | req = pmu_sr_intr(); |
1da177e4 LT |
1556 | if (req) |
1557 | break; | |
1558 | } | |
1559 | } | |
1560 | ||
1561 | recheck: | |
1562 | if (pmu_state == idle) { | |
1563 | if (adb_int_pending) { | |
1564 | if (int_data_state[0] == int_data_empty) | |
1565 | int_data_last = 0; | |
1566 | else if (int_data_state[1] == int_data_empty) | |
1567 | int_data_last = 1; | |
1568 | else | |
1569 | goto no_free_slot; | |
1570 | pmu_state = intack; | |
1571 | int_data_state[int_data_last] = int_data_fill; | |
1572 | /* Sounds safer to make sure ACK is high before writing. | |
1573 | * This helped kill a problem with ADB and some iBooks | |
1574 | */ | |
1575 | wait_for_ack(); | |
1576 | send_byte(PMU_INT_ACK); | |
1577 | adb_int_pending = 0; | |
1578 | } else if (current_req) | |
1579 | pmu_start(); | |
1580 | } | |
1581 | no_free_slot: | |
1582 | /* Mark the oldest buffer for flushing */ | |
1583 | if (int_data_state[!int_data_last] == int_data_ready) { | |
1584 | int_data_state[!int_data_last] = int_data_flush; | |
1585 | int_data = !int_data_last; | |
1586 | } else if (int_data_state[int_data_last] == int_data_ready) { | |
1587 | int_data_state[int_data_last] = int_data_flush; | |
1588 | int_data = int_data_last; | |
1589 | } | |
1590 | --disable_poll; | |
1591 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1592 | ||
1593 | /* Deal with completed PMU requests outside of the lock */ | |
1594 | if (req) { | |
1595 | pmu_done(req); | |
1596 | req = NULL; | |
1597 | } | |
1598 | ||
1599 | /* Deal with interrupt datas outside of the lock */ | |
1600 | if (int_data >= 0) { | |
7d12e780 | 1601 | pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data]); |
1da177e4 LT |
1602 | spin_lock_irqsave(&pmu_lock, flags); |
1603 | ++disable_poll; | |
1604 | int_data_state[int_data] = int_data_empty; | |
1605 | int_data = -1; | |
1606 | goto recheck; | |
1607 | } | |
1608 | ||
1609 | return IRQ_RETVAL(handled); | |
1610 | } | |
1611 | ||
aacaf9bd | 1612 | void |
1da177e4 LT |
1613 | pmu_unlock(void) |
1614 | { | |
1615 | unsigned long flags; | |
1616 | ||
1617 | spin_lock_irqsave(&pmu_lock, flags); | |
1618 | if (pmu_state == locked) | |
1619 | pmu_state = idle; | |
1620 | adb_int_pending = 1; | |
1621 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1622 | } | |
1623 | ||
1624 | ||
aacaf9bd | 1625 | static irqreturn_t |
7d12e780 | 1626 | gpio1_interrupt(int irq, void *arg) |
1da177e4 LT |
1627 | { |
1628 | unsigned long flags; | |
1629 | ||
1630 | if ((in_8(gpio_reg + 0x9) & 0x02) == 0) { | |
1631 | spin_lock_irqsave(&pmu_lock, flags); | |
1632 | if (gpio_irq_enabled > 0) { | |
1633 | disable_irq_nosync(gpio_irq); | |
1634 | gpio_irq_enabled = 0; | |
1635 | } | |
1636 | pmu_irq_stats[1]++; | |
1637 | adb_int_pending = 1; | |
1638 | spin_unlock_irqrestore(&pmu_lock, flags); | |
7d12e780 | 1639 | via_pmu_interrupt(0, NULL); |
1da177e4 LT |
1640 | return IRQ_HANDLED; |
1641 | } | |
1642 | return IRQ_NONE; | |
1643 | } | |
1644 | ||
aacaf9bd | 1645 | void |
1da177e4 LT |
1646 | pmu_enable_irled(int on) |
1647 | { | |
1648 | struct adb_request req; | |
1649 | ||
1650 | if (vias == NULL) | |
1651 | return ; | |
1652 | if (pmu_kind == PMU_KEYLARGO_BASED) | |
1653 | return ; | |
1654 | ||
1655 | pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED | | |
1656 | (on ? PMU_POW_ON : PMU_POW_OFF)); | |
1657 | pmu_wait_complete(&req); | |
1658 | } | |
1659 | ||
aacaf9bd | 1660 | void |
1da177e4 LT |
1661 | pmu_restart(void) |
1662 | { | |
1663 | struct adb_request req; | |
1664 | ||
1665 | if (via == NULL) | |
1666 | return; | |
1667 | ||
1668 | local_irq_disable(); | |
1669 | ||
1670 | drop_interrupts = 1; | |
1671 | ||
1672 | if (pmu_kind != PMU_KEYLARGO_BASED) { | |
1673 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB | | |
1674 | PMU_INT_TICK ); | |
1675 | while(!req.complete) | |
1676 | pmu_poll(); | |
1677 | } | |
1678 | ||
1679 | pmu_request(&req, NULL, 1, PMU_RESET); | |
1680 | pmu_wait_complete(&req); | |
1681 | for (;;) | |
1682 | ; | |
1683 | } | |
1684 | ||
aacaf9bd | 1685 | void |
1da177e4 LT |
1686 | pmu_shutdown(void) |
1687 | { | |
1688 | struct adb_request req; | |
1689 | ||
1690 | if (via == NULL) | |
1691 | return; | |
1692 | ||
1693 | local_irq_disable(); | |
1694 | ||
1695 | drop_interrupts = 1; | |
1696 | ||
1697 | if (pmu_kind != PMU_KEYLARGO_BASED) { | |
1698 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB | | |
1699 | PMU_INT_TICK ); | |
1700 | pmu_wait_complete(&req); | |
1701 | } else { | |
1702 | /* Disable server mode on shutdown or we'll just | |
1703 | * wake up again | |
1704 | */ | |
1705 | pmu_set_server_mode(0); | |
1706 | } | |
1707 | ||
1708 | pmu_request(&req, NULL, 5, PMU_SHUTDOWN, | |
1709 | 'M', 'A', 'T', 'T'); | |
1710 | pmu_wait_complete(&req); | |
1711 | for (;;) | |
1712 | ; | |
1713 | } | |
1714 | ||
1715 | int | |
1716 | pmu_present(void) | |
1717 | { | |
1718 | return via != 0; | |
1719 | } | |
1720 | ||
e120e8d0 | 1721 | #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_PPC32) |
1da177e4 LT |
1722 | /* |
1723 | * This struct is used to store config register values for | |
1724 | * PCI devices which may get powered off when we sleep. | |
1725 | */ | |
1726 | static struct pci_save { | |
1da177e4 LT |
1727 | u16 command; |
1728 | u16 cache_lat; | |
1729 | u16 intr; | |
1730 | u32 rom_address; | |
1da177e4 LT |
1731 | } *pbook_pci_saves; |
1732 | static int pbook_npci_saves; | |
1733 | ||
aacaf9bd | 1734 | static void |
1da177e4 LT |
1735 | pbook_alloc_pci_save(void) |
1736 | { | |
1737 | int npci; | |
1738 | struct pci_dev *pd = NULL; | |
1739 | ||
1740 | npci = 0; | |
edceeaf5 | 1741 | while ((pd = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, pd)) != NULL) { |
1da177e4 LT |
1742 | ++npci; |
1743 | } | |
1744 | if (npci == 0) | |
1745 | return; | |
1746 | pbook_pci_saves = (struct pci_save *) | |
1747 | kmalloc(npci * sizeof(struct pci_save), GFP_KERNEL); | |
1748 | pbook_npci_saves = npci; | |
1749 | } | |
1750 | ||
aacaf9bd | 1751 | static void |
1da177e4 LT |
1752 | pbook_free_pci_save(void) |
1753 | { | |
1754 | if (pbook_pci_saves == NULL) | |
1755 | return; | |
1756 | kfree(pbook_pci_saves); | |
1757 | pbook_pci_saves = NULL; | |
1758 | pbook_npci_saves = 0; | |
1759 | } | |
1760 | ||
aacaf9bd | 1761 | static void |
1da177e4 LT |
1762 | pbook_pci_save(void) |
1763 | { | |
1764 | struct pci_save *ps = pbook_pci_saves; | |
1765 | struct pci_dev *pd = NULL; | |
1766 | int npci = pbook_npci_saves; | |
1767 | ||
1768 | if (ps == NULL) | |
1769 | return; | |
1770 | ||
edceeaf5 AC |
1771 | while ((pd = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, pd)) != NULL) { |
1772 | if (npci-- == 0) { | |
1773 | pci_dev_put(pd); | |
1da177e4 | 1774 | return; |
edceeaf5 | 1775 | } |
1da177e4 LT |
1776 | pci_read_config_word(pd, PCI_COMMAND, &ps->command); |
1777 | pci_read_config_word(pd, PCI_CACHE_LINE_SIZE, &ps->cache_lat); | |
1778 | pci_read_config_word(pd, PCI_INTERRUPT_LINE, &ps->intr); | |
1779 | pci_read_config_dword(pd, PCI_ROM_ADDRESS, &ps->rom_address); | |
1da177e4 LT |
1780 | ++ps; |
1781 | } | |
1782 | } | |
1783 | ||
1784 | /* For this to work, we must take care of a few things: If gmac was enabled | |
1785 | * during boot, it will be in the pci dev list. If it's disabled at this point | |
1786 | * (and it will probably be), then you can't access it's config space. | |
1787 | */ | |
aacaf9bd | 1788 | static void |
1da177e4 LT |
1789 | pbook_pci_restore(void) |
1790 | { | |
1791 | u16 cmd; | |
1792 | struct pci_save *ps = pbook_pci_saves - 1; | |
1793 | struct pci_dev *pd = NULL; | |
1794 | int npci = pbook_npci_saves; | |
1795 | int j; | |
1796 | ||
edceeaf5 | 1797 | while ((pd = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, pd)) != NULL) { |
1da177e4 LT |
1798 | if (npci-- == 0) |
1799 | return; | |
1800 | ps++; | |
1801 | if (ps->command == 0) | |
1802 | continue; | |
1803 | pci_read_config_word(pd, PCI_COMMAND, &cmd); | |
1804 | if ((ps->command & ~cmd) == 0) | |
1805 | continue; | |
1806 | switch (pd->hdr_type) { | |
1807 | case PCI_HEADER_TYPE_NORMAL: | |
1808 | for (j = 0; j < 6; ++j) | |
1809 | pci_write_config_dword(pd, | |
1810 | PCI_BASE_ADDRESS_0 + j*4, | |
1811 | pd->resource[j].start); | |
1812 | pci_write_config_dword(pd, PCI_ROM_ADDRESS, | |
1813 | ps->rom_address); | |
1814 | pci_write_config_word(pd, PCI_CACHE_LINE_SIZE, | |
1815 | ps->cache_lat); | |
1816 | pci_write_config_word(pd, PCI_INTERRUPT_LINE, | |
1817 | ps->intr); | |
1818 | pci_write_config_word(pd, PCI_COMMAND, ps->command); | |
1819 | break; | |
1820 | } | |
1da177e4 LT |
1821 | } |
1822 | } | |
1823 | ||
1824 | #ifdef DEBUG_SLEEP | |
1825 | /* N.B. This doesn't work on the 3400 */ | |
aacaf9bd | 1826 | void |
1da177e4 LT |
1827 | pmu_blink(int n) |
1828 | { | |
1829 | struct adb_request req; | |
1830 | ||
1831 | memset(&req, 0, sizeof(req)); | |
1832 | ||
1833 | for (; n > 0; --n) { | |
1834 | req.nbytes = 4; | |
1835 | req.done = NULL; | |
1836 | req.data[0] = 0xee; | |
1837 | req.data[1] = 4; | |
1838 | req.data[2] = 0; | |
1839 | req.data[3] = 1; | |
1840 | req.reply[0] = ADB_RET_OK; | |
1841 | req.reply_len = 1; | |
1842 | req.reply_expected = 0; | |
1843 | pmu_polled_request(&req); | |
1844 | mdelay(50); | |
1845 | req.nbytes = 4; | |
1846 | req.done = NULL; | |
1847 | req.data[0] = 0xee; | |
1848 | req.data[1] = 4; | |
1849 | req.data[2] = 0; | |
1850 | req.data[3] = 0; | |
1851 | req.reply[0] = ADB_RET_OK; | |
1852 | req.reply_len = 1; | |
1853 | req.reply_expected = 0; | |
1854 | pmu_polled_request(&req); | |
1855 | mdelay(50); | |
1856 | } | |
1857 | mdelay(50); | |
1858 | } | |
1859 | #endif | |
1860 | ||
1861 | /* | |
1862 | * Put the powerbook to sleep. | |
1863 | */ | |
1864 | ||
aacaf9bd | 1865 | static u32 save_via[8]; |
1da177e4 | 1866 | |
aacaf9bd | 1867 | static void |
1da177e4 LT |
1868 | save_via_state(void) |
1869 | { | |
1870 | save_via[0] = in_8(&via[ANH]); | |
1871 | save_via[1] = in_8(&via[DIRA]); | |
1872 | save_via[2] = in_8(&via[B]); | |
1873 | save_via[3] = in_8(&via[DIRB]); | |
1874 | save_via[4] = in_8(&via[PCR]); | |
1875 | save_via[5] = in_8(&via[ACR]); | |
1876 | save_via[6] = in_8(&via[T1CL]); | |
1877 | save_via[7] = in_8(&via[T1CH]); | |
1878 | } | |
aacaf9bd | 1879 | static void |
1da177e4 LT |
1880 | restore_via_state(void) |
1881 | { | |
1882 | out_8(&via[ANH], save_via[0]); | |
1883 | out_8(&via[DIRA], save_via[1]); | |
1884 | out_8(&via[B], save_via[2]); | |
1885 | out_8(&via[DIRB], save_via[3]); | |
1886 | out_8(&via[PCR], save_via[4]); | |
1887 | out_8(&via[ACR], save_via[5]); | |
1888 | out_8(&via[T1CL], save_via[6]); | |
1889 | out_8(&via[T1CH], save_via[7]); | |
1890 | out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */ | |
1891 | out_8(&via[IFR], 0x7f); /* clear IFR */ | |
1892 | out_8(&via[IER], IER_SET | SR_INT | CB1_INT); | |
1893 | } | |
1894 | ||
d565dd3b BH |
1895 | extern void pmu_backlight_set_sleep(int sleep); |
1896 | ||
aacaf9bd | 1897 | static int |
1da177e4 LT |
1898 | pmac_suspend_devices(void) |
1899 | { | |
1900 | int ret; | |
1901 | ||
1902 | pm_prepare_console(); | |
1903 | ||
1da177e4 LT |
1904 | /* Sync the disks. */ |
1905 | /* XXX It would be nice to have some way to ensure that | |
1906 | * nobody is dirtying any new buffers while we wait. That | |
1907 | * could be achieved using the refrigerator for processes | |
1908 | * that swsusp uses | |
1909 | */ | |
1910 | sys_sync(); | |
1911 | ||
1da177e4 LT |
1912 | /* Send suspend call to devices, hold the device core's dpm_sem */ |
1913 | ret = device_suspend(PMSG_SUSPEND); | |
1914 | if (ret) { | |
1da177e4 LT |
1915 | printk(KERN_ERR "Driver sleep failed\n"); |
1916 | return -EBUSY; | |
1917 | } | |
1918 | ||
d565dd3b BH |
1919 | #ifdef CONFIG_PMAC_BACKLIGHT |
1920 | /* Tell backlight code not to muck around with the chip anymore */ | |
1921 | pmu_backlight_set_sleep(1); | |
1922 | #endif | |
1923 | ||
5b9ca526 BH |
1924 | /* Call platform functions marked "on sleep" */ |
1925 | pmac_pfunc_i2c_suspend(); | |
1926 | pmac_pfunc_base_suspend(); | |
1927 | ||
e521dca6 | 1928 | /* Stop preemption */ |
1da177e4 LT |
1929 | preempt_disable(); |
1930 | ||
1931 | /* Make sure the decrementer won't interrupt us */ | |
1932 | asm volatile("mtdec %0" : : "r" (0x7fffffff)); | |
1933 | /* Make sure any pending DEC interrupt occurring while we did | |
1934 | * the above didn't re-enable the DEC */ | |
1935 | mb(); | |
1936 | asm volatile("mtdec %0" : : "r" (0x7fffffff)); | |
1937 | ||
1938 | /* We can now disable MSR_EE. This code of course works properly only | |
1939 | * on UP machines... For SMP, if we ever implement sleep, we'll have to | |
1940 | * stop the "other" CPUs way before we do all that stuff. | |
1941 | */ | |
1942 | local_irq_disable(); | |
1943 | ||
1944 | /* Broadcast power down irq | |
1945 | * This isn't that useful in most cases (only directly wired devices can | |
1946 | * use this but still... This will take care of sysdev's as well, so | |
1947 | * we exit from here with local irqs disabled and PIC off. | |
1948 | */ | |
bf2049f9 | 1949 | ret = device_power_down(PMSG_SUSPEND); |
1da177e4 LT |
1950 | if (ret) { |
1951 | wakeup_decrementer(); | |
1952 | local_irq_enable(); | |
1953 | preempt_enable(); | |
1954 | device_resume(); | |
1da177e4 LT |
1955 | printk(KERN_ERR "Driver powerdown failed\n"); |
1956 | return -EBUSY; | |
1957 | } | |
1958 | ||
5474c120 MH |
1959 | /* Wait for completion of async requests */ |
1960 | while (!batt_req.complete) | |
1da177e4 LT |
1961 | pmu_poll(); |
1962 | ||
1963 | /* Giveup the lazy FPU & vec so we don't have to back them | |
1964 | * up from the low level code | |
1965 | */ | |
1966 | enable_kernel_fp(); | |
1967 | ||
1968 | #ifdef CONFIG_ALTIVEC | |
1969 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) | |
1970 | enable_kernel_altivec(); | |
1971 | #endif /* CONFIG_ALTIVEC */ | |
1972 | ||
1973 | return 0; | |
1974 | } | |
1975 | ||
aacaf9bd | 1976 | static int |
1da177e4 LT |
1977 | pmac_wakeup_devices(void) |
1978 | { | |
1979 | mdelay(100); | |
1980 | ||
d565dd3b BH |
1981 | #ifdef CONFIG_PMAC_BACKLIGHT |
1982 | /* Tell backlight code it can use the chip again */ | |
1983 | pmu_backlight_set_sleep(0); | |
1984 | #endif | |
1985 | ||
1da177e4 LT |
1986 | /* Power back up system devices (including the PIC) */ |
1987 | device_power_up(); | |
1988 | ||
1989 | /* Force a poll of ADB interrupts */ | |
1990 | adb_int_pending = 1; | |
7d12e780 | 1991 | via_pmu_interrupt(0, NULL); |
1da177e4 LT |
1992 | |
1993 | /* Restart jiffies & scheduling */ | |
1994 | wakeup_decrementer(); | |
1995 | ||
1996 | /* Re-enable local CPU interrupts */ | |
1997 | local_irq_enable(); | |
b16eeb47 | 1998 | mdelay(10); |
1da177e4 LT |
1999 | preempt_enable(); |
2000 | ||
5b9ca526 BH |
2001 | /* Call platform functions marked "on wake" */ |
2002 | pmac_pfunc_base_resume(); | |
2003 | pmac_pfunc_i2c_resume(); | |
2004 | ||
1da177e4 LT |
2005 | /* Resume devices */ |
2006 | device_resume(); | |
2007 | ||
1da177e4 LT |
2008 | pm_restore_console(); |
2009 | ||
2010 | return 0; | |
2011 | } | |
2012 | ||
2013 | #define GRACKLE_PM (1<<7) | |
2014 | #define GRACKLE_DOZE (1<<5) | |
2015 | #define GRACKLE_NAP (1<<4) | |
2016 | #define GRACKLE_SLEEP (1<<3) | |
2017 | ||
3bea6313 | 2018 | static int powerbook_sleep_grackle(void) |
1da177e4 LT |
2019 | { |
2020 | unsigned long save_l2cr; | |
2021 | unsigned short pmcr1; | |
2022 | struct adb_request req; | |
2023 | int ret; | |
2024 | struct pci_dev *grackle; | |
2025 | ||
c78f8305 | 2026 | grackle = pci_get_bus_and_slot(0, 0); |
1da177e4 LT |
2027 | if (!grackle) |
2028 | return -ENODEV; | |
2029 | ||
2030 | ret = pmac_suspend_devices(); | |
2031 | if (ret) { | |
2032 | printk(KERN_ERR "Sleep rejected by devices\n"); | |
2033 | return ret; | |
2034 | } | |
2035 | ||
2036 | /* Turn off various things. Darwin does some retry tests here... */ | |
2037 | pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE); | |
2038 | pmu_wait_complete(&req); | |
2039 | pmu_request(&req, NULL, 2, PMU_POWER_CTRL, | |
2040 | PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY); | |
2041 | pmu_wait_complete(&req); | |
2042 | ||
2043 | /* For 750, save backside cache setting and disable it */ | |
2044 | save_l2cr = _get_L2CR(); /* (returns -1 if not available) */ | |
2045 | ||
2046 | if (!__fake_sleep) { | |
2047 | /* Ask the PMU to put us to sleep */ | |
2048 | pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T'); | |
2049 | pmu_wait_complete(&req); | |
2050 | } | |
2051 | ||
2052 | /* The VIA is supposed not to be restored correctly*/ | |
2053 | save_via_state(); | |
2054 | /* We shut down some HW */ | |
2055 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1); | |
2056 | ||
2057 | pci_read_config_word(grackle, 0x70, &pmcr1); | |
2058 | /* Apparently, MacOS uses NAP mode for Grackle ??? */ | |
2059 | pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP); | |
2060 | pmcr1 |= GRACKLE_PM|GRACKLE_NAP; | |
2061 | pci_write_config_word(grackle, 0x70, pmcr1); | |
2062 | ||
2063 | /* Call low-level ASM sleep handler */ | |
2064 | if (__fake_sleep) | |
2065 | mdelay(5000); | |
2066 | else | |
2067 | low_sleep_handler(); | |
2068 | ||
2069 | /* We're awake again, stop grackle PM */ | |
2070 | pci_read_config_word(grackle, 0x70, &pmcr1); | |
2071 | pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP); | |
2072 | pci_write_config_word(grackle, 0x70, pmcr1); | |
2073 | ||
c78f8305 AC |
2074 | pci_dev_put(grackle); |
2075 | ||
1da177e4 LT |
2076 | /* Make sure the PMU is idle */ |
2077 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0); | |
2078 | restore_via_state(); | |
2079 | ||
2080 | /* Restore L2 cache */ | |
2081 | if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0) | |
2082 | _set_L2CR(save_l2cr); | |
2083 | ||
2084 | /* Restore userland MMU context */ | |
6218a761 | 2085 | set_context(current->active_mm->context.id, current->active_mm->pgd); |
1da177e4 LT |
2086 | |
2087 | /* Power things up */ | |
2088 | pmu_unlock(); | |
2089 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask); | |
2090 | pmu_wait_complete(&req); | |
2091 | pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, | |
2092 | PMU_POW0_ON|PMU_POW0_HARD_DRIVE); | |
2093 | pmu_wait_complete(&req); | |
2094 | pmu_request(&req, NULL, 2, PMU_POWER_CTRL, | |
2095 | PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY); | |
2096 | pmu_wait_complete(&req); | |
2097 | ||
2098 | pmac_wakeup_devices(); | |
2099 | ||
2100 | return 0; | |
2101 | } | |
2102 | ||
aacaf9bd | 2103 | static int |
1da177e4 LT |
2104 | powerbook_sleep_Core99(void) |
2105 | { | |
2106 | unsigned long save_l2cr; | |
2107 | unsigned long save_l3cr; | |
2108 | struct adb_request req; | |
2109 | int ret; | |
2110 | ||
2111 | if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) { | |
2112 | printk(KERN_ERR "Sleep mode not supported on this machine\n"); | |
2113 | return -ENOSYS; | |
2114 | } | |
2115 | ||
2116 | if (num_online_cpus() > 1 || cpu_is_offline(0)) | |
2117 | return -EAGAIN; | |
2118 | ||
2119 | ret = pmac_suspend_devices(); | |
2120 | if (ret) { | |
2121 | printk(KERN_ERR "Sleep rejected by devices\n"); | |
2122 | return ret; | |
2123 | } | |
2124 | ||
b16eeb47 BH |
2125 | /* Stop environment and ADB interrupts */ |
2126 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0); | |
2127 | pmu_wait_complete(&req); | |
1da177e4 LT |
2128 | |
2129 | /* Tell PMU what events will wake us up */ | |
2130 | pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS, | |
2131 | 0xff, 0xff); | |
2132 | pmu_wait_complete(&req); | |
2133 | pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS, | |
2134 | 0, PMU_PWR_WAKEUP_KEY | | |
2135 | (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0)); | |
2136 | pmu_wait_complete(&req); | |
2137 | ||
2138 | /* Save the state of the L2 and L3 caches */ | |
2139 | save_l3cr = _get_L3CR(); /* (returns -1 if not available) */ | |
2140 | save_l2cr = _get_L2CR(); /* (returns -1 if not available) */ | |
2141 | ||
2142 | if (!__fake_sleep) { | |
2143 | /* Ask the PMU to put us to sleep */ | |
2144 | pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T'); | |
2145 | pmu_wait_complete(&req); | |
2146 | } | |
2147 | ||
2148 | /* The VIA is supposed not to be restored correctly*/ | |
2149 | save_via_state(); | |
2150 | ||
2151 | /* Shut down various ASICs. There's a chance that we can no longer | |
2152 | * talk to the PMU after this, so I moved it to _after_ sending the | |
2153 | * sleep command to it. Still need to be checked. | |
2154 | */ | |
2155 | pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1); | |
2156 | ||
2157 | /* Call low-level ASM sleep handler */ | |
2158 | if (__fake_sleep) | |
2159 | mdelay(5000); | |
2160 | else | |
2161 | low_sleep_handler(); | |
2162 | ||
2163 | /* Restore Apple core ASICs state */ | |
2164 | pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0); | |
2165 | ||
2166 | /* Restore VIA */ | |
2167 | restore_via_state(); | |
2168 | ||
0086b5ec BH |
2169 | /* tweak LPJ before cpufreq is there */ |
2170 | loops_per_jiffy *= 2; | |
2171 | ||
1da177e4 LT |
2172 | /* Restore video */ |
2173 | pmac_call_early_video_resume(); | |
2174 | ||
2175 | /* Restore L2 cache */ | |
2176 | if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0) | |
2177 | _set_L2CR(save_l2cr); | |
2178 | /* Restore L3 cache */ | |
2179 | if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0) | |
2180 | _set_L3CR(save_l3cr); | |
2181 | ||
2182 | /* Restore userland MMU context */ | |
6218a761 | 2183 | set_context(current->active_mm->context.id, current->active_mm->pgd); |
1da177e4 LT |
2184 | |
2185 | /* Tell PMU we are ready */ | |
2186 | pmu_unlock(); | |
2187 | pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2); | |
2188 | pmu_wait_complete(&req); | |
2189 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask); | |
2190 | pmu_wait_complete(&req); | |
2191 | ||
0086b5ec BH |
2192 | /* Restore LPJ, cpufreq will adjust the cpu frequency */ |
2193 | loops_per_jiffy /= 2; | |
2194 | ||
1da177e4 LT |
2195 | pmac_wakeup_devices(); |
2196 | ||
2197 | return 0; | |
2198 | } | |
2199 | ||
2200 | #define PB3400_MEM_CTRL 0xf8000000 | |
2201 | #define PB3400_MEM_CTRL_SLEEP 0x70 | |
2202 | ||
aacaf9bd | 2203 | static int |
1da177e4 LT |
2204 | powerbook_sleep_3400(void) |
2205 | { | |
2206 | int ret, i, x; | |
2207 | unsigned int hid0; | |
2208 | unsigned long p; | |
2209 | struct adb_request sleep_req; | |
2210 | void __iomem *mem_ctrl; | |
2211 | unsigned int __iomem *mem_ctrl_sleep; | |
2212 | ||
2213 | /* first map in the memory controller registers */ | |
2214 | mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100); | |
2215 | if (mem_ctrl == NULL) { | |
2216 | printk("powerbook_sleep_3400: ioremap failed\n"); | |
2217 | return -ENOMEM; | |
2218 | } | |
2219 | mem_ctrl_sleep = mem_ctrl + PB3400_MEM_CTRL_SLEEP; | |
2220 | ||
2221 | /* Allocate room for PCI save */ | |
2222 | pbook_alloc_pci_save(); | |
2223 | ||
2224 | ret = pmac_suspend_devices(); | |
2225 | if (ret) { | |
2226 | pbook_free_pci_save(); | |
2227 | printk(KERN_ERR "Sleep rejected by devices\n"); | |
2228 | return ret; | |
2229 | } | |
2230 | ||
2231 | /* Save the state of PCI config space for some slots */ | |
2232 | pbook_pci_save(); | |
2233 | ||
2234 | /* Set the memory controller to keep the memory refreshed | |
2235 | while we're asleep */ | |
2236 | for (i = 0x403f; i >= 0x4000; --i) { | |
2237 | out_be32(mem_ctrl_sleep, i); | |
2238 | do { | |
2239 | x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff; | |
2240 | } while (x == 0); | |
2241 | if (x >= 0x100) | |
2242 | break; | |
2243 | } | |
2244 | ||
2245 | /* Ask the PMU to put us to sleep */ | |
2246 | pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T'); | |
2247 | while (!sleep_req.complete) | |
2248 | mb(); | |
2249 | ||
2250 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1); | |
2251 | ||
2252 | /* displacement-flush the L2 cache - necessary? */ | |
2253 | for (p = KERNELBASE; p < KERNELBASE + 0x100000; p += 0x1000) | |
2254 | i = *(volatile int *)p; | |
2255 | asleep = 1; | |
2256 | ||
2257 | /* Put the CPU into sleep mode */ | |
21fe3301 | 2258 | hid0 = mfspr(SPRN_HID0); |
1da177e4 | 2259 | hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP; |
21fe3301 BH |
2260 | mtspr(SPRN_HID0, hid0); |
2261 | mtmsr(mfmsr() | MSR_POW | MSR_EE); | |
1da177e4 LT |
2262 | udelay(10); |
2263 | ||
2264 | /* OK, we're awake again, start restoring things */ | |
2265 | out_be32(mem_ctrl_sleep, 0x3f); | |
2266 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0); | |
2267 | pbook_pci_restore(); | |
2268 | pmu_unlock(); | |
2269 | ||
2270 | /* wait for the PMU interrupt sequence to complete */ | |
2271 | while (asleep) | |
2272 | mb(); | |
2273 | ||
2274 | pmac_wakeup_devices(); | |
2275 | pbook_free_pci_save(); | |
2276 | iounmap(mem_ctrl); | |
2277 | ||
2278 | return 0; | |
2279 | } | |
2280 | ||
e120e8d0 | 2281 | #endif /* CONFIG_PM_SLEEP && CONFIG_PPC32 */ |
8c870933 | 2282 | |
1da177e4 LT |
2283 | /* |
2284 | * Support for /dev/pmu device | |
2285 | */ | |
2286 | #define RB_SIZE 0x10 | |
2287 | struct pmu_private { | |
2288 | struct list_head list; | |
2289 | int rb_get; | |
2290 | int rb_put; | |
2291 | struct rb_entry { | |
2292 | unsigned short len; | |
2293 | unsigned char data[16]; | |
2294 | } rb_buf[RB_SIZE]; | |
2295 | wait_queue_head_t wait; | |
2296 | spinlock_t lock; | |
2297 | #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) | |
2298 | int backlight_locker; | |
4b755999 | 2299 | #endif |
1da177e4 LT |
2300 | }; |
2301 | ||
2302 | static LIST_HEAD(all_pmu_pvt); | |
aacaf9bd | 2303 | static DEFINE_SPINLOCK(all_pvt_lock); |
1da177e4 | 2304 | |
aacaf9bd | 2305 | static void |
1da177e4 LT |
2306 | pmu_pass_intr(unsigned char *data, int len) |
2307 | { | |
2308 | struct pmu_private *pp; | |
2309 | struct list_head *list; | |
2310 | int i; | |
2311 | unsigned long flags; | |
2312 | ||
2313 | if (len > sizeof(pp->rb_buf[0].data)) | |
2314 | len = sizeof(pp->rb_buf[0].data); | |
2315 | spin_lock_irqsave(&all_pvt_lock, flags); | |
2316 | for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) { | |
2317 | pp = list_entry(list, struct pmu_private, list); | |
2318 | spin_lock(&pp->lock); | |
2319 | i = pp->rb_put + 1; | |
2320 | if (i >= RB_SIZE) | |
2321 | i = 0; | |
2322 | if (i != pp->rb_get) { | |
2323 | struct rb_entry *rp = &pp->rb_buf[pp->rb_put]; | |
2324 | rp->len = len; | |
2325 | memcpy(rp->data, data, len); | |
2326 | pp->rb_put = i; | |
2327 | wake_up_interruptible(&pp->wait); | |
2328 | } | |
2329 | spin_unlock(&pp->lock); | |
2330 | } | |
2331 | spin_unlock_irqrestore(&all_pvt_lock, flags); | |
2332 | } | |
2333 | ||
aacaf9bd | 2334 | static int |
1da177e4 LT |
2335 | pmu_open(struct inode *inode, struct file *file) |
2336 | { | |
2337 | struct pmu_private *pp; | |
2338 | unsigned long flags; | |
2339 | ||
2340 | pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL); | |
2341 | if (pp == 0) | |
2342 | return -ENOMEM; | |
2343 | pp->rb_get = pp->rb_put = 0; | |
2344 | spin_lock_init(&pp->lock); | |
2345 | init_waitqueue_head(&pp->wait); | |
2346 | spin_lock_irqsave(&all_pvt_lock, flags); | |
2347 | #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) | |
2348 | pp->backlight_locker = 0; | |
4b755999 | 2349 | #endif |
1da177e4 LT |
2350 | list_add(&pp->list, &all_pmu_pvt); |
2351 | spin_unlock_irqrestore(&all_pvt_lock, flags); | |
2352 | file->private_data = pp; | |
2353 | return 0; | |
2354 | } | |
2355 | ||
aacaf9bd | 2356 | static ssize_t |
1da177e4 LT |
2357 | pmu_read(struct file *file, char __user *buf, |
2358 | size_t count, loff_t *ppos) | |
2359 | { | |
2360 | struct pmu_private *pp = file->private_data; | |
2361 | DECLARE_WAITQUEUE(wait, current); | |
2362 | unsigned long flags; | |
2363 | int ret = 0; | |
2364 | ||
2365 | if (count < 1 || pp == 0) | |
2366 | return -EINVAL; | |
2367 | if (!access_ok(VERIFY_WRITE, buf, count)) | |
2368 | return -EFAULT; | |
2369 | ||
2370 | spin_lock_irqsave(&pp->lock, flags); | |
2371 | add_wait_queue(&pp->wait, &wait); | |
2372 | current->state = TASK_INTERRUPTIBLE; | |
2373 | ||
2374 | for (;;) { | |
2375 | ret = -EAGAIN; | |
2376 | if (pp->rb_get != pp->rb_put) { | |
2377 | int i = pp->rb_get; | |
2378 | struct rb_entry *rp = &pp->rb_buf[i]; | |
2379 | ret = rp->len; | |
2380 | spin_unlock_irqrestore(&pp->lock, flags); | |
2381 | if (ret > count) | |
2382 | ret = count; | |
2383 | if (ret > 0 && copy_to_user(buf, rp->data, ret)) | |
2384 | ret = -EFAULT; | |
2385 | if (++i >= RB_SIZE) | |
2386 | i = 0; | |
2387 | spin_lock_irqsave(&pp->lock, flags); | |
2388 | pp->rb_get = i; | |
2389 | } | |
2390 | if (ret >= 0) | |
2391 | break; | |
2392 | if (file->f_flags & O_NONBLOCK) | |
2393 | break; | |
2394 | ret = -ERESTARTSYS; | |
2395 | if (signal_pending(current)) | |
2396 | break; | |
2397 | spin_unlock_irqrestore(&pp->lock, flags); | |
2398 | schedule(); | |
2399 | spin_lock_irqsave(&pp->lock, flags); | |
2400 | } | |
2401 | current->state = TASK_RUNNING; | |
2402 | remove_wait_queue(&pp->wait, &wait); | |
2403 | spin_unlock_irqrestore(&pp->lock, flags); | |
2404 | ||
2405 | return ret; | |
2406 | } | |
2407 | ||
aacaf9bd | 2408 | static ssize_t |
1da177e4 LT |
2409 | pmu_write(struct file *file, const char __user *buf, |
2410 | size_t count, loff_t *ppos) | |
2411 | { | |
2412 | return 0; | |
2413 | } | |
2414 | ||
aacaf9bd | 2415 | static unsigned int |
1da177e4 LT |
2416 | pmu_fpoll(struct file *filp, poll_table *wait) |
2417 | { | |
2418 | struct pmu_private *pp = filp->private_data; | |
2419 | unsigned int mask = 0; | |
2420 | unsigned long flags; | |
2421 | ||
2422 | if (pp == 0) | |
2423 | return 0; | |
2424 | poll_wait(filp, &pp->wait, wait); | |
2425 | spin_lock_irqsave(&pp->lock, flags); | |
2426 | if (pp->rb_get != pp->rb_put) | |
2427 | mask |= POLLIN; | |
2428 | spin_unlock_irqrestore(&pp->lock, flags); | |
2429 | return mask; | |
2430 | } | |
2431 | ||
aacaf9bd | 2432 | static int |
1da177e4 LT |
2433 | pmu_release(struct inode *inode, struct file *file) |
2434 | { | |
2435 | struct pmu_private *pp = file->private_data; | |
2436 | unsigned long flags; | |
2437 | ||
1da177e4 LT |
2438 | if (pp != 0) { |
2439 | file->private_data = NULL; | |
2440 | spin_lock_irqsave(&all_pvt_lock, flags); | |
2441 | list_del(&pp->list); | |
2442 | spin_unlock_irqrestore(&all_pvt_lock, flags); | |
4b755999 | 2443 | |
1da177e4 | 2444 | #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) |
4b755999 MH |
2445 | if (pp->backlight_locker) |
2446 | pmac_backlight_enable(); | |
2447 | #endif | |
2448 | ||
1da177e4 LT |
2449 | kfree(pp); |
2450 | } | |
1da177e4 LT |
2451 | return 0; |
2452 | } | |
2453 | ||
aacaf9bd | 2454 | static int |
1da177e4 LT |
2455 | pmu_ioctl(struct inode * inode, struct file *filp, |
2456 | u_int cmd, u_long arg) | |
2457 | { | |
1da177e4 | 2458 | __u32 __user *argp = (__u32 __user *)arg; |
8c870933 | 2459 | int error = -EINVAL; |
1da177e4 LT |
2460 | |
2461 | switch (cmd) { | |
e120e8d0 | 2462 | #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_PPC32) |
1da177e4 LT |
2463 | case PMU_IOC_SLEEP: |
2464 | if (!capable(CAP_SYS_ADMIN)) | |
2465 | return -EACCES; | |
2466 | if (sleep_in_progress) | |
2467 | return -EBUSY; | |
2468 | sleep_in_progress = 1; | |
2469 | switch (pmu_kind) { | |
2470 | case PMU_OHARE_BASED: | |
2471 | error = powerbook_sleep_3400(); | |
2472 | break; | |
2473 | case PMU_HEATHROW_BASED: | |
2474 | case PMU_PADDINGTON_BASED: | |
2475 | error = powerbook_sleep_grackle(); | |
2476 | break; | |
2477 | case PMU_KEYLARGO_BASED: | |
2478 | error = powerbook_sleep_Core99(); | |
2479 | break; | |
2480 | default: | |
2481 | error = -ENOSYS; | |
2482 | } | |
2483 | sleep_in_progress = 0; | |
8c870933 | 2484 | break; |
1da177e4 LT |
2485 | case PMU_IOC_CAN_SLEEP: |
2486 | if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) | |
2487 | return put_user(0, argp); | |
2488 | else | |
2489 | return put_user(1, argp); | |
e120e8d0 | 2490 | #endif /* CONFIG_PM_SLEEP && CONFIG_PPC32 */ |
1da177e4 | 2491 | |
5474c120 MH |
2492 | #ifdef CONFIG_PMAC_BACKLIGHT_LEGACY |
2493 | /* Compatibility ioctl's for backlight */ | |
1da177e4 | 2494 | case PMU_IOC_GET_BACKLIGHT: |
5474c120 MH |
2495 | { |
2496 | int brightness; | |
2497 | ||
1da177e4 LT |
2498 | if (sleep_in_progress) |
2499 | return -EBUSY; | |
5474c120 MH |
2500 | |
2501 | brightness = pmac_backlight_get_legacy_brightness(); | |
2502 | if (brightness < 0) | |
2503 | return brightness; | |
2504 | else | |
2505 | return put_user(brightness, argp); | |
2506 | ||
2507 | } | |
1da177e4 LT |
2508 | case PMU_IOC_SET_BACKLIGHT: |
2509 | { | |
5474c120 MH |
2510 | int brightness; |
2511 | ||
1da177e4 LT |
2512 | if (sleep_in_progress) |
2513 | return -EBUSY; | |
5474c120 MH |
2514 | |
2515 | error = get_user(brightness, argp); | |
2516 | if (error) | |
2517 | return error; | |
2518 | ||
2519 | return pmac_backlight_set_legacy_brightness(brightness); | |
1da177e4 LT |
2520 | } |
2521 | #ifdef CONFIG_INPUT_ADBHID | |
2522 | case PMU_IOC_GRAB_BACKLIGHT: { | |
8c870933 | 2523 | struct pmu_private *pp = filp->private_data; |
8c870933 | 2524 | |
1da177e4 LT |
2525 | if (pp->backlight_locker) |
2526 | return 0; | |
4b755999 | 2527 | |
1da177e4 | 2528 | pp->backlight_locker = 1; |
4b755999 MH |
2529 | pmac_backlight_disable(); |
2530 | ||
1da177e4 LT |
2531 | return 0; |
2532 | } | |
2533 | #endif /* CONFIG_INPUT_ADBHID */ | |
5474c120 | 2534 | #endif /* CONFIG_PMAC_BACKLIGHT_LEGACY */ |
4b755999 | 2535 | |
1da177e4 LT |
2536 | case PMU_IOC_GET_MODEL: |
2537 | return put_user(pmu_kind, argp); | |
2538 | case PMU_IOC_HAS_ADB: | |
2539 | return put_user(pmu_has_adb, argp); | |
2540 | } | |
8c870933 | 2541 | return error; |
1da177e4 LT |
2542 | } |
2543 | ||
fa027c2a | 2544 | static const struct file_operations pmu_device_fops = { |
1da177e4 LT |
2545 | .read = pmu_read, |
2546 | .write = pmu_write, | |
2547 | .poll = pmu_fpoll, | |
2548 | .ioctl = pmu_ioctl, | |
2549 | .open = pmu_open, | |
2550 | .release = pmu_release, | |
2551 | }; | |
2552 | ||
aacaf9bd | 2553 | static struct miscdevice pmu_device = { |
1da177e4 LT |
2554 | PMU_MINOR, "pmu", &pmu_device_fops |
2555 | }; | |
2556 | ||
8c870933 | 2557 | static int pmu_device_init(void) |
1da177e4 LT |
2558 | { |
2559 | if (!via) | |
8c870933 | 2560 | return 0; |
1da177e4 LT |
2561 | if (misc_register(&pmu_device) < 0) |
2562 | printk(KERN_ERR "via-pmu: cannot register misc device.\n"); | |
8c870933 | 2563 | return 0; |
1da177e4 | 2564 | } |
8c870933 BH |
2565 | device_initcall(pmu_device_init); |
2566 | ||
1da177e4 LT |
2567 | |
2568 | #ifdef DEBUG_SLEEP | |
aacaf9bd | 2569 | static inline void |
1da177e4 LT |
2570 | polled_handshake(volatile unsigned char __iomem *via) |
2571 | { | |
2572 | via[B] &= ~TREQ; eieio(); | |
2573 | while ((via[B] & TACK) != 0) | |
2574 | ; | |
2575 | via[B] |= TREQ; eieio(); | |
2576 | while ((via[B] & TACK) == 0) | |
2577 | ; | |
2578 | } | |
2579 | ||
aacaf9bd | 2580 | static inline void |
1da177e4 LT |
2581 | polled_send_byte(volatile unsigned char __iomem *via, int x) |
2582 | { | |
2583 | via[ACR] |= SR_OUT | SR_EXT; eieio(); | |
2584 | via[SR] = x; eieio(); | |
2585 | polled_handshake(via); | |
2586 | } | |
2587 | ||
aacaf9bd | 2588 | static inline int |
1da177e4 LT |
2589 | polled_recv_byte(volatile unsigned char __iomem *via) |
2590 | { | |
2591 | int x; | |
2592 | ||
2593 | via[ACR] = (via[ACR] & ~SR_OUT) | SR_EXT; eieio(); | |
2594 | x = via[SR]; eieio(); | |
2595 | polled_handshake(via); | |
2596 | x = via[SR]; eieio(); | |
2597 | return x; | |
2598 | } | |
2599 | ||
aacaf9bd | 2600 | int |
1da177e4 LT |
2601 | pmu_polled_request(struct adb_request *req) |
2602 | { | |
2603 | unsigned long flags; | |
2604 | int i, l, c; | |
2605 | volatile unsigned char __iomem *v = via; | |
2606 | ||
2607 | req->complete = 1; | |
2608 | c = req->data[0]; | |
2609 | l = pmu_data_len[c][0]; | |
2610 | if (l >= 0 && req->nbytes != l + 1) | |
2611 | return -EINVAL; | |
2612 | ||
2613 | local_irq_save(flags); | |
2614 | while (pmu_state != idle) | |
2615 | pmu_poll(); | |
2616 | ||
2617 | while ((via[B] & TACK) == 0) | |
2618 | ; | |
2619 | polled_send_byte(v, c); | |
2620 | if (l < 0) { | |
2621 | l = req->nbytes - 1; | |
2622 | polled_send_byte(v, l); | |
2623 | } | |
2624 | for (i = 1; i <= l; ++i) | |
2625 | polled_send_byte(v, req->data[i]); | |
2626 | ||
2627 | l = pmu_data_len[c][1]; | |
2628 | if (l < 0) | |
2629 | l = polled_recv_byte(v); | |
2630 | for (i = 0; i < l; ++i) | |
2631 | req->reply[i + req->reply_len] = polled_recv_byte(v); | |
2632 | ||
2633 | if (req->done) | |
2634 | (*req->done)(req); | |
2635 | ||
2636 | local_irq_restore(flags); | |
2637 | return 0; | |
2638 | } | |
2639 | #endif /* DEBUG_SLEEP */ | |
2640 | ||
2641 | ||
2642 | /* FIXME: This is a temporary set of callbacks to enable us | |
2643 | * to do suspend-to-disk. | |
2644 | */ | |
2645 | ||
e120e8d0 | 2646 | #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_PPC32) |
1da177e4 | 2647 | |
f596575e | 2648 | int pmu_sys_suspended; |
1da177e4 | 2649 | |
3bfffd97 | 2650 | static int pmu_sys_suspend(struct sys_device *sysdev, pm_message_t state) |
1da177e4 | 2651 | { |
ca078bae | 2652 | if (state.event != PM_EVENT_SUSPEND || pmu_sys_suspended) |
1da177e4 LT |
2653 | return 0; |
2654 | ||
2655 | /* Suspend PMU event interrupts */ | |
2656 | pmu_suspend(); | |
2657 | ||
2658 | pmu_sys_suspended = 1; | |
2659 | return 0; | |
2660 | } | |
2661 | ||
2662 | static int pmu_sys_resume(struct sys_device *sysdev) | |
2663 | { | |
2664 | struct adb_request req; | |
2665 | ||
2666 | if (!pmu_sys_suspended) | |
2667 | return 0; | |
2668 | ||
2669 | /* Tell PMU we are ready */ | |
2670 | pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2); | |
2671 | pmu_wait_complete(&req); | |
2672 | ||
2673 | /* Resume PMU event interrupts */ | |
2674 | pmu_resume(); | |
2675 | ||
2676 | pmu_sys_suspended = 0; | |
2677 | ||
2678 | return 0; | |
2679 | } | |
2680 | ||
e120e8d0 | 2681 | #endif /* CONFIG_PM_SLEEP && CONFIG_PPC32 */ |
1da177e4 LT |
2682 | |
2683 | static struct sysdev_class pmu_sysclass = { | |
2684 | set_kset_name("pmu"), | |
2685 | }; | |
2686 | ||
2687 | static struct sys_device device_pmu = { | |
1da177e4 LT |
2688 | .cls = &pmu_sysclass, |
2689 | }; | |
2690 | ||
2691 | static struct sysdev_driver driver_pmu = { | |
e120e8d0 | 2692 | #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_PPC32) |
1da177e4 LT |
2693 | .suspend = &pmu_sys_suspend, |
2694 | .resume = &pmu_sys_resume, | |
e120e8d0 | 2695 | #endif /* CONFIG_PM_SLEEP && CONFIG_PPC32 */ |
1da177e4 LT |
2696 | }; |
2697 | ||
2698 | static int __init init_pmu_sysfs(void) | |
2699 | { | |
2700 | int rc; | |
2701 | ||
2702 | rc = sysdev_class_register(&pmu_sysclass); | |
2703 | if (rc) { | |
2704 | printk(KERN_ERR "Failed registering PMU sys class\n"); | |
2705 | return -ENODEV; | |
2706 | } | |
2707 | rc = sysdev_register(&device_pmu); | |
2708 | if (rc) { | |
2709 | printk(KERN_ERR "Failed registering PMU sys device\n"); | |
2710 | return -ENODEV; | |
2711 | } | |
2712 | rc = sysdev_driver_register(&pmu_sysclass, &driver_pmu); | |
2713 | if (rc) { | |
2714 | printk(KERN_ERR "Failed registering PMU sys driver\n"); | |
2715 | return -ENODEV; | |
2716 | } | |
2717 | return 0; | |
2718 | } | |
2719 | ||
2720 | subsys_initcall(init_pmu_sysfs); | |
2721 | ||
2722 | EXPORT_SYMBOL(pmu_request); | |
730745a5 | 2723 | EXPORT_SYMBOL(pmu_queue_request); |
1da177e4 LT |
2724 | EXPORT_SYMBOL(pmu_poll); |
2725 | EXPORT_SYMBOL(pmu_poll_adb); | |
2726 | EXPORT_SYMBOL(pmu_wait_complete); | |
2727 | EXPORT_SYMBOL(pmu_suspend); | |
2728 | EXPORT_SYMBOL(pmu_resume); | |
2729 | EXPORT_SYMBOL(pmu_unlock); | |
e120e8d0 | 2730 | #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_PPC32) |
1da177e4 LT |
2731 | EXPORT_SYMBOL(pmu_enable_irled); |
2732 | EXPORT_SYMBOL(pmu_battery_count); | |
2733 | EXPORT_SYMBOL(pmu_batteries); | |
2734 | EXPORT_SYMBOL(pmu_power_flags); | |
e120e8d0 | 2735 | #endif /* CONFIG_PM_SLEEP && CONFIG_PPC32 */ |
1da177e4 | 2736 |