[mirror_ubuntu-artful-kernel.git] / drivers / mailbox / bcm2835-mailbox.c

/*
 *  Copyright (C) 2010,2015 Broadcom
 *  Copyright (C) 2013-2014 Lubomir Rintel
 *  Copyright (C) 2013 Craig McGeachie
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This device provides a mechanism for writing to the mailboxes,
 * that are shared between the ARM and the VideoCore processor
 *
 * Parts of the driver are based on:
 *  - arch/arm/mach-bcm2708/vcio.c file written by Gray Girling that was
 *    obtained from branch "rpi-3.6.y" of git://github.com/raspberrypi/
 *    linux.git
 *  - drivers/mailbox/bcm2835-ipc.c by Lubomir Rintel at
 *    https://github.com/hackerspace/rpi-linux/blob/lr-raspberry-pi/drivers/
 *    mailbox/bcm2835-ipc.c
 *  - documentation available on the following web site:
 *    https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface
 */

#include <linux/device.h>
#include <linux/dma-mapping.h>
#include <linux/err.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/mailbox_controller.h>
#include <linux/module.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/platform_device.h>
#include <linux/spinlock.h>

/* Mailboxes */
#define ARM_0_MAIL0	0x00
#define ARM_0_MAIL1	0x20

/*
 * Mailbox registers. We basically only support mailbox 0 & 1. We
 * deliver to the VC in mailbox 1, it delivers to us in mailbox 0. See
 * BCM2835-ARM-Peripherals.pdf section 1.3 for an explanation about
 * the placement of memory barriers.
 */
#define MAIL0_RD	(ARM_0_MAIL0 + 0x00)
#define MAIL0_POL	(ARM_0_MAIL0 + 0x10)
#define MAIL0_STA	(ARM_0_MAIL0 + 0x18)
#define MAIL0_CNF	(ARM_0_MAIL0 + 0x1C)
#define MAIL1_WRT	(ARM_0_MAIL1 + 0x00)
#define MAIL1_STA	(ARM_0_MAIL1 + 0x18)

/* On ARCH_BCM270x these come through <linux/interrupt.h> (arm_control.h ) */
#ifndef ARM_MS_FULL
/* Status register: FIFO state. */
#define ARM_MS_FULL		BIT(31)
#define ARM_MS_EMPTY		BIT(30)

/* Configuration register: Enable interrupts. */
#define ARM_MC_IHAVEDATAIRQEN	BIT(0)
#endif

struct bcm2835_mbox {
	void __iomem *regs;
	spinlock_t lock;
	struct mbox_controller controller;
};

static struct bcm2835_mbox *bcm2835_link_mbox(struct mbox_chan *link)
{
	return container_of(link->mbox, struct bcm2835_mbox, controller);
}

static irqreturn_t bcm2835_mbox_irq(int irq, void *dev_id)
{
	struct bcm2835_mbox *mbox = dev_id;
	struct device *dev = mbox->controller.dev;
	struct mbox_chan *link = &mbox->controller.chans[0];

	while (!(readl(mbox->regs + MAIL0_STA) & ARM_MS_EMPTY)) {
		u32 msg = readl(mbox->regs + MAIL0_RD);
		dev_dbg(dev, "Reply 0x%08X\n", msg);
		mbox_chan_received_data(link, &msg);
	}
	return IRQ_HANDLED;
}

static int bcm2835_send_data(struct mbox_chan *link, void *data)
{
	struct bcm2835_mbox *mbox = bcm2835_link_mbox(link);
	u32 msg = *(u32 *)data;

	spin_lock(&mbox->lock);
	writel(msg, mbox->regs + MAIL1_WRT);
	dev_dbg(mbox->controller.dev, "Request 0x%08X\n", msg);
	spin_unlock(&mbox->lock);
	return 0;
}

static int bcm2835_startup(struct mbox_chan *link)
{
	struct bcm2835_mbox *mbox = bcm2835_link_mbox(link);

	/* Enable the interrupt on data reception */
	writel(ARM_MC_IHAVEDATAIRQEN, mbox->regs + MAIL0_CNF);

	return 0;
}

static void bcm2835_shutdown(struct mbox_chan *link)
{
	struct bcm2835_mbox *mbox = bcm2835_link_mbox(link);

	writel(0, mbox->regs + MAIL0_CNF);
}

static bool bcm2835_last_tx_done(struct mbox_chan *link)
{
	struct bcm2835_mbox *mbox = bcm2835_link_mbox(link);
	bool ret;

	spin_lock(&mbox->lock);
	ret = !(readl(mbox->regs + MAIL1_STA) & ARM_MS_FULL);
	spin_unlock(&mbox->lock);
	return ret;
}

static const struct mbox_chan_ops bcm2835_mbox_chan_ops = {
	.send_data	= bcm2835_send_data,
	.startup	= bcm2835_startup,
	.shutdown	= bcm2835_shutdown,
	.last_tx_done	= bcm2835_last_tx_done
};

static struct mbox_chan *bcm2835_mbox_index_xlate(struct mbox_controller *mbox,
		    const struct of_phandle_args *sp)
{
	if (sp->args_count != 0)
		return NULL;

	return &mbox->chans[0];
}

static int bcm2835_mbox_probe(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	int ret = 0;
	struct resource *iomem;
	struct bcm2835_mbox *mbox;

	mbox = devm_kzalloc(dev, sizeof(*mbox), GFP_KERNEL);
	if (mbox == NULL)
		return -ENOMEM;
	spin_lock_init(&mbox->lock);

	ret = devm_request_irq(dev, platform_get_irq(pdev, 0),
			       bcm2835_mbox_irq, 0, dev_name(dev), mbox);
	if (ret) {
		dev_err(dev, "Failed to register a mailbox IRQ handler: %d\n",
			ret);
		return -ENODEV;
	}

	iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	mbox->regs = devm_ioremap_resource(&pdev->dev, iomem);
	if (IS_ERR(mbox->regs)) {
		ret = PTR_ERR(mbox->regs);
		dev_err(&pdev->dev, "Failed to remap mailbox regs: %d\n", ret);
		return ret;
	}

	mbox->controller.txdone_poll = true;
	mbox->controller.txpoll_period = 5;
	mbox->controller.ops = &bcm2835_mbox_chan_ops;
	mbox->controller.of_xlate = &bcm2835_mbox_index_xlate;
	mbox->controller.dev = dev;
	mbox->controller.num_chans = 1;
	mbox->controller.chans = devm_kzalloc(dev,
		sizeof(*mbox->controller.chans), GFP_KERNEL);
	if (!mbox->controller.chans)
		return -ENOMEM;

	ret = mbox_controller_register(&mbox->controller);
	if (ret)
		return ret;

	platform_set_drvdata(pdev, mbox);
	dev_info(dev, "mailbox enabled\n");

	return ret;
}

static int bcm2835_mbox_remove(struct platform_device *pdev)
{
	struct bcm2835_mbox *mbox = platform_get_drvdata(pdev);
	mbox_controller_unregister(&mbox->controller);
	return 0;
}

static const struct of_device_id bcm2835_mbox_of_match[] = {
	{ .compatible = "brcm,bcm2835-mbox", },
	{},
};
MODULE_DEVICE_TABLE(of, bcm2835_mbox_of_match);

static struct platform_driver bcm2835_mbox_driver = {
	.driver = {
		.name = "bcm2835-mbox",
		.of_match_table = bcm2835_mbox_of_match,
	},
	.probe		= bcm2835_mbox_probe,
	.remove		= bcm2835_mbox_remove,
};

static int __init bcm2835_mbox_init(void)
{
	return platform_driver_register(&bcm2835_mbox_driver);
}
arch_initcall(bcm2835_mbox_init);

static void __init bcm2835_mbox_exit(void)
{
	platform_driver_unregister(&bcm2835_mbox_driver);
}
module_exit(bcm2835_mbox_exit);

MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
MODULE_DESCRIPTION("BCM2835 mailbox IPC driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
0bae6af6 LR	1	/*
	2	* Copyright (C) 2010,2015 Broadcom
	3	* Copyright (C) 2013-2014 Lubomir Rintel
	4	* Copyright (C) 2013 Craig McGeachie
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*
	10	* This device provides a mechanism for writing to the mailboxes,
	11	* that are shared between the ARM and the VideoCore processor
	12	*
	13	* Parts of the driver are based on:
	14	* - arch/arm/mach-bcm2708/vcio.c file written by Gray Girling that was
	15	* obtained from branch "rpi-3.6.y" of git://github.com/raspberrypi/
	16	* linux.git
	17	* - drivers/mailbox/bcm2835-ipc.c by Lubomir Rintel at
	18	* https://github.com/hackerspace/rpi-linux/blob/lr-raspberry-pi/drivers/
	19	* mailbox/bcm2835-ipc.c
	20	* - documentation available on the following web site:
	21	* https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface
	22	*/
	23
	24	#include <linux/device.h>
	25	#include <linux/dma-mapping.h>
	26	#include <linux/err.h>
	27	#include <linux/interrupt.h>
	28	#include <linux/irq.h>
	29	#include <linux/kernel.h>
	30	#include <linux/mailbox_controller.h>
	31	#include <linux/module.h>
	32	#include <linux/of_address.h>
	33	#include <linux/of_irq.h>
	34	#include <linux/platform_device.h>
	35	#include <linux/spinlock.h>
	36
	37	/* Mailboxes */
	38	#define ARM_0_MAIL0 0x00
	39	#define ARM_0_MAIL1 0x20
	40
	41	/*
	42	* Mailbox registers. We basically only support mailbox 0 & 1. We
	43	* deliver to the VC in mailbox 1, it delivers to us in mailbox 0. See
	44	* BCM2835-ARM-Peripherals.pdf section 1.3 for an explanation about
	45	* the placement of memory barriers.
	46	*/
	47	#define MAIL0_RD (ARM_0_MAIL0 + 0x00)
	48	#define MAIL0_POL (ARM_0_MAIL0 + 0x10)
	49	#define MAIL0_STA (ARM_0_MAIL0 + 0x18)
	50	#define MAIL0_CNF (ARM_0_MAIL0 + 0x1C)
	51	#define MAIL1_WRT (ARM_0_MAIL1 + 0x00)
7d641938	52	#define MAIL1_STA (ARM_0_MAIL1 + 0x18)
0bae6af6	53
555eafa8	54	/* On ARCH_BCM270x these come through <linux/interrupt.h> (arm_control.h ) */
555eafa8	55	#ifndef ARM_MS_FULL
0bae6af6 LR	56	/* Status register: FIFO state. */
	57	#define ARM_MS_FULL BIT(31)
	58	#define ARM_MS_EMPTY BIT(30)
	59
	60	/* Configuration register: Enable interrupts. */
	61	#define ARM_MC_IHAVEDATAIRQEN BIT(0)
555eafa8	62	#endif
0bae6af6 LR	63
	64	struct bcm2835_mbox {
	65	void __iomem *regs;
	66	spinlock_t lock;
	67	struct mbox_controller controller;
	68	};
	69
	70	static struct bcm2835_mbox bcm2835_link_mbox(struct mbox_chan link)
	71	{
	72	return container_of(link->mbox, struct bcm2835_mbox, controller);
	73	}
	74
	75	static irqreturn_t bcm2835_mbox_irq(int irq, void *dev_id)
	76	{
	77	struct bcm2835_mbox *mbox = dev_id;
	78	struct device *dev = mbox->controller.dev;
	79	struct mbox_chan *link = &mbox->controller.chans[0];
	80
	81	while (!(readl(mbox->regs + MAIL0_STA) & ARM_MS_EMPTY)) {
	82	u32 msg = readl(mbox->regs + MAIL0_RD);
	83	dev_dbg(dev, "Reply 0x%08X\n", msg);
	84	mbox_chan_received_data(link, &msg);
	85	}
	86	return IRQ_HANDLED;
	87	}
	88
	89	static int bcm2835_send_data(struct mbox_chan link, void data)
	90	{
	91	struct bcm2835_mbox *mbox = bcm2835_link_mbox(link);
	92	u32 msg = (u32 )data;
	93
	94	spin_lock(&mbox->lock);
	95	writel(msg, mbox->regs + MAIL1_WRT);
	96	dev_dbg(mbox->controller.dev, "Request 0x%08X\n", msg);
	97	spin_unlock(&mbox->lock);
	98	return 0;
	99	}
	100
	101	static int bcm2835_startup(struct mbox_chan *link)
	102	{
	103	struct bcm2835_mbox *mbox = bcm2835_link_mbox(link);
	104
	105	/* Enable the interrupt on data reception */
	106	writel(ARM_MC_IHAVEDATAIRQEN, mbox->regs + MAIL0_CNF);
	107
	108	return 0;
	109	}
	110
	111	static void bcm2835_shutdown(struct mbox_chan *link)
	112	{
	113	struct bcm2835_mbox *mbox = bcm2835_link_mbox(link);
	114
	115	writel(0, mbox->regs + MAIL0_CNF);
	116	}
	117
	118	static bool bcm2835_last_tx_done(struct mbox_chan *link)
	119	{
	120	struct bcm2835_mbox *mbox = bcm2835_link_mbox(link);
	121	bool ret;
	122
	123	spin_lock(&mbox->lock);
7d641938	124	ret = !(readl(mbox->regs + MAIL1_STA) & ARM_MS_FULL);
0bae6af6 LR	125	spin_unlock(&mbox->lock);
	126	return ret;
	127	}
	128
	129	static const struct mbox_chan_ops bcm2835_mbox_chan_ops = {
	130	.send_data = bcm2835_send_data,
	131	.startup = bcm2835_startup,
	132	.shutdown = bcm2835_shutdown,
	133	.last_tx_done = bcm2835_last_tx_done
	134	};
	135
	136	static struct mbox_chan bcm2835_mbox_index_xlate(struct mbox_controller mbox,
	137	const struct of_phandle_args *sp)
	138	{
	139	if (sp->args_count != 0)
	140	return NULL;
	141
	142	return &mbox->chans[0];
	143	}
	144
	145	static int bcm2835_mbox_probe(struct platform_device *pdev)
	146	{
	147	struct device *dev = &pdev->dev;
	148	int ret = 0;
	149	struct resource *iomem;
	150	struct bcm2835_mbox *mbox;
	151
	152	mbox = devm_kzalloc(dev, sizeof(*mbox), GFP_KERNEL);
	153	if (mbox == NULL)
	154	return -ENOMEM;
	155	spin_lock_init(&mbox->lock);
	156
555eafa8	157	ret = devm_request_irq(dev, platform_get_irq(pdev, 0),
0bae6af6 LR	158	bcm2835_mbox_irq, 0, dev_name(dev), mbox);
	159	if (ret) {
	160	dev_err(dev, "Failed to register a mailbox IRQ handler: %d\n",
	161	ret);
	162	return -ENODEV;
	163	}
	164
	165	iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	166	mbox->regs = devm_ioremap_resource(&pdev->dev, iomem);
	167	if (IS_ERR(mbox->regs)) {
	168	ret = PTR_ERR(mbox->regs);
	169	dev_err(&pdev->dev, "Failed to remap mailbox regs: %d\n", ret);
	170	return ret;
	171	}
	172
	173	mbox->controller.txdone_poll = true;
	174	mbox->controller.txpoll_period = 5;
	175	mbox->controller.ops = &bcm2835_mbox_chan_ops;
	176	mbox->controller.of_xlate = &bcm2835_mbox_index_xlate;
	177	mbox->controller.dev = dev;
	178	mbox->controller.num_chans = 1;
	179	mbox->controller.chans = devm_kzalloc(dev,
	180	sizeof(*mbox->controller.chans), GFP_KERNEL);
	181	if (!mbox->controller.chans)
	182	return -ENOMEM;
	183
	184	ret = mbox_controller_register(&mbox->controller);
	185	if (ret)
	186	return ret;
	187
	188	platform_set_drvdata(pdev, mbox);
	189	dev_info(dev, "mailbox enabled\n");
	190
	191	return ret;
	192	}
	193
	194	static int bcm2835_mbox_remove(struct platform_device *pdev)
	195	{
	196	struct bcm2835_mbox *mbox = platform_get_drvdata(pdev);
	197	mbox_controller_unregister(&mbox->controller);
	198	return 0;
	199	}
	200
	201	static const struct of_device_id bcm2835_mbox_of_match[] = {
	202	{ .compatible = "brcm,bcm2835-mbox", },
	203	{},
	204	};
	205	MODULE_DEVICE_TABLE(of, bcm2835_mbox_of_match);
	206
	207	static struct platform_driver bcm2835_mbox_driver = {
	208	.driver = {
	209	.name = "bcm2835-mbox",
0bae6af6 LR	210	.of_match_table = bcm2835_mbox_of_match,
	211	},
	212	.probe = bcm2835_mbox_probe,
	213	.remove = bcm2835_mbox_remove,
	214	};
555eafa8	215
	216	static int __init bcm2835_mbox_init(void)
	217	{
	218	return platform_driver_register(&bcm2835_mbox_driver);
	219	}
	220	arch_initcall(bcm2835_mbox_init);
	221
	222	static void __init bcm2835_mbox_exit(void)
	223	{
	224	platform_driver_unregister(&bcm2835_mbox_driver);
	225	}
	226	module_exit(bcm2835_mbox_exit);
0bae6af6 LR	227
	228	MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
	229	MODULE_DESCRIPTION("BCM2835 mailbox IPC driver");
	230	MODULE_LICENSE("GPL v2");