]>
Commit | Line | Data |
---|---|---|
0bae6af6 LR |
1 | /* |
2 | * Copyright (C) 2010,2015 Broadcom | |
3 | * Copyright (C) 2013-2014 Lubomir Rintel | |
4 | * Copyright (C) 2013 Craig McGeachie | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | * This device provides a mechanism for writing to the mailboxes, | |
11 | * that are shared between the ARM and the VideoCore processor | |
12 | * | |
13 | * Parts of the driver are based on: | |
14 | * - arch/arm/mach-bcm2708/vcio.c file written by Gray Girling that was | |
15 | * obtained from branch "rpi-3.6.y" of git://github.com/raspberrypi/ | |
16 | * linux.git | |
17 | * - drivers/mailbox/bcm2835-ipc.c by Lubomir Rintel at | |
18 | * https://github.com/hackerspace/rpi-linux/blob/lr-raspberry-pi/drivers/ | |
19 | * mailbox/bcm2835-ipc.c | |
20 | * - documentation available on the following web site: | |
21 | * https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface | |
22 | */ | |
23 | ||
24 | #include <linux/device.h> | |
25 | #include <linux/dma-mapping.h> | |
26 | #include <linux/err.h> | |
27 | #include <linux/interrupt.h> | |
28 | #include <linux/irq.h> | |
29 | #include <linux/kernel.h> | |
30 | #include <linux/mailbox_controller.h> | |
31 | #include <linux/module.h> | |
32 | #include <linux/of_address.h> | |
33 | #include <linux/of_irq.h> | |
34 | #include <linux/platform_device.h> | |
35 | #include <linux/spinlock.h> | |
36 | ||
37 | /* Mailboxes */ | |
38 | #define ARM_0_MAIL0 0x00 | |
39 | #define ARM_0_MAIL1 0x20 | |
40 | ||
41 | /* | |
42 | * Mailbox registers. We basically only support mailbox 0 & 1. We | |
43 | * deliver to the VC in mailbox 1, it delivers to us in mailbox 0. See | |
44 | * BCM2835-ARM-Peripherals.pdf section 1.3 for an explanation about | |
45 | * the placement of memory barriers. | |
46 | */ | |
47 | #define MAIL0_RD (ARM_0_MAIL0 + 0x00) | |
48 | #define MAIL0_POL (ARM_0_MAIL0 + 0x10) | |
49 | #define MAIL0_STA (ARM_0_MAIL0 + 0x18) | |
50 | #define MAIL0_CNF (ARM_0_MAIL0 + 0x1C) | |
51 | #define MAIL1_WRT (ARM_0_MAIL1 + 0x00) | |
52 | ||
53 | /* Status register: FIFO state. */ | |
54 | #define ARM_MS_FULL BIT(31) | |
55 | #define ARM_MS_EMPTY BIT(30) | |
56 | ||
57 | /* Configuration register: Enable interrupts. */ | |
58 | #define ARM_MC_IHAVEDATAIRQEN BIT(0) | |
59 | ||
60 | struct bcm2835_mbox { | |
61 | void __iomem *regs; | |
62 | spinlock_t lock; | |
63 | struct mbox_controller controller; | |
64 | }; | |
65 | ||
66 | static struct bcm2835_mbox *bcm2835_link_mbox(struct mbox_chan *link) | |
67 | { | |
68 | return container_of(link->mbox, struct bcm2835_mbox, controller); | |
69 | } | |
70 | ||
71 | static irqreturn_t bcm2835_mbox_irq(int irq, void *dev_id) | |
72 | { | |
73 | struct bcm2835_mbox *mbox = dev_id; | |
74 | struct device *dev = mbox->controller.dev; | |
75 | struct mbox_chan *link = &mbox->controller.chans[0]; | |
76 | ||
77 | while (!(readl(mbox->regs + MAIL0_STA) & ARM_MS_EMPTY)) { | |
78 | u32 msg = readl(mbox->regs + MAIL0_RD); | |
79 | dev_dbg(dev, "Reply 0x%08X\n", msg); | |
80 | mbox_chan_received_data(link, &msg); | |
81 | } | |
82 | return IRQ_HANDLED; | |
83 | } | |
84 | ||
85 | static int bcm2835_send_data(struct mbox_chan *link, void *data) | |
86 | { | |
87 | struct bcm2835_mbox *mbox = bcm2835_link_mbox(link); | |
88 | u32 msg = *(u32 *)data; | |
89 | ||
90 | spin_lock(&mbox->lock); | |
91 | writel(msg, mbox->regs + MAIL1_WRT); | |
92 | dev_dbg(mbox->controller.dev, "Request 0x%08X\n", msg); | |
93 | spin_unlock(&mbox->lock); | |
94 | return 0; | |
95 | } | |
96 | ||
97 | static int bcm2835_startup(struct mbox_chan *link) | |
98 | { | |
99 | struct bcm2835_mbox *mbox = bcm2835_link_mbox(link); | |
100 | ||
101 | /* Enable the interrupt on data reception */ | |
102 | writel(ARM_MC_IHAVEDATAIRQEN, mbox->regs + MAIL0_CNF); | |
103 | ||
104 | return 0; | |
105 | } | |
106 | ||
107 | static void bcm2835_shutdown(struct mbox_chan *link) | |
108 | { | |
109 | struct bcm2835_mbox *mbox = bcm2835_link_mbox(link); | |
110 | ||
111 | writel(0, mbox->regs + MAIL0_CNF); | |
112 | } | |
113 | ||
114 | static bool bcm2835_last_tx_done(struct mbox_chan *link) | |
115 | { | |
116 | struct bcm2835_mbox *mbox = bcm2835_link_mbox(link); | |
117 | bool ret; | |
118 | ||
119 | spin_lock(&mbox->lock); | |
120 | ret = !(readl(mbox->regs + MAIL0_STA) & ARM_MS_FULL); | |
121 | spin_unlock(&mbox->lock); | |
122 | return ret; | |
123 | } | |
124 | ||
125 | static const struct mbox_chan_ops bcm2835_mbox_chan_ops = { | |
126 | .send_data = bcm2835_send_data, | |
127 | .startup = bcm2835_startup, | |
128 | .shutdown = bcm2835_shutdown, | |
129 | .last_tx_done = bcm2835_last_tx_done | |
130 | }; | |
131 | ||
132 | static struct mbox_chan *bcm2835_mbox_index_xlate(struct mbox_controller *mbox, | |
133 | const struct of_phandle_args *sp) | |
134 | { | |
135 | if (sp->args_count != 0) | |
136 | return NULL; | |
137 | ||
138 | return &mbox->chans[0]; | |
139 | } | |
140 | ||
141 | static int bcm2835_mbox_probe(struct platform_device *pdev) | |
142 | { | |
143 | struct device *dev = &pdev->dev; | |
144 | int ret = 0; | |
145 | struct resource *iomem; | |
146 | struct bcm2835_mbox *mbox; | |
147 | ||
148 | mbox = devm_kzalloc(dev, sizeof(*mbox), GFP_KERNEL); | |
149 | if (mbox == NULL) | |
150 | return -ENOMEM; | |
151 | spin_lock_init(&mbox->lock); | |
152 | ||
153 | ret = devm_request_irq(dev, irq_of_parse_and_map(dev->of_node, 0), | |
154 | bcm2835_mbox_irq, 0, dev_name(dev), mbox); | |
155 | if (ret) { | |
156 | dev_err(dev, "Failed to register a mailbox IRQ handler: %d\n", | |
157 | ret); | |
158 | return -ENODEV; | |
159 | } | |
160 | ||
161 | iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
162 | mbox->regs = devm_ioremap_resource(&pdev->dev, iomem); | |
163 | if (IS_ERR(mbox->regs)) { | |
164 | ret = PTR_ERR(mbox->regs); | |
165 | dev_err(&pdev->dev, "Failed to remap mailbox regs: %d\n", ret); | |
166 | return ret; | |
167 | } | |
168 | ||
169 | mbox->controller.txdone_poll = true; | |
170 | mbox->controller.txpoll_period = 5; | |
171 | mbox->controller.ops = &bcm2835_mbox_chan_ops; | |
172 | mbox->controller.of_xlate = &bcm2835_mbox_index_xlate; | |
173 | mbox->controller.dev = dev; | |
174 | mbox->controller.num_chans = 1; | |
175 | mbox->controller.chans = devm_kzalloc(dev, | |
176 | sizeof(*mbox->controller.chans), GFP_KERNEL); | |
177 | if (!mbox->controller.chans) | |
178 | return -ENOMEM; | |
179 | ||
180 | ret = mbox_controller_register(&mbox->controller); | |
181 | if (ret) | |
182 | return ret; | |
183 | ||
184 | platform_set_drvdata(pdev, mbox); | |
185 | dev_info(dev, "mailbox enabled\n"); | |
186 | ||
187 | return ret; | |
188 | } | |
189 | ||
190 | static int bcm2835_mbox_remove(struct platform_device *pdev) | |
191 | { | |
192 | struct bcm2835_mbox *mbox = platform_get_drvdata(pdev); | |
193 | mbox_controller_unregister(&mbox->controller); | |
194 | return 0; | |
195 | } | |
196 | ||
197 | static const struct of_device_id bcm2835_mbox_of_match[] = { | |
198 | { .compatible = "brcm,bcm2835-mbox", }, | |
199 | {}, | |
200 | }; | |
201 | MODULE_DEVICE_TABLE(of, bcm2835_mbox_of_match); | |
202 | ||
203 | static struct platform_driver bcm2835_mbox_driver = { | |
204 | .driver = { | |
205 | .name = "bcm2835-mbox", | |
206 | .owner = THIS_MODULE, | |
207 | .of_match_table = bcm2835_mbox_of_match, | |
208 | }, | |
209 | .probe = bcm2835_mbox_probe, | |
210 | .remove = bcm2835_mbox_remove, | |
211 | }; | |
212 | module_platform_driver(bcm2835_mbox_driver); | |
213 | ||
214 | MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>"); | |
215 | MODULE_DESCRIPTION("BCM2835 mailbox IPC driver"); | |
216 | MODULE_LICENSE("GPL v2"); |