[mirror_ubuntu-hirsute-kernel.git] / drivers / mailbox / qcom-apcs-ipc-mailbox.c

/*
 * Copyright (c) 2017, Linaro Ltd
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/io.h>
#include <linux/slab.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/mailbox_controller.h>

#define QCOM_APCS_IPC_BITS	32

struct qcom_apcs_ipc {
	struct mbox_controller mbox;
	struct mbox_chan mbox_chans[QCOM_APCS_IPC_BITS];

	struct regmap *regmap;
	unsigned long offset;
	struct platform_device *clk;
};

static const struct regmap_config apcs_regmap_config = {
	.reg_bits = 32,
	.reg_stride = 4,
	.val_bits = 32,
	.max_register = 0x1000,
	.fast_io = true,
};

static int qcom_apcs_ipc_send_data(struct mbox_chan *chan, void *data)
{
	struct qcom_apcs_ipc *apcs = container_of(chan->mbox,
						  struct qcom_apcs_ipc, mbox);
	unsigned long idx = (unsigned long)chan->con_priv;

	return regmap_write(apcs->regmap, apcs->offset, BIT(idx));
}

static const struct mbox_chan_ops qcom_apcs_ipc_ops = {
	.send_data = qcom_apcs_ipc_send_data,
};

static int qcom_apcs_ipc_probe(struct platform_device *pdev)
{
	struct device_node *np = pdev->dev.of_node;
	struct qcom_apcs_ipc *apcs;
	struct regmap *regmap;
	struct resource *res;
	unsigned long offset;
	void __iomem *base;
	unsigned long i;
	int ret;

	apcs = devm_kzalloc(&pdev->dev, sizeof(*apcs), GFP_KERNEL);
	if (!apcs)
		return -ENOMEM;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	base = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(base))
		return PTR_ERR(base);

	regmap = devm_regmap_init_mmio(&pdev->dev, base, &apcs_regmap_config);
	if (IS_ERR(regmap))
		return PTR_ERR(regmap);

	offset = (unsigned long)of_device_get_match_data(&pdev->dev);

	apcs->regmap = regmap;
	apcs->offset = offset;

	/* Initialize channel identifiers */
	for (i = 0; i < ARRAY_SIZE(apcs->mbox_chans); i++)
		apcs->mbox_chans[i].con_priv = (void *)i;

	apcs->mbox.dev = &pdev->dev;
	apcs->mbox.ops = &qcom_apcs_ipc_ops;
	apcs->mbox.chans = apcs->mbox_chans;
	apcs->mbox.num_chans = ARRAY_SIZE(apcs->mbox_chans);

	ret = mbox_controller_register(&apcs->mbox);
	if (ret) {
		dev_err(&pdev->dev, "failed to register APCS IPC controller\n");
		return ret;
	}

	if (of_device_is_compatible(np, "qcom,msm8916-apcs-kpss-global")) {
		apcs->clk = platform_device_register_data(&pdev->dev,
							  "qcom-apcs-msm8916-clk",
							  -1, NULL, 0);
		if (IS_ERR(apcs->clk))
			dev_err(&pdev->dev, "failed to register APCS clk\n");
	}

	platform_set_drvdata(pdev, apcs);

	return 0;
}

static int qcom_apcs_ipc_remove(struct platform_device *pdev)
{
	struct qcom_apcs_ipc *apcs = platform_get_drvdata(pdev);
	struct platform_device *clk = apcs->clk;

	mbox_controller_unregister(&apcs->mbox);
	platform_device_unregister(clk);

	return 0;
}

/* .data is the offset of the ipc register within the global block */
static const struct of_device_id qcom_apcs_ipc_of_match[] = {
	{ .compatible = "qcom,msm8916-apcs-kpss-global", .data = (void *)8 },
	{ .compatible = "qcom,msm8996-apcs-hmss-global", .data = (void *)16 },
	{ .compatible = "qcom,msm8998-apcs-hmss-global", .data = (void *)8 },
	{ .compatible = "qcom,sdm845-apss-shared", .data = (void *)12 },
	{}
};
MODULE_DEVICE_TABLE(of, qcom_apcs_ipc_of_match);

static struct platform_driver qcom_apcs_ipc_driver = {
	.probe = qcom_apcs_ipc_probe,
	.remove = qcom_apcs_ipc_remove,
	.driver = {
		.name = "qcom_apcs_ipc",
		.of_match_table = qcom_apcs_ipc_of_match,
	},
};

static int __init qcom_apcs_ipc_init(void)
{
	return platform_driver_register(&qcom_apcs_ipc_driver);
}
postcore_initcall(qcom_apcs_ipc_init);

static void __exit qcom_apcs_ipc_exit(void)
{
	platform_driver_unregister(&qcom_apcs_ipc_driver);
}
module_exit(qcom_apcs_ipc_exit);

MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("Qualcomm APCS IPC driver");
Commit	Line	Data
25bfee16 BA	1	/*
	2	* Copyright (c) 2017, Linaro Ltd
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 and
	6	* only version 2 as published by the Free Software Foundation.
	7	*
	8	* This program is distributed in the hope that it will be useful,
	9	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	10	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	11	* GNU General Public License for more details.
	12	*/
	13
	14	#include <linux/kernel.h>
	15	#include <linux/module.h>
	16	#include <linux/io.h>
	17	#include <linux/slab.h>
	18	#include <linux/of.h>
	19	#include <linux/of_platform.h>
	20	#include <linux/platform_device.h>
c6a8b171	21	#include <linux/regmap.h>
25bfee16 BA	22	#include <linux/mailbox_controller.h>
	23
	24	#define QCOM_APCS_IPC_BITS 32
	25
	26	struct qcom_apcs_ipc {
	27	struct mbox_controller mbox;
	28	struct mbox_chan mbox_chans[QCOM_APCS_IPC_BITS];
	29
c6a8b171	30	struct regmap *regmap;
25bfee16	31	unsigned long offset;
c815d769	32	struct platform_device *clk;
25bfee16 BA	33	};
25bfee16 BA	34
c6a8b171 GD	35	static const struct regmap_config apcs_regmap_config = {
	36	.reg_bits = 32,
	37	.reg_stride = 4,
	38	.val_bits = 32,
	39	.max_register = 0x1000,
	40	.fast_io = true,
	41	};
	42
25bfee16 BA	43	static int qcom_apcs_ipc_send_data(struct mbox_chan chan, void data)
	44	{
	45	struct qcom_apcs_ipc *apcs = container_of(chan->mbox,
	46	struct qcom_apcs_ipc, mbox);
	47	unsigned long idx = (unsigned long)chan->con_priv;
	48
c6a8b171	49	return regmap_write(apcs->regmap, apcs->offset, BIT(idx));
25bfee16 BA	50	}
	51
	52	static const struct mbox_chan_ops qcom_apcs_ipc_ops = {
	53	.send_data = qcom_apcs_ipc_send_data,
	54	};
	55
	56	static int qcom_apcs_ipc_probe(struct platform_device *pdev)
	57	{
c6a8b171	58	struct device_node *np = pdev->dev.of_node;
25bfee16	59	struct qcom_apcs_ipc *apcs;
c6a8b171	60	struct regmap *regmap;
25bfee16 BA	61	struct resource *res;
	62	unsigned long offset;
	63	void __iomem *base;
	64	unsigned long i;
	65	int ret;
	66
	67	apcs = devm_kzalloc(&pdev->dev, sizeof(*apcs), GFP_KERNEL);
	68	if (!apcs)
	69	return -ENOMEM;
	70
	71	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	72	base = devm_ioremap_resource(&pdev->dev, res);
	73	if (IS_ERR(base))
	74	return PTR_ERR(base);
	75
c6a8b171 GD	76	regmap = devm_regmap_init_mmio(&pdev->dev, base, &apcs_regmap_config);
	77	if (IS_ERR(regmap))
	78	return PTR_ERR(regmap);
	79
25bfee16 BA	80	offset = (unsigned long)of_device_get_match_data(&pdev->dev);
25bfee16 BA	81
c6a8b171 GD	82	apcs->regmap = regmap;
c6a8b171 GD	83	apcs->offset = offset;
25bfee16 BA	84
	85	/* Initialize channel identifiers */
	86	for (i = 0; i < ARRAY_SIZE(apcs->mbox_chans); i++)
	87	apcs->mbox_chans[i].con_priv = (void *)i;
	88
	89	apcs->mbox.dev = &pdev->dev;
	90	apcs->mbox.ops = &qcom_apcs_ipc_ops;
	91	apcs->mbox.chans = apcs->mbox_chans;
	92	apcs->mbox.num_chans = ARRAY_SIZE(apcs->mbox_chans);
	93
	94	ret = mbox_controller_register(&apcs->mbox);
	95	if (ret) {
	96	dev_err(&pdev->dev, "failed to register APCS IPC controller\n");
	97	return ret;
	98	}
	99
c815d769 GD	100	if (of_device_is_compatible(np, "qcom,msm8916-apcs-kpss-global")) {
	101	apcs->clk = platform_device_register_data(&pdev->dev,
	102	"qcom-apcs-msm8916-clk",
	103	-1, NULL, 0);
	104	if (IS_ERR(apcs->clk))
	105	dev_err(&pdev->dev, "failed to register APCS clk\n");
	106	}
	107
25bfee16 BA	108	platform_set_drvdata(pdev, apcs);
	109
	110	return 0;
	111	}
	112
	113	static int qcom_apcs_ipc_remove(struct platform_device *pdev)
	114	{
	115	struct qcom_apcs_ipc *apcs = platform_get_drvdata(pdev);
c815d769	116	struct platform_device *clk = apcs->clk;
25bfee16 BA	117
25bfee16 BA	118	mbox_controller_unregister(&apcs->mbox);
c815d769	119	platform_device_unregister(clk);
25bfee16 BA	120
	121	return 0;
	122	}
	123
	124	/* .data is the offset of the ipc register within the global block */
	125	static const struct of_device_id qcom_apcs_ipc_of_match[] = {
	126	{ .compatible = "qcom,msm8916-apcs-kpss-global", .data = (void *)8 },
	127	{ .compatible = "qcom,msm8996-apcs-hmss-global", .data = (void *)16 },
61a2f6db	128	{ .compatible = "qcom,msm8998-apcs-hmss-global", .data = (void *)8 },
05e99a7d	129	{ .compatible = "qcom,sdm845-apss-shared", .data = (void *)12 },
25bfee16 BA	130	{}
	131	};
	132	MODULE_DEVICE_TABLE(of, qcom_apcs_ipc_of_match);
	133
	134	static struct platform_driver qcom_apcs_ipc_driver = {
	135	.probe = qcom_apcs_ipc_probe,
	136	.remove = qcom_apcs_ipc_remove,
	137	.driver = {
	138	.name = "qcom_apcs_ipc",
	139	.of_match_table = qcom_apcs_ipc_of_match,
	140	},
	141	};
	142
	143	static int __init qcom_apcs_ipc_init(void)
	144	{
	145	return platform_driver_register(&qcom_apcs_ipc_driver);
	146	}
	147	postcore_initcall(qcom_apcs_ipc_init);
	148
	149	static void __exit qcom_apcs_ipc_exit(void)
	150	{
	151	platform_driver_unregister(&qcom_apcs_ipc_driver);
	152	}
	153	module_exit(qcom_apcs_ipc_exit);
	154
	155	MODULE_LICENSE("GPL v2");
	156	MODULE_DESCRIPTION("Qualcomm APCS IPC driver");