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2a83e4d5 MK |
1 | /* |
2 | * mxl5007t.c - driver for the MaxLinear MxL5007T silicon tuner | |
3 | * | |
4 | * Copyright (C) 2008 Michael Krufky <mkrufky@linuxtv.org> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
19 | */ | |
20 | ||
21 | #include <linux/i2c.h> | |
22 | #include <linux/types.h> | |
23 | #include <linux/videodev2.h> | |
24 | #include "tuner-i2c.h" | |
25 | #include "mxl5007t.h" | |
26 | ||
27 | static DEFINE_MUTEX(mxl5007t_list_mutex); | |
28 | static LIST_HEAD(hybrid_tuner_instance_list); | |
29 | ||
30 | static int mxl5007t_debug; | |
31 | module_param_named(debug, mxl5007t_debug, int, 0644); | |
32 | MODULE_PARM_DESC(debug, "set debug level"); | |
33 | ||
34 | /* ------------------------------------------------------------------------- */ | |
35 | ||
36 | #define mxl_printk(kern, fmt, arg...) \ | |
37 | printk(kern "%s: " fmt "\n", __func__, ##arg) | |
38 | ||
39 | #define mxl_err(fmt, arg...) \ | |
40 | mxl_printk(KERN_ERR, "%d: " fmt, __LINE__, ##arg) | |
41 | ||
42 | #define mxl_warn(fmt, arg...) \ | |
43 | mxl_printk(KERN_WARNING, fmt, ##arg) | |
44 | ||
45 | #define mxl_info(fmt, arg...) \ | |
46 | mxl_printk(KERN_INFO, fmt, ##arg) | |
47 | ||
48 | #define mxl_debug(fmt, arg...) \ | |
49 | ({ \ | |
50 | if (mxl5007t_debug) \ | |
51 | mxl_printk(KERN_DEBUG, fmt, ##arg); \ | |
52 | }) | |
53 | ||
54 | #define mxl_fail(ret) \ | |
55 | ({ \ | |
56 | int __ret; \ | |
57 | __ret = (ret < 0); \ | |
58 | if (__ret) \ | |
59 | mxl_printk(KERN_ERR, "error %d on line %d", \ | |
60 | ret, __LINE__); \ | |
61 | __ret; \ | |
62 | }) | |
63 | ||
64 | /* ------------------------------------------------------------------------- */ | |
65 | ||
66 | #define MHz 1000000 | |
67 | ||
68 | enum mxl5007t_mode { | |
69 | MxL_MODE_OTA_DVBT_ATSC = 0, | |
2a83e4d5 MK |
70 | MxL_MODE_OTA_ISDBT = 4, |
71 | MxL_MODE_CABLE_DIGITAL = 0x10, | |
2a83e4d5 MK |
72 | }; |
73 | ||
74 | enum mxl5007t_chip_version { | |
75 | MxL_UNKNOWN_ID = 0x00, | |
76 | MxL_5007_V1_F1 = 0x11, | |
77 | MxL_5007_V1_F2 = 0x12, | |
78 | MxL_5007_V2_100_F1 = 0x21, | |
79 | MxL_5007_V2_100_F2 = 0x22, | |
80 | MxL_5007_V2_200_F1 = 0x23, | |
81 | MxL_5007_V2_200_F2 = 0x24, | |
82 | }; | |
83 | ||
84 | struct reg_pair_t { | |
85 | u8 reg; | |
86 | u8 val; | |
87 | }; | |
88 | ||
89 | /* ------------------------------------------------------------------------- */ | |
90 | ||
91 | static struct reg_pair_t init_tab[] = { | |
92 | { 0x0b, 0x44 }, /* XTAL */ | |
93 | { 0x0c, 0x60 }, /* IF */ | |
94 | { 0x10, 0x00 }, /* MISC */ | |
95 | { 0x12, 0xca }, /* IDAC */ | |
96 | { 0x16, 0x90 }, /* MODE */ | |
97 | { 0x32, 0x38 }, /* MODE Analog/Digital */ | |
98 | { 0xd8, 0x18 }, /* CLK_OUT_ENABLE */ | |
99 | { 0x2c, 0x34 }, /* OVERRIDE */ | |
100 | { 0x4d, 0x40 }, /* OVERRIDE */ | |
101 | { 0x7f, 0x02 }, /* OVERRIDE */ | |
102 | { 0x9a, 0x52 }, /* OVERRIDE */ | |
103 | { 0x48, 0x5a }, /* OVERRIDE */ | |
104 | { 0x76, 0x1a }, /* OVERRIDE */ | |
105 | { 0x6a, 0x48 }, /* OVERRIDE */ | |
106 | { 0x64, 0x28 }, /* OVERRIDE */ | |
107 | { 0x66, 0xe6 }, /* OVERRIDE */ | |
108 | { 0x35, 0x0e }, /* OVERRIDE */ | |
109 | { 0x7e, 0x01 }, /* OVERRIDE */ | |
110 | { 0x83, 0x00 }, /* OVERRIDE */ | |
111 | { 0x04, 0x0b }, /* OVERRIDE */ | |
112 | { 0x05, 0x01 }, /* TOP_MASTER_ENABLE */ | |
113 | { 0, 0 } | |
114 | }; | |
115 | ||
116 | static struct reg_pair_t init_tab_cable[] = { | |
117 | { 0x0b, 0x44 }, /* XTAL */ | |
118 | { 0x0c, 0x60 }, /* IF */ | |
119 | { 0x10, 0x00 }, /* MISC */ | |
120 | { 0x12, 0xca }, /* IDAC */ | |
121 | { 0x16, 0x90 }, /* MODE */ | |
122 | { 0x32, 0x38 }, /* MODE A/D */ | |
123 | { 0x71, 0x3f }, /* TOP1 */ | |
124 | { 0x72, 0x3f }, /* TOP2 */ | |
125 | { 0x74, 0x3f }, /* TOP3 */ | |
126 | { 0xd8, 0x18 }, /* CLK_OUT_ENABLE */ | |
127 | { 0x2c, 0x34 }, /* OVERRIDE */ | |
128 | { 0x4d, 0x40 }, /* OVERRIDE */ | |
129 | { 0x7f, 0x02 }, /* OVERRIDE */ | |
130 | { 0x9a, 0x52 }, /* OVERRIDE */ | |
131 | { 0x48, 0x5a }, /* OVERRIDE */ | |
132 | { 0x76, 0x1a }, /* OVERRIDE */ | |
133 | { 0x6a, 0x48 }, /* OVERRIDE */ | |
134 | { 0x64, 0x28 }, /* OVERRIDE */ | |
135 | { 0x66, 0xe6 }, /* OVERRIDE */ | |
136 | { 0x35, 0x0e }, /* OVERRIDE */ | |
137 | { 0x7e, 0x01 }, /* OVERRIDE */ | |
138 | { 0x04, 0x0b }, /* OVERRIDE */ | |
139 | { 0x68, 0xb4 }, /* OVERRIDE */ | |
140 | { 0x36, 0x00 }, /* OVERRIDE */ | |
141 | { 0x05, 0x01 }, /* TOP_MASTER_ENABLE */ | |
142 | { 0, 0 } | |
143 | }; | |
144 | ||
145 | /* ------------------------------------------------------------------------- */ | |
146 | ||
147 | static struct reg_pair_t reg_pair_rftune[] = { | |
148 | { 0x11, 0x00 }, /* abort tune */ | |
149 | { 0x13, 0x15 }, | |
150 | { 0x14, 0x40 }, | |
151 | { 0x15, 0x0e }, | |
152 | { 0x11, 0x02 }, /* start tune */ | |
153 | { 0, 0 } | |
154 | }; | |
155 | ||
156 | /* ------------------------------------------------------------------------- */ | |
157 | ||
158 | struct mxl5007t_state { | |
159 | struct list_head hybrid_tuner_instance_list; | |
160 | struct tuner_i2c_props i2c_props; | |
161 | ||
162 | struct mutex lock; | |
163 | ||
164 | struct mxl5007t_config *config; | |
165 | ||
166 | enum mxl5007t_chip_version chip_id; | |
167 | ||
168 | struct reg_pair_t tab_init[ARRAY_SIZE(init_tab)]; | |
169 | struct reg_pair_t tab_init_cable[ARRAY_SIZE(init_tab_cable)]; | |
170 | struct reg_pair_t tab_rftune[ARRAY_SIZE(reg_pair_rftune)]; | |
171 | ||
172 | u32 frequency; | |
173 | u32 bandwidth; | |
174 | }; | |
175 | ||
176 | /* ------------------------------------------------------------------------- */ | |
177 | ||
178 | /* called by _init and _rftun to manipulate the register arrays */ | |
179 | ||
180 | static void set_reg_bits(struct reg_pair_t *reg_pair, u8 reg, u8 mask, u8 val) | |
181 | { | |
182 | unsigned int i = 0; | |
183 | ||
184 | while (reg_pair[i].reg || reg_pair[i].val) { | |
185 | if (reg_pair[i].reg == reg) { | |
186 | reg_pair[i].val &= ~mask; | |
187 | reg_pair[i].val |= val; | |
188 | } | |
189 | i++; | |
190 | ||
191 | } | |
192 | return; | |
193 | } | |
194 | ||
195 | static void copy_reg_bits(struct reg_pair_t *reg_pair1, | |
196 | struct reg_pair_t *reg_pair2) | |
197 | { | |
198 | unsigned int i, j; | |
199 | ||
200 | i = j = 0; | |
201 | ||
202 | while (reg_pair1[i].reg || reg_pair1[i].val) { | |
203 | while (reg_pair2[j].reg || reg_pair2[j].reg) { | |
204 | if (reg_pair1[i].reg != reg_pair2[j].reg) { | |
205 | j++; | |
206 | continue; | |
207 | } | |
208 | reg_pair2[j].val = reg_pair1[i].val; | |
209 | break; | |
210 | } | |
211 | i++; | |
212 | } | |
213 | return; | |
214 | } | |
215 | ||
216 | /* ------------------------------------------------------------------------- */ | |
217 | ||
218 | static void mxl5007t_set_mode_bits(struct mxl5007t_state *state, | |
219 | enum mxl5007t_mode mode, | |
220 | s32 if_diff_out_level) | |
221 | { | |
222 | switch (mode) { | |
223 | case MxL_MODE_OTA_DVBT_ATSC: | |
224 | set_reg_bits(state->tab_init, 0x32, 0x0f, 0x06); | |
225 | set_reg_bits(state->tab_init, 0x35, 0xff, 0x0e); | |
226 | break; | |
227 | case MxL_MODE_OTA_ISDBT: | |
228 | set_reg_bits(state->tab_init, 0x32, 0x0f, 0x06); | |
229 | set_reg_bits(state->tab_init, 0x35, 0xff, 0x12); | |
230 | break; | |
2a83e4d5 MK |
231 | case MxL_MODE_CABLE_DIGITAL: |
232 | set_reg_bits(state->tab_init_cable, 0x71, 0xff, 0x01); | |
233 | set_reg_bits(state->tab_init_cable, 0x72, 0xff, | |
234 | 8 - if_diff_out_level); | |
235 | set_reg_bits(state->tab_init_cable, 0x74, 0xff, 0x17); | |
236 | break; | |
2a83e4d5 MK |
237 | default: |
238 | mxl_fail(-EINVAL); | |
239 | } | |
240 | return; | |
241 | } | |
242 | ||
243 | static void mxl5007t_set_if_freq_bits(struct mxl5007t_state *state, | |
244 | enum mxl5007t_if_freq if_freq, | |
245 | int invert_if) | |
246 | { | |
247 | u8 val; | |
248 | ||
249 | switch (if_freq) { | |
250 | case MxL_IF_4_MHZ: | |
251 | val = 0x00; | |
252 | break; | |
253 | case MxL_IF_4_5_MHZ: | |
254 | val = 0x20; | |
255 | break; | |
256 | case MxL_IF_4_57_MHZ: | |
257 | val = 0x30; | |
258 | break; | |
259 | case MxL_IF_5_MHZ: | |
260 | val = 0x40; | |
261 | break; | |
262 | case MxL_IF_5_38_MHZ: | |
263 | val = 0x50; | |
264 | break; | |
265 | case MxL_IF_6_MHZ: | |
266 | val = 0x60; | |
267 | break; | |
268 | case MxL_IF_6_28_MHZ: | |
269 | val = 0x70; | |
270 | break; | |
271 | case MxL_IF_9_1915_MHZ: | |
272 | val = 0x80; | |
273 | break; | |
274 | case MxL_IF_35_25_MHZ: | |
275 | val = 0x90; | |
276 | break; | |
277 | case MxL_IF_36_15_MHZ: | |
278 | val = 0xa0; | |
279 | break; | |
280 | case MxL_IF_44_MHZ: | |
281 | val = 0xb0; | |
282 | break; | |
283 | default: | |
284 | mxl_fail(-EINVAL); | |
285 | return; | |
286 | } | |
287 | set_reg_bits(state->tab_init, 0x0c, 0xf0, val); | |
288 | ||
289 | /* set inverted IF or normal IF */ | |
290 | set_reg_bits(state->tab_init, 0x0c, 0x08, invert_if ? 0x08 : 0x00); | |
291 | ||
292 | return; | |
293 | } | |
294 | ||
295 | static void mxl5007t_set_xtal_freq_bits(struct mxl5007t_state *state, | |
296 | enum mxl5007t_xtal_freq xtal_freq) | |
297 | { | |
298 | u8 val; | |
299 | ||
300 | switch (xtal_freq) { | |
301 | case MxL_XTAL_16_MHZ: | |
302 | val = 0x00; /* select xtal freq & Ref Freq */ | |
303 | break; | |
304 | case MxL_XTAL_20_MHZ: | |
305 | val = 0x11; | |
306 | break; | |
307 | case MxL_XTAL_20_25_MHZ: | |
308 | val = 0x22; | |
309 | break; | |
310 | case MxL_XTAL_20_48_MHZ: | |
311 | val = 0x33; | |
312 | break; | |
313 | case MxL_XTAL_24_MHZ: | |
314 | val = 0x44; | |
315 | break; | |
316 | case MxL_XTAL_25_MHZ: | |
317 | val = 0x55; | |
318 | break; | |
319 | case MxL_XTAL_25_14_MHZ: | |
320 | val = 0x66; | |
321 | break; | |
322 | case MxL_XTAL_27_MHZ: | |
323 | val = 0x77; | |
324 | break; | |
325 | case MxL_XTAL_28_8_MHZ: | |
326 | val = 0x88; | |
327 | break; | |
328 | case MxL_XTAL_32_MHZ: | |
329 | val = 0x99; | |
330 | break; | |
331 | case MxL_XTAL_40_MHZ: | |
332 | val = 0xaa; | |
333 | break; | |
334 | case MxL_XTAL_44_MHZ: | |
335 | val = 0xbb; | |
336 | break; | |
337 | case MxL_XTAL_48_MHZ: | |
338 | val = 0xcc; | |
339 | break; | |
340 | case MxL_XTAL_49_3811_MHZ: | |
341 | val = 0xdd; | |
342 | break; | |
343 | default: | |
344 | mxl_fail(-EINVAL); | |
345 | return; | |
346 | } | |
347 | set_reg_bits(state->tab_init, 0x0b, 0xff, val); | |
348 | ||
349 | return; | |
350 | } | |
351 | ||
352 | static struct reg_pair_t *mxl5007t_calc_init_regs(struct mxl5007t_state *state, | |
353 | enum mxl5007t_mode mode) | |
354 | { | |
355 | struct mxl5007t_config *cfg = state->config; | |
356 | ||
357 | memcpy(&state->tab_init, &init_tab, sizeof(init_tab)); | |
358 | memcpy(&state->tab_init_cable, &init_tab_cable, sizeof(init_tab_cable)); | |
359 | ||
360 | mxl5007t_set_mode_bits(state, mode, cfg->if_diff_out_level); | |
361 | mxl5007t_set_if_freq_bits(state, cfg->if_freq_hz, cfg->invert_if); | |
362 | mxl5007t_set_xtal_freq_bits(state, cfg->xtal_freq_hz); | |
363 | ||
364 | set_reg_bits(state->tab_init, 0x10, 0x40, cfg->loop_thru_enable << 6); | |
365 | ||
366 | set_reg_bits(state->tab_init, 0xd8, 0x08, cfg->clk_out_enable << 3); | |
367 | ||
368 | set_reg_bits(state->tab_init, 0x10, 0x07, cfg->clk_out_amp); | |
369 | ||
370 | /* set IDAC to automatic mode control by AGC */ | |
371 | set_reg_bits(state->tab_init, 0x12, 0x80, 0x00); | |
372 | ||
373 | if (mode >= MxL_MODE_CABLE_DIGITAL) { | |
374 | copy_reg_bits(state->tab_init, state->tab_init_cable); | |
375 | return state->tab_init_cable; | |
376 | } else | |
377 | return state->tab_init; | |
378 | } | |
379 | ||
380 | /* ------------------------------------------------------------------------- */ | |
381 | ||
382 | enum mxl5007t_bw_mhz { | |
383 | MxL_BW_6MHz = 6, | |
384 | MxL_BW_7MHz = 7, | |
385 | MxL_BW_8MHz = 8, | |
386 | }; | |
387 | ||
388 | static void mxl5007t_set_bw_bits(struct mxl5007t_state *state, | |
389 | enum mxl5007t_bw_mhz bw) | |
390 | { | |
391 | u8 val; | |
392 | ||
393 | switch (bw) { | |
394 | case MxL_BW_6MHz: | |
395 | val = 0x15; /* set DIG_MODEINDEX, DIG_MODEINDEX_A, | |
396 | * and DIG_MODEINDEX_CSF */ | |
397 | break; | |
398 | case MxL_BW_7MHz: | |
399 | val = 0x21; | |
400 | break; | |
401 | case MxL_BW_8MHz: | |
402 | val = 0x3f; | |
403 | break; | |
404 | default: | |
405 | mxl_fail(-EINVAL); | |
406 | return; | |
407 | } | |
408 | set_reg_bits(state->tab_rftune, 0x13, 0x3f, val); | |
409 | ||
410 | return; | |
411 | } | |
412 | ||
413 | static struct | |
414 | reg_pair_t *mxl5007t_calc_rf_tune_regs(struct mxl5007t_state *state, | |
415 | u32 rf_freq, enum mxl5007t_bw_mhz bw) | |
416 | { | |
417 | u32 dig_rf_freq = 0; | |
418 | u32 temp; | |
419 | u32 frac_divider = 1000000; | |
420 | unsigned int i; | |
421 | ||
422 | memcpy(&state->tab_rftune, ®_pair_rftune, sizeof(reg_pair_rftune)); | |
423 | ||
424 | mxl5007t_set_bw_bits(state, bw); | |
425 | ||
426 | /* Convert RF frequency into 16 bits => | |
427 | * 10 bit integer (MHz) + 6 bit fraction */ | |
428 | dig_rf_freq = rf_freq / MHz; | |
429 | ||
430 | temp = rf_freq % MHz; | |
431 | ||
432 | for (i = 0; i < 6; i++) { | |
433 | dig_rf_freq <<= 1; | |
434 | frac_divider /= 2; | |
435 | if (temp > frac_divider) { | |
436 | temp -= frac_divider; | |
437 | dig_rf_freq++; | |
438 | } | |
439 | } | |
440 | ||
441 | /* add to have shift center point by 7.8124 kHz */ | |
442 | if (temp > 7812) | |
443 | dig_rf_freq++; | |
444 | ||
445 | set_reg_bits(state->tab_rftune, 0x14, 0xff, (u8)dig_rf_freq); | |
446 | set_reg_bits(state->tab_rftune, 0x15, 0xff, (u8)(dig_rf_freq >> 8)); | |
447 | ||
448 | return state->tab_rftune; | |
449 | } | |
450 | ||
451 | /* ------------------------------------------------------------------------- */ | |
452 | ||
453 | static int mxl5007t_write_reg(struct mxl5007t_state *state, u8 reg, u8 val) | |
454 | { | |
455 | u8 buf[] = { reg, val }; | |
456 | struct i2c_msg msg = { .addr = state->i2c_props.addr, .flags = 0, | |
457 | .buf = buf, .len = 2 }; | |
458 | int ret; | |
459 | ||
460 | ret = i2c_transfer(state->i2c_props.adap, &msg, 1); | |
461 | if (ret != 1) { | |
462 | mxl_err("failed!"); | |
463 | return -EREMOTEIO; | |
464 | } | |
465 | return 0; | |
466 | } | |
467 | ||
468 | static int mxl5007t_write_regs(struct mxl5007t_state *state, | |
469 | struct reg_pair_t *reg_pair) | |
470 | { | |
471 | unsigned int i = 0; | |
472 | int ret = 0; | |
473 | ||
474 | while ((ret == 0) && (reg_pair[i].reg || reg_pair[i].val)) { | |
475 | ret = mxl5007t_write_reg(state, | |
476 | reg_pair[i].reg, reg_pair[i].val); | |
477 | i++; | |
478 | } | |
479 | return ret; | |
480 | } | |
481 | ||
482 | static int mxl5007t_read_reg(struct mxl5007t_state *state, u8 reg, u8 *val) | |
483 | { | |
484 | struct i2c_msg msg[] = { | |
485 | { .addr = state->i2c_props.addr, .flags = 0, | |
486 | .buf = ®, .len = 1 }, | |
487 | { .addr = state->i2c_props.addr, .flags = I2C_M_RD, | |
488 | .buf = val, .len = 1 }, | |
489 | }; | |
490 | int ret; | |
491 | ||
492 | ret = i2c_transfer(state->i2c_props.adap, msg, 2); | |
493 | if (ret != 2) { | |
494 | mxl_err("failed!"); | |
495 | return -EREMOTEIO; | |
496 | } | |
497 | return 0; | |
498 | } | |
499 | ||
500 | static int mxl5007t_soft_reset(struct mxl5007t_state *state) | |
501 | { | |
502 | u8 d = 0xff; | |
503 | struct i2c_msg msg = { .addr = state->i2c_props.addr, .flags = 0, | |
504 | .buf = &d, .len = 1 }; | |
505 | ||
506 | int ret = i2c_transfer(state->i2c_props.adap, &msg, 1); | |
507 | ||
508 | if (ret != 1) { | |
509 | mxl_err("failed!"); | |
510 | return -EREMOTEIO; | |
511 | } | |
512 | return 0; | |
513 | } | |
514 | ||
515 | static int mxl5007t_tuner_init(struct mxl5007t_state *state, | |
516 | enum mxl5007t_mode mode) | |
517 | { | |
518 | struct reg_pair_t *init_regs; | |
519 | int ret; | |
520 | ||
521 | ret = mxl5007t_soft_reset(state); | |
522 | if (mxl_fail(ret)) | |
523 | goto fail; | |
524 | ||
525 | /* calculate initialization reg array */ | |
526 | init_regs = mxl5007t_calc_init_regs(state, mode); | |
527 | ||
528 | ret = mxl5007t_write_regs(state, init_regs); | |
529 | if (mxl_fail(ret)) | |
530 | goto fail; | |
531 | mdelay(1); | |
532 | ||
533 | ret = mxl5007t_write_reg(state, 0x2c, 0x35); | |
534 | mxl_fail(ret); | |
535 | fail: | |
536 | return ret; | |
537 | } | |
538 | ||
539 | static int mxl5007t_tuner_rf_tune(struct mxl5007t_state *state, u32 rf_freq_hz, | |
540 | enum mxl5007t_bw_mhz bw) | |
541 | { | |
542 | struct reg_pair_t *rf_tune_regs; | |
543 | int ret; | |
544 | ||
545 | /* calculate channel change reg array */ | |
546 | rf_tune_regs = mxl5007t_calc_rf_tune_regs(state, rf_freq_hz, bw); | |
547 | ||
548 | ret = mxl5007t_write_regs(state, rf_tune_regs); | |
549 | if (mxl_fail(ret)) | |
550 | goto fail; | |
551 | msleep(3); | |
552 | fail: | |
553 | return ret; | |
554 | } | |
555 | ||
556 | /* ------------------------------------------------------------------------- */ | |
557 | ||
558 | static int mxl5007t_synth_lock_status(struct mxl5007t_state *state, | |
559 | int *rf_locked, int *ref_locked) | |
560 | { | |
561 | u8 d; | |
562 | int ret; | |
563 | ||
564 | *rf_locked = 0; | |
565 | *ref_locked = 0; | |
566 | ||
567 | ret = mxl5007t_read_reg(state, 0xcf, &d); | |
568 | if (mxl_fail(ret)) | |
569 | goto fail; | |
570 | ||
571 | if ((d & 0x0c) == 0x0c) | |
572 | *rf_locked = 1; | |
573 | ||
574 | if ((d & 0x03) == 0x03) | |
575 | *ref_locked = 1; | |
576 | fail: | |
577 | return ret; | |
578 | } | |
579 | ||
2a83e4d5 MK |
580 | /* ------------------------------------------------------------------------- */ |
581 | ||
582 | static int mxl5007t_get_status(struct dvb_frontend *fe, u32 *status) | |
583 | { | |
584 | struct mxl5007t_state *state = fe->tuner_priv; | |
d90958e6 MK |
585 | int rf_locked, ref_locked, ret; |
586 | ||
587 | *status = 0; | |
2a83e4d5 | 588 | |
2a83e4d5 MK |
589 | if (fe->ops.i2c_gate_ctrl) |
590 | fe->ops.i2c_gate_ctrl(fe, 1); | |
591 | ||
592 | ret = mxl5007t_synth_lock_status(state, &rf_locked, &ref_locked); | |
593 | if (mxl_fail(ret)) | |
594 | goto fail; | |
595 | mxl_debug("%s%s", rf_locked ? "rf locked " : "", | |
596 | ref_locked ? "ref locked" : ""); | |
d90958e6 MK |
597 | |
598 | if ((rf_locked) || (ref_locked)) | |
599 | *status |= TUNER_STATUS_LOCKED; | |
2a83e4d5 MK |
600 | fail: |
601 | if (fe->ops.i2c_gate_ctrl) | |
602 | fe->ops.i2c_gate_ctrl(fe, 0); | |
603 | ||
2a83e4d5 MK |
604 | return ret; |
605 | } | |
606 | ||
607 | /* ------------------------------------------------------------------------- */ | |
608 | ||
609 | static int mxl5007t_set_params(struct dvb_frontend *fe, | |
610 | struct dvb_frontend_parameters *params) | |
611 | { | |
612 | struct mxl5007t_state *state = fe->tuner_priv; | |
613 | enum mxl5007t_bw_mhz bw; | |
614 | enum mxl5007t_mode mode; | |
615 | int ret; | |
616 | u32 freq = params->frequency; | |
617 | ||
618 | if (fe->ops.info.type == FE_ATSC) { | |
619 | switch (params->u.vsb.modulation) { | |
620 | case VSB_8: | |
621 | case VSB_16: | |
622 | mode = MxL_MODE_OTA_DVBT_ATSC; | |
623 | break; | |
624 | case QAM_64: | |
625 | case QAM_256: | |
626 | mode = MxL_MODE_CABLE_DIGITAL; | |
627 | break; | |
628 | default: | |
629 | mxl_err("modulation not set!"); | |
630 | return -EINVAL; | |
631 | } | |
632 | bw = MxL_BW_6MHz; | |
633 | } else if (fe->ops.info.type == FE_OFDM) { | |
634 | switch (params->u.ofdm.bandwidth) { | |
635 | case BANDWIDTH_6_MHZ: | |
636 | bw = MxL_BW_6MHz; | |
637 | break; | |
638 | case BANDWIDTH_7_MHZ: | |
639 | bw = MxL_BW_7MHz; | |
640 | break; | |
641 | case BANDWIDTH_8_MHZ: | |
642 | bw = MxL_BW_8MHz; | |
643 | break; | |
644 | default: | |
645 | mxl_err("bandwidth not set!"); | |
646 | return -EINVAL; | |
647 | } | |
648 | mode = MxL_MODE_OTA_DVBT_ATSC; | |
649 | } else { | |
650 | mxl_err("modulation type not supported!"); | |
651 | return -EINVAL; | |
652 | } | |
653 | ||
2a83e4d5 MK |
654 | if (fe->ops.i2c_gate_ctrl) |
655 | fe->ops.i2c_gate_ctrl(fe, 1); | |
656 | ||
c39c1fd2 MK |
657 | mutex_lock(&state->lock); |
658 | ||
2a83e4d5 MK |
659 | ret = mxl5007t_tuner_init(state, mode); |
660 | if (mxl_fail(ret)) | |
661 | goto fail; | |
662 | ||
663 | ret = mxl5007t_tuner_rf_tune(state, freq, bw); | |
664 | if (mxl_fail(ret)) | |
665 | goto fail; | |
666 | ||
667 | state->frequency = freq; | |
668 | state->bandwidth = (fe->ops.info.type == FE_OFDM) ? | |
669 | params->u.ofdm.bandwidth : 0; | |
670 | fail: | |
c39c1fd2 MK |
671 | mutex_unlock(&state->lock); |
672 | ||
2a83e4d5 MK |
673 | if (fe->ops.i2c_gate_ctrl) |
674 | fe->ops.i2c_gate_ctrl(fe, 0); | |
675 | ||
2a83e4d5 MK |
676 | return ret; |
677 | } | |
678 | ||
2a83e4d5 MK |
679 | /* ------------------------------------------------------------------------- */ |
680 | ||
681 | static int mxl5007t_init(struct dvb_frontend *fe) | |
682 | { | |
683 | struct mxl5007t_state *state = fe->tuner_priv; | |
452a53a2 MK |
684 | int ret; |
685 | u8 d; | |
2a83e4d5 | 686 | |
452a53a2 MK |
687 | if (fe->ops.i2c_gate_ctrl) |
688 | fe->ops.i2c_gate_ctrl(fe, 1); | |
689 | ||
690 | ret = mxl5007t_read_reg(state, 0x05, &d); | |
691 | if (mxl_fail(ret)) | |
692 | goto fail; | |
693 | ||
694 | ret = mxl5007t_write_reg(state, 0x05, d | 0x01); | |
695 | mxl_fail(ret); | |
696 | fail: | |
697 | if (fe->ops.i2c_gate_ctrl) | |
698 | fe->ops.i2c_gate_ctrl(fe, 0); | |
699 | ||
452a53a2 | 700 | return ret; |
2a83e4d5 MK |
701 | } |
702 | ||
703 | static int mxl5007t_sleep(struct dvb_frontend *fe) | |
704 | { | |
705 | struct mxl5007t_state *state = fe->tuner_priv; | |
452a53a2 MK |
706 | int ret; |
707 | u8 d; | |
2a83e4d5 | 708 | |
452a53a2 MK |
709 | if (fe->ops.i2c_gate_ctrl) |
710 | fe->ops.i2c_gate_ctrl(fe, 1); | |
711 | ||
712 | ret = mxl5007t_read_reg(state, 0x05, &d); | |
713 | if (mxl_fail(ret)) | |
714 | goto fail; | |
715 | ||
716 | ret = mxl5007t_write_reg(state, 0x05, d & ~0x01); | |
717 | mxl_fail(ret); | |
718 | fail: | |
719 | if (fe->ops.i2c_gate_ctrl) | |
720 | fe->ops.i2c_gate_ctrl(fe, 0); | |
721 | ||
452a53a2 | 722 | return ret; |
2a83e4d5 MK |
723 | } |
724 | ||
725 | /* ------------------------------------------------------------------------- */ | |
726 | ||
727 | static int mxl5007t_get_frequency(struct dvb_frontend *fe, u32 *frequency) | |
728 | { | |
729 | struct mxl5007t_state *state = fe->tuner_priv; | |
730 | *frequency = state->frequency; | |
731 | return 0; | |
732 | } | |
733 | ||
734 | static int mxl5007t_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth) | |
735 | { | |
736 | struct mxl5007t_state *state = fe->tuner_priv; | |
737 | *bandwidth = state->bandwidth; | |
738 | return 0; | |
739 | } | |
740 | ||
741 | static int mxl5007t_release(struct dvb_frontend *fe) | |
742 | { | |
743 | struct mxl5007t_state *state = fe->tuner_priv; | |
744 | ||
745 | mutex_lock(&mxl5007t_list_mutex); | |
746 | ||
747 | if (state) | |
748 | hybrid_tuner_release_state(state); | |
749 | ||
750 | mutex_unlock(&mxl5007t_list_mutex); | |
751 | ||
752 | fe->tuner_priv = NULL; | |
753 | ||
754 | return 0; | |
755 | } | |
756 | ||
757 | /* ------------------------------------------------------------------------- */ | |
758 | ||
759 | static struct dvb_tuner_ops mxl5007t_tuner_ops = { | |
760 | .info = { | |
761 | .name = "MaxLinear MxL5007T", | |
762 | }, | |
763 | .init = mxl5007t_init, | |
764 | .sleep = mxl5007t_sleep, | |
765 | .set_params = mxl5007t_set_params, | |
2a83e4d5 MK |
766 | .get_status = mxl5007t_get_status, |
767 | .get_frequency = mxl5007t_get_frequency, | |
768 | .get_bandwidth = mxl5007t_get_bandwidth, | |
769 | .release = mxl5007t_release, | |
770 | }; | |
771 | ||
772 | static int mxl5007t_get_chip_id(struct mxl5007t_state *state) | |
773 | { | |
774 | char *name; | |
775 | int ret; | |
776 | u8 id; | |
777 | ||
778 | ret = mxl5007t_read_reg(state, 0xd3, &id); | |
779 | if (mxl_fail(ret)) | |
780 | goto fail; | |
781 | ||
782 | switch (id) { | |
783 | case MxL_5007_V1_F1: | |
784 | name = "MxL5007.v1.f1"; | |
785 | break; | |
786 | case MxL_5007_V1_F2: | |
787 | name = "MxL5007.v1.f2"; | |
788 | break; | |
789 | case MxL_5007_V2_100_F1: | |
790 | name = "MxL5007.v2.100.f1"; | |
791 | break; | |
792 | case MxL_5007_V2_100_F2: | |
793 | name = "MxL5007.v2.100.f2"; | |
794 | break; | |
795 | case MxL_5007_V2_200_F1: | |
796 | name = "MxL5007.v2.200.f1"; | |
797 | break; | |
798 | case MxL_5007_V2_200_F2: | |
799 | name = "MxL5007.v2.200.f2"; | |
800 | break; | |
801 | default: | |
802 | name = "MxL5007T"; | |
803 | id = MxL_UNKNOWN_ID; | |
804 | } | |
805 | state->chip_id = id; | |
806 | mxl_info("%s detected @ %d-%04x", name, | |
807 | i2c_adapter_id(state->i2c_props.adap), | |
808 | state->i2c_props.addr); | |
809 | return 0; | |
810 | fail: | |
811 | mxl_warn("unable to identify device @ %d-%04x", | |
812 | i2c_adapter_id(state->i2c_props.adap), | |
813 | state->i2c_props.addr); | |
814 | ||
815 | state->chip_id = MxL_UNKNOWN_ID; | |
816 | return ret; | |
817 | } | |
818 | ||
819 | struct dvb_frontend *mxl5007t_attach(struct dvb_frontend *fe, | |
820 | struct i2c_adapter *i2c, u8 addr, | |
821 | struct mxl5007t_config *cfg) | |
822 | { | |
823 | struct mxl5007t_state *state = NULL; | |
824 | int instance, ret; | |
825 | ||
826 | mutex_lock(&mxl5007t_list_mutex); | |
827 | instance = hybrid_tuner_request_state(struct mxl5007t_state, state, | |
828 | hybrid_tuner_instance_list, | |
829 | i2c, addr, "mxl5007"); | |
830 | switch (instance) { | |
831 | case 0: | |
832 | goto fail; | |
2a83e4d5 MK |
833 | case 1: |
834 | /* new tuner instance */ | |
835 | state->config = cfg; | |
836 | ||
837 | mutex_init(&state->lock); | |
838 | ||
2a83e4d5 MK |
839 | if (fe->ops.i2c_gate_ctrl) |
840 | fe->ops.i2c_gate_ctrl(fe, 1); | |
841 | ||
842 | ret = mxl5007t_get_chip_id(state); | |
843 | ||
844 | if (fe->ops.i2c_gate_ctrl) | |
845 | fe->ops.i2c_gate_ctrl(fe, 0); | |
846 | ||
2a83e4d5 MK |
847 | /* check return value of mxl5007t_get_chip_id */ |
848 | if (mxl_fail(ret)) | |
849 | goto fail; | |
850 | break; | |
851 | default: | |
852 | /* existing tuner instance */ | |
853 | break; | |
854 | } | |
855 | fe->tuner_priv = state; | |
856 | mutex_unlock(&mxl5007t_list_mutex); | |
857 | ||
858 | memcpy(&fe->ops.tuner_ops, &mxl5007t_tuner_ops, | |
859 | sizeof(struct dvb_tuner_ops)); | |
860 | ||
861 | return fe; | |
862 | fail: | |
863 | mutex_unlock(&mxl5007t_list_mutex); | |
864 | ||
865 | mxl5007t_release(fe); | |
866 | return NULL; | |
867 | } | |
868 | EXPORT_SYMBOL_GPL(mxl5007t_attach); | |
869 | MODULE_DESCRIPTION("MaxLinear MxL5007T Silicon IC tuner driver"); | |
870 | MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>"); | |
871 | MODULE_LICENSE("GPL"); | |
872 | MODULE_VERSION("0.1"); | |
873 | ||
874 | /* | |
875 | * Overrides for Emacs so that we follow Linus's tabbing style. | |
876 | * --------------------------------------------------------------------------- | |
877 | * Local variables: | |
878 | * c-basic-offset: 8 | |
879 | * End: | |
880 | */ |