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Commit | Line | Data |
---|---|---|
2add87a9 | 1 | /* |
91b94366 UB |
2 | * Linux driver the digital TV devices equipped with B2C2 FlexcopII(b)/III |
3 | * flexcop-pci.c - covers the PCI part including DMA transfers | |
4 | * see flexcop.c for copyright information | |
2add87a9 JS |
5 | */ |
6 | ||
7 | #define FC_LOG_PREFIX "flexcop-pci" | |
8 | #include "flexcop-common.h" | |
9 | ||
c4ee3fd4 | 10 | static int enable_pid_filtering = 1; |
2add87a9 | 11 | module_param(enable_pid_filtering, int, 0444); |
91b94366 UB |
12 | MODULE_PARM_DESC(enable_pid_filtering, |
13 | "enable hardware pid filtering: supported values: 0 (fullts), 1"); | |
2add87a9 | 14 | |
382c5546 | 15 | static int irq_chk_intv = 100; |
64221be7 | 16 | module_param(irq_chk_intv, int, 0644); |
382c5546 | 17 | MODULE_PARM_DESC(irq_chk_intv, "set the interval for IRQ streaming watchdog."); |
64221be7 | 18 | |
2add87a9 JS |
19 | #ifdef CONFIG_DVB_B2C2_FLEXCOP_DEBUG |
20 | #define dprintk(level,args...) \ | |
21 | do { if ((debug & level)) printk(args); } while (0) | |
22 | #define DEBSTATUS "" | |
23 | #else | |
24 | #define dprintk(level,args...) | |
25 | #define DEBSTATUS " (debugging is not enabled)" | |
26 | #endif | |
27 | ||
91b94366 UB |
28 | #define deb_info(args...) dprintk(0x01, args) |
29 | #define deb_reg(args...) dprintk(0x02, args) | |
30 | #define deb_ts(args...) dprintk(0x04, args) | |
31 | #define deb_irq(args...) dprintk(0x08, args) | |
32 | #define deb_chk(args...) dprintk(0x10, args) | |
2add87a9 | 33 | |
ff699e6b | 34 | static int debug; |
2add87a9 | 35 | module_param(debug, int, 0644); |
382c5546 PB |
36 | MODULE_PARM_DESC(debug, |
37 | "set debug level (1=info,2=regs,4=TS,8=irqdma,16=check (|-able))." | |
91b94366 | 38 | DEBSTATUS); |
2add87a9 JS |
39 | |
40 | #define DRIVER_VERSION "0.1" | |
41 | #define DRIVER_NAME "Technisat/B2C2 FlexCop II/IIb/III Digital TV PCI Driver" | |
42 | #define DRIVER_AUTHOR "Patrick Boettcher <patrick.boettcher@desy.de>" | |
43 | ||
44 | struct flexcop_pci { | |
45 | struct pci_dev *pdev; | |
46 | ||
47 | #define FC_PCI_INIT 0x01 | |
48 | #define FC_PCI_DMA_INIT 0x02 | |
49 | int init_state; | |
50 | ||
51 | void __iomem *io_mem; | |
52 | u32 irq; | |
91b94366 UB |
53 | /* buffersize (at least for DMA1, need to be % 188 == 0, |
54 | * this logic is required */ | |
2add87a9 JS |
55 | #define FC_DEFAULT_DMA1_BUFSIZE (1280 * 188) |
56 | #define FC_DEFAULT_DMA2_BUFSIZE (10 * 188) | |
57 | struct flexcop_dma dma[2]; | |
58 | ||
59 | int active_dma1_addr; /* 0 = addr0 of dma1; 1 = addr1 of dma1 */ | |
91b94366 | 60 | u32 last_dma1_cur_pos; |
25985edc | 61 | /* position of the pointer last time the timer/packet irq occurred */ |
c4ee3fd4 | 62 | int count; |
382c5546 PB |
63 | int count_prev; |
64 | int stream_problem; | |
2add87a9 | 65 | |
4853f16a | 66 | spinlock_t irq_lock; |
64221be7 PB |
67 | unsigned long last_irq; |
68 | ||
c4028958 | 69 | struct delayed_work irq_check_work; |
2add87a9 JS |
70 | struct flexcop_device *fc_dev; |
71 | }; | |
72 | ||
91b94366 | 73 | static int lastwreg, lastwval, lastrreg, lastrval; |
2add87a9 | 74 | |
91b94366 UB |
75 | static flexcop_ibi_value flexcop_pci_read_ibi_reg(struct flexcop_device *fc, |
76 | flexcop_ibi_register r) | |
2add87a9 JS |
77 | { |
78 | struct flexcop_pci *fc_pci = fc->bus_specific; | |
79 | flexcop_ibi_value v; | |
80 | v.raw = readl(fc_pci->io_mem + r); | |
81 | ||
82 | if (lastrreg != r || lastrval != v.raw) { | |
83 | lastrreg = r; lastrval = v.raw; | |
91b94366 | 84 | deb_reg("new rd: %3x: %08x\n", r, v.raw); |
2add87a9 JS |
85 | } |
86 | ||
87 | return v; | |
88 | } | |
89 | ||
91b94366 UB |
90 | static int flexcop_pci_write_ibi_reg(struct flexcop_device *fc, |
91 | flexcop_ibi_register r, flexcop_ibi_value v) | |
2add87a9 JS |
92 | { |
93 | struct flexcop_pci *fc_pci = fc->bus_specific; | |
94 | ||
95 | if (lastwreg != r || lastwval != v.raw) { | |
96 | lastwreg = r; lastwval = v.raw; | |
91b94366 | 97 | deb_reg("new wr: %3x: %08x\n", r, v.raw); |
2add87a9 JS |
98 | } |
99 | ||
100 | writel(v.raw, fc_pci->io_mem + r); | |
101 | return 0; | |
102 | } | |
103 | ||
c4028958 | 104 | static void flexcop_pci_irq_check_work(struct work_struct *work) |
64221be7 | 105 | { |
c4028958 DH |
106 | struct flexcop_pci *fc_pci = |
107 | container_of(work, struct flexcop_pci, irq_check_work.work); | |
64221be7 PB |
108 | struct flexcop_device *fc = fc_pci->fc_dev; |
109 | ||
382c5546 PB |
110 | if (fc->feedcount) { |
111 | ||
112 | if (fc_pci->count == fc_pci->count_prev) { | |
113 | deb_chk("no IRQ since the last check\n"); | |
114 | if (fc_pci->stream_problem++ == 3) { | |
115 | struct dvb_demux_feed *feed; | |
a27e4fd3 | 116 | deb_info("flexcop-pci: stream problem, resetting pid filter\n"); |
382c5546 PB |
117 | |
118 | spin_lock_irq(&fc->demux.lock); | |
119 | list_for_each_entry(feed, &fc->demux.feed_list, | |
91b94366 | 120 | list_head) { |
382c5546 PB |
121 | flexcop_pid_feed_control(fc, feed, 0); |
122 | } | |
123 | ||
124 | list_for_each_entry(feed, &fc->demux.feed_list, | |
91b94366 | 125 | list_head) { |
382c5546 PB |
126 | flexcop_pid_feed_control(fc, feed, 1); |
127 | } | |
128 | spin_unlock_irq(&fc->demux.lock); | |
129 | ||
130 | fc_pci->stream_problem = 0; | |
131 | } | |
132 | } else { | |
133 | fc_pci->stream_problem = 0; | |
134 | fc_pci->count_prev = fc_pci->count; | |
135 | } | |
136 | } | |
64221be7 PB |
137 | |
138 | schedule_delayed_work(&fc_pci->irq_check_work, | |
139 | msecs_to_jiffies(irq_chk_intv < 100 ? 100 : irq_chk_intv)); | |
140 | } | |
141 | ||
2add87a9 JS |
142 | /* When PID filtering is turned on, we use the timer IRQ, because small amounts |
143 | * of data need to be passed to the user space instantly as well. When PID | |
144 | * filtering is turned off, we use the page-change-IRQ */ | |
7d12e780 | 145 | static irqreturn_t flexcop_pci_isr(int irq, void *dev_id) |
2add87a9 JS |
146 | { |
147 | struct flexcop_pci *fc_pci = dev_id; | |
148 | struct flexcop_device *fc = fc_pci->fc_dev; | |
4f210e07 | 149 | unsigned long flags; |
64221be7 | 150 | flexcop_ibi_value v; |
4853f16a JS |
151 | irqreturn_t ret = IRQ_HANDLED; |
152 | ||
91b94366 UB |
153 | spin_lock_irqsave(&fc_pci->irq_lock, flags); |
154 | v = fc->read_ibi_reg(fc, irq_20c); | |
64221be7 | 155 | |
91b94366 | 156 | /* errors */ |
64221be7 PB |
157 | if (v.irq_20c.Data_receiver_error) |
158 | deb_chk("data receiver error\n"); | |
159 | if (v.irq_20c.Continuity_error_flag) | |
160 | deb_chk("Contunuity error flag is set\n"); | |
161 | if (v.irq_20c.LLC_SNAP_FLAG_set) | |
162 | deb_chk("LLC_SNAP_FLAG_set is set\n"); | |
163 | if (v.irq_20c.Transport_Error) | |
164 | deb_chk("Transport error\n"); | |
165 | ||
166 | if ((fc_pci->count % 1000) == 0) | |
91b94366 | 167 | deb_chk("%d valid irq took place so far\n", fc_pci->count); |
64221be7 | 168 | |
2add87a9 JS |
169 | if (v.irq_20c.DMA1_IRQ_Status == 1) { |
170 | if (fc_pci->active_dma1_addr == 0) | |
91b94366 UB |
171 | flexcop_pass_dmx_packets(fc_pci->fc_dev, |
172 | fc_pci->dma[0].cpu_addr0, | |
173 | fc_pci->dma[0].size / 188); | |
2add87a9 | 174 | else |
91b94366 UB |
175 | flexcop_pass_dmx_packets(fc_pci->fc_dev, |
176 | fc_pci->dma[0].cpu_addr1, | |
177 | fc_pci->dma[0].size / 188); | |
2add87a9 JS |
178 | |
179 | deb_irq("page change to page: %d\n",!fc_pci->active_dma1_addr); | |
180 | fc_pci->active_dma1_addr = !fc_pci->active_dma1_addr; | |
2add87a9 JS |
181 | /* for the timer IRQ we only can use buffer dmx feeding, because we don't have |
182 | * complete TS packets when reading from the DMA memory */ | |
91b94366 | 183 | } else if (v.irq_20c.DMA1_Timer_Status == 1) { |
2add87a9 JS |
184 | dma_addr_t cur_addr = |
185 | fc->read_ibi_reg(fc,dma1_008).dma_0x8.dma_cur_addr << 2; | |
186 | u32 cur_pos = cur_addr - fc_pci->dma[0].dma_addr0; | |
187 | ||
91b94366 UB |
188 | deb_irq("%u irq: %08x cur_addr: %llx: cur_pos: %08x, " |
189 | "last_cur_pos: %08x ", | |
608268b2 RD |
190 | jiffies_to_usecs(jiffies - fc_pci->last_irq), |
191 | v.raw, (unsigned long long)cur_addr, cur_pos, | |
192 | fc_pci->last_dma1_cur_pos); | |
64221be7 | 193 | fc_pci->last_irq = jiffies; |
c4ee3fd4 | 194 | |
2add87a9 JS |
195 | /* buffer end was reached, restarted from the beginning |
196 | * pass the data from last_cur_pos to the buffer end to the demux | |
197 | */ | |
198 | if (cur_pos < fc_pci->last_dma1_cur_pos) { | |
91b94366 UB |
199 | deb_irq(" end was reached: passing %d bytes ", |
200 | (fc_pci->dma[0].size*2 - 1) - | |
201 | fc_pci->last_dma1_cur_pos); | |
2add87a9 | 202 | flexcop_pass_dmx_data(fc_pci->fc_dev, |
91b94366 UB |
203 | fc_pci->dma[0].cpu_addr0 + |
204 | fc_pci->last_dma1_cur_pos, | |
205 | (fc_pci->dma[0].size*2) - | |
206 | fc_pci->last_dma1_cur_pos); | |
2add87a9 JS |
207 | fc_pci->last_dma1_cur_pos = 0; |
208 | } | |
209 | ||
210 | if (cur_pos > fc_pci->last_dma1_cur_pos) { | |
91b94366 UB |
211 | deb_irq(" passing %d bytes ", |
212 | cur_pos - fc_pci->last_dma1_cur_pos); | |
2add87a9 | 213 | flexcop_pass_dmx_data(fc_pci->fc_dev, |
91b94366 UB |
214 | fc_pci->dma[0].cpu_addr0 + |
215 | fc_pci->last_dma1_cur_pos, | |
216 | cur_pos - fc_pci->last_dma1_cur_pos); | |
2add87a9 | 217 | } |
c4ee3fd4 | 218 | deb_irq("\n"); |
2add87a9 JS |
219 | |
220 | fc_pci->last_dma1_cur_pos = cur_pos; | |
64221be7 PB |
221 | fc_pci->count++; |
222 | } else { | |
91b94366 UB |
223 | deb_irq("isr for flexcop called, " |
224 | "apparently without reason (%08x)\n", v.raw); | |
4853f16a | 225 | ret = IRQ_NONE; |
64221be7 | 226 | } |
4853f16a | 227 | |
91b94366 | 228 | spin_unlock_irqrestore(&fc_pci->irq_lock, flags); |
4853f16a | 229 | return ret; |
2add87a9 JS |
230 | } |
231 | ||
232 | static int flexcop_pci_stream_control(struct flexcop_device *fc, int onoff) | |
233 | { | |
234 | struct flexcop_pci *fc_pci = fc->bus_specific; | |
235 | if (onoff) { | |
91b94366 UB |
236 | flexcop_dma_config(fc, &fc_pci->dma[0], FC_DMA_1); |
237 | flexcop_dma_config(fc, &fc_pci->dma[1], FC_DMA_2); | |
238 | flexcop_dma_config_timer(fc, FC_DMA_1, 0); | |
239 | flexcop_dma_xfer_control(fc, FC_DMA_1, | |
240 | FC_DMA_SUBADDR_0 | FC_DMA_SUBADDR_1, 1); | |
64221be7 | 241 | deb_irq("DMA xfer enabled\n"); |
2add87a9 | 242 | |
64221be7 | 243 | fc_pci->last_dma1_cur_pos = 0; |
91b94366 | 244 | flexcop_dma_control_timer_irq(fc, FC_DMA_1, 1); |
64221be7 | 245 | deb_irq("IRQ enabled\n"); |
382c5546 | 246 | fc_pci->count_prev = fc_pci->count; |
2add87a9 | 247 | } else { |
91b94366 | 248 | flexcop_dma_control_timer_irq(fc, FC_DMA_1, 0); |
64221be7 | 249 | deb_irq("IRQ disabled\n"); |
2add87a9 | 250 | |
91b94366 UB |
251 | flexcop_dma_xfer_control(fc, FC_DMA_1, |
252 | FC_DMA_SUBADDR_0 | FC_DMA_SUBADDR_1, 0); | |
64221be7 | 253 | deb_irq("DMA xfer disabled\n"); |
2add87a9 | 254 | } |
2add87a9 JS |
255 | return 0; |
256 | } | |
257 | ||
258 | static int flexcop_pci_dma_init(struct flexcop_pci *fc_pci) | |
259 | { | |
260 | int ret; | |
91b94366 UB |
261 | ret = flexcop_dma_allocate(fc_pci->pdev, &fc_pci->dma[0], |
262 | FC_DEFAULT_DMA1_BUFSIZE); | |
263 | if (ret != 0) | |
2add87a9 JS |
264 | return ret; |
265 | ||
91b94366 UB |
266 | ret = flexcop_dma_allocate(fc_pci->pdev, &fc_pci->dma[1], |
267 | FC_DEFAULT_DMA2_BUFSIZE); | |
268 | if (ret != 0) { | |
8397703e TP |
269 | flexcop_dma_free(&fc_pci->dma[0]); |
270 | return ret; | |
271 | } | |
2add87a9 | 272 | |
91b94366 UB |
273 | flexcop_sram_set_dest(fc_pci->fc_dev, FC_SRAM_DEST_MEDIA | |
274 | FC_SRAM_DEST_NET, FC_SRAM_DEST_TARGET_DMA1); | |
275 | flexcop_sram_set_dest(fc_pci->fc_dev, FC_SRAM_DEST_CAO | | |
276 | FC_SRAM_DEST_CAI, FC_SRAM_DEST_TARGET_DMA2); | |
2add87a9 | 277 | fc_pci->init_state |= FC_PCI_DMA_INIT; |
2add87a9 JS |
278 | return ret; |
279 | } | |
280 | ||
281 | static void flexcop_pci_dma_exit(struct flexcop_pci *fc_pci) | |
282 | { | |
283 | if (fc_pci->init_state & FC_PCI_DMA_INIT) { | |
284 | flexcop_dma_free(&fc_pci->dma[0]); | |
285 | flexcop_dma_free(&fc_pci->dma[1]); | |
286 | } | |
287 | fc_pci->init_state &= ~FC_PCI_DMA_INIT; | |
288 | } | |
289 | ||
290 | static int flexcop_pci_init(struct flexcop_pci *fc_pci) | |
291 | { | |
292 | int ret; | |
293 | u8 card_rev; | |
294 | ||
295 | pci_read_config_byte(fc_pci->pdev, PCI_CLASS_REVISION, &card_rev); | |
296 | info("card revision %x", card_rev); | |
297 | ||
298 | if ((ret = pci_enable_device(fc_pci->pdev)) != 0) | |
299 | return ret; | |
2add87a9 JS |
300 | pci_set_master(fc_pci->pdev); |
301 | ||
2add87a9 JS |
302 | if ((ret = pci_request_regions(fc_pci->pdev, DRIVER_NAME)) != 0) |
303 | goto err_pci_disable_device; | |
304 | ||
305 | fc_pci->io_mem = pci_iomap(fc_pci->pdev, 0, 0x800); | |
306 | ||
307 | if (!fc_pci->io_mem) { | |
308 | err("cannot map io memory\n"); | |
309 | ret = -EIO; | |
310 | goto err_pci_release_regions; | |
311 | } | |
312 | ||
313 | pci_set_drvdata(fc_pci->pdev, fc_pci); | |
4f210e07 | 314 | spin_lock_init(&fc_pci->irq_lock); |
64221be7 | 315 | if ((ret = request_irq(fc_pci->pdev->irq, flexcop_pci_isr, |
8076fe32 | 316 | IRQF_SHARED, DRIVER_NAME, fc_pci)) != 0) |
2add87a9 JS |
317 | goto err_pci_iounmap; |
318 | ||
319 | fc_pci->init_state |= FC_PCI_INIT; | |
8397703e | 320 | return ret; |
2add87a9 JS |
321 | |
322 | err_pci_iounmap: | |
323 | pci_iounmap(fc_pci->pdev, fc_pci->io_mem); | |
324 | pci_set_drvdata(fc_pci->pdev, NULL); | |
325 | err_pci_release_regions: | |
326 | pci_release_regions(fc_pci->pdev); | |
327 | err_pci_disable_device: | |
328 | pci_disable_device(fc_pci->pdev); | |
2add87a9 JS |
329 | return ret; |
330 | } | |
331 | ||
332 | static void flexcop_pci_exit(struct flexcop_pci *fc_pci) | |
333 | { | |
334 | if (fc_pci->init_state & FC_PCI_INIT) { | |
335 | free_irq(fc_pci->pdev->irq, fc_pci); | |
336 | pci_iounmap(fc_pci->pdev, fc_pci->io_mem); | |
337 | pci_set_drvdata(fc_pci->pdev, NULL); | |
338 | pci_release_regions(fc_pci->pdev); | |
339 | pci_disable_device(fc_pci->pdev); | |
340 | } | |
341 | fc_pci->init_state &= ~FC_PCI_INIT; | |
342 | } | |
343 | ||
91b94366 UB |
344 | static int flexcop_pci_probe(struct pci_dev *pdev, |
345 | const struct pci_device_id *ent) | |
2add87a9 JS |
346 | { |
347 | struct flexcop_device *fc; | |
348 | struct flexcop_pci *fc_pci; | |
349 | int ret = -ENOMEM; | |
350 | ||
351 | if ((fc = flexcop_device_kmalloc(sizeof(struct flexcop_pci))) == NULL) { | |
352 | err("out of memory\n"); | |
353 | return -ENOMEM; | |
354 | } | |
355 | ||
91b94366 | 356 | /* general flexcop init */ |
2add87a9 JS |
357 | fc_pci = fc->bus_specific; |
358 | fc_pci->fc_dev = fc; | |
359 | ||
360 | fc->read_ibi_reg = flexcop_pci_read_ibi_reg; | |
361 | fc->write_ibi_reg = flexcop_pci_write_ibi_reg; | |
362 | fc->i2c_request = flexcop_i2c_request; | |
363 | fc->get_mac_addr = flexcop_eeprom_check_mac_addr; | |
2add87a9 JS |
364 | fc->stream_control = flexcop_pci_stream_control; |
365 | ||
c4ee3fd4 JS |
366 | if (enable_pid_filtering) |
367 | info("will use the HW PID filter."); | |
368 | else | |
369 | info("will pass the complete TS to the demuxer."); | |
370 | ||
2add87a9 JS |
371 | fc->pid_filtering = enable_pid_filtering; |
372 | fc->bus_type = FC_PCI; | |
2add87a9 | 373 | fc->dev = &pdev->dev; |
59a7ad6c | 374 | fc->owner = THIS_MODULE; |
2add87a9 | 375 | |
91b94366 | 376 | /* bus specific part */ |
2add87a9 JS |
377 | fc_pci->pdev = pdev; |
378 | if ((ret = flexcop_pci_init(fc_pci)) != 0) | |
379 | goto err_kfree; | |
380 | ||
91b94366 | 381 | /* init flexcop */ |
2add87a9 JS |
382 | if ((ret = flexcop_device_initialize(fc)) != 0) |
383 | goto err_pci_exit; | |
384 | ||
91b94366 | 385 | /* init dma */ |
2add87a9 JS |
386 | if ((ret = flexcop_pci_dma_init(fc_pci)) != 0) |
387 | goto err_fc_exit; | |
388 | ||
c4028958 | 389 | INIT_DELAYED_WORK(&fc_pci->irq_check_work, flexcop_pci_irq_check_work); |
64221be7 | 390 | |
91b94366 UB |
391 | if (irq_chk_intv > 0) |
392 | schedule_delayed_work(&fc_pci->irq_check_work, | |
393 | msecs_to_jiffies(irq_chk_intv < 100 ? | |
394 | 100 : | |
395 | irq_chk_intv)); | |
8397703e TP |
396 | return ret; |
397 | ||
2add87a9 JS |
398 | err_fc_exit: |
399 | flexcop_device_exit(fc); | |
400 | err_pci_exit: | |
401 | flexcop_pci_exit(fc_pci); | |
402 | err_kfree: | |
403 | flexcop_device_kfree(fc); | |
2add87a9 JS |
404 | return ret; |
405 | } | |
406 | ||
407 | /* in theory every _exit function should be called exactly two times, | |
408 | * here and in the bail-out-part of the _init-function | |
409 | */ | |
410 | static void flexcop_pci_remove(struct pci_dev *pdev) | |
411 | { | |
412 | struct flexcop_pci *fc_pci = pci_get_drvdata(pdev); | |
413 | ||
382c5546 PB |
414 | if (irq_chk_intv > 0) |
415 | cancel_delayed_work(&fc_pci->irq_check_work); | |
416 | ||
2add87a9 JS |
417 | flexcop_pci_dma_exit(fc_pci); |
418 | flexcop_device_exit(fc_pci->fc_dev); | |
419 | flexcop_pci_exit(fc_pci); | |
420 | flexcop_device_kfree(fc_pci->fc_dev); | |
421 | } | |
422 | ||
423 | static struct pci_device_id flexcop_pci_tbl[] = { | |
424 | { PCI_DEVICE(0x13d0, 0x2103) }, | |
2add87a9 JS |
425 | { }, |
426 | }; | |
427 | ||
428 | MODULE_DEVICE_TABLE(pci, flexcop_pci_tbl); | |
429 | ||
430 | static struct pci_driver flexcop_pci_driver = { | |
63b5c1c4 | 431 | .name = "b2c2_flexcop_pci", |
2add87a9 | 432 | .id_table = flexcop_pci_tbl, |
64221be7 PB |
433 | .probe = flexcop_pci_probe, |
434 | .remove = flexcop_pci_remove, | |
2add87a9 JS |
435 | }; |
436 | ||
437 | static int __init flexcop_pci_module_init(void) | |
438 | { | |
439 | return pci_register_driver(&flexcop_pci_driver); | |
440 | } | |
441 | ||
442 | static void __exit flexcop_pci_module_exit(void) | |
443 | { | |
444 | pci_unregister_driver(&flexcop_pci_driver); | |
445 | } | |
446 | ||
447 | module_init(flexcop_pci_module_init); | |
448 | module_exit(flexcop_pci_module_exit); | |
449 | ||
450 | MODULE_AUTHOR(DRIVER_AUTHOR); | |
451 | MODULE_DESCRIPTION(DRIVER_NAME); | |
452 | MODULE_LICENSE("GPL"); |