]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Bt8xx based DVB adapter driver | |
3 | * | |
4 | * Copyright (C) 2002,2003 Florian Schirmer <jolt@tuxbox.org> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
19 | * | |
20 | */ | |
21 | ||
22 | #include <linux/bitops.h> | |
23 | #include <linux/module.h> | |
24 | #include <linux/moduleparam.h> | |
25 | #include <linux/init.h> | |
26 | #include <linux/device.h> | |
27 | #include <linux/delay.h> | |
28 | #include <linux/slab.h> | |
29 | #include <linux/i2c.h> | |
30 | ||
31 | #include "dmxdev.h" | |
32 | #include "dvbdev.h" | |
33 | #include "dvb_demux.h" | |
34 | #include "dvb_frontend.h" | |
1da177e4 | 35 | #include "dvb-bt8xx.h" |
1da177e4 | 36 | #include "bt878.h" |
3cff00d9 | 37 | #include "dvb-pll.h" |
1da177e4 LT |
38 | |
39 | static int debug; | |
40 | ||
41 | module_param(debug, int, 0644); | |
42 | MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off)."); | |
43 | ||
44 | #define dprintk( args... ) \ | |
1f15ddd0 | 45 | do \ |
1da177e4 | 46 | if (debug) printk(KERN_DEBUG args); \ |
1f15ddd0 | 47 | while (0) |
1da177e4 | 48 | |
05ade5a5 DJ |
49 | #define IF_FREQUENCYx6 217 /* 6 * 36.16666666667MHz */ |
50 | ||
1da177e4 LT |
51 | static void dvb_bt8xx_task(unsigned long data) |
52 | { | |
53 | struct dvb_bt8xx_card *card = (struct dvb_bt8xx_card *)data; | |
54 | ||
55 | //printk("%d ", card->bt->finished_block); | |
56 | ||
57 | while (card->bt->last_block != card->bt->finished_block) { | |
58 | (card->bt->TS_Size ? dvb_dmx_swfilter_204 : dvb_dmx_swfilter) | |
59 | (&card->demux, | |
60 | &card->bt->buf_cpu[card->bt->last_block * | |
61 | card->bt->block_bytes], | |
62 | card->bt->block_bytes); | |
63 | card->bt->last_block = (card->bt->last_block + 1) % | |
64 | card->bt->block_count; | |
65 | } | |
66 | } | |
67 | ||
68 | static int dvb_bt8xx_start_feed(struct dvb_demux_feed *dvbdmxfeed) | |
69 | { | |
70 | struct dvb_demux *dvbdmx = dvbdmxfeed->demux; | |
71 | struct dvb_bt8xx_card *card = dvbdmx->priv; | |
72 | int rc; | |
73 | ||
74 | dprintk("dvb_bt8xx: start_feed\n"); | |
75 | ||
76 | if (!dvbdmx->dmx.frontend) | |
77 | return -EINVAL; | |
78 | ||
3593cab5 | 79 | mutex_lock(&card->lock); |
1da177e4 LT |
80 | card->nfeeds++; |
81 | rc = card->nfeeds; | |
82 | if (card->nfeeds == 1) | |
83 | bt878_start(card->bt, card->gpio_mode, | |
84 | card->op_sync_orin, card->irq_err_ignore); | |
3593cab5 | 85 | mutex_unlock(&card->lock); |
1da177e4 LT |
86 | return rc; |
87 | } | |
88 | ||
89 | static int dvb_bt8xx_stop_feed(struct dvb_demux_feed *dvbdmxfeed) | |
90 | { | |
91 | struct dvb_demux *dvbdmx = dvbdmxfeed->demux; | |
92 | struct dvb_bt8xx_card *card = dvbdmx->priv; | |
93 | ||
94 | dprintk("dvb_bt8xx: stop_feed\n"); | |
95 | ||
96 | if (!dvbdmx->dmx.frontend) | |
97 | return -EINVAL; | |
98 | ||
3593cab5 | 99 | mutex_lock(&card->lock); |
1da177e4 LT |
100 | card->nfeeds--; |
101 | if (card->nfeeds == 0) | |
102 | bt878_stop(card->bt); | |
3593cab5 | 103 | mutex_unlock(&card->lock); |
1da177e4 LT |
104 | |
105 | return 0; | |
106 | } | |
107 | ||
108 | static int is_pci_slot_eq(struct pci_dev* adev, struct pci_dev* bdev) | |
109 | { | |
110 | if ((adev->subsystem_vendor == bdev->subsystem_vendor) && | |
111 | (adev->subsystem_device == bdev->subsystem_device) && | |
112 | (adev->bus->number == bdev->bus->number) && | |
113 | (PCI_SLOT(adev->devfn) == PCI_SLOT(bdev->devfn))) | |
114 | return 1; | |
115 | return 0; | |
116 | } | |
117 | ||
8b6c879c | 118 | static struct bt878 __devinit *dvb_bt8xx_878_match(unsigned int bttv_nr, struct pci_dev* bttv_pci_dev) |
1da177e4 LT |
119 | { |
120 | unsigned int card_nr; | |
121 | ||
122 | /* Hmm, n squared. Hope n is small */ | |
1f15ddd0 | 123 | for (card_nr = 0; card_nr < bt878_num; card_nr++) |
1da177e4 LT |
124 | if (is_pci_slot_eq(bt878[card_nr].dev, bttv_pci_dev)) |
125 | return &bt878[card_nr]; | |
1da177e4 LT |
126 | return NULL; |
127 | } | |
128 | ||
1da177e4 LT |
129 | static int thomson_dtt7579_demod_init(struct dvb_frontend* fe) |
130 | { | |
131 | static u8 mt352_clock_config [] = { 0x89, 0x38, 0x38 }; | |
132 | static u8 mt352_reset [] = { 0x50, 0x80 }; | |
133 | static u8 mt352_adc_ctl_1_cfg [] = { 0x8E, 0x40 }; | |
134 | static u8 mt352_agc_cfg [] = { 0x67, 0x28, 0x20 }; | |
135 | static u8 mt352_gpp_ctl_cfg [] = { 0x8C, 0x33 }; | |
136 | static u8 mt352_capt_range_cfg[] = { 0x75, 0x32 }; | |
137 | ||
138 | mt352_write(fe, mt352_clock_config, sizeof(mt352_clock_config)); | |
139 | udelay(2000); | |
140 | mt352_write(fe, mt352_reset, sizeof(mt352_reset)); | |
141 | mt352_write(fe, mt352_adc_ctl_1_cfg, sizeof(mt352_adc_ctl_1_cfg)); | |
142 | ||
143 | mt352_write(fe, mt352_agc_cfg, sizeof(mt352_agc_cfg)); | |
50b215a0 | 144 | mt352_write(fe, mt352_gpp_ctl_cfg, sizeof(mt352_gpp_ctl_cfg)); |
1da177e4 LT |
145 | mt352_write(fe, mt352_capt_range_cfg, sizeof(mt352_capt_range_cfg)); |
146 | ||
147 | return 0; | |
148 | } | |
149 | ||
150 | static int thomson_dtt7579_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params, u8* pllbuf) | |
151 | { | |
152 | u32 div; | |
153 | unsigned char bs = 0; | |
154 | unsigned char cp = 0; | |
155 | ||
1da177e4 LT |
156 | div = (((params->frequency + 83333) * 3) / 500000) + IF_FREQUENCYx6; |
157 | ||
1f15ddd0 DJ |
158 | if (params->frequency < 542000000) |
159 | cp = 0xb4; | |
160 | else if (params->frequency < 771000000) | |
161 | cp = 0xbc; | |
162 | else | |
163 | cp = 0xf4; | |
1da177e4 | 164 | |
1f15ddd0 DJ |
165 | if (params->frequency == 0) |
166 | bs = 0x03; | |
167 | else if (params->frequency < 443250000) | |
168 | bs = 0x02; | |
169 | else | |
170 | bs = 0x08; | |
1da177e4 LT |
171 | |
172 | pllbuf[0] = 0xc0; // Note: non-linux standard PLL i2c address | |
173 | pllbuf[1] = div >> 8; | |
174 | pllbuf[2] = div & 0xff; | |
175 | pllbuf[3] = cp; | |
176 | pllbuf[4] = bs; | |
177 | ||
178 | return 0; | |
179 | } | |
180 | ||
181 | static struct mt352_config thomson_dtt7579_config = { | |
1da177e4 LT |
182 | .demod_address = 0x0f, |
183 | .demod_init = thomson_dtt7579_demod_init, | |
184 | .pll_set = thomson_dtt7579_pll_set, | |
185 | }; | |
186 | ||
8c99024b MK |
187 | static struct zl10353_config thomson_dtt7579_zl10353_config = { |
188 | .demod_address = 0x0f, | |
189 | .pll_set = thomson_dtt7579_pll_set, | |
190 | }; | |
191 | ||
1da177e4 LT |
192 | static int cx24108_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) |
193 | { | |
1f15ddd0 | 194 | u32 freq = params->frequency; |
1da177e4 | 195 | |
1f15ddd0 DJ |
196 | int i, a, n, pump; |
197 | u32 band, pll; | |
1da177e4 | 198 | |
1f15ddd0 DJ |
199 | u32 osci[]={950000,1019000,1075000,1178000,1296000,1432000, |
200 | 1576000,1718000,1856000,2036000,2150000}; | |
201 | u32 bandsel[]={0,0x00020000,0x00040000,0x00100800,0x00101000, | |
202 | 0x00102000,0x00104000,0x00108000,0x00110000, | |
203 | 0x00120000,0x00140000}; | |
1da177e4 | 204 | |
1f15ddd0 | 205 | #define XTAL 1011100 /* Hz, really 1.0111 MHz and a /10 prescaler */ |
50b215a0 JS |
206 | printk("cx24108 debug: entering SetTunerFreq, freq=%d\n",freq); |
207 | ||
208 | /* This is really the bit driving the tuner chip cx24108 */ | |
209 | ||
1f15ddd0 DJ |
210 | if (freq<950000) |
211 | freq = 950000; /* kHz */ | |
212 | else if (freq>2150000) | |
213 | freq = 2150000; /* satellite IF is 950..2150MHz */ | |
50b215a0 JS |
214 | |
215 | /* decide which VCO to use for the input frequency */ | |
216 | for(i=1;(i<sizeof(osci)/sizeof(osci[0]))&&(osci[i]<freq);i++); | |
217 | printk("cx24108 debug: select vco #%d (f=%d)\n",i,freq); | |
218 | band=bandsel[i]; | |
219 | /* the gain values must be set by SetSymbolrate */ | |
220 | /* compute the pll divider needed, from Conexant data sheet, | |
221 | resolved for (n*32+a), remember f(vco) is f(receive) *2 or *4, | |
222 | depending on the divider bit. It is set to /4 on the 2 lowest | |
223 | bands */ | |
224 | n=((i<=2?2:1)*freq*10L)/(XTAL/100); | |
225 | a=n%32; n/=32; if(a==0) n--; | |
226 | pump=(freq<(osci[i-1]+osci[i])/2); | |
227 | pll=0xf8000000| | |
228 | ((pump?1:2)<<(14+11))| | |
229 | ((n&0x1ff)<<(5+11))| | |
230 | ((a&0x1f)<<11); | |
231 | /* everything is shifted left 11 bits to left-align the bits in the | |
232 | 32bit word. Output to the tuner goes MSB-aligned, after all */ | |
233 | printk("cx24108 debug: pump=%d, n=%d, a=%d\n",pump,n,a); | |
234 | cx24110_pll_write(fe,band); | |
235 | /* set vga and vca to their widest-band settings, as a precaution. | |
236 | SetSymbolrate might not be called to set this up */ | |
237 | cx24110_pll_write(fe,0x500c0000); | |
238 | cx24110_pll_write(fe,0x83f1f800); | |
239 | cx24110_pll_write(fe,pll); | |
1f15ddd0 | 240 | //writereg(client,0x56,0x7f); |
1da177e4 LT |
241 | |
242 | return 0; | |
243 | } | |
244 | ||
245 | static int pinnsat_pll_init(struct dvb_frontend* fe) | |
246 | { | |
e7ac4646 MA |
247 | struct dvb_bt8xx_card *card = fe->dvb->priv; |
248 | ||
249 | bttv_gpio_enable(card->bttv_nr, 1, 1); /* output */ | |
250 | bttv_write_gpio(card->bttv_nr, 1, 1); /* relay on */ | |
6457af5f | 251 | |
e7ac4646 MA |
252 | return 0; |
253 | } | |
254 | ||
255 | static int pinnsat_pll_sleep(struct dvb_frontend* fe) | |
256 | { | |
257 | struct dvb_bt8xx_card *card = fe->dvb->priv; | |
258 | ||
259 | bttv_write_gpio(card->bttv_nr, 1, 0); /* relay off */ | |
260 | ||
1f15ddd0 | 261 | return 0; |
1da177e4 LT |
262 | } |
263 | ||
1da177e4 | 264 | static struct cx24110_config pctvsat_config = { |
1da177e4 LT |
265 | .demod_address = 0x55, |
266 | .pll_init = pinnsat_pll_init, | |
267 | .pll_set = cx24108_pll_set, | |
e7ac4646 | 268 | .pll_sleep = pinnsat_pll_sleep, |
1da177e4 LT |
269 | }; |
270 | ||
1da177e4 LT |
271 | static int microtune_mt7202dtf_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) |
272 | { | |
273 | struct dvb_bt8xx_card *card = (struct dvb_bt8xx_card *) fe->dvb->priv; | |
274 | u8 cfg, cpump, band_select; | |
275 | u8 data[4]; | |
276 | u32 div; | |
277 | struct i2c_msg msg = { .addr = 0x60, .flags = 0, .buf = data, .len = sizeof(data) }; | |
278 | ||
279 | div = (36000000 + params->frequency + 83333) / 166666; | |
280 | cfg = 0x88; | |
281 | ||
1f15ddd0 DJ |
282 | if (params->frequency < 175000000) |
283 | cpump = 2; | |
284 | else if (params->frequency < 390000000) | |
285 | cpump = 1; | |
286 | else if (params->frequency < 470000000) | |
287 | cpump = 2; | |
288 | else if (params->frequency < 750000000) | |
289 | cpump = 2; | |
290 | else | |
291 | cpump = 3; | |
1da177e4 | 292 | |
1f15ddd0 DJ |
293 | if (params->frequency < 175000000) |
294 | band_select = 0x0e; | |
295 | else if (params->frequency < 470000000) | |
296 | band_select = 0x05; | |
297 | else | |
298 | band_select = 0x03; | |
1da177e4 LT |
299 | |
300 | data[0] = (div >> 8) & 0x7f; | |
301 | data[1] = div & 0xff; | |
302 | data[2] = ((div >> 10) & 0x60) | cfg; | |
2b70a2f5 | 303 | data[3] = (cpump << 6) | band_select; |
1da177e4 LT |
304 | |
305 | i2c_transfer(card->i2c_adapter, &msg, 1); | |
306 | return (div * 166666 - 36000000); | |
307 | } | |
308 | ||
309 | static int microtune_mt7202dtf_request_firmware(struct dvb_frontend* fe, const struct firmware **fw, char* name) | |
310 | { | |
311 | struct dvb_bt8xx_card* bt = (struct dvb_bt8xx_card*) fe->dvb->priv; | |
312 | ||
313 | return request_firmware(fw, name, &bt->bt->dev->dev); | |
314 | } | |
315 | ||
316 | static struct sp887x_config microtune_mt7202dtf_config = { | |
1da177e4 LT |
317 | .demod_address = 0x70, |
318 | .pll_set = microtune_mt7202dtf_pll_set, | |
319 | .request_firmware = microtune_mt7202dtf_request_firmware, | |
320 | }; | |
321 | ||
1da177e4 LT |
322 | static int advbt771_samsung_tdtc9251dh0_demod_init(struct dvb_frontend* fe) |
323 | { | |
324 | static u8 mt352_clock_config [] = { 0x89, 0x38, 0x2d }; | |
325 | static u8 mt352_reset [] = { 0x50, 0x80 }; | |
326 | static u8 mt352_adc_ctl_1_cfg [] = { 0x8E, 0x40 }; | |
327 | static u8 mt352_agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF, | |
50b215a0 | 328 | 0x00, 0xFF, 0x00, 0x40, 0x40 }; |
1da177e4 LT |
329 | static u8 mt352_av771_extra[] = { 0xB5, 0x7A }; |
330 | static u8 mt352_capt_range_cfg[] = { 0x75, 0x32 }; | |
331 | ||
1da177e4 LT |
332 | mt352_write(fe, mt352_clock_config, sizeof(mt352_clock_config)); |
333 | udelay(2000); | |
334 | mt352_write(fe, mt352_reset, sizeof(mt352_reset)); | |
335 | mt352_write(fe, mt352_adc_ctl_1_cfg, sizeof(mt352_adc_ctl_1_cfg)); | |
336 | ||
337 | mt352_write(fe, mt352_agc_cfg,sizeof(mt352_agc_cfg)); | |
338 | udelay(2000); | |
339 | mt352_write(fe, mt352_av771_extra,sizeof(mt352_av771_extra)); | |
340 | mt352_write(fe, mt352_capt_range_cfg, sizeof(mt352_capt_range_cfg)); | |
341 | ||
342 | return 0; | |
343 | } | |
344 | ||
345 | static int advbt771_samsung_tdtc9251dh0_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params, u8* pllbuf) | |
346 | { | |
347 | u32 div; | |
348 | unsigned char bs = 0; | |
349 | unsigned char cp = 0; | |
350 | ||
1da177e4 LT |
351 | div = (((params->frequency + 83333) * 3) / 500000) + IF_FREQUENCYx6; |
352 | ||
1f15ddd0 DJ |
353 | if (params->frequency < 150000000) |
354 | cp = 0xB4; | |
355 | else if (params->frequency < 173000000) | |
356 | cp = 0xBC; | |
357 | else if (params->frequency < 250000000) | |
358 | cp = 0xB4; | |
359 | else if (params->frequency < 400000000) | |
360 | cp = 0xBC; | |
361 | else if (params->frequency < 420000000) | |
362 | cp = 0xF4; | |
363 | else if (params->frequency < 470000000) | |
364 | cp = 0xFC; | |
365 | else if (params->frequency < 600000000) | |
366 | cp = 0xBC; | |
367 | else if (params->frequency < 730000000) | |
368 | cp = 0xF4; | |
369 | else | |
370 | cp = 0xFC; | |
371 | ||
372 | if (params->frequency < 150000000) | |
373 | bs = 0x01; | |
374 | else if (params->frequency < 173000000) | |
375 | bs = 0x01; | |
376 | else if (params->frequency < 250000000) | |
377 | bs = 0x02; | |
378 | else if (params->frequency < 400000000) | |
379 | bs = 0x02; | |
380 | else if (params->frequency < 420000000) | |
381 | bs = 0x02; | |
382 | else if (params->frequency < 470000000) | |
383 | bs = 0x02; | |
384 | else if (params->frequency < 600000000) | |
385 | bs = 0x08; | |
386 | else if (params->frequency < 730000000) | |
387 | bs = 0x08; | |
388 | else | |
389 | bs = 0x08; | |
1da177e4 LT |
390 | |
391 | pllbuf[0] = 0xc2; // Note: non-linux standard PLL i2c address | |
392 | pllbuf[1] = div >> 8; | |
393 | pllbuf[2] = div & 0xff; | |
394 | pllbuf[3] = cp; | |
395 | pllbuf[4] = bs; | |
396 | ||
397 | return 0; | |
398 | } | |
399 | ||
400 | static struct mt352_config advbt771_samsung_tdtc9251dh0_config = { | |
1da177e4 LT |
401 | .demod_address = 0x0f, |
402 | .demod_init = advbt771_samsung_tdtc9251dh0_demod_init, | |
403 | .pll_set = advbt771_samsung_tdtc9251dh0_pll_set, | |
404 | }; | |
405 | ||
1da177e4 | 406 | static struct dst_config dst_config = { |
1da177e4 LT |
407 | .demod_address = 0x55, |
408 | }; | |
409 | ||
1da177e4 LT |
410 | static int or51211_request_firmware(struct dvb_frontend* fe, const struct firmware **fw, char* name) |
411 | { | |
412 | struct dvb_bt8xx_card* bt = (struct dvb_bt8xx_card*) fe->dvb->priv; | |
413 | ||
414 | return request_firmware(fw, name, &bt->bt->dev->dev); | |
415 | } | |
416 | ||
417 | static void or51211_setmode(struct dvb_frontend * fe, int mode) | |
418 | { | |
419 | struct dvb_bt8xx_card *bt = fe->dvb->priv; | |
420 | bttv_write_gpio(bt->bttv_nr, 0x0002, mode); /* Reset */ | |
421 | msleep(20); | |
422 | } | |
423 | ||
424 | static void or51211_reset(struct dvb_frontend * fe) | |
425 | { | |
426 | struct dvb_bt8xx_card *bt = fe->dvb->priv; | |
427 | ||
428 | /* RESET DEVICE | |
429 | * reset is controled by GPIO-0 | |
430 | * when set to 0 causes reset and when to 1 for normal op | |
431 | * must remain reset for 128 clock cycles on a 50Mhz clock | |
432 | * also PRM1 PRM2 & PRM4 are controled by GPIO-1,GPIO-2 & GPIO-4 | |
433 | * We assume that the reset has be held low long enough or we | |
434 | * have been reset by a power on. When the driver is unloaded | |
435 | * reset set to 0 so if reloaded we have been reset. | |
436 | */ | |
437 | /* reset & PRM1,2&4 are outputs */ | |
438 | int ret = bttv_gpio_enable(bt->bttv_nr, 0x001F, 0x001F); | |
1f15ddd0 | 439 | if (ret != 0) |
05ade5a5 | 440 | printk(KERN_WARNING "or51211: Init Error - Can't Reset DVR (%i)\n", ret); |
1da177e4 LT |
441 | bttv_write_gpio(bt->bttv_nr, 0x001F, 0x0000); /* Reset */ |
442 | msleep(20); | |
443 | /* Now set for normal operation */ | |
444 | bttv_write_gpio(bt->bttv_nr, 0x0001F, 0x0001); | |
445 | /* wait for operation to begin */ | |
446 | msleep(500); | |
447 | } | |
448 | ||
449 | static void or51211_sleep(struct dvb_frontend * fe) | |
450 | { | |
451 | struct dvb_bt8xx_card *bt = fe->dvb->priv; | |
452 | bttv_write_gpio(bt->bttv_nr, 0x0001, 0x0000); | |
453 | } | |
454 | ||
455 | static struct or51211_config or51211_config = { | |
1da177e4 LT |
456 | .demod_address = 0x15, |
457 | .request_firmware = or51211_request_firmware, | |
458 | .setmode = or51211_setmode, | |
459 | .reset = or51211_reset, | |
460 | .sleep = or51211_sleep, | |
461 | }; | |
462 | ||
1da177e4 LT |
463 | static int vp3021_alps_tded4_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) |
464 | { | |
465 | struct dvb_bt8xx_card *card = (struct dvb_bt8xx_card *) fe->dvb->priv; | |
466 | u8 buf[4]; | |
467 | u32 div; | |
468 | struct i2c_msg msg = { .addr = 0x60, .flags = 0, .buf = buf, .len = sizeof(buf) }; | |
469 | ||
470 | div = (params->frequency + 36166667) / 166667; | |
471 | ||
472 | buf[0] = (div >> 8) & 0x7F; | |
473 | buf[1] = div & 0xFF; | |
474 | buf[2] = 0x85; | |
475 | if ((params->frequency >= 47000000) && (params->frequency < 153000000)) | |
476 | buf[3] = 0x01; | |
477 | else if ((params->frequency >= 153000000) && (params->frequency < 430000000)) | |
478 | buf[3] = 0x02; | |
479 | else if ((params->frequency >= 430000000) && (params->frequency < 824000000)) | |
480 | buf[3] = 0x0C; | |
481 | else if ((params->frequency >= 824000000) && (params->frequency < 863000000)) | |
482 | buf[3] = 0x8C; | |
483 | else | |
484 | return -EINVAL; | |
485 | ||
486 | i2c_transfer(card->i2c_adapter, &msg, 1); | |
487 | return 0; | |
488 | } | |
489 | ||
490 | static struct nxt6000_config vp3021_alps_tded4_config = { | |
1da177e4 LT |
491 | .demod_address = 0x0a, |
492 | .clock_inversion = 1, | |
493 | .pll_set = vp3021_alps_tded4_pll_set, | |
494 | }; | |
495 | ||
05ade5a5 DJ |
496 | static int digitv_alps_tded4_demod_init(struct dvb_frontend* fe) |
497 | { | |
498 | static u8 mt352_clock_config [] = { 0x89, 0x38, 0x2d }; | |
499 | static u8 mt352_reset [] = { 0x50, 0x80 }; | |
500 | static u8 mt352_adc_ctl_1_cfg [] = { 0x8E, 0x40 }; | |
501 | static u8 mt352_agc_cfg [] = { 0x67, 0x20, 0xa0 }; | |
502 | static u8 mt352_capt_range_cfg[] = { 0x75, 0x32 }; | |
503 | ||
504 | mt352_write(fe, mt352_clock_config, sizeof(mt352_clock_config)); | |
505 | udelay(2000); | |
506 | mt352_write(fe, mt352_reset, sizeof(mt352_reset)); | |
507 | mt352_write(fe, mt352_adc_ctl_1_cfg, sizeof(mt352_adc_ctl_1_cfg)); | |
508 | mt352_write(fe, mt352_agc_cfg,sizeof(mt352_agc_cfg)); | |
509 | mt352_write(fe, mt352_capt_range_cfg, sizeof(mt352_capt_range_cfg)); | |
510 | ||
511 | return 0; | |
512 | } | |
513 | ||
514 | static int digitv_alps_tded4_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params, u8* pllbuf) | |
515 | { | |
516 | u32 div; | |
517 | struct dvb_ofdm_parameters *op = ¶ms->u.ofdm; | |
518 | ||
519 | div = (((params->frequency + 83333) * 3) / 500000) + IF_FREQUENCYx6; | |
520 | ||
521 | pllbuf[0] = 0xc2; | |
522 | pllbuf[1] = (div >> 8) & 0x7F; | |
523 | pllbuf[2] = div & 0xFF; | |
524 | pllbuf[3] = 0x85; | |
525 | ||
526 | dprintk("frequency %u, div %u\n", params->frequency, div); | |
527 | ||
528 | if (params->frequency < 470000000) | |
529 | pllbuf[4] = 0x02; | |
530 | else if (params->frequency > 823000000) | |
531 | pllbuf[4] = 0x88; | |
532 | else | |
533 | pllbuf[4] = 0x08; | |
534 | ||
535 | if (op->bandwidth == 8) | |
536 | pllbuf[4] |= 0x04; | |
537 | ||
538 | return 0; | |
539 | } | |
540 | ||
541 | static void digitv_alps_tded4_reset(struct dvb_bt8xx_card *bt) | |
542 | { | |
543 | /* | |
544 | * Reset the frontend, must be called before trying | |
545 | * to initialise the MT352 or mt352_attach | |
163d8fed | 546 | * will fail. Same goes for the nxt6000 frontend. |
05ade5a5 DJ |
547 | * |
548 | */ | |
549 | ||
550 | int ret = bttv_gpio_enable(bt->bttv_nr, 0x08, 0x08); | |
551 | if (ret != 0) | |
552 | printk(KERN_WARNING "digitv_alps_tded4: Init Error - Can't Reset DVR (%i)\n", ret); | |
553 | ||
554 | /* Pulse the reset line */ | |
555 | bttv_write_gpio(bt->bttv_nr, 0x08, 0x08); /* High */ | |
556 | bttv_write_gpio(bt->bttv_nr, 0x08, 0x00); /* Low */ | |
557 | msleep(100); | |
558 | ||
559 | bttv_write_gpio(bt->bttv_nr, 0x08, 0x08); /* High */ | |
560 | } | |
561 | ||
562 | static struct mt352_config digitv_alps_tded4_config = { | |
563 | .demod_address = 0x0a, | |
564 | .demod_init = digitv_alps_tded4_demod_init, | |
565 | .pll_set = digitv_alps_tded4_pll_set, | |
566 | }; | |
567 | ||
3cff00d9 MK |
568 | static int tdvs_tua6034_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) |
569 | { | |
570 | struct dvb_bt8xx_card *card = (struct dvb_bt8xx_card *) fe->dvb->priv; | |
3d043661 | 571 | return lg_h06xf_pll_set(fe, card->i2c_adapter, params); |
3cff00d9 MK |
572 | } |
573 | ||
574 | static struct lgdt330x_config tdvs_tua6034_config = { | |
575 | .demod_address = 0x0e, | |
576 | .demod_chip = LGDT3303, | |
577 | .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */ | |
578 | .pll_set = tdvs_tua6034_pll_set, | |
579 | }; | |
580 | ||
581 | static void lgdt330x_reset(struct dvb_bt8xx_card *bt) | |
582 | { | |
583 | /* Set pin 27 of the lgdt3303 chip high to reset the frontend */ | |
584 | ||
585 | /* Pulse the reset line */ | |
586 | bttv_write_gpio(bt->bttv_nr, 0x00e00007, 0x00000001); /* High */ | |
587 | bttv_write_gpio(bt->bttv_nr, 0x00e00007, 0x00000000); /* Low */ | |
588 | msleep(100); | |
589 | ||
590 | bttv_write_gpio(bt->bttv_nr, 0x00e00007, 0x00000001); /* High */ | |
591 | msleep(100); | |
592 | } | |
593 | ||
1da177e4 LT |
594 | static void frontend_init(struct dvb_bt8xx_card *card, u32 type) |
595 | { | |
50b215a0 JS |
596 | int ret; |
597 | struct dst_state* state = NULL; | |
598 | ||
1da177e4 | 599 | switch(type) { |
6cffcc23 | 600 | case BTTV_BOARD_DVICO_DVBT_LITE: |
1da177e4 | 601 | card->fe = mt352_attach(&thomson_dtt7579_config, card->i2c_adapter); |
8c99024b MK |
602 | |
603 | if (card->fe == NULL) | |
604 | card->fe = zl10353_attach(&thomson_dtt7579_zl10353_config, | |
605 | card->i2c_adapter); | |
606 | ||
1da177e4 LT |
607 | if (card->fe != NULL) { |
608 | card->fe->ops->info.frequency_min = 174000000; | |
609 | card->fe->ops->info.frequency_max = 862000000; | |
1da177e4 LT |
610 | } |
611 | break; | |
1da177e4 | 612 | |
6cffcc23 | 613 | case BTTV_BOARD_DVICO_FUSIONHDTV_5_LITE: |
3cff00d9 MK |
614 | lgdt330x_reset(card); |
615 | card->fe = lgdt330x_attach(&tdvs_tua6034_config, card->i2c_adapter); | |
616 | if (card->fe != NULL) | |
617 | dprintk ("dvb_bt8xx: lgdt330x detected\n"); | |
618 | break; | |
3cff00d9 | 619 | |
6cffcc23 | 620 | case BTTV_BOARD_NEBULA_DIGITV: |
05ade5a5 DJ |
621 | /* |
622 | * It is possible to determine the correct frontend using the I2C bus (see the Nebula SDK); | |
623 | * this would be a cleaner solution than trying each frontend in turn. | |
624 | */ | |
625 | ||
626 | /* Old Nebula (marked (c)2003 on high profile pci card) has nxt6000 demod */ | |
163d8fed | 627 | digitv_alps_tded4_reset(card); |
1da177e4 | 628 | card->fe = nxt6000_attach(&vp3021_alps_tded4_config, card->i2c_adapter); |
f30db067 | 629 | if (card->fe != NULL) { |
05ade5a5 | 630 | dprintk ("dvb_bt8xx: an nxt6000 was detected on your digitv card\n"); |
f30db067 SA |
631 | break; |
632 | } | |
05ade5a5 DJ |
633 | |
634 | /* New Nebula (marked (c)2005 on low profile pci card) has mt352 demod */ | |
635 | digitv_alps_tded4_reset(card); | |
636 | card->fe = mt352_attach(&digitv_alps_tded4_config, card->i2c_adapter); | |
637 | ||
638 | if (card->fe != NULL) | |
639 | dprintk ("dvb_bt8xx: an mt352 was detected on your digitv card\n"); | |
1da177e4 LT |
640 | break; |
641 | ||
6cffcc23 | 642 | case BTTV_BOARD_AVDVBT_761: |
1da177e4 | 643 | card->fe = sp887x_attach(µtune_mt7202dtf_config, card->i2c_adapter); |
1da177e4 LT |
644 | break; |
645 | ||
6cffcc23 | 646 | case BTTV_BOARD_AVDVBT_771: |
1da177e4 LT |
647 | card->fe = mt352_attach(&advbt771_samsung_tdtc9251dh0_config, card->i2c_adapter); |
648 | if (card->fe != NULL) { | |
649 | card->fe->ops->info.frequency_min = 174000000; | |
650 | card->fe->ops->info.frequency_max = 862000000; | |
1da177e4 LT |
651 | } |
652 | break; | |
653 | ||
6cffcc23 | 654 | case BTTV_BOARD_TWINHAN_DST: |
50b215a0 JS |
655 | /* DST is not a frontend driver !!! */ |
656 | state = (struct dst_state *) kmalloc(sizeof (struct dst_state), GFP_KERNEL); | |
657 | /* Setup the Card */ | |
658 | state->config = &dst_config; | |
659 | state->i2c = card->i2c_adapter; | |
660 | state->bt = card->bt; | |
661 | ||
662 | /* DST is not a frontend, attaching the ASIC */ | |
663 | if ((dst_attach(state, &card->dvb_adapter)) == NULL) { | |
664 | printk("%s: Could not find a Twinhan DST.\n", __FUNCTION__); | |
665 | break; | |
666 | } | |
667 | card->fe = &state->frontend; | |
668 | ||
669 | /* Attach other DST peripherals if any */ | |
670 | /* Conditional Access device */ | |
1f15ddd0 | 671 | if (state->dst_hw_cap & DST_TYPE_HAS_CA) |
50b215a0 | 672 | ret = dst_ca_attach(state, &card->dvb_adapter); |
1da177e4 LT |
673 | break; |
674 | ||
6cffcc23 | 675 | case BTTV_BOARD_PINNACLESAT: |
1da177e4 | 676 | card->fe = cx24110_attach(&pctvsat_config, card->i2c_adapter); |
1da177e4 LT |
677 | break; |
678 | ||
6cffcc23 | 679 | case BTTV_BOARD_PC_HDTV: |
1da177e4 | 680 | card->fe = or51211_attach(&or51211_config, card->i2c_adapter); |
1da177e4 LT |
681 | break; |
682 | } | |
683 | ||
1f15ddd0 | 684 | if (card->fe == NULL) |
1da177e4 LT |
685 | printk("dvb-bt8xx: A frontend driver was not found for device %04x/%04x subsystem %04x/%04x\n", |
686 | card->bt->dev->vendor, | |
687 | card->bt->dev->device, | |
688 | card->bt->dev->subsystem_vendor, | |
689 | card->bt->dev->subsystem_device); | |
1f15ddd0 | 690 | else |
fdc53a6d | 691 | if (dvb_register_frontend(&card->dvb_adapter, card->fe)) { |
1da177e4 LT |
692 | printk("dvb-bt8xx: Frontend registration failed!\n"); |
693 | if (card->fe->ops->release) | |
694 | card->fe->ops->release(card->fe); | |
695 | card->fe = NULL; | |
696 | } | |
1da177e4 LT |
697 | } |
698 | ||
8b6c879c | 699 | static int __devinit dvb_bt8xx_load_card(struct dvb_bt8xx_card *card, u32 type) |
1da177e4 LT |
700 | { |
701 | int result; | |
702 | ||
d09dbf92 | 703 | if ((result = dvb_register_adapter(&card->dvb_adapter, card->card_name, THIS_MODULE, &card->bt->dev->dev)) < 0) { |
1da177e4 LT |
704 | printk("dvb_bt8xx: dvb_register_adapter failed (errno = %d)\n", result); |
705 | return result; | |
1da177e4 | 706 | } |
fdc53a6d | 707 | card->dvb_adapter.priv = card; |
1da177e4 LT |
708 | |
709 | card->bt->adapter = card->i2c_adapter; | |
710 | ||
711 | memset(&card->demux, 0, sizeof(struct dvb_demux)); | |
712 | ||
713 | card->demux.dmx.capabilities = DMX_TS_FILTERING | DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING; | |
714 | ||
715 | card->demux.priv = card; | |
716 | card->demux.filternum = 256; | |
717 | card->demux.feednum = 256; | |
718 | card->demux.start_feed = dvb_bt8xx_start_feed; | |
719 | card->demux.stop_feed = dvb_bt8xx_stop_feed; | |
720 | card->demux.write_to_decoder = NULL; | |
721 | ||
722 | if ((result = dvb_dmx_init(&card->demux)) < 0) { | |
723 | printk("dvb_bt8xx: dvb_dmx_init failed (errno = %d)\n", result); | |
724 | ||
fdc53a6d | 725 | dvb_unregister_adapter(&card->dvb_adapter); |
1da177e4 LT |
726 | return result; |
727 | } | |
728 | ||
729 | card->dmxdev.filternum = 256; | |
730 | card->dmxdev.demux = &card->demux.dmx; | |
731 | card->dmxdev.capabilities = 0; | |
732 | ||
fdc53a6d | 733 | if ((result = dvb_dmxdev_init(&card->dmxdev, &card->dvb_adapter)) < 0) { |
1da177e4 LT |
734 | printk("dvb_bt8xx: dvb_dmxdev_init failed (errno = %d)\n", result); |
735 | ||
736 | dvb_dmx_release(&card->demux); | |
fdc53a6d | 737 | dvb_unregister_adapter(&card->dvb_adapter); |
1da177e4 LT |
738 | return result; |
739 | } | |
740 | ||
741 | card->fe_hw.source = DMX_FRONTEND_0; | |
742 | ||
743 | if ((result = card->demux.dmx.add_frontend(&card->demux.dmx, &card->fe_hw)) < 0) { | |
744 | printk("dvb_bt8xx: dvb_dmx_init failed (errno = %d)\n", result); | |
745 | ||
746 | dvb_dmxdev_release(&card->dmxdev); | |
747 | dvb_dmx_release(&card->demux); | |
fdc53a6d | 748 | dvb_unregister_adapter(&card->dvb_adapter); |
1da177e4 LT |
749 | return result; |
750 | } | |
751 | ||
752 | card->fe_mem.source = DMX_MEMORY_FE; | |
753 | ||
754 | if ((result = card->demux.dmx.add_frontend(&card->demux.dmx, &card->fe_mem)) < 0) { | |
755 | printk("dvb_bt8xx: dvb_dmx_init failed (errno = %d)\n", result); | |
756 | ||
757 | card->demux.dmx.remove_frontend(&card->demux.dmx, &card->fe_hw); | |
758 | dvb_dmxdev_release(&card->dmxdev); | |
759 | dvb_dmx_release(&card->demux); | |
fdc53a6d | 760 | dvb_unregister_adapter(&card->dvb_adapter); |
1da177e4 LT |
761 | return result; |
762 | } | |
763 | ||
764 | if ((result = card->demux.dmx.connect_frontend(&card->demux.dmx, &card->fe_hw)) < 0) { | |
765 | printk("dvb_bt8xx: dvb_dmx_init failed (errno = %d)\n", result); | |
766 | ||
767 | card->demux.dmx.remove_frontend(&card->demux.dmx, &card->fe_mem); | |
768 | card->demux.dmx.remove_frontend(&card->demux.dmx, &card->fe_hw); | |
769 | dvb_dmxdev_release(&card->dmxdev); | |
770 | dvb_dmx_release(&card->demux); | |
fdc53a6d | 771 | dvb_unregister_adapter(&card->dvb_adapter); |
1da177e4 LT |
772 | return result; |
773 | } | |
774 | ||
fdc53a6d | 775 | dvb_net_init(&card->dvb_adapter, &card->dvbnet, &card->demux.dmx); |
1da177e4 LT |
776 | |
777 | tasklet_init(&card->bt->tasklet, dvb_bt8xx_task, (unsigned long) card); | |
778 | ||
779 | frontend_init(card, type); | |
780 | ||
781 | return 0; | |
782 | } | |
783 | ||
8b6c879c | 784 | static int __devinit dvb_bt8xx_probe(struct bttv_sub_device *sub) |
1da177e4 | 785 | { |
1da177e4 LT |
786 | struct dvb_bt8xx_card *card; |
787 | struct pci_dev* bttv_pci_dev; | |
788 | int ret; | |
789 | ||
7408187d | 790 | if (!(card = kzalloc(sizeof(struct dvb_bt8xx_card), GFP_KERNEL))) |
1da177e4 LT |
791 | return -ENOMEM; |
792 | ||
3593cab5 | 793 | mutex_init(&card->lock); |
1da177e4 LT |
794 | card->bttv_nr = sub->core->nr; |
795 | strncpy(card->card_name, sub->core->name, sizeof(sub->core->name)); | |
796 | card->i2c_adapter = &sub->core->i2c_adap; | |
797 | ||
1f15ddd0 | 798 | switch(sub->core->type) { |
6cffcc23 | 799 | case BTTV_BOARD_PINNACLESAT: |
1da177e4 LT |
800 | card->gpio_mode = 0x0400c060; |
801 | /* should be: BT878_A_GAIN=0,BT878_A_PWRDN,BT878_DA_DPM,BT878_DA_SBR, | |
50b215a0 | 802 | BT878_DA_IOM=1,BT878_DA_APP to enable serial highspeed mode. */ |
df5a4f4f MA |
803 | card->op_sync_orin = BT878_RISC_SYNC_MASK; |
804 | card->irq_err_ignore = BT878_AFBUS | BT878_AFDSR; | |
1da177e4 LT |
805 | break; |
806 | ||
6cffcc23 | 807 | case BTTV_BOARD_DVICO_DVBT_LITE: |
1da177e4 | 808 | card->gpio_mode = 0x0400C060; |
df5a4f4f MA |
809 | card->op_sync_orin = BT878_RISC_SYNC_MASK; |
810 | card->irq_err_ignore = BT878_AFBUS | BT878_AFDSR; | |
1da177e4 LT |
811 | /* 26, 15, 14, 6, 5 |
812 | * A_PWRDN DA_DPM DA_SBR DA_IOM_DA | |
813 | * DA_APP(parallel) */ | |
814 | break; | |
815 | ||
6cffcc23 | 816 | case BTTV_BOARD_DVICO_FUSIONHDTV_5_LITE: |
3cff00d9 MK |
817 | card->gpio_mode = 0x0400c060; |
818 | card->op_sync_orin = BT878_RISC_SYNC_MASK; | |
819 | card->irq_err_ignore = BT878_AFBUS | BT878_AFDSR; | |
820 | break; | |
821 | ||
6cffcc23 | 822 | case BTTV_BOARD_NEBULA_DIGITV: |
6cffcc23 | 823 | case BTTV_BOARD_AVDVBT_761: |
1da177e4 | 824 | card->gpio_mode = (1 << 26) | (1 << 14) | (1 << 5); |
df5a4f4f MA |
825 | card->op_sync_orin = BT878_RISC_SYNC_MASK; |
826 | card->irq_err_ignore = BT878_AFBUS | BT878_AFDSR; | |
1da177e4 LT |
827 | /* A_PWRDN DA_SBR DA_APP (high speed serial) */ |
828 | break; | |
829 | ||
6cffcc23 | 830 | case BTTV_BOARD_AVDVBT_771: //case 0x07711461: |
1da177e4 LT |
831 | card->gpio_mode = 0x0400402B; |
832 | card->op_sync_orin = BT878_RISC_SYNC_MASK; | |
df5a4f4f | 833 | card->irq_err_ignore = BT878_AFBUS | BT878_AFDSR; |
1da177e4 LT |
834 | /* A_PWRDN DA_SBR DA_APP[0] PKTP=10 RISC_ENABLE FIFO_ENABLE*/ |
835 | break; | |
836 | ||
6cffcc23 | 837 | case BTTV_BOARD_TWINHAN_DST: |
1da177e4 LT |
838 | card->gpio_mode = 0x2204f2c; |
839 | card->op_sync_orin = BT878_RISC_SYNC_MASK; | |
840 | card->irq_err_ignore = BT878_APABORT | BT878_ARIPERR | | |
841 | BT878_APPERR | BT878_AFBUS; | |
842 | /* 25,21,14,11,10,9,8,3,2 then | |
843 | * 0x33 = 5,4,1,0 | |
844 | * A_SEL=SML, DA_MLB, DA_SBR, | |
845 | * DA_SDR=f, fifo trigger = 32 DWORDS | |
846 | * IOM = 0 == audio A/D | |
847 | * DPM = 0 == digital audio mode | |
848 | * == async data parallel port | |
849 | * then 0x33 (13 is set by start_capture) | |
850 | * DA_APP = async data parallel port, | |
851 | * ACAP_EN = 1, | |
852 | * RISC+FIFO ENABLE */ | |
853 | break; | |
854 | ||
6cffcc23 | 855 | case BTTV_BOARD_PC_HDTV: |
1da177e4 | 856 | card->gpio_mode = 0x0100EC7B; |
df5a4f4f MA |
857 | card->op_sync_orin = BT878_RISC_SYNC_MASK; |
858 | card->irq_err_ignore = BT878_AFBUS | BT878_AFDSR; | |
1da177e4 LT |
859 | break; |
860 | ||
05ade5a5 | 861 | default: |
1da177e4 LT |
862 | printk(KERN_WARNING "dvb_bt8xx: Unknown bttv card type: %d.\n", |
863 | sub->core->type); | |
864 | kfree(card); | |
865 | return -ENODEV; | |
866 | } | |
867 | ||
868 | dprintk("dvb_bt8xx: identified card%d as %s\n", card->bttv_nr, card->card_name); | |
869 | ||
870 | if (!(bttv_pci_dev = bttv_get_pcidev(card->bttv_nr))) { | |
871 | printk("dvb_bt8xx: no pci device for card %d\n", card->bttv_nr); | |
872 | kfree(card); | |
873 | return -EFAULT; | |
874 | } | |
875 | ||
876 | if (!(card->bt = dvb_bt8xx_878_match(card->bttv_nr, bttv_pci_dev))) { | |
877 | printk("dvb_bt8xx: unable to determine DMA core of card %d,\n", | |
878 | card->bttv_nr); | |
879 | printk("dvb_bt8xx: if you have the ALSA bt87x audio driver " | |
880 | "installed, try removing it.\n"); | |
881 | ||
882 | kfree(card); | |
883 | return -EFAULT; | |
1da177e4 LT |
884 | } |
885 | ||
3593cab5 | 886 | mutex_init(&card->bt->gpio_lock); |
1da177e4 LT |
887 | card->bt->bttv_nr = sub->core->nr; |
888 | ||
889 | if ( (ret = dvb_bt8xx_load_card(card, sub->core->type)) ) { | |
890 | kfree(card); | |
891 | return ret; | |
892 | } | |
893 | ||
348290a4 | 894 | dev_set_drvdata(&sub->dev, card); |
1da177e4 LT |
895 | return 0; |
896 | } | |
897 | ||
a462e9ff | 898 | static void dvb_bt8xx_remove(struct bttv_sub_device *sub) |
1da177e4 | 899 | { |
348290a4 | 900 | struct dvb_bt8xx_card *card = dev_get_drvdata(&sub->dev); |
1da177e4 LT |
901 | |
902 | dprintk("dvb_bt8xx: unloading card%d\n", card->bttv_nr); | |
903 | ||
904 | bt878_stop(card->bt); | |
905 | tasklet_kill(&card->bt->tasklet); | |
906 | dvb_net_release(&card->dvbnet); | |
907 | card->demux.dmx.remove_frontend(&card->demux.dmx, &card->fe_mem); | |
908 | card->demux.dmx.remove_frontend(&card->demux.dmx, &card->fe_hw); | |
909 | dvb_dmxdev_release(&card->dmxdev); | |
910 | dvb_dmx_release(&card->demux); | |
1f15ddd0 DJ |
911 | if (card->fe) |
912 | dvb_unregister_frontend(card->fe); | |
fdc53a6d | 913 | dvb_unregister_adapter(&card->dvb_adapter); |
1da177e4 LT |
914 | |
915 | kfree(card); | |
1da177e4 LT |
916 | } |
917 | ||
918 | static struct bttv_sub_driver driver = { | |
919 | .drv = { | |
920 | .name = "dvb-bt8xx", | |
1da177e4 | 921 | }, |
348290a4 RK |
922 | .probe = dvb_bt8xx_probe, |
923 | .remove = dvb_bt8xx_remove, | |
924 | /* FIXME: | |
925 | * .shutdown = dvb_bt8xx_shutdown, | |
926 | * .suspend = dvb_bt8xx_suspend, | |
927 | * .resume = dvb_bt8xx_resume, | |
928 | */ | |
1da177e4 LT |
929 | }; |
930 | ||
931 | static int __init dvb_bt8xx_init(void) | |
932 | { | |
933 | return bttv_sub_register(&driver, "dvb"); | |
934 | } | |
935 | ||
936 | static void __exit dvb_bt8xx_exit(void) | |
937 | { | |
938 | bttv_sub_unregister(&driver); | |
939 | } | |
940 | ||
941 | module_init(dvb_bt8xx_init); | |
942 | module_exit(dvb_bt8xx_exit); | |
943 | ||
944 | MODULE_DESCRIPTION("Bt8xx based DVB adapter driver"); | |
945 | MODULE_AUTHOR("Florian Schirmer <jolt@tuxbox.org>"); | |
946 | MODULE_LICENSE("GPL"); |